mainstone.c 16 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/mainstone.c
  3. *
  4. * Support for the Intel HCDDBBVA0 Development Platform.
  5. * (go figure how they came up with such name...)
  6. *
  7. * Author: Nicolas Pitre
  8. * Created: Nov 05, 2002
  9. * Copyright: MontaVista Software Inc.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/sysdev.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/sched.h>
  20. #include <linux/bitops.h>
  21. #include <linux/fb.h>
  22. #include <linux/ioport.h>
  23. #include <linux/mtd/mtd.h>
  24. #include <linux/mtd/partitions.h>
  25. #include <linux/backlight.h>
  26. #include <linux/input.h>
  27. #include <linux/gpio_keys.h>
  28. #include <asm/types.h>
  29. #include <asm/setup.h>
  30. #include <asm/memory.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/hardware.h>
  33. #include <asm/irq.h>
  34. #include <asm/sizes.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/map.h>
  37. #include <asm/mach/irq.h>
  38. #include <asm/mach/flash.h>
  39. #include <asm/arch/pxa-regs.h>
  40. #include <asm/arch/pxa2xx-regs.h>
  41. #include <asm/arch/mfp-pxa27x.h>
  42. #include <asm/arch/mainstone.h>
  43. #include <asm/arch/audio.h>
  44. #include <asm/arch/pxafb.h>
  45. #include <asm/arch/i2c.h>
  46. #include <asm/arch/mmc.h>
  47. #include <asm/arch/irda.h>
  48. #include <asm/arch/ohci.h>
  49. #include <asm/arch/pxa27x_keypad.h>
  50. #include "generic.h"
  51. #include "devices.h"
  52. static unsigned long mainstone_pin_config[] = {
  53. /* Chip Select */
  54. GPIO15_nCS_1,
  55. /* LCD - 16bpp Active TFT */
  56. GPIO58_LCD_LDD_0,
  57. GPIO59_LCD_LDD_1,
  58. GPIO60_LCD_LDD_2,
  59. GPIO61_LCD_LDD_3,
  60. GPIO62_LCD_LDD_4,
  61. GPIO63_LCD_LDD_5,
  62. GPIO64_LCD_LDD_6,
  63. GPIO65_LCD_LDD_7,
  64. GPIO66_LCD_LDD_8,
  65. GPIO67_LCD_LDD_9,
  66. GPIO68_LCD_LDD_10,
  67. GPIO69_LCD_LDD_11,
  68. GPIO70_LCD_LDD_12,
  69. GPIO71_LCD_LDD_13,
  70. GPIO72_LCD_LDD_14,
  71. GPIO73_LCD_LDD_15,
  72. GPIO74_LCD_FCLK,
  73. GPIO75_LCD_LCLK,
  74. GPIO76_LCD_PCLK,
  75. GPIO77_LCD_BIAS,
  76. GPIO16_PWM0_OUT, /* Backlight */
  77. /* MMC */
  78. GPIO32_MMC_CLK,
  79. GPIO112_MMC_CMD,
  80. GPIO92_MMC_DAT_0,
  81. GPIO109_MMC_DAT_1,
  82. GPIO110_MMC_DAT_2,
  83. GPIO111_MMC_DAT_3,
  84. /* USB Host Port 1 */
  85. GPIO88_USBH1_PWR,
  86. GPIO89_USBH1_PEN,
  87. /* PC Card */
  88. GPIO48_nPOE,
  89. GPIO49_nPWE,
  90. GPIO50_nPIOR,
  91. GPIO51_nPIOW,
  92. GPIO85_nPCE_1,
  93. GPIO54_nPCE_2,
  94. GPIO79_PSKTSEL,
  95. GPIO55_nPREG,
  96. GPIO56_nPWAIT,
  97. GPIO57_nIOIS16,
  98. /* AC97 */
  99. GPIO45_AC97_SYSCLK,
  100. /* Keypad */
  101. GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH,
  102. GPIO94_KP_DKIN_1 | WAKEUP_ON_LEVEL_HIGH,
  103. GPIO95_KP_DKIN_2 | WAKEUP_ON_LEVEL_HIGH,
  104. GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
  105. GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
  106. GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
  107. GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
  108. GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
  109. GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
  110. GPIO103_KP_MKOUT_0,
  111. GPIO104_KP_MKOUT_1,
  112. GPIO105_KP_MKOUT_2,
  113. GPIO106_KP_MKOUT_3,
  114. GPIO107_KP_MKOUT_4,
  115. GPIO108_KP_MKOUT_5,
  116. GPIO96_KP_MKOUT_6,
  117. /* GPIO */
  118. GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
  119. };
  120. static unsigned long mainstone_irq_enabled;
  121. static void mainstone_mask_irq(unsigned int irq)
  122. {
  123. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  124. MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
  125. }
  126. static void mainstone_unmask_irq(unsigned int irq)
  127. {
  128. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  129. /* the irq can be acknowledged only if deasserted, so it's done here */
  130. MST_INTSETCLR &= ~(1 << mainstone_irq);
  131. MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
  132. }
  133. static struct irq_chip mainstone_irq_chip = {
  134. .name = "FPGA",
  135. .ack = mainstone_mask_irq,
  136. .mask = mainstone_mask_irq,
  137. .unmask = mainstone_unmask_irq,
  138. };
  139. static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
  140. {
  141. unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
  142. do {
  143. GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
  144. if (likely(pending)) {
  145. irq = MAINSTONE_IRQ(0) + __ffs(pending);
  146. desc = irq_desc + irq;
  147. desc_handle_irq(irq, desc);
  148. }
  149. pending = MST_INTSETCLR & mainstone_irq_enabled;
  150. } while (pending);
  151. }
  152. static void __init mainstone_init_irq(void)
  153. {
  154. int irq;
  155. pxa27x_init_irq();
  156. /* setup extra Mainstone irqs */
  157. for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
  158. set_irq_chip(irq, &mainstone_irq_chip);
  159. set_irq_handler(irq, handle_level_irq);
  160. if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
  161. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
  162. else
  163. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  164. }
  165. set_irq_flags(MAINSTONE_IRQ(8), 0);
  166. set_irq_flags(MAINSTONE_IRQ(12), 0);
  167. MST_INTMSKENA = 0;
  168. MST_INTSETCLR = 0;
  169. set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
  170. set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
  171. }
  172. #ifdef CONFIG_PM
  173. static int mainstone_irq_resume(struct sys_device *dev)
  174. {
  175. MST_INTMSKENA = mainstone_irq_enabled;
  176. return 0;
  177. }
  178. static struct sysdev_class mainstone_irq_sysclass = {
  179. .name = "cpld_irq",
  180. .resume = mainstone_irq_resume,
  181. };
  182. static struct sys_device mainstone_irq_device = {
  183. .cls = &mainstone_irq_sysclass,
  184. };
  185. static int __init mainstone_irq_device_init(void)
  186. {
  187. int ret = -ENODEV;
  188. if (machine_is_mainstone()) {
  189. ret = sysdev_class_register(&mainstone_irq_sysclass);
  190. if (ret == 0)
  191. ret = sysdev_register(&mainstone_irq_device);
  192. }
  193. return ret;
  194. }
  195. device_initcall(mainstone_irq_device_init);
  196. #endif
  197. static struct resource smc91x_resources[] = {
  198. [0] = {
  199. .start = (MST_ETH_PHYS + 0x300),
  200. .end = (MST_ETH_PHYS + 0xfffff),
  201. .flags = IORESOURCE_MEM,
  202. },
  203. [1] = {
  204. .start = MAINSTONE_IRQ(3),
  205. .end = MAINSTONE_IRQ(3),
  206. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  207. }
  208. };
  209. static struct platform_device smc91x_device = {
  210. .name = "smc91x",
  211. .id = 0,
  212. .num_resources = ARRAY_SIZE(smc91x_resources),
  213. .resource = smc91x_resources,
  214. };
  215. static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
  216. {
  217. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  218. MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
  219. return 0;
  220. }
  221. static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
  222. {
  223. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  224. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  225. }
  226. static long mst_audio_suspend_mask;
  227. static void mst_audio_suspend(void *priv)
  228. {
  229. mst_audio_suspend_mask = MST_MSCWR2;
  230. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  231. }
  232. static void mst_audio_resume(void *priv)
  233. {
  234. MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
  235. }
  236. static pxa2xx_audio_ops_t mst_audio_ops = {
  237. .startup = mst_audio_startup,
  238. .shutdown = mst_audio_shutdown,
  239. .suspend = mst_audio_suspend,
  240. .resume = mst_audio_resume,
  241. };
  242. static struct platform_device mst_audio_device = {
  243. .name = "pxa2xx-ac97",
  244. .id = -1,
  245. .dev = { .platform_data = &mst_audio_ops },
  246. };
  247. static struct resource flash_resources[] = {
  248. [0] = {
  249. .start = PXA_CS0_PHYS,
  250. .end = PXA_CS0_PHYS + SZ_64M - 1,
  251. .flags = IORESOURCE_MEM,
  252. },
  253. [1] = {
  254. .start = PXA_CS1_PHYS,
  255. .end = PXA_CS1_PHYS + SZ_64M - 1,
  256. .flags = IORESOURCE_MEM,
  257. },
  258. };
  259. static struct mtd_partition mainstoneflash0_partitions[] = {
  260. {
  261. .name = "Bootloader",
  262. .size = 0x00040000,
  263. .offset = 0,
  264. .mask_flags = MTD_WRITEABLE /* force read-only */
  265. },{
  266. .name = "Kernel",
  267. .size = 0x00400000,
  268. .offset = 0x00040000,
  269. },{
  270. .name = "Filesystem",
  271. .size = MTDPART_SIZ_FULL,
  272. .offset = 0x00440000
  273. }
  274. };
  275. static struct flash_platform_data mst_flash_data[2] = {
  276. {
  277. .map_name = "cfi_probe",
  278. .parts = mainstoneflash0_partitions,
  279. .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
  280. }, {
  281. .map_name = "cfi_probe",
  282. .parts = NULL,
  283. .nr_parts = 0,
  284. }
  285. };
  286. static struct platform_device mst_flash_device[2] = {
  287. {
  288. .name = "pxa2xx-flash",
  289. .id = 0,
  290. .dev = {
  291. .platform_data = &mst_flash_data[0],
  292. },
  293. .resource = &flash_resources[0],
  294. .num_resources = 1,
  295. },
  296. {
  297. .name = "pxa2xx-flash",
  298. .id = 1,
  299. .dev = {
  300. .platform_data = &mst_flash_data[1],
  301. },
  302. .resource = &flash_resources[1],
  303. .num_resources = 1,
  304. },
  305. };
  306. #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
  307. static int mainstone_backlight_update_status(struct backlight_device *bl)
  308. {
  309. int brightness = bl->props.brightness;
  310. if (bl->props.power != FB_BLANK_UNBLANK ||
  311. bl->props.fb_blank != FB_BLANK_UNBLANK)
  312. brightness = 0;
  313. if (brightness != 0)
  314. pxa_set_cken(CKEN_PWM0, 1);
  315. PWM_CTRL0 = 0;
  316. PWM_PWDUTY0 = brightness;
  317. PWM_PERVAL0 = bl->props.max_brightness;
  318. if (brightness == 0)
  319. pxa_set_cken(CKEN_PWM0, 0);
  320. return 0; /* pointless return value */
  321. }
  322. static int mainstone_backlight_get_brightness(struct backlight_device *bl)
  323. {
  324. return PWM_PWDUTY0;
  325. }
  326. static /*const*/ struct backlight_ops mainstone_backlight_ops = {
  327. .update_status = mainstone_backlight_update_status,
  328. .get_brightness = mainstone_backlight_get_brightness,
  329. };
  330. static void __init mainstone_backlight_register(void)
  331. {
  332. struct backlight_device *bl;
  333. bl = backlight_device_register("mainstone-bl", &pxa_device_fb.dev,
  334. NULL, &mainstone_backlight_ops);
  335. if (IS_ERR(bl)) {
  336. printk(KERN_ERR "mainstone: unable to register backlight: %ld\n",
  337. PTR_ERR(bl));
  338. return;
  339. }
  340. /*
  341. * broken design - register-then-setup interfaces are
  342. * utterly broken by definition.
  343. */
  344. bl->props.max_brightness = 1023;
  345. bl->props.brightness = 1023;
  346. backlight_update_status(bl);
  347. }
  348. #else
  349. #define mainstone_backlight_register() do { } while (0)
  350. #endif
  351. static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
  352. .pixclock = 50000,
  353. .xres = 640,
  354. .yres = 480,
  355. .bpp = 16,
  356. .hsync_len = 1,
  357. .left_margin = 0x9f,
  358. .right_margin = 1,
  359. .vsync_len = 44,
  360. .upper_margin = 0,
  361. .lower_margin = 0,
  362. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  363. };
  364. static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
  365. .pixclock = 110000,
  366. .xres = 240,
  367. .yres = 320,
  368. .bpp = 16,
  369. .hsync_len = 4,
  370. .left_margin = 8,
  371. .right_margin = 20,
  372. .vsync_len = 3,
  373. .upper_margin = 1,
  374. .lower_margin = 10,
  375. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  376. };
  377. static struct pxafb_mach_info mainstone_pxafb_info = {
  378. .num_modes = 1,
  379. .lccr0 = LCCR0_Act,
  380. .lccr3 = LCCR3_PCP,
  381. };
  382. static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
  383. {
  384. int err;
  385. /* make sure SD/Memory Stick multiplexer's signals
  386. * are routed to MMC controller
  387. */
  388. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  389. err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
  390. "MMC card detect", data);
  391. if (err)
  392. printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
  393. return err;
  394. }
  395. static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
  396. {
  397. struct pxamci_platform_data* p_d = dev->platform_data;
  398. if (( 1 << vdd) & p_d->ocr_mask) {
  399. printk(KERN_DEBUG "%s: on\n", __func__);
  400. MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
  401. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  402. } else {
  403. printk(KERN_DEBUG "%s: off\n", __func__);
  404. MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
  405. }
  406. }
  407. static void mainstone_mci_exit(struct device *dev, void *data)
  408. {
  409. free_irq(MAINSTONE_MMC_IRQ, data);
  410. }
  411. static struct pxamci_platform_data mainstone_mci_platform_data = {
  412. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  413. .init = mainstone_mci_init,
  414. .setpower = mainstone_mci_setpower,
  415. .exit = mainstone_mci_exit,
  416. };
  417. static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
  418. {
  419. unsigned long flags;
  420. local_irq_save(flags);
  421. if (mode & IR_SIRMODE) {
  422. MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
  423. } else if (mode & IR_FIRMODE) {
  424. MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
  425. }
  426. if (mode & IR_OFF) {
  427. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
  428. } else {
  429. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
  430. }
  431. local_irq_restore(flags);
  432. }
  433. static struct pxaficp_platform_data mainstone_ficp_platform_data = {
  434. .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
  435. .transceiver_mode = mainstone_irda_transceiver_mode,
  436. };
  437. static struct gpio_keys_button gpio_keys_button[] = {
  438. [0] = {
  439. .desc = "wakeup",
  440. .code = KEY_SUSPEND,
  441. .type = EV_KEY,
  442. .gpio = 1,
  443. .wakeup = 1,
  444. },
  445. };
  446. static struct gpio_keys_platform_data mainstone_gpio_keys = {
  447. .buttons = gpio_keys_button,
  448. .nbuttons = 1,
  449. };
  450. static struct platform_device mst_gpio_keys_device = {
  451. .name = "gpio-keys",
  452. .id = -1,
  453. .dev = {
  454. .platform_data = &mainstone_gpio_keys,
  455. },
  456. };
  457. static struct platform_device *platform_devices[] __initdata = {
  458. &smc91x_device,
  459. &mst_audio_device,
  460. &mst_flash_device[0],
  461. &mst_flash_device[1],
  462. &mst_gpio_keys_device,
  463. };
  464. static int mainstone_ohci_init(struct device *dev)
  465. {
  466. /* Set the Power Control Polarity Low and Power Sense
  467. Polarity Low to active low. */
  468. UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
  469. ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
  470. return 0;
  471. }
  472. static struct pxaohci_platform_data mainstone_ohci_platform_data = {
  473. .port_mode = PMM_PERPORT_MODE,
  474. .init = mainstone_ohci_init,
  475. };
  476. #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULES)
  477. static unsigned int mainstone_matrix_keys[] = {
  478. KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
  479. KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
  480. KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
  481. KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
  482. KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
  483. KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
  484. KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
  485. KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
  486. KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
  487. KEY(0, 4, KEY_DOT), /* . */
  488. KEY(1, 4, KEY_CLOSE), /* @ */
  489. KEY(4, 4, KEY_SLASH),
  490. KEY(5, 4, KEY_BACKSLASH),
  491. KEY(0, 5, KEY_HOME),
  492. KEY(1, 5, KEY_LEFTSHIFT),
  493. KEY(2, 5, KEY_SPACE),
  494. KEY(3, 5, KEY_SPACE),
  495. KEY(4, 5, KEY_ENTER),
  496. KEY(5, 5, KEY_BACKSPACE),
  497. KEY(0, 6, KEY_UP),
  498. KEY(1, 6, KEY_DOWN),
  499. KEY(2, 6, KEY_LEFT),
  500. KEY(3, 6, KEY_RIGHT),
  501. KEY(4, 6, KEY_SELECT),
  502. };
  503. struct pxa27x_keypad_platform_data mainstone_keypad_info = {
  504. .matrix_key_rows = 6,
  505. .matrix_key_cols = 7,
  506. .matrix_key_map = mainstone_matrix_keys,
  507. .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys),
  508. .enable_rotary0 = 1,
  509. .rotary0_up_key = KEY_UP,
  510. .rotary0_down_key = KEY_DOWN,
  511. .debounce_interval = 30,
  512. };
  513. static void __init mainstone_init_keypad(void)
  514. {
  515. pxa_set_keypad_info(&mainstone_keypad_info);
  516. }
  517. #else
  518. static inline void mainstone_init_keypad(void) {}
  519. #endif
  520. static void __init mainstone_init(void)
  521. {
  522. int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
  523. pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
  524. mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
  525. mst_flash_data[1].width = 4;
  526. /* Compensate for SW7 which swaps the flash banks */
  527. mst_flash_data[SW7].name = "processor-flash";
  528. mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
  529. printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
  530. mst_flash_data[0].name);
  531. /* system bus arbiter setting
  532. * - Core_Park
  533. * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
  534. */
  535. ARB_CNTRL = ARB_CORE_PARK | 0x234;
  536. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  537. /* reading Mainstone's "Virtual Configuration Register"
  538. might be handy to select LCD type here */
  539. if (0)
  540. mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
  541. else
  542. mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
  543. set_pxa_fb_info(&mainstone_pxafb_info);
  544. mainstone_backlight_register();
  545. pxa_set_mci_info(&mainstone_mci_platform_data);
  546. pxa_set_ficp_info(&mainstone_ficp_platform_data);
  547. pxa_set_ohci_info(&mainstone_ohci_platform_data);
  548. pxa_set_i2c_info(NULL);
  549. mainstone_init_keypad();
  550. }
  551. static struct map_desc mainstone_io_desc[] __initdata = {
  552. { /* CPLD */
  553. .virtual = MST_FPGA_VIRT,
  554. .pfn = __phys_to_pfn(MST_FPGA_PHYS),
  555. .length = 0x00100000,
  556. .type = MT_DEVICE
  557. }
  558. };
  559. static void __init mainstone_map_io(void)
  560. {
  561. pxa_map_io();
  562. iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
  563. /* for use I SRAM as framebuffer. */
  564. PSLR |= 0xF04;
  565. PCFR = 0x66;
  566. }
  567. MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
  568. /* Maintainer: MontaVista Software Inc. */
  569. .phys_io = 0x40000000,
  570. .boot_params = 0xa0000100, /* BLOB boot parameter setting */
  571. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  572. .map_io = mainstone_map_io,
  573. .init_irq = mainstone_init_irq,
  574. .timer = &pxa_timer,
  575. .init_machine = mainstone_init,
  576. MACHINE_END