devices.c 14 KB

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  1. #include <linux/module.h>
  2. #include <linux/kernel.h>
  3. #include <linux/init.h>
  4. #include <linux/platform_device.h>
  5. #include <linux/dma-mapping.h>
  6. #include <asm/arch/gpio.h>
  7. #include <asm/arch/udc.h>
  8. #include <asm/arch/pxafb.h>
  9. #include <asm/arch/mmc.h>
  10. #include <asm/arch/irda.h>
  11. #include <asm/arch/i2c.h>
  12. #include <asm/arch/ohci.h>
  13. #include <asm/arch/pxa27x_keypad.h>
  14. #include <asm/arch/camera.h>
  15. #include "devices.h"
  16. void __init pxa_register_device(struct platform_device *dev, void *data)
  17. {
  18. int ret;
  19. dev->dev.platform_data = data;
  20. ret = platform_device_register(dev);
  21. if (ret)
  22. dev_err(&dev->dev, "unable to register device: %d\n", ret);
  23. }
  24. static struct resource pxamci_resources[] = {
  25. [0] = {
  26. .start = 0x41100000,
  27. .end = 0x41100fff,
  28. .flags = IORESOURCE_MEM,
  29. },
  30. [1] = {
  31. .start = IRQ_MMC,
  32. .end = IRQ_MMC,
  33. .flags = IORESOURCE_IRQ,
  34. },
  35. [2] = {
  36. .start = 21,
  37. .end = 21,
  38. .flags = IORESOURCE_DMA,
  39. },
  40. [3] = {
  41. .start = 22,
  42. .end = 22,
  43. .flags = IORESOURCE_DMA,
  44. },
  45. };
  46. static u64 pxamci_dmamask = 0xffffffffUL;
  47. struct platform_device pxa_device_mci = {
  48. .name = "pxa2xx-mci",
  49. .id = 0,
  50. .dev = {
  51. .dma_mask = &pxamci_dmamask,
  52. .coherent_dma_mask = 0xffffffff,
  53. },
  54. .num_resources = ARRAY_SIZE(pxamci_resources),
  55. .resource = pxamci_resources,
  56. };
  57. void __init pxa_set_mci_info(struct pxamci_platform_data *info)
  58. {
  59. pxa_register_device(&pxa_device_mci, info);
  60. }
  61. static struct pxa2xx_udc_mach_info pxa_udc_info;
  62. void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
  63. {
  64. memcpy(&pxa_udc_info, info, sizeof *info);
  65. }
  66. static struct resource pxa2xx_udc_resources[] = {
  67. [0] = {
  68. .start = 0x40600000,
  69. .end = 0x4060ffff,
  70. .flags = IORESOURCE_MEM,
  71. },
  72. [1] = {
  73. .start = IRQ_USB,
  74. .end = IRQ_USB,
  75. .flags = IORESOURCE_IRQ,
  76. },
  77. };
  78. static u64 udc_dma_mask = ~(u32)0;
  79. struct platform_device pxa_device_udc = {
  80. .name = "pxa2xx-udc",
  81. .id = -1,
  82. .resource = pxa2xx_udc_resources,
  83. .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
  84. .dev = {
  85. .platform_data = &pxa_udc_info,
  86. .dma_mask = &udc_dma_mask,
  87. }
  88. };
  89. static struct resource pxafb_resources[] = {
  90. [0] = {
  91. .start = 0x44000000,
  92. .end = 0x4400ffff,
  93. .flags = IORESOURCE_MEM,
  94. },
  95. [1] = {
  96. .start = IRQ_LCD,
  97. .end = IRQ_LCD,
  98. .flags = IORESOURCE_IRQ,
  99. },
  100. };
  101. static u64 fb_dma_mask = ~(u64)0;
  102. struct platform_device pxa_device_fb = {
  103. .name = "pxa2xx-fb",
  104. .id = -1,
  105. .dev = {
  106. .dma_mask = &fb_dma_mask,
  107. .coherent_dma_mask = 0xffffffff,
  108. },
  109. .num_resources = ARRAY_SIZE(pxafb_resources),
  110. .resource = pxafb_resources,
  111. };
  112. void __init set_pxa_fb_info(struct pxafb_mach_info *info)
  113. {
  114. pxa_register_device(&pxa_device_fb, info);
  115. }
  116. void __init set_pxa_fb_parent(struct device *parent_dev)
  117. {
  118. pxa_device_fb.dev.parent = parent_dev;
  119. }
  120. static struct resource pxa_resource_ffuart[] = {
  121. {
  122. .start = __PREG(FFUART),
  123. .end = __PREG(FFUART) + 35,
  124. .flags = IORESOURCE_MEM,
  125. }, {
  126. .start = IRQ_FFUART,
  127. .end = IRQ_FFUART,
  128. .flags = IORESOURCE_IRQ,
  129. }
  130. };
  131. struct platform_device pxa_device_ffuart= {
  132. .name = "pxa2xx-uart",
  133. .id = 0,
  134. .resource = pxa_resource_ffuart,
  135. .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
  136. };
  137. static struct resource pxa_resource_btuart[] = {
  138. {
  139. .start = __PREG(BTUART),
  140. .end = __PREG(BTUART) + 35,
  141. .flags = IORESOURCE_MEM,
  142. }, {
  143. .start = IRQ_BTUART,
  144. .end = IRQ_BTUART,
  145. .flags = IORESOURCE_IRQ,
  146. }
  147. };
  148. struct platform_device pxa_device_btuart = {
  149. .name = "pxa2xx-uart",
  150. .id = 1,
  151. .resource = pxa_resource_btuart,
  152. .num_resources = ARRAY_SIZE(pxa_resource_btuart),
  153. };
  154. static struct resource pxa_resource_stuart[] = {
  155. {
  156. .start = __PREG(STUART),
  157. .end = __PREG(STUART) + 35,
  158. .flags = IORESOURCE_MEM,
  159. }, {
  160. .start = IRQ_STUART,
  161. .end = IRQ_STUART,
  162. .flags = IORESOURCE_IRQ,
  163. }
  164. };
  165. struct platform_device pxa_device_stuart = {
  166. .name = "pxa2xx-uart",
  167. .id = 2,
  168. .resource = pxa_resource_stuart,
  169. .num_resources = ARRAY_SIZE(pxa_resource_stuart),
  170. };
  171. static struct resource pxa_resource_hwuart[] = {
  172. {
  173. .start = __PREG(HWUART),
  174. .end = __PREG(HWUART) + 47,
  175. .flags = IORESOURCE_MEM,
  176. }, {
  177. .start = IRQ_HWUART,
  178. .end = IRQ_HWUART,
  179. .flags = IORESOURCE_IRQ,
  180. }
  181. };
  182. struct platform_device pxa_device_hwuart = {
  183. .name = "pxa2xx-uart",
  184. .id = 3,
  185. .resource = pxa_resource_hwuart,
  186. .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
  187. };
  188. static struct resource pxai2c_resources[] = {
  189. {
  190. .start = 0x40301680,
  191. .end = 0x403016a3,
  192. .flags = IORESOURCE_MEM,
  193. }, {
  194. .start = IRQ_I2C,
  195. .end = IRQ_I2C,
  196. .flags = IORESOURCE_IRQ,
  197. },
  198. };
  199. struct platform_device pxa_device_i2c = {
  200. .name = "pxa2xx-i2c",
  201. .id = 0,
  202. .resource = pxai2c_resources,
  203. .num_resources = ARRAY_SIZE(pxai2c_resources),
  204. };
  205. void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
  206. {
  207. pxa_register_device(&pxa_device_i2c, info);
  208. }
  209. static struct resource pxai2s_resources[] = {
  210. {
  211. .start = 0x40400000,
  212. .end = 0x40400083,
  213. .flags = IORESOURCE_MEM,
  214. }, {
  215. .start = IRQ_I2S,
  216. .end = IRQ_I2S,
  217. .flags = IORESOURCE_IRQ,
  218. },
  219. };
  220. struct platform_device pxa_device_i2s = {
  221. .name = "pxa2xx-i2s",
  222. .id = -1,
  223. .resource = pxai2s_resources,
  224. .num_resources = ARRAY_SIZE(pxai2s_resources),
  225. };
  226. static u64 pxaficp_dmamask = ~(u32)0;
  227. struct platform_device pxa_device_ficp = {
  228. .name = "pxa2xx-ir",
  229. .id = -1,
  230. .dev = {
  231. .dma_mask = &pxaficp_dmamask,
  232. .coherent_dma_mask = 0xffffffff,
  233. },
  234. };
  235. void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
  236. {
  237. pxa_register_device(&pxa_device_ficp, info);
  238. }
  239. struct platform_device pxa_device_rtc = {
  240. .name = "sa1100-rtc",
  241. .id = -1,
  242. };
  243. #ifdef CONFIG_PXA25x
  244. static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
  245. static struct resource pxa25x_resource_ssp[] = {
  246. [0] = {
  247. .start = 0x41000000,
  248. .end = 0x4100001f,
  249. .flags = IORESOURCE_MEM,
  250. },
  251. [1] = {
  252. .start = IRQ_SSP,
  253. .end = IRQ_SSP,
  254. .flags = IORESOURCE_IRQ,
  255. },
  256. [2] = {
  257. /* DRCMR for RX */
  258. .start = 13,
  259. .end = 13,
  260. .flags = IORESOURCE_DMA,
  261. },
  262. [3] = {
  263. /* DRCMR for TX */
  264. .start = 14,
  265. .end = 14,
  266. .flags = IORESOURCE_DMA,
  267. },
  268. };
  269. struct platform_device pxa25x_device_ssp = {
  270. .name = "pxa25x-ssp",
  271. .id = 0,
  272. .dev = {
  273. .dma_mask = &pxa25x_ssp_dma_mask,
  274. .coherent_dma_mask = DMA_BIT_MASK(32),
  275. },
  276. .resource = pxa25x_resource_ssp,
  277. .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
  278. };
  279. static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
  280. static struct resource pxa25x_resource_nssp[] = {
  281. [0] = {
  282. .start = 0x41400000,
  283. .end = 0x4140002f,
  284. .flags = IORESOURCE_MEM,
  285. },
  286. [1] = {
  287. .start = IRQ_NSSP,
  288. .end = IRQ_NSSP,
  289. .flags = IORESOURCE_IRQ,
  290. },
  291. [2] = {
  292. /* DRCMR for RX */
  293. .start = 15,
  294. .end = 15,
  295. .flags = IORESOURCE_DMA,
  296. },
  297. [3] = {
  298. /* DRCMR for TX */
  299. .start = 16,
  300. .end = 16,
  301. .flags = IORESOURCE_DMA,
  302. },
  303. };
  304. struct platform_device pxa25x_device_nssp = {
  305. .name = "pxa25x-nssp",
  306. .id = 1,
  307. .dev = {
  308. .dma_mask = &pxa25x_nssp_dma_mask,
  309. .coherent_dma_mask = DMA_BIT_MASK(32),
  310. },
  311. .resource = pxa25x_resource_nssp,
  312. .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
  313. };
  314. static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
  315. static struct resource pxa25x_resource_assp[] = {
  316. [0] = {
  317. .start = 0x41500000,
  318. .end = 0x4150002f,
  319. .flags = IORESOURCE_MEM,
  320. },
  321. [1] = {
  322. .start = IRQ_ASSP,
  323. .end = IRQ_ASSP,
  324. .flags = IORESOURCE_IRQ,
  325. },
  326. [2] = {
  327. /* DRCMR for RX */
  328. .start = 23,
  329. .end = 23,
  330. .flags = IORESOURCE_DMA,
  331. },
  332. [3] = {
  333. /* DRCMR for TX */
  334. .start = 24,
  335. .end = 24,
  336. .flags = IORESOURCE_DMA,
  337. },
  338. };
  339. struct platform_device pxa25x_device_assp = {
  340. /* ASSP is basically equivalent to NSSP */
  341. .name = "pxa25x-nssp",
  342. .id = 2,
  343. .dev = {
  344. .dma_mask = &pxa25x_assp_dma_mask,
  345. .coherent_dma_mask = DMA_BIT_MASK(32),
  346. },
  347. .resource = pxa25x_resource_assp,
  348. .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
  349. };
  350. #endif /* CONFIG_PXA25x */
  351. #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
  352. static struct resource pxa27x_resource_keypad[] = {
  353. [0] = {
  354. .start = 0x41500000,
  355. .end = 0x4150004c,
  356. .flags = IORESOURCE_MEM,
  357. },
  358. [1] = {
  359. .start = IRQ_KEYPAD,
  360. .end = IRQ_KEYPAD,
  361. .flags = IORESOURCE_IRQ,
  362. },
  363. };
  364. struct platform_device pxa27x_device_keypad = {
  365. .name = "pxa27x-keypad",
  366. .id = -1,
  367. .resource = pxa27x_resource_keypad,
  368. .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
  369. };
  370. void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
  371. {
  372. pxa_register_device(&pxa27x_device_keypad, info);
  373. }
  374. static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
  375. static struct resource pxa27x_resource_ohci[] = {
  376. [0] = {
  377. .start = 0x4C000000,
  378. .end = 0x4C00ff6f,
  379. .flags = IORESOURCE_MEM,
  380. },
  381. [1] = {
  382. .start = IRQ_USBH1,
  383. .end = IRQ_USBH1,
  384. .flags = IORESOURCE_IRQ,
  385. },
  386. };
  387. struct platform_device pxa27x_device_ohci = {
  388. .name = "pxa27x-ohci",
  389. .id = -1,
  390. .dev = {
  391. .dma_mask = &pxa27x_ohci_dma_mask,
  392. .coherent_dma_mask = DMA_BIT_MASK(32),
  393. },
  394. .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
  395. .resource = pxa27x_resource_ohci,
  396. };
  397. void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
  398. {
  399. pxa_register_device(&pxa27x_device_ohci, info);
  400. }
  401. static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
  402. static struct resource pxa27x_resource_ssp1[] = {
  403. [0] = {
  404. .start = 0x41000000,
  405. .end = 0x4100003f,
  406. .flags = IORESOURCE_MEM,
  407. },
  408. [1] = {
  409. .start = IRQ_SSP,
  410. .end = IRQ_SSP,
  411. .flags = IORESOURCE_IRQ,
  412. },
  413. [2] = {
  414. /* DRCMR for RX */
  415. .start = 13,
  416. .end = 13,
  417. .flags = IORESOURCE_DMA,
  418. },
  419. [3] = {
  420. /* DRCMR for TX */
  421. .start = 14,
  422. .end = 14,
  423. .flags = IORESOURCE_DMA,
  424. },
  425. };
  426. struct platform_device pxa27x_device_ssp1 = {
  427. .name = "pxa27x-ssp",
  428. .id = 0,
  429. .dev = {
  430. .dma_mask = &pxa27x_ssp1_dma_mask,
  431. .coherent_dma_mask = DMA_BIT_MASK(32),
  432. },
  433. .resource = pxa27x_resource_ssp1,
  434. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
  435. };
  436. static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
  437. static struct resource pxa27x_resource_ssp2[] = {
  438. [0] = {
  439. .start = 0x41700000,
  440. .end = 0x4170003f,
  441. .flags = IORESOURCE_MEM,
  442. },
  443. [1] = {
  444. .start = IRQ_SSP2,
  445. .end = IRQ_SSP2,
  446. .flags = IORESOURCE_IRQ,
  447. },
  448. [2] = {
  449. /* DRCMR for RX */
  450. .start = 15,
  451. .end = 15,
  452. .flags = IORESOURCE_DMA,
  453. },
  454. [3] = {
  455. /* DRCMR for TX */
  456. .start = 16,
  457. .end = 16,
  458. .flags = IORESOURCE_DMA,
  459. },
  460. };
  461. struct platform_device pxa27x_device_ssp2 = {
  462. .name = "pxa27x-ssp",
  463. .id = 1,
  464. .dev = {
  465. .dma_mask = &pxa27x_ssp2_dma_mask,
  466. .coherent_dma_mask = DMA_BIT_MASK(32),
  467. },
  468. .resource = pxa27x_resource_ssp2,
  469. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
  470. };
  471. static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
  472. static struct resource pxa27x_resource_ssp3[] = {
  473. [0] = {
  474. .start = 0x41900000,
  475. .end = 0x4190003f,
  476. .flags = IORESOURCE_MEM,
  477. },
  478. [1] = {
  479. .start = IRQ_SSP3,
  480. .end = IRQ_SSP3,
  481. .flags = IORESOURCE_IRQ,
  482. },
  483. [2] = {
  484. /* DRCMR for RX */
  485. .start = 66,
  486. .end = 66,
  487. .flags = IORESOURCE_DMA,
  488. },
  489. [3] = {
  490. /* DRCMR for TX */
  491. .start = 67,
  492. .end = 67,
  493. .flags = IORESOURCE_DMA,
  494. },
  495. };
  496. struct platform_device pxa27x_device_ssp3 = {
  497. .name = "pxa27x-ssp",
  498. .id = 2,
  499. .dev = {
  500. .dma_mask = &pxa27x_ssp3_dma_mask,
  501. .coherent_dma_mask = DMA_BIT_MASK(32),
  502. },
  503. .resource = pxa27x_resource_ssp3,
  504. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
  505. };
  506. static struct resource pxa27x_resource_camera[] = {
  507. [0] = {
  508. .start = 0x50000000,
  509. .end = 0x50000fff,
  510. .flags = IORESOURCE_MEM,
  511. },
  512. [1] = {
  513. .start = IRQ_CAMERA,
  514. .end = IRQ_CAMERA,
  515. .flags = IORESOURCE_IRQ,
  516. },
  517. };
  518. static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
  519. static struct platform_device pxa27x_device_camera = {
  520. .name = "pxa27x-camera",
  521. .id = 0, /* This is used to put cameras on this interface */
  522. .dev = {
  523. .dma_mask = &pxa27x_dma_mask_camera,
  524. .coherent_dma_mask = 0xffffffff,
  525. },
  526. .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
  527. .resource = pxa27x_resource_camera,
  528. };
  529. void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
  530. {
  531. pxa_register_device(&pxa27x_device_camera, info);
  532. }
  533. #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
  534. #ifdef CONFIG_PXA3xx
  535. static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
  536. static struct resource pxa3xx_resource_ssp4[] = {
  537. [0] = {
  538. .start = 0x41a00000,
  539. .end = 0x41a0003f,
  540. .flags = IORESOURCE_MEM,
  541. },
  542. [1] = {
  543. .start = IRQ_SSP4,
  544. .end = IRQ_SSP4,
  545. .flags = IORESOURCE_IRQ,
  546. },
  547. [2] = {
  548. /* DRCMR for RX */
  549. .start = 2,
  550. .end = 2,
  551. .flags = IORESOURCE_DMA,
  552. },
  553. [3] = {
  554. /* DRCMR for TX */
  555. .start = 3,
  556. .end = 3,
  557. .flags = IORESOURCE_DMA,
  558. },
  559. };
  560. struct platform_device pxa3xx_device_ssp4 = {
  561. /* PXA3xx SSP is basically equivalent to PXA27x */
  562. .name = "pxa27x-ssp",
  563. .id = 3,
  564. .dev = {
  565. .dma_mask = &pxa3xx_ssp4_dma_mask,
  566. .coherent_dma_mask = DMA_BIT_MASK(32),
  567. },
  568. .resource = pxa3xx_resource_ssp4,
  569. .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
  570. };
  571. static struct resource pxa3xx_resources_mci2[] = {
  572. [0] = {
  573. .start = 0x42000000,
  574. .end = 0x42000fff,
  575. .flags = IORESOURCE_MEM,
  576. },
  577. [1] = {
  578. .start = IRQ_MMC2,
  579. .end = IRQ_MMC2,
  580. .flags = IORESOURCE_IRQ,
  581. },
  582. [2] = {
  583. .start = 93,
  584. .end = 93,
  585. .flags = IORESOURCE_DMA,
  586. },
  587. [3] = {
  588. .start = 94,
  589. .end = 94,
  590. .flags = IORESOURCE_DMA,
  591. },
  592. };
  593. struct platform_device pxa3xx_device_mci2 = {
  594. .name = "pxa2xx-mci",
  595. .id = 1,
  596. .dev = {
  597. .dma_mask = &pxamci_dmamask,
  598. .coherent_dma_mask = 0xffffffff,
  599. },
  600. .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
  601. .resource = pxa3xx_resources_mci2,
  602. };
  603. void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
  604. {
  605. pxa_register_device(&pxa3xx_device_mci2, info);
  606. }
  607. static struct resource pxa3xx_resources_mci3[] = {
  608. [0] = {
  609. .start = 0x42500000,
  610. .end = 0x42500fff,
  611. .flags = IORESOURCE_MEM,
  612. },
  613. [1] = {
  614. .start = IRQ_MMC3,
  615. .end = IRQ_MMC3,
  616. .flags = IORESOURCE_IRQ,
  617. },
  618. [2] = {
  619. .start = 100,
  620. .end = 100,
  621. .flags = IORESOURCE_DMA,
  622. },
  623. [3] = {
  624. .start = 101,
  625. .end = 101,
  626. .flags = IORESOURCE_DMA,
  627. },
  628. };
  629. struct platform_device pxa3xx_device_mci3 = {
  630. .name = "pxa2xx-mci",
  631. .id = 2,
  632. .dev = {
  633. .dma_mask = &pxamci_dmamask,
  634. .coherent_dma_mask = 0xffffffff,
  635. },
  636. .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
  637. .resource = pxa3xx_resources_mci3,
  638. };
  639. void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
  640. {
  641. pxa_register_device(&pxa3xx_device_mci3, info);
  642. }
  643. #endif /* CONFIG_PXA3xx */