p54common.c 57 KB

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  1. /*
  2. * Common code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
  6. * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
  7. *
  8. * Based on:
  9. * - the islsm (softmac prism54) driver, which is:
  10. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  11. * - stlc45xx driver
  12. * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License version 2 as
  16. * published by the Free Software Foundation.
  17. */
  18. #include <linux/init.h>
  19. #include <linux/firmware.h>
  20. #include <linux/etherdevice.h>
  21. #include <net/mac80211.h>
  22. #include "p54.h"
  23. #include "p54common.h"
  24. static int modparam_nohwcrypt;
  25. module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
  26. MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
  27. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  28. MODULE_DESCRIPTION("Softmac Prism54 common code");
  29. MODULE_LICENSE("GPL");
  30. MODULE_ALIAS("prism54common");
  31. static struct ieee80211_rate p54_bgrates[] = {
  32. { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  33. { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  34. { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  35. { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  36. { .bitrate = 60, .hw_value = 4, },
  37. { .bitrate = 90, .hw_value = 5, },
  38. { .bitrate = 120, .hw_value = 6, },
  39. { .bitrate = 180, .hw_value = 7, },
  40. { .bitrate = 240, .hw_value = 8, },
  41. { .bitrate = 360, .hw_value = 9, },
  42. { .bitrate = 480, .hw_value = 10, },
  43. { .bitrate = 540, .hw_value = 11, },
  44. };
  45. static struct ieee80211_channel p54_bgchannels[] = {
  46. { .center_freq = 2412, .hw_value = 1, },
  47. { .center_freq = 2417, .hw_value = 2, },
  48. { .center_freq = 2422, .hw_value = 3, },
  49. { .center_freq = 2427, .hw_value = 4, },
  50. { .center_freq = 2432, .hw_value = 5, },
  51. { .center_freq = 2437, .hw_value = 6, },
  52. { .center_freq = 2442, .hw_value = 7, },
  53. { .center_freq = 2447, .hw_value = 8, },
  54. { .center_freq = 2452, .hw_value = 9, },
  55. { .center_freq = 2457, .hw_value = 10, },
  56. { .center_freq = 2462, .hw_value = 11, },
  57. { .center_freq = 2467, .hw_value = 12, },
  58. { .center_freq = 2472, .hw_value = 13, },
  59. { .center_freq = 2484, .hw_value = 14, },
  60. };
  61. static struct ieee80211_supported_band band_2GHz = {
  62. .channels = p54_bgchannels,
  63. .n_channels = ARRAY_SIZE(p54_bgchannels),
  64. .bitrates = p54_bgrates,
  65. .n_bitrates = ARRAY_SIZE(p54_bgrates),
  66. };
  67. static struct ieee80211_rate p54_arates[] = {
  68. { .bitrate = 60, .hw_value = 4, },
  69. { .bitrate = 90, .hw_value = 5, },
  70. { .bitrate = 120, .hw_value = 6, },
  71. { .bitrate = 180, .hw_value = 7, },
  72. { .bitrate = 240, .hw_value = 8, },
  73. { .bitrate = 360, .hw_value = 9, },
  74. { .bitrate = 480, .hw_value = 10, },
  75. { .bitrate = 540, .hw_value = 11, },
  76. };
  77. static struct ieee80211_channel p54_achannels[] = {
  78. { .center_freq = 4920 },
  79. { .center_freq = 4940 },
  80. { .center_freq = 4960 },
  81. { .center_freq = 4980 },
  82. { .center_freq = 5040 },
  83. { .center_freq = 5060 },
  84. { .center_freq = 5080 },
  85. { .center_freq = 5170 },
  86. { .center_freq = 5180 },
  87. { .center_freq = 5190 },
  88. { .center_freq = 5200 },
  89. { .center_freq = 5210 },
  90. { .center_freq = 5220 },
  91. { .center_freq = 5230 },
  92. { .center_freq = 5240 },
  93. { .center_freq = 5260 },
  94. { .center_freq = 5280 },
  95. { .center_freq = 5300 },
  96. { .center_freq = 5320 },
  97. { .center_freq = 5500 },
  98. { .center_freq = 5520 },
  99. { .center_freq = 5540 },
  100. { .center_freq = 5560 },
  101. { .center_freq = 5580 },
  102. { .center_freq = 5600 },
  103. { .center_freq = 5620 },
  104. { .center_freq = 5640 },
  105. { .center_freq = 5660 },
  106. { .center_freq = 5680 },
  107. { .center_freq = 5700 },
  108. { .center_freq = 5745 },
  109. { .center_freq = 5765 },
  110. { .center_freq = 5785 },
  111. { .center_freq = 5805 },
  112. { .center_freq = 5825 },
  113. };
  114. static struct ieee80211_supported_band band_5GHz = {
  115. .channels = p54_achannels,
  116. .n_channels = ARRAY_SIZE(p54_achannels),
  117. .bitrates = p54_arates,
  118. .n_bitrates = ARRAY_SIZE(p54_arates),
  119. };
  120. int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  121. {
  122. struct p54_common *priv = dev->priv;
  123. struct bootrec_exp_if *exp_if;
  124. struct bootrec *bootrec;
  125. u32 *data = (u32 *)fw->data;
  126. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  127. u8 *fw_version = NULL;
  128. size_t len;
  129. int i;
  130. if (priv->rx_start)
  131. return 0;
  132. while (data < end_data && *data)
  133. data++;
  134. while (data < end_data && !*data)
  135. data++;
  136. bootrec = (struct bootrec *) data;
  137. while (bootrec->data <= end_data &&
  138. (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
  139. u32 code = le32_to_cpu(bootrec->code);
  140. switch (code) {
  141. case BR_CODE_COMPONENT_ID:
  142. priv->fw_interface = be32_to_cpup((__be32 *)
  143. bootrec->data);
  144. switch (priv->fw_interface) {
  145. case FW_LM86:
  146. case FW_LM20:
  147. case FW_LM87: {
  148. char *iftype = (char *)bootrec->data;
  149. printk(KERN_INFO "%s: p54 detected a LM%c%c "
  150. "firmware\n",
  151. wiphy_name(dev->wiphy),
  152. iftype[2], iftype[3]);
  153. break;
  154. }
  155. case FW_FMAC:
  156. default:
  157. printk(KERN_ERR "%s: unsupported firmware\n",
  158. wiphy_name(dev->wiphy));
  159. return -ENODEV;
  160. }
  161. break;
  162. case BR_CODE_COMPONENT_VERSION:
  163. /* 24 bytes should be enough for all firmwares */
  164. if (strnlen((unsigned char*)bootrec->data, 24) < 24)
  165. fw_version = (unsigned char*)bootrec->data;
  166. break;
  167. case BR_CODE_DESCR: {
  168. struct bootrec_desc *desc =
  169. (struct bootrec_desc *)bootrec->data;
  170. priv->rx_start = le32_to_cpu(desc->rx_start);
  171. /* FIXME add sanity checking */
  172. priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
  173. priv->headroom = desc->headroom;
  174. priv->tailroom = desc->tailroom;
  175. priv->privacy_caps = desc->privacy_caps;
  176. priv->rx_keycache_size = desc->rx_keycache_size;
  177. if (le32_to_cpu(bootrec->len) == 11)
  178. priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
  179. else
  180. priv->rx_mtu = (size_t)
  181. 0x620 - priv->tx_hdr_len;
  182. break;
  183. }
  184. case BR_CODE_EXPOSED_IF:
  185. exp_if = (struct bootrec_exp_if *) bootrec->data;
  186. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  187. if (exp_if[i].if_id == cpu_to_le16(0x1a))
  188. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  189. break;
  190. case BR_CODE_DEPENDENT_IF:
  191. break;
  192. case BR_CODE_END_OF_BRA:
  193. case LEGACY_BR_CODE_END_OF_BRA:
  194. end_data = NULL;
  195. break;
  196. default:
  197. break;
  198. }
  199. bootrec = (struct bootrec *)&bootrec->data[len];
  200. }
  201. if (fw_version)
  202. printk(KERN_INFO "%s: FW rev %s - Softmac protocol %x.%x\n",
  203. wiphy_name(dev->wiphy), fw_version,
  204. priv->fw_var >> 8, priv->fw_var & 0xff);
  205. if (priv->fw_var < 0x500)
  206. printk(KERN_INFO "%s: you are using an obsolete firmware. "
  207. "visit http://wireless.kernel.org/en/users/Drivers/p54 "
  208. "and grab one for \"kernel >= 2.6.28\"!\n",
  209. wiphy_name(dev->wiphy));
  210. if (priv->fw_var >= 0x300) {
  211. /* Firmware supports QoS, use it! */
  212. priv->tx_stats[4].limit = 3; /* AC_VO */
  213. priv->tx_stats[5].limit = 4; /* AC_VI */
  214. priv->tx_stats[6].limit = 3; /* AC_BE */
  215. priv->tx_stats[7].limit = 2; /* AC_BK */
  216. dev->queues = 4;
  217. }
  218. if (!modparam_nohwcrypt)
  219. printk(KERN_INFO "%s: cryptographic accelerator "
  220. "WEP:%s, TKIP:%s, CCMP:%s\n",
  221. wiphy_name(dev->wiphy),
  222. (priv->privacy_caps & BR_DESC_PRIV_CAP_WEP) ? "YES" :
  223. "no", (priv->privacy_caps & (BR_DESC_PRIV_CAP_TKIP |
  224. BR_DESC_PRIV_CAP_MICHAEL)) ? "YES" : "no",
  225. (priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP) ?
  226. "YES" : "no");
  227. return 0;
  228. }
  229. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  230. static int p54_convert_rev0(struct ieee80211_hw *dev,
  231. struct pda_pa_curve_data *curve_data)
  232. {
  233. struct p54_common *priv = dev->priv;
  234. struct p54_pa_curve_data_sample *dst;
  235. struct pda_pa_curve_data_sample_rev0 *src;
  236. size_t cd_len = sizeof(*curve_data) +
  237. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  238. curve_data->channels;
  239. unsigned int i, j;
  240. void *source, *target;
  241. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  242. if (!priv->curve_data)
  243. return -ENOMEM;
  244. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  245. source = curve_data->data;
  246. target = priv->curve_data->data;
  247. for (i = 0; i < curve_data->channels; i++) {
  248. __le16 *freq = source;
  249. source += sizeof(__le16);
  250. *((__le16 *)target) = *freq;
  251. target += sizeof(__le16);
  252. for (j = 0; j < curve_data->points_per_channel; j++) {
  253. dst = target;
  254. src = source;
  255. dst->rf_power = src->rf_power;
  256. dst->pa_detector = src->pa_detector;
  257. dst->data_64qam = src->pcv;
  258. /* "invent" the points for the other modulations */
  259. #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
  260. dst->data_16qam = SUB(src->pcv, 12);
  261. dst->data_qpsk = SUB(dst->data_16qam, 12);
  262. dst->data_bpsk = SUB(dst->data_qpsk, 12);
  263. dst->data_barker = SUB(dst->data_bpsk, 14);
  264. #undef SUB
  265. target += sizeof(*dst);
  266. source += sizeof(*src);
  267. }
  268. }
  269. return 0;
  270. }
  271. static int p54_convert_rev1(struct ieee80211_hw *dev,
  272. struct pda_pa_curve_data *curve_data)
  273. {
  274. struct p54_common *priv = dev->priv;
  275. struct p54_pa_curve_data_sample *dst;
  276. struct pda_pa_curve_data_sample_rev1 *src;
  277. size_t cd_len = sizeof(*curve_data) +
  278. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  279. curve_data->channels;
  280. unsigned int i, j;
  281. void *source, *target;
  282. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  283. if (!priv->curve_data)
  284. return -ENOMEM;
  285. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  286. source = curve_data->data;
  287. target = priv->curve_data->data;
  288. for (i = 0; i < curve_data->channels; i++) {
  289. __le16 *freq = source;
  290. source += sizeof(__le16);
  291. *((__le16 *)target) = *freq;
  292. target += sizeof(__le16);
  293. for (j = 0; j < curve_data->points_per_channel; j++) {
  294. memcpy(target, source, sizeof(*src));
  295. target += sizeof(*dst);
  296. source += sizeof(*src);
  297. }
  298. source++;
  299. }
  300. return 0;
  301. }
  302. static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
  303. "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
  304. static int p54_init_xbow_synth(struct ieee80211_hw *dev);
  305. static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
  306. {
  307. struct p54_common *priv = dev->priv;
  308. struct eeprom_pda_wrap *wrap = NULL;
  309. struct pda_entry *entry;
  310. unsigned int data_len, entry_len;
  311. void *tmp;
  312. int err;
  313. u8 *end = (u8 *)eeprom + len;
  314. u16 synth = 0;
  315. wrap = (struct eeprom_pda_wrap *) eeprom;
  316. entry = (void *)wrap->data + le16_to_cpu(wrap->len);
  317. /* verify that at least the entry length/code fits */
  318. while ((u8 *)entry <= end - sizeof(*entry)) {
  319. entry_len = le16_to_cpu(entry->len);
  320. data_len = ((entry_len - 1) << 1);
  321. /* abort if entry exceeds whole structure */
  322. if ((u8 *)entry + sizeof(*entry) + data_len > end)
  323. break;
  324. switch (le16_to_cpu(entry->code)) {
  325. case PDR_MAC_ADDRESS:
  326. SET_IEEE80211_PERM_ADDR(dev, entry->data);
  327. break;
  328. case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
  329. if (data_len < 2) {
  330. err = -EINVAL;
  331. goto err;
  332. }
  333. if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
  334. err = -EINVAL;
  335. goto err;
  336. }
  337. priv->output_limit = kmalloc(entry->data[1] *
  338. sizeof(*priv->output_limit), GFP_KERNEL);
  339. if (!priv->output_limit) {
  340. err = -ENOMEM;
  341. goto err;
  342. }
  343. memcpy(priv->output_limit, &entry->data[2],
  344. entry->data[1]*sizeof(*priv->output_limit));
  345. priv->output_limit_len = entry->data[1];
  346. break;
  347. case PDR_PRISM_PA_CAL_CURVE_DATA: {
  348. struct pda_pa_curve_data *curve_data =
  349. (struct pda_pa_curve_data *)entry->data;
  350. if (data_len < sizeof(*curve_data)) {
  351. err = -EINVAL;
  352. goto err;
  353. }
  354. switch (curve_data->cal_method_rev) {
  355. case 0:
  356. err = p54_convert_rev0(dev, curve_data);
  357. break;
  358. case 1:
  359. err = p54_convert_rev1(dev, curve_data);
  360. break;
  361. default:
  362. printk(KERN_ERR "%s: unknown curve data "
  363. "revision %d\n",
  364. wiphy_name(dev->wiphy),
  365. curve_data->cal_method_rev);
  366. err = -ENODEV;
  367. break;
  368. }
  369. if (err)
  370. goto err;
  371. }
  372. case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
  373. priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
  374. if (!priv->iq_autocal) {
  375. err = -ENOMEM;
  376. goto err;
  377. }
  378. memcpy(priv->iq_autocal, entry->data, data_len);
  379. priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
  380. break;
  381. case PDR_INTERFACE_LIST:
  382. tmp = entry->data;
  383. while ((u8 *)tmp < entry->data + data_len) {
  384. struct bootrec_exp_if *exp_if = tmp;
  385. if (le16_to_cpu(exp_if->if_id) == 0xf)
  386. synth = le16_to_cpu(exp_if->variant);
  387. tmp += sizeof(struct bootrec_exp_if);
  388. }
  389. break;
  390. case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
  391. priv->version = *(u8 *)(entry->data + 1);
  392. break;
  393. case PDR_END:
  394. /* make it overrun */
  395. entry_len = len;
  396. break;
  397. case PDR_MANUFACTURING_PART_NUMBER:
  398. case PDR_PDA_VERSION:
  399. case PDR_NIC_SERIAL_NUMBER:
  400. case PDR_REGULATORY_DOMAIN_LIST:
  401. case PDR_TEMPERATURE_TYPE:
  402. case PDR_PRISM_PCI_IDENTIFIER:
  403. case PDR_COUNTRY_INFORMATION:
  404. case PDR_OEM_NAME:
  405. case PDR_PRODUCT_NAME:
  406. case PDR_UTF8_OEM_NAME:
  407. case PDR_UTF8_PRODUCT_NAME:
  408. case PDR_COUNTRY_LIST:
  409. case PDR_DEFAULT_COUNTRY:
  410. case PDR_ANTENNA_GAIN:
  411. case PDR_PRISM_INDIGO_PA_CALIBRATION_DATA:
  412. case PDR_RSSI_LINEAR_APPROXIMATION:
  413. case PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND:
  414. case PDR_REGULATORY_POWER_LIMITS:
  415. case PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED:
  416. case PDR_RADIATED_TRANSMISSION_CORRECTION:
  417. case PDR_PRISM_TX_IQ_CALIBRATION:
  418. case PDR_BASEBAND_REGISTERS:
  419. case PDR_PER_CHANNEL_BASEBAND_REGISTERS:
  420. break;
  421. default:
  422. printk(KERN_INFO "%s: unknown eeprom code : 0x%x\n",
  423. wiphy_name(dev->wiphy),
  424. le16_to_cpu(entry->code));
  425. break;
  426. }
  427. entry = (void *)entry + (entry_len + 1)*2;
  428. }
  429. if (!synth || !priv->iq_autocal || !priv->output_limit ||
  430. !priv->curve_data) {
  431. printk(KERN_ERR "%s: not all required entries found in eeprom!\n",
  432. wiphy_name(dev->wiphy));
  433. err = -EINVAL;
  434. goto err;
  435. }
  436. priv->rxhw = synth & PDR_SYNTH_FRONTEND_MASK;
  437. if (priv->rxhw == 4)
  438. p54_init_xbow_synth(dev);
  439. if (!(synth & PDR_SYNTH_24_GHZ_DISABLED))
  440. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
  441. if (!(synth & PDR_SYNTH_5_GHZ_DISABLED))
  442. dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
  443. if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
  444. u8 perm_addr[ETH_ALEN];
  445. printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
  446. wiphy_name(dev->wiphy));
  447. random_ether_addr(perm_addr);
  448. SET_IEEE80211_PERM_ADDR(dev, perm_addr);
  449. }
  450. printk(KERN_INFO "%s: hwaddr %pM, MAC:isl38%02x RF:%s\n",
  451. wiphy_name(dev->wiphy),
  452. dev->wiphy->perm_addr,
  453. priv->version, p54_rf_chips[priv->rxhw]);
  454. return 0;
  455. err:
  456. if (priv->iq_autocal) {
  457. kfree(priv->iq_autocal);
  458. priv->iq_autocal = NULL;
  459. }
  460. if (priv->output_limit) {
  461. kfree(priv->output_limit);
  462. priv->output_limit = NULL;
  463. }
  464. if (priv->curve_data) {
  465. kfree(priv->curve_data);
  466. priv->curve_data = NULL;
  467. }
  468. printk(KERN_ERR "%s: eeprom parse failed!\n",
  469. wiphy_name(dev->wiphy));
  470. return err;
  471. }
  472. static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
  473. {
  474. /* TODO: get the rssi_add & rssi_mul data from the eeprom */
  475. return ((rssi * 0x83) / 64 - 400) / 4;
  476. }
  477. static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
  478. {
  479. struct p54_common *priv = dev->priv;
  480. struct p54_rx_data *hdr = (struct p54_rx_data *) skb->data;
  481. struct ieee80211_rx_status rx_status = {0};
  482. u16 freq = le16_to_cpu(hdr->freq);
  483. size_t header_len = sizeof(*hdr);
  484. u32 tsf32;
  485. /*
  486. * If the device is in a unspecified state we have to
  487. * ignore all data frames. Else we could end up with a
  488. * nasty crash.
  489. */
  490. if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
  491. return 0;
  492. if (!(hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_IN_FCS_GOOD))) {
  493. if (priv->filter_flags & FIF_FCSFAIL)
  494. rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
  495. else
  496. return 0;
  497. }
  498. if (hdr->decrypt_status == P54_DECRYPT_OK)
  499. rx_status.flag |= RX_FLAG_DECRYPTED;
  500. if ((hdr->decrypt_status == P54_DECRYPT_FAIL_MICHAEL) ||
  501. (hdr->decrypt_status == P54_DECRYPT_FAIL_TKIP))
  502. rx_status.flag |= RX_FLAG_MMIC_ERROR;
  503. rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
  504. rx_status.noise = priv->noise;
  505. /* XX correct? */
  506. rx_status.qual = (100 * hdr->rssi) / 127;
  507. if (hdr->rate & 0x10)
  508. rx_status.flag |= RX_FLAG_SHORTPRE;
  509. rx_status.rate_idx = (dev->conf.channel->band == IEEE80211_BAND_2GHZ ?
  510. hdr->rate : (hdr->rate - 4)) & 0xf;
  511. rx_status.freq = freq;
  512. rx_status.band = dev->conf.channel->band;
  513. rx_status.antenna = hdr->antenna;
  514. tsf32 = le32_to_cpu(hdr->tsf32);
  515. if (tsf32 < priv->tsf_low32)
  516. priv->tsf_high32++;
  517. rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
  518. priv->tsf_low32 = tsf32;
  519. rx_status.flag |= RX_FLAG_TSFT;
  520. if (hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
  521. header_len += hdr->align[0];
  522. skb_pull(skb, header_len);
  523. skb_trim(skb, le16_to_cpu(hdr->len));
  524. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  525. queue_delayed_work(dev->workqueue, &priv->work,
  526. msecs_to_jiffies(P54_STATISTICS_UPDATE));
  527. return -1;
  528. }
  529. static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
  530. {
  531. struct p54_common *priv = dev->priv;
  532. int i;
  533. if (priv->mode == NL80211_IFTYPE_UNSPECIFIED)
  534. return ;
  535. for (i = 0; i < dev->queues; i++)
  536. if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
  537. ieee80211_wake_queue(dev, i);
  538. }
  539. void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb)
  540. {
  541. struct p54_common *priv = dev->priv;
  542. struct ieee80211_tx_info *info;
  543. struct memrecord *range;
  544. unsigned long flags;
  545. u32 freed = 0, last_addr = priv->rx_start;
  546. if (unlikely(!skb || !dev || !skb_queue_len(&priv->tx_queue)))
  547. return;
  548. /*
  549. * don't try to free an already unlinked skb
  550. */
  551. if (unlikely((!skb->next) || (!skb->prev)))
  552. return;
  553. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  554. info = IEEE80211_SKB_CB(skb);
  555. range = (void *)info->rate_driver_data;
  556. if (skb->prev != (struct sk_buff *)&priv->tx_queue) {
  557. struct ieee80211_tx_info *ni;
  558. struct memrecord *mr;
  559. ni = IEEE80211_SKB_CB(skb->prev);
  560. mr = (struct memrecord *)ni->rate_driver_data;
  561. last_addr = mr->end_addr;
  562. }
  563. if (skb->next != (struct sk_buff *)&priv->tx_queue) {
  564. struct ieee80211_tx_info *ni;
  565. struct memrecord *mr;
  566. ni = IEEE80211_SKB_CB(skb->next);
  567. mr = (struct memrecord *)ni->rate_driver_data;
  568. freed = mr->start_addr - last_addr;
  569. } else
  570. freed = priv->rx_end - last_addr;
  571. __skb_unlink(skb, &priv->tx_queue);
  572. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  573. kfree_skb(skb);
  574. if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
  575. IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
  576. p54_wake_free_queues(dev);
  577. }
  578. EXPORT_SYMBOL_GPL(p54_free_skb);
  579. static struct sk_buff *p54_find_tx_entry(struct ieee80211_hw *dev,
  580. __le32 req_id)
  581. {
  582. struct p54_common *priv = dev->priv;
  583. struct sk_buff *entry = priv->tx_queue.next;
  584. unsigned long flags;
  585. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  586. while (entry != (struct sk_buff *)&priv->tx_queue) {
  587. struct p54_hdr *hdr = (struct p54_hdr *) entry->data;
  588. if (hdr->req_id == req_id) {
  589. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  590. return entry;
  591. }
  592. entry = entry->next;
  593. }
  594. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  595. return NULL;
  596. }
  597. static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
  598. {
  599. struct p54_common *priv = dev->priv;
  600. struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
  601. struct p54_frame_sent *payload = (struct p54_frame_sent *) hdr->data;
  602. struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
  603. u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
  604. struct memrecord *range = NULL;
  605. u32 freed = 0;
  606. u32 last_addr = priv->rx_start;
  607. unsigned long flags;
  608. int count, idx;
  609. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  610. while (entry != (struct sk_buff *)&priv->tx_queue) {
  611. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
  612. struct p54_hdr *entry_hdr;
  613. struct p54_tx_data *entry_data;
  614. int pad = 0;
  615. range = (void *)info->rate_driver_data;
  616. if (range->start_addr != addr) {
  617. last_addr = range->end_addr;
  618. entry = entry->next;
  619. continue;
  620. }
  621. if (entry->next != (struct sk_buff *)&priv->tx_queue) {
  622. struct ieee80211_tx_info *ni;
  623. struct memrecord *mr;
  624. ni = IEEE80211_SKB_CB(entry->next);
  625. mr = (struct memrecord *)ni->rate_driver_data;
  626. freed = mr->start_addr - last_addr;
  627. } else
  628. freed = priv->rx_end - last_addr;
  629. last_addr = range->end_addr;
  630. __skb_unlink(entry, &priv->tx_queue);
  631. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  632. entry_hdr = (struct p54_hdr *) entry->data;
  633. entry_data = (struct p54_tx_data *) entry_hdr->data;
  634. priv->tx_stats[entry_data->hw_queue].len--;
  635. priv->stats.dot11ACKFailureCount += payload->tries - 1;
  636. if (unlikely(entry == priv->cached_beacon)) {
  637. kfree_skb(entry);
  638. priv->cached_beacon = NULL;
  639. goto out;
  640. }
  641. /*
  642. * Clear manually, ieee80211_tx_info_clear_status would
  643. * clear the counts too and we need them.
  644. */
  645. memset(&info->status.ampdu_ack_len, 0,
  646. sizeof(struct ieee80211_tx_info) -
  647. offsetof(struct ieee80211_tx_info, status.ampdu_ack_len));
  648. BUILD_BUG_ON(offsetof(struct ieee80211_tx_info,
  649. status.ampdu_ack_len) != 23);
  650. if (entry_hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
  651. pad = entry_data->align[0];
  652. /* walk through the rates array and adjust the counts */
  653. count = payload->tries;
  654. for (idx = 0; idx < 4; idx++) {
  655. if (count >= info->status.rates[idx].count) {
  656. count -= info->status.rates[idx].count;
  657. } else if (count > 0) {
  658. info->status.rates[idx].count = count;
  659. count = 0;
  660. } else {
  661. info->status.rates[idx].idx = -1;
  662. info->status.rates[idx].count = 0;
  663. }
  664. }
  665. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
  666. (!payload->status))
  667. info->flags |= IEEE80211_TX_STAT_ACK;
  668. if (payload->status & P54_TX_PSM_CANCELLED)
  669. info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
  670. info->status.ack_signal = p54_rssi_to_dbm(dev,
  671. (int)payload->ack_rssi);
  672. skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
  673. ieee80211_tx_status_irqsafe(dev, entry);
  674. goto out;
  675. }
  676. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  677. out:
  678. if (freed >= priv->headroom + sizeof(struct p54_hdr) + 48 +
  679. IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
  680. p54_wake_free_queues(dev);
  681. }
  682. static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
  683. struct sk_buff *skb)
  684. {
  685. struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
  686. struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
  687. struct p54_common *priv = dev->priv;
  688. if (!priv->eeprom)
  689. return ;
  690. if (priv->fw_var >= 0x509) {
  691. memcpy(priv->eeprom, eeprom->v2.data,
  692. le16_to_cpu(eeprom->v2.len));
  693. } else {
  694. memcpy(priv->eeprom, eeprom->v1.data,
  695. le16_to_cpu(eeprom->v1.len));
  696. }
  697. complete(&priv->eeprom_comp);
  698. }
  699. static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
  700. {
  701. struct p54_common *priv = dev->priv;
  702. struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
  703. struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
  704. u32 tsf32;
  705. if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
  706. return ;
  707. tsf32 = le32_to_cpu(stats->tsf32);
  708. if (tsf32 < priv->tsf_low32)
  709. priv->tsf_high32++;
  710. priv->tsf_low32 = tsf32;
  711. priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
  712. priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
  713. priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
  714. priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
  715. p54_free_skb(dev, p54_find_tx_entry(dev, hdr->req_id));
  716. }
  717. static void p54_rx_trap(struct ieee80211_hw *dev, struct sk_buff *skb)
  718. {
  719. struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
  720. struct p54_trap *trap = (struct p54_trap *) hdr->data;
  721. u16 event = le16_to_cpu(trap->event);
  722. u16 freq = le16_to_cpu(trap->frequency);
  723. switch (event) {
  724. case P54_TRAP_BEACON_TX:
  725. break;
  726. case P54_TRAP_RADAR:
  727. printk(KERN_INFO "%s: radar (freq:%d MHz)\n",
  728. wiphy_name(dev->wiphy), freq);
  729. break;
  730. case P54_TRAP_NO_BEACON:
  731. break;
  732. case P54_TRAP_SCAN:
  733. break;
  734. case P54_TRAP_TBTT:
  735. break;
  736. case P54_TRAP_TIMER:
  737. break;
  738. default:
  739. printk(KERN_INFO "%s: received event:%x freq:%d\n",
  740. wiphy_name(dev->wiphy), event, freq);
  741. break;
  742. }
  743. }
  744. static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
  745. {
  746. struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
  747. switch (le16_to_cpu(hdr->type)) {
  748. case P54_CONTROL_TYPE_TXDONE:
  749. p54_rx_frame_sent(dev, skb);
  750. break;
  751. case P54_CONTROL_TYPE_TRAP:
  752. p54_rx_trap(dev, skb);
  753. break;
  754. case P54_CONTROL_TYPE_BBP:
  755. break;
  756. case P54_CONTROL_TYPE_STAT_READBACK:
  757. p54_rx_stats(dev, skb);
  758. break;
  759. case P54_CONTROL_TYPE_EEPROM_READBACK:
  760. p54_rx_eeprom_readback(dev, skb);
  761. break;
  762. default:
  763. printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
  764. wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
  765. break;
  766. }
  767. return 0;
  768. }
  769. /* returns zero if skb can be reused */
  770. int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
  771. {
  772. u16 type = le16_to_cpu(*((__le16 *)skb->data));
  773. if (type & P54_HDR_FLAG_CONTROL)
  774. return p54_rx_control(dev, skb);
  775. else
  776. return p54_rx_data(dev, skb);
  777. }
  778. EXPORT_SYMBOL_GPL(p54_rx);
  779. /*
  780. * So, the firmware is somewhat stupid and doesn't know what places in its
  781. * memory incoming data should go to. By poking around in the firmware, we
  782. * can find some unused memory to upload our packets to. However, data that we
  783. * want the card to TX needs to stay intact until the card has told us that
  784. * it is done with it. This function finds empty places we can upload to and
  785. * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
  786. * allocated areas.
  787. */
  788. static int p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
  789. struct p54_hdr *data, u32 len)
  790. {
  791. struct p54_common *priv = dev->priv;
  792. struct sk_buff *entry = priv->tx_queue.next;
  793. struct sk_buff *target_skb = NULL;
  794. struct ieee80211_tx_info *info;
  795. struct memrecord *range;
  796. u32 last_addr = priv->rx_start;
  797. u32 largest_hole = 0;
  798. u32 target_addr = priv->rx_start;
  799. unsigned long flags;
  800. unsigned int left;
  801. len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
  802. if (!skb)
  803. return -EINVAL;
  804. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  805. left = skb_queue_len(&priv->tx_queue);
  806. if (unlikely(left >= 28)) {
  807. /*
  808. * The tx_queue is nearly full!
  809. * We have throttle normal data traffic, because we must
  810. * have a few spare slots for control frames left.
  811. */
  812. ieee80211_stop_queues(dev);
  813. queue_delayed_work(dev->workqueue, &priv->work,
  814. msecs_to_jiffies(P54_TX_TIMEOUT));
  815. if (unlikely(left == 32)) {
  816. /*
  817. * The tx_queue is now really full.
  818. *
  819. * TODO: check if the device has crashed and reset it.
  820. */
  821. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  822. return -ENOSPC;
  823. }
  824. }
  825. while (left--) {
  826. u32 hole_size;
  827. info = IEEE80211_SKB_CB(entry);
  828. range = (void *)info->rate_driver_data;
  829. hole_size = range->start_addr - last_addr;
  830. if (!target_skb && hole_size >= len) {
  831. target_skb = entry->prev;
  832. hole_size -= len;
  833. target_addr = last_addr;
  834. }
  835. largest_hole = max(largest_hole, hole_size);
  836. last_addr = range->end_addr;
  837. entry = entry->next;
  838. }
  839. if (!target_skb && priv->rx_end - last_addr >= len) {
  840. target_skb = priv->tx_queue.prev;
  841. largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
  842. if (!skb_queue_empty(&priv->tx_queue)) {
  843. info = IEEE80211_SKB_CB(target_skb);
  844. range = (void *)info->rate_driver_data;
  845. target_addr = range->end_addr;
  846. }
  847. } else
  848. largest_hole = max(largest_hole, priv->rx_end - last_addr);
  849. if (!target_skb) {
  850. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  851. ieee80211_stop_queues(dev);
  852. return -ENOSPC;
  853. }
  854. info = IEEE80211_SKB_CB(skb);
  855. range = (void *)info->rate_driver_data;
  856. range->start_addr = target_addr;
  857. range->end_addr = target_addr + len;
  858. __skb_queue_after(&priv->tx_queue, target_skb, skb);
  859. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  860. if (largest_hole < priv->headroom + sizeof(struct p54_hdr) +
  861. 48 + IEEE80211_MAX_RTS_THRESHOLD + priv->tailroom)
  862. ieee80211_stop_queues(dev);
  863. data->req_id = cpu_to_le32(target_addr + priv->headroom);
  864. return 0;
  865. }
  866. static struct sk_buff *p54_alloc_skb(struct ieee80211_hw *dev,
  867. u16 hdr_flags, u16 len, u16 type, gfp_t memflags)
  868. {
  869. struct p54_common *priv = dev->priv;
  870. struct p54_hdr *hdr;
  871. struct sk_buff *skb;
  872. skb = __dev_alloc_skb(len + priv->tx_hdr_len, memflags);
  873. if (!skb)
  874. return NULL;
  875. skb_reserve(skb, priv->tx_hdr_len);
  876. hdr = (struct p54_hdr *) skb_put(skb, sizeof(*hdr));
  877. hdr->flags = cpu_to_le16(hdr_flags);
  878. hdr->len = cpu_to_le16(len - sizeof(*hdr));
  879. hdr->type = cpu_to_le16(type);
  880. hdr->tries = hdr->rts_tries = 0;
  881. if (unlikely(p54_assign_address(dev, skb, hdr, len))) {
  882. kfree_skb(skb);
  883. return NULL;
  884. }
  885. return skb;
  886. }
  887. int p54_read_eeprom(struct ieee80211_hw *dev)
  888. {
  889. struct p54_common *priv = dev->priv;
  890. struct p54_hdr *hdr = NULL;
  891. struct p54_eeprom_lm86 *eeprom_hdr;
  892. struct sk_buff *skb;
  893. size_t eeprom_size = 0x2020, offset = 0, blocksize, maxblocksize;
  894. int ret = -ENOMEM;
  895. void *eeprom = NULL;
  896. maxblocksize = EEPROM_READBACK_LEN;
  897. if (priv->fw_var >= 0x509)
  898. maxblocksize -= 0xc;
  899. else
  900. maxblocksize -= 0x4;
  901. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL, sizeof(*hdr) +
  902. sizeof(*eeprom_hdr) + maxblocksize,
  903. P54_CONTROL_TYPE_EEPROM_READBACK, GFP_KERNEL);
  904. if (!skb)
  905. goto free;
  906. priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
  907. if (!priv->eeprom)
  908. goto free;
  909. eeprom = kzalloc(eeprom_size, GFP_KERNEL);
  910. if (!eeprom)
  911. goto free;
  912. eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb,
  913. sizeof(*eeprom_hdr) + maxblocksize);
  914. while (eeprom_size) {
  915. blocksize = min(eeprom_size, maxblocksize);
  916. if (priv->fw_var < 0x509) {
  917. eeprom_hdr->v1.offset = cpu_to_le16(offset);
  918. eeprom_hdr->v1.len = cpu_to_le16(blocksize);
  919. } else {
  920. eeprom_hdr->v2.offset = cpu_to_le32(offset);
  921. eeprom_hdr->v2.len = cpu_to_le16(blocksize);
  922. eeprom_hdr->v2.magic2 = 0xf;
  923. memcpy(eeprom_hdr->v2.magic, (const char *)"LOCK", 4);
  924. }
  925. priv->tx(dev, skb, 0);
  926. if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
  927. printk(KERN_ERR "%s: device does not respond!\n",
  928. wiphy_name(dev->wiphy));
  929. ret = -EBUSY;
  930. goto free;
  931. }
  932. memcpy(eeprom + offset, priv->eeprom, blocksize);
  933. offset += blocksize;
  934. eeprom_size -= blocksize;
  935. }
  936. ret = p54_parse_eeprom(dev, eeprom, offset);
  937. free:
  938. kfree(priv->eeprom);
  939. priv->eeprom = NULL;
  940. p54_free_skb(dev, skb);
  941. kfree(eeprom);
  942. return ret;
  943. }
  944. EXPORT_SYMBOL_GPL(p54_read_eeprom);
  945. static int p54_set_tim(struct ieee80211_hw *dev, struct ieee80211_sta *sta,
  946. bool set)
  947. {
  948. struct p54_common *priv = dev->priv;
  949. struct sk_buff *skb;
  950. struct p54_tim *tim;
  951. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
  952. sizeof(struct p54_hdr) + sizeof(*tim),
  953. P54_CONTROL_TYPE_TIM, GFP_KERNEL);
  954. if (!skb)
  955. return -ENOMEM;
  956. tim = (struct p54_tim *) skb_put(skb, sizeof(*tim));
  957. tim->count = 1;
  958. tim->entry[0] = cpu_to_le16(set ? (sta->aid | 0x8000) : sta->aid);
  959. priv->tx(dev, skb, 1);
  960. return 0;
  961. }
  962. static int p54_sta_unlock(struct ieee80211_hw *dev, u8 *addr)
  963. {
  964. struct p54_common *priv = dev->priv;
  965. struct sk_buff *skb;
  966. struct p54_sta_unlock *sta;
  967. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
  968. sizeof(struct p54_hdr) + sizeof(*sta),
  969. P54_CONTROL_TYPE_PSM_STA_UNLOCK, GFP_ATOMIC);
  970. if (!skb)
  971. return -ENOMEM;
  972. sta = (struct p54_sta_unlock *)skb_put(skb, sizeof(*sta));
  973. memcpy(sta->addr, addr, ETH_ALEN);
  974. priv->tx(dev, skb, 1);
  975. return 0;
  976. }
  977. static void p54_sta_notify(struct ieee80211_hw *dev, struct ieee80211_vif *vif,
  978. enum sta_notify_cmd notify_cmd,
  979. struct ieee80211_sta *sta)
  980. {
  981. switch (notify_cmd) {
  982. case STA_NOTIFY_ADD:
  983. case STA_NOTIFY_REMOVE:
  984. /*
  985. * Notify the firmware that we don't want or we don't
  986. * need to buffer frames for this station anymore.
  987. */
  988. p54_sta_unlock(dev, sta->addr);
  989. break;
  990. case STA_NOTIFY_AWAKE:
  991. /* update the firmware's filter table */
  992. p54_sta_unlock(dev, sta->addr);
  993. break;
  994. default:
  995. break;
  996. }
  997. }
  998. static int p54_tx_cancel(struct ieee80211_hw *dev, struct sk_buff *entry)
  999. {
  1000. struct p54_common *priv = dev->priv;
  1001. struct sk_buff *skb;
  1002. struct p54_hdr *hdr;
  1003. struct p54_txcancel *cancel;
  1004. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET,
  1005. sizeof(struct p54_hdr) + sizeof(*cancel),
  1006. P54_CONTROL_TYPE_TXCANCEL, GFP_ATOMIC);
  1007. if (!skb)
  1008. return -ENOMEM;
  1009. hdr = (void *)entry->data;
  1010. cancel = (struct p54_txcancel *)skb_put(skb, sizeof(*cancel));
  1011. cancel->req_id = hdr->req_id;
  1012. priv->tx(dev, skb, 1);
  1013. return 0;
  1014. }
  1015. static int p54_tx_fill(struct ieee80211_hw *dev, struct sk_buff *skb,
  1016. struct ieee80211_tx_info *info, u8 *queue, size_t *extra_len,
  1017. u16 *flags, u16 *aid)
  1018. {
  1019. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1020. struct p54_common *priv = dev->priv;
  1021. int ret = 0;
  1022. if (unlikely(ieee80211_is_mgmt(hdr->frame_control))) {
  1023. if (ieee80211_is_beacon(hdr->frame_control)) {
  1024. *aid = 0;
  1025. *queue = 0;
  1026. *extra_len = IEEE80211_MAX_TIM_LEN;
  1027. *flags = P54_HDR_FLAG_DATA_OUT_TIMESTAMP;
  1028. return 0;
  1029. } else if (ieee80211_is_probe_resp(hdr->frame_control)) {
  1030. *aid = 0;
  1031. *queue = 2;
  1032. *flags = P54_HDR_FLAG_DATA_OUT_TIMESTAMP |
  1033. P54_HDR_FLAG_DATA_OUT_NOCANCEL;
  1034. return 0;
  1035. } else {
  1036. *queue = 2;
  1037. ret = 0;
  1038. }
  1039. } else {
  1040. *queue += 4;
  1041. ret = 1;
  1042. }
  1043. switch (priv->mode) {
  1044. case NL80211_IFTYPE_STATION:
  1045. *aid = 1;
  1046. break;
  1047. case NL80211_IFTYPE_AP:
  1048. case NL80211_IFTYPE_ADHOC:
  1049. case NL80211_IFTYPE_MESH_POINT:
  1050. if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
  1051. *aid = 0;
  1052. *queue = 3;
  1053. return 0;
  1054. }
  1055. if (info->control.sta)
  1056. *aid = info->control.sta->aid;
  1057. else
  1058. *flags |= P54_HDR_FLAG_DATA_OUT_NOCANCEL;
  1059. }
  1060. return ret;
  1061. }
  1062. static u8 p54_convert_algo(enum ieee80211_key_alg alg)
  1063. {
  1064. switch (alg) {
  1065. case ALG_WEP:
  1066. return P54_CRYPTO_WEP;
  1067. case ALG_TKIP:
  1068. return P54_CRYPTO_TKIPMICHAEL;
  1069. case ALG_CCMP:
  1070. return P54_CRYPTO_AESCCMP;
  1071. default:
  1072. return 0;
  1073. }
  1074. }
  1075. static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
  1076. {
  1077. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  1078. struct ieee80211_tx_queue_stats *current_queue = NULL;
  1079. struct p54_common *priv = dev->priv;
  1080. struct p54_hdr *hdr;
  1081. struct p54_tx_data *txhdr;
  1082. size_t padding, len, tim_len = 0;
  1083. int i, j, ridx, ret;
  1084. u16 hdr_flags = 0, aid = 0;
  1085. u8 rate, queue, crypt_offset = 0;
  1086. u8 cts_rate = 0x20;
  1087. u8 rc_flags;
  1088. u8 calculated_tries[4];
  1089. u8 nrates = 0, nremaining = 8;
  1090. queue = skb_get_queue_mapping(skb);
  1091. ret = p54_tx_fill(dev, skb, info, &queue, &tim_len, &hdr_flags, &aid);
  1092. current_queue = &priv->tx_stats[queue];
  1093. if (unlikely((current_queue->len > current_queue->limit) && ret))
  1094. return NETDEV_TX_BUSY;
  1095. current_queue->len++;
  1096. current_queue->count++;
  1097. if ((current_queue->len == current_queue->limit) && ret)
  1098. ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
  1099. padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
  1100. len = skb->len;
  1101. if (info->control.hw_key) {
  1102. crypt_offset = ieee80211_get_hdrlen_from_skb(skb);
  1103. if (info->control.hw_key->alg == ALG_TKIP) {
  1104. u8 *iv = (u8 *)(skb->data + crypt_offset);
  1105. /*
  1106. * The firmware excepts that the IV has to have
  1107. * this special format
  1108. */
  1109. iv[1] = iv[0];
  1110. iv[0] = iv[2];
  1111. iv[2] = 0;
  1112. }
  1113. }
  1114. txhdr = (struct p54_tx_data *) skb_push(skb, sizeof(*txhdr) + padding);
  1115. hdr = (struct p54_hdr *) skb_push(skb, sizeof(*hdr));
  1116. if (padding)
  1117. hdr_flags |= P54_HDR_FLAG_DATA_ALIGN;
  1118. hdr->type = cpu_to_le16(aid);
  1119. hdr->rts_tries = info->control.rates[0].count;
  1120. /*
  1121. * we register the rates in perfect order, and
  1122. * RTS/CTS won't happen on 5 GHz
  1123. */
  1124. cts_rate = info->control.rts_cts_rate_idx;
  1125. memset(&txhdr->rateset, 0, sizeof(txhdr->rateset));
  1126. /* see how many rates got used */
  1127. for (i = 0; i < 4; i++) {
  1128. if (info->control.rates[i].idx < 0)
  1129. break;
  1130. nrates++;
  1131. }
  1132. /* limit tries to 8/nrates per rate */
  1133. for (i = 0; i < nrates; i++) {
  1134. /*
  1135. * The magic expression here is equivalent to 8/nrates for
  1136. * all values that matter, but avoids division and jumps.
  1137. * Note that nrates can only take the values 1 through 4.
  1138. */
  1139. calculated_tries[i] = min_t(int, ((15 >> nrates) | 1) + 1,
  1140. info->control.rates[i].count);
  1141. nremaining -= calculated_tries[i];
  1142. }
  1143. /* if there are tries left, distribute from back to front */
  1144. for (i = nrates - 1; nremaining > 0 && i >= 0; i--) {
  1145. int tmp = info->control.rates[i].count - calculated_tries[i];
  1146. if (tmp <= 0)
  1147. continue;
  1148. /* RC requested more tries at this rate */
  1149. tmp = min_t(int, tmp, nremaining);
  1150. calculated_tries[i] += tmp;
  1151. nremaining -= tmp;
  1152. }
  1153. ridx = 0;
  1154. for (i = 0; i < nrates && ridx < 8; i++) {
  1155. /* we register the rates in perfect order */
  1156. rate = info->control.rates[i].idx;
  1157. if (info->band == IEEE80211_BAND_5GHZ)
  1158. rate += 4;
  1159. /* store the count we actually calculated for TX status */
  1160. info->control.rates[i].count = calculated_tries[i];
  1161. rc_flags = info->control.rates[i].flags;
  1162. if (rc_flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) {
  1163. rate |= 0x10;
  1164. cts_rate |= 0x10;
  1165. }
  1166. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
  1167. rate |= 0x40;
  1168. else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
  1169. rate |= 0x20;
  1170. for (j = 0; j < calculated_tries[i] && ridx < 8; j++) {
  1171. txhdr->rateset[ridx] = rate;
  1172. ridx++;
  1173. }
  1174. }
  1175. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
  1176. hdr_flags |= P54_HDR_FLAG_DATA_OUT_SEQNR;
  1177. /* TODO: enable bursting */
  1178. hdr->flags = cpu_to_le16(hdr_flags);
  1179. hdr->tries = ridx;
  1180. txhdr->rts_rate_idx = 0;
  1181. if (info->control.hw_key) {
  1182. crypt_offset += info->control.hw_key->iv_len;
  1183. txhdr->key_type = p54_convert_algo(info->control.hw_key->alg);
  1184. txhdr->key_len = min((u8)16, info->control.hw_key->keylen);
  1185. memcpy(txhdr->key, info->control.hw_key->key, txhdr->key_len);
  1186. if (info->control.hw_key->alg == ALG_TKIP) {
  1187. if (unlikely(skb_tailroom(skb) < 12))
  1188. goto err;
  1189. /* reserve space for the MIC key */
  1190. len += 8;
  1191. memcpy(skb_put(skb, 8), &(info->control.hw_key->key
  1192. [NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY]), 8);
  1193. }
  1194. /* reserve some space for ICV */
  1195. len += info->control.hw_key->icv_len;
  1196. } else {
  1197. txhdr->key_type = 0;
  1198. txhdr->key_len = 0;
  1199. }
  1200. txhdr->crypt_offset = crypt_offset;
  1201. txhdr->hw_queue = queue;
  1202. if (current_queue)
  1203. txhdr->backlog = current_queue->len;
  1204. else
  1205. txhdr->backlog = 0;
  1206. memset(txhdr->durations, 0, sizeof(txhdr->durations));
  1207. txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
  1208. 2 : info->antenna_sel_tx - 1;
  1209. txhdr->output_power = priv->output_power;
  1210. txhdr->cts_rate = cts_rate;
  1211. if (padding)
  1212. txhdr->align[0] = padding;
  1213. hdr->len = cpu_to_le16(len);
  1214. /* modifies skb->cb and with it info, so must be last! */
  1215. if (unlikely(p54_assign_address(dev, skb, hdr, skb->len + tim_len)))
  1216. goto err;
  1217. priv->tx(dev, skb, 0);
  1218. queue_delayed_work(dev->workqueue, &priv->work,
  1219. msecs_to_jiffies(P54_TX_FRAME_LIFETIME));
  1220. return 0;
  1221. err:
  1222. skb_pull(skb, sizeof(*hdr) + sizeof(*txhdr) + padding);
  1223. if (current_queue) {
  1224. current_queue->len--;
  1225. current_queue->count--;
  1226. }
  1227. return NETDEV_TX_BUSY;
  1228. }
  1229. static int p54_setup_mac(struct ieee80211_hw *dev)
  1230. {
  1231. struct p54_common *priv = dev->priv;
  1232. struct sk_buff *skb;
  1233. struct p54_setup_mac *setup;
  1234. u16 mode;
  1235. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*setup) +
  1236. sizeof(struct p54_hdr), P54_CONTROL_TYPE_SETUP,
  1237. GFP_ATOMIC);
  1238. if (!skb)
  1239. return -ENOMEM;
  1240. setup = (struct p54_setup_mac *) skb_put(skb, sizeof(*setup));
  1241. if (dev->conf.radio_enabled) {
  1242. switch (priv->mode) {
  1243. case NL80211_IFTYPE_STATION:
  1244. mode = P54_FILTER_TYPE_STATION;
  1245. break;
  1246. case NL80211_IFTYPE_AP:
  1247. mode = P54_FILTER_TYPE_AP;
  1248. break;
  1249. case NL80211_IFTYPE_ADHOC:
  1250. case NL80211_IFTYPE_MESH_POINT:
  1251. mode = P54_FILTER_TYPE_IBSS;
  1252. break;
  1253. default:
  1254. mode = P54_FILTER_TYPE_NONE;
  1255. break;
  1256. }
  1257. if (priv->filter_flags & FIF_PROMISC_IN_BSS)
  1258. mode |= P54_FILTER_TYPE_TRANSPARENT;
  1259. } else
  1260. mode = P54_FILTER_TYPE_RX_DISABLED;
  1261. setup->mac_mode = cpu_to_le16(mode);
  1262. memcpy(setup->mac_addr, priv->mac_addr, ETH_ALEN);
  1263. memcpy(setup->bssid, priv->bssid, ETH_ALEN);
  1264. setup->rx_antenna = 2; /* automatic */
  1265. setup->rx_align = 0;
  1266. if (priv->fw_var < 0x500) {
  1267. setup->v1.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  1268. memset(setup->v1.rts_rates, 0, 8);
  1269. setup->v1.rx_addr = cpu_to_le32(priv->rx_end);
  1270. setup->v1.max_rx = cpu_to_le16(priv->rx_mtu);
  1271. setup->v1.rxhw = cpu_to_le16(priv->rxhw);
  1272. setup->v1.wakeup_timer = cpu_to_le16(priv->wakeup_timer);
  1273. setup->v1.unalloc0 = cpu_to_le16(0);
  1274. } else {
  1275. setup->v2.rx_addr = cpu_to_le32(priv->rx_end);
  1276. setup->v2.max_rx = cpu_to_le16(priv->rx_mtu);
  1277. setup->v2.rxhw = cpu_to_le16(priv->rxhw);
  1278. setup->v2.timer = cpu_to_le16(priv->wakeup_timer);
  1279. setup->v2.truncate = cpu_to_le16(48896);
  1280. setup->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  1281. setup->v2.sbss_offset = 0;
  1282. setup->v2.mcast_window = 0;
  1283. setup->v2.rx_rssi_threshold = 0;
  1284. setup->v2.rx_ed_threshold = 0;
  1285. setup->v2.ref_clock = cpu_to_le32(644245094);
  1286. setup->v2.lpf_bandwidth = cpu_to_le16(65535);
  1287. setup->v2.osc_start_delay = cpu_to_le16(65535);
  1288. }
  1289. priv->tx(dev, skb, 1);
  1290. return 0;
  1291. }
  1292. static int p54_scan(struct ieee80211_hw *dev, u16 mode, u16 dwell,
  1293. u16 frequency)
  1294. {
  1295. struct p54_common *priv = dev->priv;
  1296. struct sk_buff *skb;
  1297. struct p54_scan *chan;
  1298. unsigned int i;
  1299. void *entry;
  1300. __le16 freq = cpu_to_le16(frequency);
  1301. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*chan) +
  1302. sizeof(struct p54_hdr), P54_CONTROL_TYPE_SCAN,
  1303. GFP_ATOMIC);
  1304. if (!skb)
  1305. return -ENOMEM;
  1306. chan = (struct p54_scan *) skb_put(skb, sizeof(*chan));
  1307. memset(chan->padding1, 0, sizeof(chan->padding1));
  1308. chan->mode = cpu_to_le16(mode);
  1309. chan->dwell = cpu_to_le16(dwell);
  1310. for (i = 0; i < priv->iq_autocal_len; i++) {
  1311. if (priv->iq_autocal[i].freq != freq)
  1312. continue;
  1313. memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
  1314. sizeof(*priv->iq_autocal));
  1315. break;
  1316. }
  1317. if (i == priv->iq_autocal_len)
  1318. goto err;
  1319. for (i = 0; i < priv->output_limit_len; i++) {
  1320. if (priv->output_limit[i].freq != freq)
  1321. continue;
  1322. chan->val_barker = 0x38;
  1323. chan->val_bpsk = chan->dup_bpsk =
  1324. priv->output_limit[i].val_bpsk;
  1325. chan->val_qpsk = chan->dup_qpsk =
  1326. priv->output_limit[i].val_qpsk;
  1327. chan->val_16qam = chan->dup_16qam =
  1328. priv->output_limit[i].val_16qam;
  1329. chan->val_64qam = chan->dup_64qam =
  1330. priv->output_limit[i].val_64qam;
  1331. break;
  1332. }
  1333. if (i == priv->output_limit_len)
  1334. goto err;
  1335. entry = priv->curve_data->data;
  1336. for (i = 0; i < priv->curve_data->channels; i++) {
  1337. if (*((__le16 *)entry) != freq) {
  1338. entry += sizeof(__le16);
  1339. entry += sizeof(struct p54_pa_curve_data_sample) *
  1340. priv->curve_data->points_per_channel;
  1341. continue;
  1342. }
  1343. entry += sizeof(__le16);
  1344. chan->pa_points_per_curve = 8;
  1345. memset(chan->curve_data, 0, sizeof(*chan->curve_data));
  1346. memcpy(chan->curve_data, entry,
  1347. sizeof(struct p54_pa_curve_data_sample) *
  1348. min((u8)8, priv->curve_data->points_per_channel));
  1349. break;
  1350. }
  1351. if (priv->fw_var < 0x500) {
  1352. chan->v1.rssical_mul = cpu_to_le16(130);
  1353. chan->v1.rssical_add = cpu_to_le16(0xfe70);
  1354. } else {
  1355. chan->v2.rssical_mul = cpu_to_le16(130);
  1356. chan->v2.rssical_add = cpu_to_le16(0xfe70);
  1357. chan->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  1358. memset(chan->v2.rts_rates, 0, 8);
  1359. }
  1360. priv->tx(dev, skb, 1);
  1361. return 0;
  1362. err:
  1363. printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
  1364. kfree_skb(skb);
  1365. return -EINVAL;
  1366. }
  1367. static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
  1368. {
  1369. struct p54_common *priv = dev->priv;
  1370. struct sk_buff *skb;
  1371. struct p54_led *led;
  1372. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*led) +
  1373. sizeof(struct p54_hdr), P54_CONTROL_TYPE_LED,
  1374. GFP_ATOMIC);
  1375. if (!skb)
  1376. return -ENOMEM;
  1377. led = (struct p54_led *)skb_put(skb, sizeof(*led));
  1378. led->mode = cpu_to_le16(mode);
  1379. led->led_permanent = cpu_to_le16(link);
  1380. led->led_temporary = cpu_to_le16(act);
  1381. led->duration = cpu_to_le16(1000);
  1382. priv->tx(dev, skb, 1);
  1383. return 0;
  1384. }
  1385. #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
  1386. do { \
  1387. queue.aifs = cpu_to_le16(ai_fs); \
  1388. queue.cwmin = cpu_to_le16(cw_min); \
  1389. queue.cwmax = cpu_to_le16(cw_max); \
  1390. queue.txop = cpu_to_le16(_txop); \
  1391. } while(0)
  1392. static int p54_set_edcf(struct ieee80211_hw *dev)
  1393. {
  1394. struct p54_common *priv = dev->priv;
  1395. struct sk_buff *skb;
  1396. struct p54_edcf *edcf;
  1397. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*edcf) +
  1398. sizeof(struct p54_hdr), P54_CONTROL_TYPE_DCFINIT,
  1399. GFP_ATOMIC);
  1400. if (!skb)
  1401. return -ENOMEM;
  1402. edcf = (struct p54_edcf *)skb_put(skb, sizeof(*edcf));
  1403. if (priv->use_short_slot) {
  1404. edcf->slottime = 9;
  1405. edcf->sifs = 0x10;
  1406. edcf->eofpad = 0x00;
  1407. } else {
  1408. edcf->slottime = 20;
  1409. edcf->sifs = 0x0a;
  1410. edcf->eofpad = 0x06;
  1411. }
  1412. /* (see prism54/isl_oid.h for further details) */
  1413. edcf->frameburst = cpu_to_le16(0);
  1414. edcf->round_trip_delay = cpu_to_le16(0);
  1415. edcf->flags = 0;
  1416. memset(edcf->mapping, 0, sizeof(edcf->mapping));
  1417. memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue));
  1418. priv->tx(dev, skb, 1);
  1419. return 0;
  1420. }
  1421. static int p54_beacon_tim(struct sk_buff *skb)
  1422. {
  1423. /*
  1424. * the good excuse for this mess is ... the firmware.
  1425. * The dummy TIM MUST be at the end of the beacon frame,
  1426. * because it'll be overwritten!
  1427. */
  1428. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  1429. u8 *pos, *end;
  1430. if (skb->len <= sizeof(mgmt))
  1431. return -EINVAL;
  1432. pos = (u8 *)mgmt->u.beacon.variable;
  1433. end = skb->data + skb->len;
  1434. while (pos < end) {
  1435. if (pos + 2 + pos[1] > end)
  1436. return -EINVAL;
  1437. if (pos[0] == WLAN_EID_TIM) {
  1438. u8 dtim_len = pos[1];
  1439. u8 dtim_period = pos[3];
  1440. u8 *next = pos + 2 + dtim_len;
  1441. if (dtim_len < 3)
  1442. return -EINVAL;
  1443. memmove(pos, next, end - next);
  1444. if (dtim_len > 3)
  1445. skb_trim(skb, skb->len - (dtim_len - 3));
  1446. pos = end - (dtim_len + 2);
  1447. /* add the dummy at the end */
  1448. pos[0] = WLAN_EID_TIM;
  1449. pos[1] = 3;
  1450. pos[2] = 0;
  1451. pos[3] = dtim_period;
  1452. pos[4] = 0;
  1453. return 0;
  1454. }
  1455. pos += 2 + pos[1];
  1456. }
  1457. return 0;
  1458. }
  1459. static int p54_beacon_update(struct ieee80211_hw *dev,
  1460. struct ieee80211_vif *vif)
  1461. {
  1462. struct p54_common *priv = dev->priv;
  1463. struct sk_buff *beacon;
  1464. int ret;
  1465. if (priv->cached_beacon) {
  1466. p54_tx_cancel(dev, priv->cached_beacon);
  1467. /* wait for the last beacon the be freed */
  1468. msleep(10);
  1469. }
  1470. beacon = ieee80211_beacon_get(dev, vif);
  1471. if (!beacon)
  1472. return -ENOMEM;
  1473. ret = p54_beacon_tim(beacon);
  1474. if (ret)
  1475. return ret;
  1476. ret = p54_tx(dev, beacon);
  1477. if (ret)
  1478. return ret;
  1479. priv->cached_beacon = beacon;
  1480. priv->tsf_high32 = 0;
  1481. priv->tsf_low32 = 0;
  1482. return 0;
  1483. }
  1484. static int p54_start(struct ieee80211_hw *dev)
  1485. {
  1486. struct p54_common *priv = dev->priv;
  1487. int err;
  1488. mutex_lock(&priv->conf_mutex);
  1489. err = priv->open(dev);
  1490. if (err)
  1491. goto out;
  1492. P54_SET_QUEUE(priv->qos_params[0], 0x0002, 0x0003, 0x0007, 47);
  1493. P54_SET_QUEUE(priv->qos_params[1], 0x0002, 0x0007, 0x000f, 94);
  1494. P54_SET_QUEUE(priv->qos_params[2], 0x0003, 0x000f, 0x03ff, 0);
  1495. P54_SET_QUEUE(priv->qos_params[3], 0x0007, 0x000f, 0x03ff, 0);
  1496. err = p54_set_edcf(dev);
  1497. if (err)
  1498. goto out;
  1499. memset(priv->bssid, ~0, ETH_ALEN);
  1500. priv->mode = NL80211_IFTYPE_MONITOR;
  1501. err = p54_setup_mac(dev);
  1502. if (err) {
  1503. priv->mode = NL80211_IFTYPE_UNSPECIFIED;
  1504. goto out;
  1505. }
  1506. queue_delayed_work(dev->workqueue, &priv->work, 0);
  1507. out:
  1508. mutex_unlock(&priv->conf_mutex);
  1509. return err;
  1510. }
  1511. static void p54_stop(struct ieee80211_hw *dev)
  1512. {
  1513. struct p54_common *priv = dev->priv;
  1514. struct sk_buff *skb;
  1515. mutex_lock(&priv->conf_mutex);
  1516. priv->mode = NL80211_IFTYPE_UNSPECIFIED;
  1517. cancel_delayed_work_sync(&priv->work);
  1518. if (priv->cached_beacon)
  1519. p54_tx_cancel(dev, priv->cached_beacon);
  1520. priv->stop(dev);
  1521. while ((skb = skb_dequeue(&priv->tx_queue)))
  1522. kfree_skb(skb);
  1523. priv->cached_beacon = NULL;
  1524. priv->tsf_high32 = priv->tsf_low32 = 0;
  1525. mutex_unlock(&priv->conf_mutex);
  1526. }
  1527. static int p54_add_interface(struct ieee80211_hw *dev,
  1528. struct ieee80211_if_init_conf *conf)
  1529. {
  1530. struct p54_common *priv = dev->priv;
  1531. mutex_lock(&priv->conf_mutex);
  1532. if (priv->mode != NL80211_IFTYPE_MONITOR) {
  1533. mutex_unlock(&priv->conf_mutex);
  1534. return -EOPNOTSUPP;
  1535. }
  1536. switch (conf->type) {
  1537. case NL80211_IFTYPE_STATION:
  1538. case NL80211_IFTYPE_ADHOC:
  1539. case NL80211_IFTYPE_AP:
  1540. case NL80211_IFTYPE_MESH_POINT:
  1541. priv->mode = conf->type;
  1542. break;
  1543. default:
  1544. mutex_unlock(&priv->conf_mutex);
  1545. return -EOPNOTSUPP;
  1546. }
  1547. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  1548. p54_setup_mac(dev);
  1549. p54_set_leds(dev, 1, 0, 0);
  1550. mutex_unlock(&priv->conf_mutex);
  1551. return 0;
  1552. }
  1553. static void p54_remove_interface(struct ieee80211_hw *dev,
  1554. struct ieee80211_if_init_conf *conf)
  1555. {
  1556. struct p54_common *priv = dev->priv;
  1557. mutex_lock(&priv->conf_mutex);
  1558. if (priv->cached_beacon)
  1559. p54_tx_cancel(dev, priv->cached_beacon);
  1560. priv->mode = NL80211_IFTYPE_MONITOR;
  1561. memset(priv->mac_addr, 0, ETH_ALEN);
  1562. memset(priv->bssid, 0, ETH_ALEN);
  1563. p54_setup_mac(dev);
  1564. mutex_unlock(&priv->conf_mutex);
  1565. }
  1566. static int p54_config(struct ieee80211_hw *dev, u32 changed)
  1567. {
  1568. int ret;
  1569. struct p54_common *priv = dev->priv;
  1570. struct ieee80211_conf *conf = &dev->conf;
  1571. mutex_lock(&priv->conf_mutex);
  1572. if (changed & IEEE80211_CONF_CHANGE_POWER)
  1573. priv->output_power = conf->power_level << 2;
  1574. if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
  1575. ret = p54_setup_mac(dev);
  1576. if (ret)
  1577. goto out;
  1578. }
  1579. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1580. ret = p54_scan(dev, P54_SCAN_EXIT, 0,
  1581. conf->channel->center_freq);
  1582. if (ret)
  1583. goto out;
  1584. }
  1585. out:
  1586. mutex_unlock(&priv->conf_mutex);
  1587. return ret;
  1588. }
  1589. static int p54_config_interface(struct ieee80211_hw *dev,
  1590. struct ieee80211_vif *vif,
  1591. struct ieee80211_if_conf *conf)
  1592. {
  1593. struct p54_common *priv = dev->priv;
  1594. int ret = 0;
  1595. mutex_lock(&priv->conf_mutex);
  1596. if (conf->changed & IEEE80211_IFCC_BSSID) {
  1597. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  1598. ret = p54_setup_mac(dev);
  1599. if (ret)
  1600. goto out;
  1601. }
  1602. if (conf->changed & IEEE80211_IFCC_BEACON) {
  1603. ret = p54_scan(dev, P54_SCAN_EXIT, 0,
  1604. dev->conf.channel->center_freq);
  1605. if (ret)
  1606. goto out;
  1607. ret = p54_setup_mac(dev);
  1608. if (ret)
  1609. goto out;
  1610. ret = p54_beacon_update(dev, vif);
  1611. if (ret)
  1612. goto out;
  1613. ret = p54_set_edcf(dev);
  1614. if (ret)
  1615. goto out;
  1616. }
  1617. ret = p54_set_leds(dev, 1, !is_multicast_ether_addr(priv->bssid), 0);
  1618. out:
  1619. mutex_unlock(&priv->conf_mutex);
  1620. return ret;
  1621. }
  1622. static void p54_configure_filter(struct ieee80211_hw *dev,
  1623. unsigned int changed_flags,
  1624. unsigned int *total_flags,
  1625. int mc_count, struct dev_mc_list *mclist)
  1626. {
  1627. struct p54_common *priv = dev->priv;
  1628. *total_flags &= FIF_PROMISC_IN_BSS |
  1629. (*total_flags & FIF_PROMISC_IN_BSS) ?
  1630. FIF_FCSFAIL : 0;
  1631. priv->filter_flags = *total_flags;
  1632. if (changed_flags & FIF_PROMISC_IN_BSS)
  1633. p54_setup_mac(dev);
  1634. }
  1635. static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
  1636. const struct ieee80211_tx_queue_params *params)
  1637. {
  1638. struct p54_common *priv = dev->priv;
  1639. int ret;
  1640. mutex_lock(&priv->conf_mutex);
  1641. if ((params) && !(queue > 4)) {
  1642. P54_SET_QUEUE(priv->qos_params[queue], params->aifs,
  1643. params->cw_min, params->cw_max, params->txop);
  1644. ret = p54_set_edcf(dev);
  1645. } else
  1646. ret = -EINVAL;
  1647. mutex_unlock(&priv->conf_mutex);
  1648. return ret;
  1649. }
  1650. static int p54_init_xbow_synth(struct ieee80211_hw *dev)
  1651. {
  1652. struct p54_common *priv = dev->priv;
  1653. struct sk_buff *skb;
  1654. struct p54_xbow_synth *xbow;
  1655. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*xbow) +
  1656. sizeof(struct p54_hdr),
  1657. P54_CONTROL_TYPE_XBOW_SYNTH_CFG,
  1658. GFP_KERNEL);
  1659. if (!skb)
  1660. return -ENOMEM;
  1661. xbow = (struct p54_xbow_synth *)skb_put(skb, sizeof(*xbow));
  1662. xbow->magic1 = cpu_to_le16(0x1);
  1663. xbow->magic2 = cpu_to_le16(0x2);
  1664. xbow->freq = cpu_to_le16(5390);
  1665. memset(xbow->padding, 0, sizeof(xbow->padding));
  1666. priv->tx(dev, skb, 1);
  1667. return 0;
  1668. }
  1669. static void p54_work(struct work_struct *work)
  1670. {
  1671. struct p54_common *priv = container_of(work, struct p54_common,
  1672. work.work);
  1673. struct ieee80211_hw *dev = priv->hw;
  1674. struct sk_buff *skb;
  1675. if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
  1676. return ;
  1677. /*
  1678. * TODO: walk through tx_queue and do the following tasks
  1679. * 1. initiate bursts.
  1680. * 2. cancel stuck frames / reset the device if necessary.
  1681. */
  1682. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL, sizeof(struct p54_hdr) +
  1683. sizeof(struct p54_statistics),
  1684. P54_CONTROL_TYPE_STAT_READBACK, GFP_KERNEL);
  1685. if (!skb)
  1686. return ;
  1687. priv->tx(dev, skb, 0);
  1688. }
  1689. static int p54_get_stats(struct ieee80211_hw *dev,
  1690. struct ieee80211_low_level_stats *stats)
  1691. {
  1692. struct p54_common *priv = dev->priv;
  1693. memcpy(stats, &priv->stats, sizeof(*stats));
  1694. return 0;
  1695. }
  1696. static int p54_get_tx_stats(struct ieee80211_hw *dev,
  1697. struct ieee80211_tx_queue_stats *stats)
  1698. {
  1699. struct p54_common *priv = dev->priv;
  1700. memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
  1701. return 0;
  1702. }
  1703. static void p54_bss_info_changed(struct ieee80211_hw *dev,
  1704. struct ieee80211_vif *vif,
  1705. struct ieee80211_bss_conf *info,
  1706. u32 changed)
  1707. {
  1708. struct p54_common *priv = dev->priv;
  1709. if (changed & BSS_CHANGED_ERP_SLOT) {
  1710. priv->use_short_slot = info->use_short_slot;
  1711. p54_set_edcf(dev);
  1712. }
  1713. if (changed & BSS_CHANGED_BASIC_RATES) {
  1714. if (dev->conf.channel->band == IEEE80211_BAND_5GHZ)
  1715. priv->basic_rate_mask = (info->basic_rates << 4);
  1716. else
  1717. priv->basic_rate_mask = info->basic_rates;
  1718. p54_setup_mac(dev);
  1719. if (priv->fw_var >= 0x500)
  1720. p54_scan(dev, P54_SCAN_EXIT, 0,
  1721. dev->conf.channel->center_freq);
  1722. }
  1723. if (changed & BSS_CHANGED_ASSOC) {
  1724. if (info->assoc) {
  1725. priv->aid = info->aid;
  1726. priv->wakeup_timer = info->beacon_int *
  1727. info->dtim_period * 5;
  1728. p54_setup_mac(dev);
  1729. }
  1730. }
  1731. }
  1732. static int p54_set_key(struct ieee80211_hw *dev, enum set_key_cmd cmd,
  1733. const u8 *local_address, const u8 *address,
  1734. struct ieee80211_key_conf *key)
  1735. {
  1736. struct p54_common *priv = dev->priv;
  1737. struct sk_buff *skb;
  1738. struct p54_keycache *rxkey;
  1739. u8 algo = 0;
  1740. if (modparam_nohwcrypt)
  1741. return -EOPNOTSUPP;
  1742. if (cmd == DISABLE_KEY)
  1743. algo = 0;
  1744. else {
  1745. switch (key->alg) {
  1746. case ALG_TKIP:
  1747. if (!(priv->privacy_caps & (BR_DESC_PRIV_CAP_MICHAEL |
  1748. BR_DESC_PRIV_CAP_TKIP)))
  1749. return -EOPNOTSUPP;
  1750. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1751. algo = P54_CRYPTO_TKIPMICHAEL;
  1752. break;
  1753. case ALG_WEP:
  1754. if (!(priv->privacy_caps & BR_DESC_PRIV_CAP_WEP))
  1755. return -EOPNOTSUPP;
  1756. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1757. algo = P54_CRYPTO_WEP;
  1758. break;
  1759. case ALG_CCMP:
  1760. if (!(priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP))
  1761. return -EOPNOTSUPP;
  1762. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1763. algo = P54_CRYPTO_AESCCMP;
  1764. break;
  1765. default:
  1766. return -EINVAL;
  1767. }
  1768. }
  1769. if (key->keyidx > priv->rx_keycache_size) {
  1770. /*
  1771. * The device supports the choosen algorithm, but the firmware
  1772. * does not provide enough key slots to store all of them.
  1773. * So, incoming frames have to be decoded by the mac80211 stack,
  1774. * but we can still offload encryption for outgoing frames.
  1775. */
  1776. return 0;
  1777. }
  1778. mutex_lock(&priv->conf_mutex);
  1779. skb = p54_alloc_skb(dev, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*rxkey) +
  1780. sizeof(struct p54_hdr), P54_CONTROL_TYPE_RX_KEYCACHE,
  1781. GFP_ATOMIC);
  1782. if (!skb) {
  1783. mutex_unlock(&priv->conf_mutex);
  1784. return -ENOMEM;
  1785. }
  1786. /* TODO: some devices have 4 more free slots for rx keys */
  1787. rxkey = (struct p54_keycache *)skb_put(skb, sizeof(*rxkey));
  1788. rxkey->entry = key->keyidx;
  1789. rxkey->key_id = key->keyidx;
  1790. rxkey->key_type = algo;
  1791. if (address)
  1792. memcpy(rxkey->mac, address, ETH_ALEN);
  1793. else
  1794. memset(rxkey->mac, ~0, ETH_ALEN);
  1795. if (key->alg != ALG_TKIP) {
  1796. rxkey->key_len = min((u8)16, key->keylen);
  1797. memcpy(rxkey->key, key->key, rxkey->key_len);
  1798. } else {
  1799. rxkey->key_len = 24;
  1800. memcpy(rxkey->key, key->key, 16);
  1801. memcpy(&(rxkey->key[16]), &(key->key
  1802. [NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY]), 8);
  1803. }
  1804. priv->tx(dev, skb, 1);
  1805. mutex_unlock(&priv->conf_mutex);
  1806. return 0;
  1807. }
  1808. static const struct ieee80211_ops p54_ops = {
  1809. .tx = p54_tx,
  1810. .start = p54_start,
  1811. .stop = p54_stop,
  1812. .add_interface = p54_add_interface,
  1813. .remove_interface = p54_remove_interface,
  1814. .set_tim = p54_set_tim,
  1815. .sta_notify = p54_sta_notify,
  1816. .set_key = p54_set_key,
  1817. .config = p54_config,
  1818. .config_interface = p54_config_interface,
  1819. .bss_info_changed = p54_bss_info_changed,
  1820. .configure_filter = p54_configure_filter,
  1821. .conf_tx = p54_conf_tx,
  1822. .get_stats = p54_get_stats,
  1823. .get_tx_stats = p54_get_tx_stats
  1824. };
  1825. struct ieee80211_hw *p54_init_common(size_t priv_data_len)
  1826. {
  1827. struct ieee80211_hw *dev;
  1828. struct p54_common *priv;
  1829. dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
  1830. if (!dev)
  1831. return NULL;
  1832. priv = dev->priv;
  1833. priv->hw = dev;
  1834. priv->mode = NL80211_IFTYPE_UNSPECIFIED;
  1835. priv->basic_rate_mask = 0x15f;
  1836. skb_queue_head_init(&priv->tx_queue);
  1837. dev->flags = IEEE80211_HW_RX_INCLUDES_FCS |
  1838. IEEE80211_HW_SIGNAL_DBM |
  1839. IEEE80211_HW_NOISE_DBM;
  1840. dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
  1841. BIT(NL80211_IFTYPE_ADHOC) |
  1842. BIT(NL80211_IFTYPE_AP) |
  1843. BIT(NL80211_IFTYPE_MESH_POINT);
  1844. dev->channel_change_time = 1000; /* TODO: find actual value */
  1845. priv->tx_stats[0].limit = 1; /* Beacon queue */
  1846. priv->tx_stats[1].limit = 1; /* Probe queue for HW scan */
  1847. priv->tx_stats[2].limit = 3; /* queue for MLMEs */
  1848. priv->tx_stats[3].limit = 3; /* Broadcast / MC queue */
  1849. priv->tx_stats[4].limit = 5; /* Data */
  1850. dev->queues = 1;
  1851. priv->noise = -94;
  1852. /*
  1853. * We support at most 8 tries no matter which rate they're at,
  1854. * we cannot support max_rates * max_rate_tries as we set it
  1855. * here, but setting it correctly to 4/2 or so would limit us
  1856. * artificially if the RC algorithm wants just two rates, so
  1857. * let's say 4/7, we'll redistribute it at TX time, see the
  1858. * comments there.
  1859. */
  1860. dev->max_rates = 4;
  1861. dev->max_rate_tries = 7;
  1862. dev->extra_tx_headroom = sizeof(struct p54_hdr) + 4 +
  1863. sizeof(struct p54_tx_data);
  1864. mutex_init(&priv->conf_mutex);
  1865. init_completion(&priv->eeprom_comp);
  1866. INIT_DELAYED_WORK(&priv->work, p54_work);
  1867. return dev;
  1868. }
  1869. EXPORT_SYMBOL_GPL(p54_init_common);
  1870. void p54_free_common(struct ieee80211_hw *dev)
  1871. {
  1872. struct p54_common *priv = dev->priv;
  1873. kfree(priv->iq_autocal);
  1874. kfree(priv->output_limit);
  1875. kfree(priv->curve_data);
  1876. }
  1877. EXPORT_SYMBOL_GPL(p54_free_common);
  1878. static int __init p54_init(void)
  1879. {
  1880. return 0;
  1881. }
  1882. static void __exit p54_exit(void)
  1883. {
  1884. }
  1885. module_init(p54_init);
  1886. module_exit(p54_exit);