marvell.c 11 KB

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  1. /*
  2. * drivers/net/phy/marvell.c
  3. *
  4. * Driver for Marvell PHYs
  5. *
  6. * Author: Andy Fleming
  7. *
  8. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/string.h>
  18. #include <linux/errno.h>
  19. #include <linux/unistd.h>
  20. #include <linux/slab.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/init.h>
  23. #include <linux/delay.h>
  24. #include <linux/netdevice.h>
  25. #include <linux/etherdevice.h>
  26. #include <linux/skbuff.h>
  27. #include <linux/spinlock.h>
  28. #include <linux/mm.h>
  29. #include <linux/module.h>
  30. #include <linux/mii.h>
  31. #include <linux/ethtool.h>
  32. #include <linux/phy.h>
  33. #include <asm/io.h>
  34. #include <asm/irq.h>
  35. #include <asm/uaccess.h>
  36. #define MII_M1011_IEVENT 0x13
  37. #define MII_M1011_IEVENT_CLEAR 0x0000
  38. #define MII_M1011_IMASK 0x12
  39. #define MII_M1011_IMASK_INIT 0x6400
  40. #define MII_M1011_IMASK_CLEAR 0x0000
  41. #define MII_M1011_PHY_SCR 0x10
  42. #define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060
  43. #define MII_M1145_PHY_EXT_CR 0x14
  44. #define MII_M1145_RGMII_RX_DELAY 0x0080
  45. #define MII_M1145_RGMII_TX_DELAY 0x0002
  46. #define M1145_DEV_FLAGS_RESISTANCE 0x00000001
  47. #define MII_M1111_PHY_LED_CONTROL 0x18
  48. #define MII_M1111_PHY_LED_DIRECT 0x4100
  49. #define MII_M1111_PHY_LED_COMBINE 0x411c
  50. #define MII_M1111_PHY_EXT_CR 0x14
  51. #define MII_M1111_RX_DELAY 0x80
  52. #define MII_M1111_TX_DELAY 0x2
  53. #define MII_M1111_PHY_EXT_SR 0x1b
  54. #define MII_M1111_HWCFG_MODE_MASK 0xf
  55. #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
  56. #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
  57. #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
  58. #define MII_M1111_HWCFG_FIBER_COPPER_AUTO 0x8000
  59. #define MII_M1111_HWCFG_FIBER_COPPER_RES 0x2000
  60. #define MII_M1111_COPPER 0
  61. #define MII_M1111_FIBER 1
  62. #define MII_M1011_PHY_STATUS 0x11
  63. #define MII_M1011_PHY_STATUS_1000 0x8000
  64. #define MII_M1011_PHY_STATUS_100 0x4000
  65. #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
  66. #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
  67. #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
  68. #define MII_M1011_PHY_STATUS_LINK 0x0400
  69. MODULE_DESCRIPTION("Marvell PHY driver");
  70. MODULE_AUTHOR("Andy Fleming");
  71. MODULE_LICENSE("GPL");
  72. static int marvell_ack_interrupt(struct phy_device *phydev)
  73. {
  74. int err;
  75. /* Clear the interrupts by reading the reg */
  76. err = phy_read(phydev, MII_M1011_IEVENT);
  77. if (err < 0)
  78. return err;
  79. return 0;
  80. }
  81. static int marvell_config_intr(struct phy_device *phydev)
  82. {
  83. int err;
  84. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  85. err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
  86. else
  87. err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
  88. return err;
  89. }
  90. static int marvell_config_aneg(struct phy_device *phydev)
  91. {
  92. int err;
  93. /* The Marvell PHY has an errata which requires
  94. * that certain registers get written in order
  95. * to restart autonegotiation */
  96. err = phy_write(phydev, MII_BMCR, BMCR_RESET);
  97. if (err < 0)
  98. return err;
  99. err = phy_write(phydev, 0x1d, 0x1f);
  100. if (err < 0)
  101. return err;
  102. err = phy_write(phydev, 0x1e, 0x200c);
  103. if (err < 0)
  104. return err;
  105. err = phy_write(phydev, 0x1d, 0x5);
  106. if (err < 0)
  107. return err;
  108. err = phy_write(phydev, 0x1e, 0);
  109. if (err < 0)
  110. return err;
  111. err = phy_write(phydev, 0x1e, 0x100);
  112. if (err < 0)
  113. return err;
  114. err = phy_write(phydev, MII_M1011_PHY_SCR,
  115. MII_M1011_PHY_SCR_AUTO_CROSS);
  116. if (err < 0)
  117. return err;
  118. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  119. MII_M1111_PHY_LED_DIRECT);
  120. if (err < 0)
  121. return err;
  122. err = genphy_config_aneg(phydev);
  123. return err;
  124. }
  125. static int m88e1111_config_init(struct phy_device *phydev)
  126. {
  127. int err;
  128. int temp;
  129. int mode;
  130. /* Enable Fiber/Copper auto selection */
  131. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  132. temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
  133. phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  134. temp = phy_read(phydev, MII_BMCR);
  135. temp |= BMCR_RESET;
  136. phy_write(phydev, MII_BMCR, temp);
  137. if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
  138. (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
  139. (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
  140. (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
  141. temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
  142. if (temp < 0)
  143. return temp;
  144. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  145. temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
  146. } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
  147. temp &= ~MII_M1111_TX_DELAY;
  148. temp |= MII_M1111_RX_DELAY;
  149. } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
  150. temp &= ~MII_M1111_RX_DELAY;
  151. temp |= MII_M1111_TX_DELAY;
  152. }
  153. err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
  154. if (err < 0)
  155. return err;
  156. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  157. if (temp < 0)
  158. return temp;
  159. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  160. mode = phy_read(phydev, MII_M1111_PHY_EXT_CR);
  161. if (mode & MII_M1111_HWCFG_FIBER_COPPER_RES)
  162. temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
  163. else
  164. temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
  165. err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  166. if (err < 0)
  167. return err;
  168. }
  169. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  170. int temp;
  171. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  172. if (temp < 0)
  173. return temp;
  174. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  175. temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK;
  176. err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  177. if (err < 0)
  178. return err;
  179. }
  180. err = phy_write(phydev, MII_BMCR, BMCR_RESET);
  181. if (err < 0)
  182. return err;
  183. return 0;
  184. }
  185. static int m88e1145_config_init(struct phy_device *phydev)
  186. {
  187. int err;
  188. /* Take care of errata E0 & E1 */
  189. err = phy_write(phydev, 0x1d, 0x001b);
  190. if (err < 0)
  191. return err;
  192. err = phy_write(phydev, 0x1e, 0x418f);
  193. if (err < 0)
  194. return err;
  195. err = phy_write(phydev, 0x1d, 0x0016);
  196. if (err < 0)
  197. return err;
  198. err = phy_write(phydev, 0x1e, 0xa2da);
  199. if (err < 0)
  200. return err;
  201. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  202. int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
  203. if (temp < 0)
  204. return temp;
  205. temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
  206. err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
  207. if (err < 0)
  208. return err;
  209. if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) {
  210. err = phy_write(phydev, 0x1d, 0x0012);
  211. if (err < 0)
  212. return err;
  213. temp = phy_read(phydev, 0x1e);
  214. if (temp < 0)
  215. return temp;
  216. temp &= 0xf03f;
  217. temp |= 2 << 9; /* 36 ohm */
  218. temp |= 2 << 6; /* 39 ohm */
  219. err = phy_write(phydev, 0x1e, temp);
  220. if (err < 0)
  221. return err;
  222. err = phy_write(phydev, 0x1d, 0x3);
  223. if (err < 0)
  224. return err;
  225. err = phy_write(phydev, 0x1e, 0x8000);
  226. if (err < 0)
  227. return err;
  228. }
  229. }
  230. return 0;
  231. }
  232. /* marvell_read_status
  233. *
  234. * Generic status code does not detect Fiber correctly!
  235. * Description:
  236. * Check the link, then figure out the current state
  237. * by comparing what we advertise with what the link partner
  238. * advertises. Start by checking the gigabit possibilities,
  239. * then move on to 10/100.
  240. */
  241. static int marvell_read_status(struct phy_device *phydev)
  242. {
  243. int adv;
  244. int err;
  245. int lpa;
  246. int status = 0;
  247. /* Update the link, but return if there
  248. * was an error */
  249. err = genphy_update_link(phydev);
  250. if (err)
  251. return err;
  252. if (AUTONEG_ENABLE == phydev->autoneg) {
  253. status = phy_read(phydev, MII_M1011_PHY_STATUS);
  254. if (status < 0)
  255. return status;
  256. lpa = phy_read(phydev, MII_LPA);
  257. if (lpa < 0)
  258. return lpa;
  259. adv = phy_read(phydev, MII_ADVERTISE);
  260. if (adv < 0)
  261. return adv;
  262. lpa &= adv;
  263. if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
  264. phydev->duplex = DUPLEX_FULL;
  265. else
  266. phydev->duplex = DUPLEX_HALF;
  267. status = status & MII_M1011_PHY_STATUS_SPD_MASK;
  268. phydev->pause = phydev->asym_pause = 0;
  269. switch (status) {
  270. case MII_M1011_PHY_STATUS_1000:
  271. phydev->speed = SPEED_1000;
  272. break;
  273. case MII_M1011_PHY_STATUS_100:
  274. phydev->speed = SPEED_100;
  275. break;
  276. default:
  277. phydev->speed = SPEED_10;
  278. break;
  279. }
  280. if (phydev->duplex == DUPLEX_FULL) {
  281. phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
  282. phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
  283. }
  284. } else {
  285. int bmcr = phy_read(phydev, MII_BMCR);
  286. if (bmcr < 0)
  287. return bmcr;
  288. if (bmcr & BMCR_FULLDPLX)
  289. phydev->duplex = DUPLEX_FULL;
  290. else
  291. phydev->duplex = DUPLEX_HALF;
  292. if (bmcr & BMCR_SPEED1000)
  293. phydev->speed = SPEED_1000;
  294. else if (bmcr & BMCR_SPEED100)
  295. phydev->speed = SPEED_100;
  296. else
  297. phydev->speed = SPEED_10;
  298. phydev->pause = phydev->asym_pause = 0;
  299. }
  300. return 0;
  301. }
  302. static struct phy_driver marvell_drivers[] = {
  303. {
  304. .phy_id = 0x01410c60,
  305. .phy_id_mask = 0xfffffff0,
  306. .name = "Marvell 88E1101",
  307. .features = PHY_GBIT_FEATURES,
  308. .flags = PHY_HAS_INTERRUPT,
  309. .config_aneg = &marvell_config_aneg,
  310. .read_status = &genphy_read_status,
  311. .ack_interrupt = &marvell_ack_interrupt,
  312. .config_intr = &marvell_config_intr,
  313. .driver = { .owner = THIS_MODULE },
  314. },
  315. {
  316. .phy_id = 0x01410c90,
  317. .phy_id_mask = 0xfffffff0,
  318. .name = "Marvell 88E1112",
  319. .features = PHY_GBIT_FEATURES,
  320. .flags = PHY_HAS_INTERRUPT,
  321. .config_init = &m88e1111_config_init,
  322. .config_aneg = &marvell_config_aneg,
  323. .read_status = &genphy_read_status,
  324. .ack_interrupt = &marvell_ack_interrupt,
  325. .config_intr = &marvell_config_intr,
  326. .driver = { .owner = THIS_MODULE },
  327. },
  328. {
  329. .phy_id = 0x01410cc0,
  330. .phy_id_mask = 0xfffffff0,
  331. .name = "Marvell 88E1111",
  332. .features = PHY_GBIT_FEATURES,
  333. .flags = PHY_HAS_INTERRUPT,
  334. .config_init = &m88e1111_config_init,
  335. .config_aneg = &marvell_config_aneg,
  336. .read_status = &marvell_read_status,
  337. .ack_interrupt = &marvell_ack_interrupt,
  338. .config_intr = &marvell_config_intr,
  339. .driver = { .owner = THIS_MODULE },
  340. },
  341. {
  342. .phy_id = 0x01410cd0,
  343. .phy_id_mask = 0xfffffff0,
  344. .name = "Marvell 88E1145",
  345. .features = PHY_GBIT_FEATURES,
  346. .flags = PHY_HAS_INTERRUPT,
  347. .config_init = &m88e1145_config_init,
  348. .config_aneg = &marvell_config_aneg,
  349. .read_status = &genphy_read_status,
  350. .ack_interrupt = &marvell_ack_interrupt,
  351. .config_intr = &marvell_config_intr,
  352. .driver = { .owner = THIS_MODULE },
  353. },
  354. {
  355. .phy_id = 0x01410e30,
  356. .phy_id_mask = 0xfffffff0,
  357. .name = "Marvell 88E1240",
  358. .features = PHY_GBIT_FEATURES,
  359. .flags = PHY_HAS_INTERRUPT,
  360. .config_init = &m88e1111_config_init,
  361. .config_aneg = &marvell_config_aneg,
  362. .read_status = &genphy_read_status,
  363. .ack_interrupt = &marvell_ack_interrupt,
  364. .config_intr = &marvell_config_intr,
  365. .driver = { .owner = THIS_MODULE },
  366. },
  367. };
  368. static int __init marvell_init(void)
  369. {
  370. int ret;
  371. int i;
  372. for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++) {
  373. ret = phy_driver_register(&marvell_drivers[i]);
  374. if (ret) {
  375. while (i-- > 0)
  376. phy_driver_unregister(&marvell_drivers[i]);
  377. return ret;
  378. }
  379. }
  380. return 0;
  381. }
  382. static void __exit marvell_exit(void)
  383. {
  384. int i;
  385. for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++)
  386. phy_driver_unregister(&marvell_drivers[i]);
  387. }
  388. module_init(marvell_init);
  389. module_exit(marvell_exit);