processor_idle.c 31 KB

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  1. /*
  2. * processor_idle - idle state submodule to the ACPI processor driver
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
  8. * - Added processor hotplug support
  9. * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
  10. * - Added support for C3 on SMP
  11. *
  12. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or (at
  17. * your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful, but
  20. * WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  22. * General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License along
  25. * with this program; if not, write to the Free Software Foundation, Inc.,
  26. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  27. *
  28. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/cpufreq.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/seq_file.h>
  36. #include <linux/acpi.h>
  37. #include <linux/dmi.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/sched.h> /* need_resched() */
  40. #include <linux/pm_qos_params.h>
  41. #include <linux/clockchips.h>
  42. #include <linux/cpuidle.h>
  43. #include <linux/irqflags.h>
  44. /*
  45. * Include the apic definitions for x86 to have the APIC timer related defines
  46. * available also for UP (on SMP it gets magically included via linux/smp.h).
  47. * asm/acpi.h is not an option, as it would require more include magic. Also
  48. * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
  49. */
  50. #ifdef CONFIG_X86
  51. #include <asm/apic.h>
  52. #endif
  53. #include <asm/io.h>
  54. #include <asm/uaccess.h>
  55. #include <acpi/acpi_bus.h>
  56. #include <acpi/processor.h>
  57. #include <asm/processor.h>
  58. #define ACPI_PROCESSOR_CLASS "processor"
  59. #define _COMPONENT ACPI_PROCESSOR_COMPONENT
  60. ACPI_MODULE_NAME("processor_idle");
  61. #define ACPI_PROCESSOR_FILE_POWER "power"
  62. #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
  63. #define C2_OVERHEAD 1 /* 1us */
  64. #define C3_OVERHEAD 1 /* 1us */
  65. #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
  66. static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
  67. module_param(max_cstate, uint, 0000);
  68. static unsigned int nocst __read_mostly;
  69. module_param(nocst, uint, 0000);
  70. static unsigned int latency_factor __read_mostly = 2;
  71. module_param(latency_factor, uint, 0644);
  72. static s64 us_to_pm_timer_ticks(s64 t)
  73. {
  74. return div64_u64(t * PM_TIMER_FREQUENCY, 1000000);
  75. }
  76. /*
  77. * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
  78. * For now disable this. Probably a bug somewhere else.
  79. *
  80. * To skip this limit, boot/load with a large max_cstate limit.
  81. */
  82. static int set_max_cstate(const struct dmi_system_id *id)
  83. {
  84. if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
  85. return 0;
  86. printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
  87. " Override with \"processor.max_cstate=%d\"\n", id->ident,
  88. (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
  89. max_cstate = (long)id->driver_data;
  90. return 0;
  91. }
  92. /* Actually this shouldn't be __cpuinitdata, would be better to fix the
  93. callers to only run once -AK */
  94. static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
  95. { set_max_cstate, "Clevo 5600D", {
  96. DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  97. DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
  98. (void *)2},
  99. {},
  100. };
  101. /*
  102. * Callers should disable interrupts before the call and enable
  103. * interrupts after return.
  104. */
  105. static void acpi_safe_halt(void)
  106. {
  107. current_thread_info()->status &= ~TS_POLLING;
  108. /*
  109. * TS_POLLING-cleared state must be visible before we
  110. * test NEED_RESCHED:
  111. */
  112. smp_mb();
  113. if (!need_resched()) {
  114. safe_halt();
  115. local_irq_disable();
  116. }
  117. current_thread_info()->status |= TS_POLLING;
  118. }
  119. #ifdef ARCH_APICTIMER_STOPS_ON_C3
  120. /*
  121. * Some BIOS implementations switch to C3 in the published C2 state.
  122. * This seems to be a common problem on AMD boxen, but other vendors
  123. * are affected too. We pick the most conservative approach: we assume
  124. * that the local APIC stops in both C2 and C3.
  125. */
  126. static void acpi_timer_check_state(int state, struct acpi_processor *pr,
  127. struct acpi_processor_cx *cx)
  128. {
  129. struct acpi_processor_power *pwr = &pr->power;
  130. u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
  131. if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
  132. return;
  133. /*
  134. * Check, if one of the previous states already marked the lapic
  135. * unstable
  136. */
  137. if (pwr->timer_broadcast_on_state < state)
  138. return;
  139. if (cx->type >= type)
  140. pr->power.timer_broadcast_on_state = state;
  141. }
  142. static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
  143. {
  144. unsigned long reason;
  145. reason = pr->power.timer_broadcast_on_state < INT_MAX ?
  146. CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
  147. clockevents_notify(reason, &pr->id);
  148. }
  149. /* Power(C) State timer broadcast control */
  150. static void acpi_state_timer_broadcast(struct acpi_processor *pr,
  151. struct acpi_processor_cx *cx,
  152. int broadcast)
  153. {
  154. int state = cx - pr->power.states;
  155. if (state >= pr->power.timer_broadcast_on_state) {
  156. unsigned long reason;
  157. reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
  158. CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
  159. clockevents_notify(reason, &pr->id);
  160. }
  161. }
  162. #else
  163. static void acpi_timer_check_state(int state, struct acpi_processor *pr,
  164. struct acpi_processor_cx *cstate) { }
  165. static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
  166. static void acpi_state_timer_broadcast(struct acpi_processor *pr,
  167. struct acpi_processor_cx *cx,
  168. int broadcast)
  169. {
  170. }
  171. #endif
  172. /*
  173. * Suspend / resume control
  174. */
  175. static int acpi_idle_suspend;
  176. static u32 saved_bm_rld;
  177. static void acpi_idle_bm_rld_save(void)
  178. {
  179. acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
  180. }
  181. static void acpi_idle_bm_rld_restore(void)
  182. {
  183. u32 resumed_bm_rld;
  184. acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
  185. if (resumed_bm_rld != saved_bm_rld)
  186. acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
  187. }
  188. int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
  189. {
  190. if (acpi_idle_suspend == 1)
  191. return 0;
  192. acpi_idle_bm_rld_save();
  193. acpi_idle_suspend = 1;
  194. return 0;
  195. }
  196. int acpi_processor_resume(struct acpi_device * device)
  197. {
  198. if (acpi_idle_suspend == 0)
  199. return 0;
  200. acpi_idle_bm_rld_restore();
  201. acpi_idle_suspend = 0;
  202. return 0;
  203. }
  204. #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
  205. static void tsc_check_state(int state)
  206. {
  207. switch (boot_cpu_data.x86_vendor) {
  208. case X86_VENDOR_AMD:
  209. case X86_VENDOR_INTEL:
  210. /*
  211. * AMD Fam10h TSC will tick in all
  212. * C/P/S0/S1 states when this bit is set.
  213. */
  214. if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
  215. return;
  216. /*FALL THROUGH*/
  217. default:
  218. /* TSC could halt in idle, so notify users */
  219. if (state > ACPI_STATE_C1)
  220. mark_tsc_unstable("TSC halts in idle");
  221. }
  222. }
  223. #else
  224. static void tsc_check_state(int state) { return; }
  225. #endif
  226. static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
  227. {
  228. if (!pr)
  229. return -EINVAL;
  230. if (!pr->pblk)
  231. return -ENODEV;
  232. /* if info is obtained from pblk/fadt, type equals state */
  233. pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
  234. pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
  235. #ifndef CONFIG_HOTPLUG_CPU
  236. /*
  237. * Check for P_LVL2_UP flag before entering C2 and above on
  238. * an SMP system.
  239. */
  240. if ((num_online_cpus() > 1) &&
  241. !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  242. return -ENODEV;
  243. #endif
  244. /* determine C2 and C3 address from pblk */
  245. pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
  246. pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
  247. /* determine latencies from FADT */
  248. pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
  249. pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
  250. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  251. "lvl2[0x%08x] lvl3[0x%08x]\n",
  252. pr->power.states[ACPI_STATE_C2].address,
  253. pr->power.states[ACPI_STATE_C3].address));
  254. return 0;
  255. }
  256. static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
  257. {
  258. if (!pr->power.states[ACPI_STATE_C1].valid) {
  259. /* set the first C-State to C1 */
  260. /* all processors need to support C1 */
  261. pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
  262. pr->power.states[ACPI_STATE_C1].valid = 1;
  263. pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
  264. }
  265. /* the C0 state only exists as a filler in our array */
  266. pr->power.states[ACPI_STATE_C0].valid = 1;
  267. return 0;
  268. }
  269. static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
  270. {
  271. acpi_status status = 0;
  272. acpi_integer count;
  273. int current_count;
  274. int i;
  275. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  276. union acpi_object *cst;
  277. if (nocst)
  278. return -ENODEV;
  279. current_count = 0;
  280. status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
  281. if (ACPI_FAILURE(status)) {
  282. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
  283. return -ENODEV;
  284. }
  285. cst = buffer.pointer;
  286. /* There must be at least 2 elements */
  287. if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
  288. printk(KERN_ERR PREFIX "not enough elements in _CST\n");
  289. status = -EFAULT;
  290. goto end;
  291. }
  292. count = cst->package.elements[0].integer.value;
  293. /* Validate number of power states. */
  294. if (count < 1 || count != cst->package.count - 1) {
  295. printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
  296. status = -EFAULT;
  297. goto end;
  298. }
  299. /* Tell driver that at least _CST is supported. */
  300. pr->flags.has_cst = 1;
  301. for (i = 1; i <= count; i++) {
  302. union acpi_object *element;
  303. union acpi_object *obj;
  304. struct acpi_power_register *reg;
  305. struct acpi_processor_cx cx;
  306. memset(&cx, 0, sizeof(cx));
  307. element = &(cst->package.elements[i]);
  308. if (element->type != ACPI_TYPE_PACKAGE)
  309. continue;
  310. if (element->package.count != 4)
  311. continue;
  312. obj = &(element->package.elements[0]);
  313. if (obj->type != ACPI_TYPE_BUFFER)
  314. continue;
  315. reg = (struct acpi_power_register *)obj->buffer.pointer;
  316. if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
  317. (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
  318. continue;
  319. /* There should be an easy way to extract an integer... */
  320. obj = &(element->package.elements[1]);
  321. if (obj->type != ACPI_TYPE_INTEGER)
  322. continue;
  323. cx.type = obj->integer.value;
  324. /*
  325. * Some buggy BIOSes won't list C1 in _CST -
  326. * Let acpi_processor_get_power_info_default() handle them later
  327. */
  328. if (i == 1 && cx.type != ACPI_STATE_C1)
  329. current_count++;
  330. cx.address = reg->address;
  331. cx.index = current_count + 1;
  332. cx.entry_method = ACPI_CSTATE_SYSTEMIO;
  333. if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
  334. if (acpi_processor_ffh_cstate_probe
  335. (pr->id, &cx, reg) == 0) {
  336. cx.entry_method = ACPI_CSTATE_FFH;
  337. } else if (cx.type == ACPI_STATE_C1) {
  338. /*
  339. * C1 is a special case where FIXED_HARDWARE
  340. * can be handled in non-MWAIT way as well.
  341. * In that case, save this _CST entry info.
  342. * Otherwise, ignore this info and continue.
  343. */
  344. cx.entry_method = ACPI_CSTATE_HALT;
  345. snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
  346. } else {
  347. continue;
  348. }
  349. if (cx.type == ACPI_STATE_C1 &&
  350. (idle_halt || idle_nomwait)) {
  351. /*
  352. * In most cases the C1 space_id obtained from
  353. * _CST object is FIXED_HARDWARE access mode.
  354. * But when the option of idle=halt is added,
  355. * the entry_method type should be changed from
  356. * CSTATE_FFH to CSTATE_HALT.
  357. * When the option of idle=nomwait is added,
  358. * the C1 entry_method type should be
  359. * CSTATE_HALT.
  360. */
  361. cx.entry_method = ACPI_CSTATE_HALT;
  362. snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
  363. }
  364. } else {
  365. snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
  366. cx.address);
  367. }
  368. if (cx.type == ACPI_STATE_C1) {
  369. cx.valid = 1;
  370. }
  371. obj = &(element->package.elements[2]);
  372. if (obj->type != ACPI_TYPE_INTEGER)
  373. continue;
  374. cx.latency = obj->integer.value;
  375. obj = &(element->package.elements[3]);
  376. if (obj->type != ACPI_TYPE_INTEGER)
  377. continue;
  378. cx.power = obj->integer.value;
  379. current_count++;
  380. memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
  381. /*
  382. * We support total ACPI_PROCESSOR_MAX_POWER - 1
  383. * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
  384. */
  385. if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
  386. printk(KERN_WARNING
  387. "Limiting number of power states to max (%d)\n",
  388. ACPI_PROCESSOR_MAX_POWER);
  389. printk(KERN_WARNING
  390. "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
  391. break;
  392. }
  393. }
  394. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
  395. current_count));
  396. /* Validate number of power states discovered */
  397. if (current_count < 2)
  398. status = -EFAULT;
  399. end:
  400. kfree(buffer.pointer);
  401. return status;
  402. }
  403. static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
  404. {
  405. if (!cx->address)
  406. return;
  407. /*
  408. * C2 latency must be less than or equal to 100
  409. * microseconds.
  410. */
  411. else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
  412. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  413. "latency too large [%d]\n", cx->latency));
  414. return;
  415. }
  416. /*
  417. * Otherwise we've met all of our C2 requirements.
  418. * Normalize the C2 latency to expidite policy
  419. */
  420. cx->valid = 1;
  421. cx->latency_ticks = cx->latency;
  422. return;
  423. }
  424. static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
  425. struct acpi_processor_cx *cx)
  426. {
  427. static int bm_check_flag = -1;
  428. static int bm_control_flag = -1;
  429. if (!cx->address)
  430. return;
  431. /*
  432. * C3 latency must be less than or equal to 1000
  433. * microseconds.
  434. */
  435. else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
  436. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  437. "latency too large [%d]\n", cx->latency));
  438. return;
  439. }
  440. /*
  441. * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
  442. * DMA transfers are used by any ISA device to avoid livelock.
  443. * Note that we could disable Type-F DMA (as recommended by
  444. * the erratum), but this is known to disrupt certain ISA
  445. * devices thus we take the conservative approach.
  446. */
  447. else if (errata.piix4.fdma) {
  448. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  449. "C3 not supported on PIIX4 with Type-F DMA\n"));
  450. return;
  451. }
  452. /* All the logic here assumes flags.bm_check is same across all CPUs */
  453. if (bm_check_flag == -1) {
  454. /* Determine whether bm_check is needed based on CPU */
  455. acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
  456. bm_check_flag = pr->flags.bm_check;
  457. bm_control_flag = pr->flags.bm_control;
  458. } else {
  459. pr->flags.bm_check = bm_check_flag;
  460. pr->flags.bm_control = bm_control_flag;
  461. }
  462. if (pr->flags.bm_check) {
  463. if (!pr->flags.bm_control) {
  464. if (pr->flags.has_cst != 1) {
  465. /* bus mastering control is necessary */
  466. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  467. "C3 support requires BM control\n"));
  468. return;
  469. } else {
  470. /* Here we enter C3 without bus mastering */
  471. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  472. "C3 support without BM control\n"));
  473. }
  474. }
  475. } else {
  476. /*
  477. * WBINVD should be set in fadt, for C3 state to be
  478. * supported on when bm_check is not required.
  479. */
  480. if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
  481. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  482. "Cache invalidation should work properly"
  483. " for C3 to be enabled on SMP systems\n"));
  484. return;
  485. }
  486. }
  487. /*
  488. * Otherwise we've met all of our C3 requirements.
  489. * Normalize the C3 latency to expidite policy. Enable
  490. * checking of bus mastering status (bm_check) so we can
  491. * use this in our C3 policy
  492. */
  493. cx->valid = 1;
  494. cx->latency_ticks = cx->latency;
  495. /*
  496. * On older chipsets, BM_RLD needs to be set
  497. * in order for Bus Master activity to wake the
  498. * system from C3. Newer chipsets handle DMA
  499. * during C3 automatically and BM_RLD is a NOP.
  500. * In either case, the proper way to
  501. * handle BM_RLD is to set it and leave it set.
  502. */
  503. acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
  504. return;
  505. }
  506. static int acpi_processor_power_verify(struct acpi_processor *pr)
  507. {
  508. unsigned int i;
  509. unsigned int working = 0;
  510. pr->power.timer_broadcast_on_state = INT_MAX;
  511. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
  512. struct acpi_processor_cx *cx = &pr->power.states[i];
  513. switch (cx->type) {
  514. case ACPI_STATE_C1:
  515. cx->valid = 1;
  516. break;
  517. case ACPI_STATE_C2:
  518. acpi_processor_power_verify_c2(cx);
  519. if (cx->valid)
  520. acpi_timer_check_state(i, pr, cx);
  521. break;
  522. case ACPI_STATE_C3:
  523. acpi_processor_power_verify_c3(pr, cx);
  524. if (cx->valid)
  525. acpi_timer_check_state(i, pr, cx);
  526. break;
  527. }
  528. if (cx->valid)
  529. tsc_check_state(cx->type);
  530. if (cx->valid)
  531. working++;
  532. }
  533. acpi_propagate_timer_broadcast(pr);
  534. return (working);
  535. }
  536. static int acpi_processor_get_power_info(struct acpi_processor *pr)
  537. {
  538. unsigned int i;
  539. int result;
  540. /* NOTE: the idle thread may not be running while calling
  541. * this function */
  542. /* Zero initialize all the C-states info. */
  543. memset(pr->power.states, 0, sizeof(pr->power.states));
  544. result = acpi_processor_get_power_info_cst(pr);
  545. if (result == -ENODEV)
  546. result = acpi_processor_get_power_info_fadt(pr);
  547. if (result)
  548. return result;
  549. acpi_processor_get_power_info_default(pr);
  550. pr->power.count = acpi_processor_power_verify(pr);
  551. /*
  552. * if one state of type C2 or C3 is available, mark this
  553. * CPU as being "idle manageable"
  554. */
  555. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  556. if (pr->power.states[i].valid) {
  557. pr->power.count = i;
  558. if (pr->power.states[i].type >= ACPI_STATE_C2)
  559. pr->flags.power = 1;
  560. }
  561. }
  562. return 0;
  563. }
  564. static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
  565. {
  566. struct acpi_processor *pr = seq->private;
  567. unsigned int i;
  568. if (!pr)
  569. goto end;
  570. seq_printf(seq, "active state: C%zd\n"
  571. "max_cstate: C%d\n"
  572. "maximum allowed latency: %d usec\n",
  573. pr->power.state ? pr->power.state - pr->power.states : 0,
  574. max_cstate, pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY));
  575. seq_puts(seq, "states:\n");
  576. for (i = 1; i <= pr->power.count; i++) {
  577. seq_printf(seq, " %cC%d: ",
  578. (&pr->power.states[i] ==
  579. pr->power.state ? '*' : ' '), i);
  580. if (!pr->power.states[i].valid) {
  581. seq_puts(seq, "<not supported>\n");
  582. continue;
  583. }
  584. switch (pr->power.states[i].type) {
  585. case ACPI_STATE_C1:
  586. seq_printf(seq, "type[C1] ");
  587. break;
  588. case ACPI_STATE_C2:
  589. seq_printf(seq, "type[C2] ");
  590. break;
  591. case ACPI_STATE_C3:
  592. seq_printf(seq, "type[C3] ");
  593. break;
  594. default:
  595. seq_printf(seq, "type[--] ");
  596. break;
  597. }
  598. if (pr->power.states[i].promotion.state)
  599. seq_printf(seq, "promotion[C%zd] ",
  600. (pr->power.states[i].promotion.state -
  601. pr->power.states));
  602. else
  603. seq_puts(seq, "promotion[--] ");
  604. if (pr->power.states[i].demotion.state)
  605. seq_printf(seq, "demotion[C%zd] ",
  606. (pr->power.states[i].demotion.state -
  607. pr->power.states));
  608. else
  609. seq_puts(seq, "demotion[--] ");
  610. seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
  611. pr->power.states[i].latency,
  612. pr->power.states[i].usage,
  613. (unsigned long long)pr->power.states[i].time);
  614. }
  615. end:
  616. return 0;
  617. }
  618. static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
  619. {
  620. return single_open(file, acpi_processor_power_seq_show,
  621. PDE(inode)->data);
  622. }
  623. static const struct file_operations acpi_processor_power_fops = {
  624. .owner = THIS_MODULE,
  625. .open = acpi_processor_power_open_fs,
  626. .read = seq_read,
  627. .llseek = seq_lseek,
  628. .release = single_release,
  629. };
  630. /**
  631. * acpi_idle_bm_check - checks if bus master activity was detected
  632. */
  633. static int acpi_idle_bm_check(void)
  634. {
  635. u32 bm_status = 0;
  636. acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
  637. if (bm_status)
  638. acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
  639. /*
  640. * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
  641. * the true state of bus mastering activity; forcing us to
  642. * manually check the BMIDEA bit of each IDE channel.
  643. */
  644. else if (errata.piix4.bmisx) {
  645. if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
  646. || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
  647. bm_status = 1;
  648. }
  649. return bm_status;
  650. }
  651. /**
  652. * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
  653. * @cx: cstate data
  654. *
  655. * Caller disables interrupt before call and enables interrupt after return.
  656. */
  657. static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
  658. {
  659. /* Don't trace irqs off for idle */
  660. stop_critical_timings();
  661. if (cx->entry_method == ACPI_CSTATE_FFH) {
  662. /* Call into architectural FFH based C-state */
  663. acpi_processor_ffh_cstate_enter(cx);
  664. } else if (cx->entry_method == ACPI_CSTATE_HALT) {
  665. acpi_safe_halt();
  666. } else {
  667. int unused;
  668. /* IO port based C-state */
  669. inb(cx->address);
  670. /* Dummy wait op - must do something useless after P_LVL2 read
  671. because chipsets cannot guarantee that STPCLK# signal
  672. gets asserted in time to freeze execution properly. */
  673. unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
  674. }
  675. start_critical_timings();
  676. }
  677. /**
  678. * acpi_idle_enter_c1 - enters an ACPI C1 state-type
  679. * @dev: the target CPU
  680. * @state: the state data
  681. *
  682. * This is equivalent to the HALT instruction.
  683. */
  684. static int acpi_idle_enter_c1(struct cpuidle_device *dev,
  685. struct cpuidle_state *state)
  686. {
  687. ktime_t kt1, kt2;
  688. s64 idle_time;
  689. struct acpi_processor *pr;
  690. struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
  691. pr = __get_cpu_var(processors);
  692. if (unlikely(!pr))
  693. return 0;
  694. local_irq_disable();
  695. /* Do not access any ACPI IO ports in suspend path */
  696. if (acpi_idle_suspend) {
  697. acpi_safe_halt();
  698. local_irq_enable();
  699. return 0;
  700. }
  701. kt1 = ktime_get_real();
  702. acpi_idle_do_entry(cx);
  703. kt2 = ktime_get_real();
  704. idle_time = ktime_to_us(ktime_sub(kt2, kt1));
  705. local_irq_enable();
  706. cx->usage++;
  707. return idle_time;
  708. }
  709. /**
  710. * acpi_idle_enter_simple - enters an ACPI state without BM handling
  711. * @dev: the target CPU
  712. * @state: the state data
  713. */
  714. static int acpi_idle_enter_simple(struct cpuidle_device *dev,
  715. struct cpuidle_state *state)
  716. {
  717. struct acpi_processor *pr;
  718. struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
  719. ktime_t kt1, kt2;
  720. s64 idle_time;
  721. s64 sleep_ticks = 0;
  722. pr = __get_cpu_var(processors);
  723. if (unlikely(!pr))
  724. return 0;
  725. if (acpi_idle_suspend)
  726. return(acpi_idle_enter_c1(dev, state));
  727. local_irq_disable();
  728. current_thread_info()->status &= ~TS_POLLING;
  729. /*
  730. * TS_POLLING-cleared state must be visible before we test
  731. * NEED_RESCHED:
  732. */
  733. smp_mb();
  734. if (unlikely(need_resched())) {
  735. current_thread_info()->status |= TS_POLLING;
  736. local_irq_enable();
  737. return 0;
  738. }
  739. /*
  740. * Must be done before busmaster disable as we might need to
  741. * access HPET !
  742. */
  743. acpi_state_timer_broadcast(pr, cx, 1);
  744. if (cx->type == ACPI_STATE_C3)
  745. ACPI_FLUSH_CPU_CACHE();
  746. kt1 = ktime_get_real();
  747. /* Tell the scheduler that we are going deep-idle: */
  748. sched_clock_idle_sleep_event();
  749. acpi_idle_do_entry(cx);
  750. kt2 = ktime_get_real();
  751. idle_time = ktime_to_us(ktime_sub(kt2, kt1));
  752. sleep_ticks = us_to_pm_timer_ticks(idle_time);
  753. /* Tell the scheduler how much we idled: */
  754. sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
  755. local_irq_enable();
  756. current_thread_info()->status |= TS_POLLING;
  757. cx->usage++;
  758. acpi_state_timer_broadcast(pr, cx, 0);
  759. cx->time += sleep_ticks;
  760. return idle_time;
  761. }
  762. static int c3_cpu_count;
  763. static DEFINE_SPINLOCK(c3_lock);
  764. /**
  765. * acpi_idle_enter_bm - enters C3 with proper BM handling
  766. * @dev: the target CPU
  767. * @state: the state data
  768. *
  769. * If BM is detected, the deepest non-C3 idle state is entered instead.
  770. */
  771. static int acpi_idle_enter_bm(struct cpuidle_device *dev,
  772. struct cpuidle_state *state)
  773. {
  774. struct acpi_processor *pr;
  775. struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
  776. ktime_t kt1, kt2;
  777. s64 idle_time;
  778. s64 sleep_ticks = 0;
  779. pr = __get_cpu_var(processors);
  780. if (unlikely(!pr))
  781. return 0;
  782. if (acpi_idle_suspend)
  783. return(acpi_idle_enter_c1(dev, state));
  784. if (acpi_idle_bm_check()) {
  785. if (dev->safe_state) {
  786. dev->last_state = dev->safe_state;
  787. return dev->safe_state->enter(dev, dev->safe_state);
  788. } else {
  789. local_irq_disable();
  790. acpi_safe_halt();
  791. local_irq_enable();
  792. return 0;
  793. }
  794. }
  795. local_irq_disable();
  796. current_thread_info()->status &= ~TS_POLLING;
  797. /*
  798. * TS_POLLING-cleared state must be visible before we test
  799. * NEED_RESCHED:
  800. */
  801. smp_mb();
  802. if (unlikely(need_resched())) {
  803. current_thread_info()->status |= TS_POLLING;
  804. local_irq_enable();
  805. return 0;
  806. }
  807. acpi_unlazy_tlb(smp_processor_id());
  808. /* Tell the scheduler that we are going deep-idle: */
  809. sched_clock_idle_sleep_event();
  810. /*
  811. * Must be done before busmaster disable as we might need to
  812. * access HPET !
  813. */
  814. acpi_state_timer_broadcast(pr, cx, 1);
  815. kt1 = ktime_get_real();
  816. /*
  817. * disable bus master
  818. * bm_check implies we need ARB_DIS
  819. * !bm_check implies we need cache flush
  820. * bm_control implies whether we can do ARB_DIS
  821. *
  822. * That leaves a case where bm_check is set and bm_control is
  823. * not set. In that case we cannot do much, we enter C3
  824. * without doing anything.
  825. */
  826. if (pr->flags.bm_check && pr->flags.bm_control) {
  827. spin_lock(&c3_lock);
  828. c3_cpu_count++;
  829. /* Disable bus master arbitration when all CPUs are in C3 */
  830. if (c3_cpu_count == num_online_cpus())
  831. acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
  832. spin_unlock(&c3_lock);
  833. } else if (!pr->flags.bm_check) {
  834. ACPI_FLUSH_CPU_CACHE();
  835. }
  836. acpi_idle_do_entry(cx);
  837. /* Re-enable bus master arbitration */
  838. if (pr->flags.bm_check && pr->flags.bm_control) {
  839. spin_lock(&c3_lock);
  840. acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
  841. c3_cpu_count--;
  842. spin_unlock(&c3_lock);
  843. }
  844. kt2 = ktime_get_real();
  845. idle_time = ktime_to_us(ktime_sub(kt2, kt1));
  846. sleep_ticks = us_to_pm_timer_ticks(idle_time);
  847. /* Tell the scheduler how much we idled: */
  848. sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
  849. local_irq_enable();
  850. current_thread_info()->status |= TS_POLLING;
  851. cx->usage++;
  852. acpi_state_timer_broadcast(pr, cx, 0);
  853. cx->time += sleep_ticks;
  854. return idle_time;
  855. }
  856. struct cpuidle_driver acpi_idle_driver = {
  857. .name = "acpi_idle",
  858. .owner = THIS_MODULE,
  859. };
  860. /**
  861. * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
  862. * @pr: the ACPI processor
  863. */
  864. static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
  865. {
  866. int i, count = CPUIDLE_DRIVER_STATE_START;
  867. struct acpi_processor_cx *cx;
  868. struct cpuidle_state *state;
  869. struct cpuidle_device *dev = &pr->power.dev;
  870. if (!pr->flags.power_setup_done)
  871. return -EINVAL;
  872. if (pr->flags.power == 0) {
  873. return -EINVAL;
  874. }
  875. dev->cpu = pr->id;
  876. for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
  877. dev->states[i].name[0] = '\0';
  878. dev->states[i].desc[0] = '\0';
  879. }
  880. if (max_cstate == 0)
  881. max_cstate = 1;
  882. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
  883. cx = &pr->power.states[i];
  884. state = &dev->states[count];
  885. if (!cx->valid)
  886. continue;
  887. #ifdef CONFIG_HOTPLUG_CPU
  888. if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  889. !pr->flags.has_cst &&
  890. !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  891. continue;
  892. #endif
  893. cpuidle_set_statedata(state, cx);
  894. snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
  895. strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
  896. state->exit_latency = cx->latency;
  897. state->target_residency = cx->latency * latency_factor;
  898. state->power_usage = cx->power;
  899. state->flags = 0;
  900. switch (cx->type) {
  901. case ACPI_STATE_C1:
  902. state->flags |= CPUIDLE_FLAG_SHALLOW;
  903. if (cx->entry_method == ACPI_CSTATE_FFH)
  904. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  905. state->enter = acpi_idle_enter_c1;
  906. dev->safe_state = state;
  907. break;
  908. case ACPI_STATE_C2:
  909. state->flags |= CPUIDLE_FLAG_BALANCED;
  910. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  911. state->enter = acpi_idle_enter_simple;
  912. dev->safe_state = state;
  913. break;
  914. case ACPI_STATE_C3:
  915. state->flags |= CPUIDLE_FLAG_DEEP;
  916. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  917. state->flags |= CPUIDLE_FLAG_CHECK_BM;
  918. state->enter = pr->flags.bm_check ?
  919. acpi_idle_enter_bm :
  920. acpi_idle_enter_simple;
  921. break;
  922. }
  923. count++;
  924. if (count == CPUIDLE_STATE_MAX)
  925. break;
  926. }
  927. dev->state_count = count;
  928. if (!count)
  929. return -EINVAL;
  930. return 0;
  931. }
  932. int acpi_processor_cst_has_changed(struct acpi_processor *pr)
  933. {
  934. int ret = 0;
  935. if (boot_option_idle_override)
  936. return 0;
  937. if (!pr)
  938. return -EINVAL;
  939. if (nocst) {
  940. return -ENODEV;
  941. }
  942. if (!pr->flags.power_setup_done)
  943. return -ENODEV;
  944. cpuidle_pause_and_lock();
  945. cpuidle_disable_device(&pr->power.dev);
  946. acpi_processor_get_power_info(pr);
  947. if (pr->flags.power) {
  948. acpi_processor_setup_cpuidle(pr);
  949. ret = cpuidle_enable_device(&pr->power.dev);
  950. }
  951. cpuidle_resume_and_unlock();
  952. return ret;
  953. }
  954. int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
  955. struct acpi_device *device)
  956. {
  957. acpi_status status = 0;
  958. static int first_run;
  959. struct proc_dir_entry *entry = NULL;
  960. unsigned int i;
  961. if (boot_option_idle_override)
  962. return 0;
  963. if (!first_run) {
  964. if (idle_halt) {
  965. /*
  966. * When the boot option of "idle=halt" is added, halt
  967. * is used for CPU IDLE.
  968. * In such case C2/C3 is meaningless. So the max_cstate
  969. * is set to one.
  970. */
  971. max_cstate = 1;
  972. }
  973. dmi_check_system(processor_power_dmi_table);
  974. max_cstate = acpi_processor_cstate_check(max_cstate);
  975. if (max_cstate < ACPI_C_STATES_MAX)
  976. printk(KERN_NOTICE
  977. "ACPI: processor limited to max C-state %d\n",
  978. max_cstate);
  979. first_run++;
  980. }
  981. if (!pr)
  982. return -EINVAL;
  983. if (acpi_gbl_FADT.cst_control && !nocst) {
  984. status =
  985. acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
  986. if (ACPI_FAILURE(status)) {
  987. ACPI_EXCEPTION((AE_INFO, status,
  988. "Notifying BIOS of _CST ability failed"));
  989. }
  990. }
  991. acpi_processor_get_power_info(pr);
  992. pr->flags.power_setup_done = 1;
  993. /*
  994. * Install the idle handler if processor power management is supported.
  995. * Note that we use previously set idle handler will be used on
  996. * platforms that only support C1.
  997. */
  998. if (pr->flags.power) {
  999. acpi_processor_setup_cpuidle(pr);
  1000. if (cpuidle_register_device(&pr->power.dev))
  1001. return -EIO;
  1002. printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
  1003. for (i = 1; i <= pr->power.count; i++)
  1004. if (pr->power.states[i].valid)
  1005. printk(" C%d[C%d]", i,
  1006. pr->power.states[i].type);
  1007. printk(")\n");
  1008. }
  1009. /* 'power' [R] */
  1010. entry = proc_create_data(ACPI_PROCESSOR_FILE_POWER,
  1011. S_IRUGO, acpi_device_dir(device),
  1012. &acpi_processor_power_fops,
  1013. acpi_driver_data(device));
  1014. if (!entry)
  1015. return -EIO;
  1016. return 0;
  1017. }
  1018. int acpi_processor_power_exit(struct acpi_processor *pr,
  1019. struct acpi_device *device)
  1020. {
  1021. if (boot_option_idle_override)
  1022. return 0;
  1023. cpuidle_unregister_device(&pr->power.dev);
  1024. pr->flags.power_setup_done = 0;
  1025. if (acpi_device_dir(device))
  1026. remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
  1027. acpi_device_dir(device));
  1028. return 0;
  1029. }