iwl-core.c 83 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <net/mac80211.h>
  33. #include "iwl-eeprom.h"
  34. #include "iwl-dev.h" /* FIXME: remove */
  35. #include "iwl-debug.h"
  36. #include "iwl-core.h"
  37. #include "iwl-io.h"
  38. #include "iwl-power.h"
  39. #include "iwl-sta.h"
  40. #include "iwl-helpers.h"
  41. MODULE_DESCRIPTION("iwl core");
  42. MODULE_VERSION(IWLWIFI_VERSION);
  43. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  44. MODULE_LICENSE("GPL");
  45. /*
  46. * set bt_coex_active to true, uCode will do kill/defer
  47. * every time the priority line is asserted (BT is sending signals on the
  48. * priority line in the PCIx).
  49. * set bt_coex_active to false, uCode will ignore the BT activity and
  50. * perform the normal operation
  51. *
  52. * User might experience transmit issue on some platform due to WiFi/BT
  53. * co-exist problem. The possible behaviors are:
  54. * Able to scan and finding all the available AP
  55. * Not able to associate with any AP
  56. * On those platforms, WiFi communication can be restored by set
  57. * "bt_coex_active" module parameter to "false"
  58. *
  59. * default: bt_coex_active = true (BT_COEX_ENABLE)
  60. */
  61. static bool bt_coex_active = true;
  62. module_param(bt_coex_active, bool, S_IRUGO);
  63. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  64. static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
  65. {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
  66. 0, COEX_UNASSOC_IDLE_FLAGS},
  67. {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
  68. 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
  69. {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
  70. 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
  71. {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
  72. 0, COEX_CALIBRATION_FLAGS},
  73. {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
  74. 0, COEX_PERIODIC_CALIBRATION_FLAGS},
  75. {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
  76. 0, COEX_CONNECTION_ESTAB_FLAGS},
  77. {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
  78. 0, COEX_ASSOCIATED_IDLE_FLAGS},
  79. {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
  80. 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
  81. {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
  82. 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
  83. {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
  84. 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
  85. {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
  86. {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
  87. {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
  88. 0, COEX_STAND_ALONE_DEBUG_FLAGS},
  89. {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
  90. 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
  91. {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
  92. {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
  93. };
  94. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  95. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  96. IWL_RATE_SISO_##s##M_PLCP, \
  97. IWL_RATE_MIMO2_##s##M_PLCP,\
  98. IWL_RATE_MIMO3_##s##M_PLCP,\
  99. IWL_RATE_##r##M_IEEE, \
  100. IWL_RATE_##ip##M_INDEX, \
  101. IWL_RATE_##in##M_INDEX, \
  102. IWL_RATE_##rp##M_INDEX, \
  103. IWL_RATE_##rn##M_INDEX, \
  104. IWL_RATE_##pp##M_INDEX, \
  105. IWL_RATE_##np##M_INDEX }
  106. u32 iwl_debug_level;
  107. EXPORT_SYMBOL(iwl_debug_level);
  108. /*
  109. * Parameter order:
  110. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  111. *
  112. * If there isn't a valid next or previous rate then INV is used which
  113. * maps to IWL_RATE_INVALID
  114. *
  115. */
  116. const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  117. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  118. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  119. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  120. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  121. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  122. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  123. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  124. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  125. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  126. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  127. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  128. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  129. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  130. /* FIXME:RS: ^^ should be INV (legacy) */
  131. };
  132. EXPORT_SYMBOL(iwl_rates);
  133. int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
  134. {
  135. int idx = 0;
  136. /* HT rate format */
  137. if (rate_n_flags & RATE_MCS_HT_MSK) {
  138. idx = (rate_n_flags & 0xff);
  139. if (idx >= IWL_RATE_MIMO3_6M_PLCP)
  140. idx = idx - IWL_RATE_MIMO3_6M_PLCP;
  141. else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
  142. idx = idx - IWL_RATE_MIMO2_6M_PLCP;
  143. idx += IWL_FIRST_OFDM_RATE;
  144. /* skip 9M not supported in ht*/
  145. if (idx >= IWL_RATE_9M_INDEX)
  146. idx += 1;
  147. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  148. return idx;
  149. /* legacy rate format, search for match in table */
  150. } else {
  151. for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
  152. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  153. return idx;
  154. }
  155. return -1;
  156. }
  157. EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
  158. u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
  159. {
  160. int i;
  161. u8 ind = ant;
  162. for (i = 0; i < RATE_ANT_NUM - 1; i++) {
  163. ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
  164. if (priv->hw_params.valid_tx_ant & BIT(ind))
  165. return ind;
  166. }
  167. return ant;
  168. }
  169. EXPORT_SYMBOL(iwl_toggle_tx_ant);
  170. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  171. EXPORT_SYMBOL(iwl_bcast_addr);
  172. /* This function both allocates and initializes hw and priv. */
  173. struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
  174. struct ieee80211_ops *hw_ops)
  175. {
  176. struct iwl_priv *priv;
  177. /* mac80211 allocates memory for this device instance, including
  178. * space for this driver's private structure */
  179. struct ieee80211_hw *hw =
  180. ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
  181. if (hw == NULL) {
  182. printk(KERN_ERR "%s: Can not allocate network device\n",
  183. cfg->name);
  184. goto out;
  185. }
  186. priv = hw->priv;
  187. priv->hw = hw;
  188. out:
  189. return hw;
  190. }
  191. EXPORT_SYMBOL(iwl_alloc_all);
  192. void iwl_hw_detect(struct iwl_priv *priv)
  193. {
  194. priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
  195. priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
  196. pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
  197. }
  198. EXPORT_SYMBOL(iwl_hw_detect);
  199. /*
  200. * QoS support
  201. */
  202. static void iwl_update_qos(struct iwl_priv *priv)
  203. {
  204. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  205. return;
  206. priv->qos_data.def_qos_parm.qos_flags = 0;
  207. if (priv->qos_data.qos_active)
  208. priv->qos_data.def_qos_parm.qos_flags |=
  209. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  210. if (priv->current_ht_config.is_ht)
  211. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  212. IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  213. priv->qos_data.qos_active,
  214. priv->qos_data.def_qos_parm.qos_flags);
  215. iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
  216. sizeof(struct iwl_qosparam_cmd),
  217. &priv->qos_data.def_qos_parm, NULL);
  218. }
  219. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  220. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  221. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  222. struct ieee80211_sta_ht_cap *ht_info,
  223. enum ieee80211_band band)
  224. {
  225. u16 max_bit_rate = 0;
  226. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  227. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  228. ht_info->cap = 0;
  229. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  230. ht_info->ht_supported = true;
  231. if (priv->cfg->ht_greenfield_support)
  232. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  233. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  234. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  235. if (priv->hw_params.ht40_channel & BIT(band)) {
  236. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  237. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  238. ht_info->mcs.rx_mask[4] = 0x01;
  239. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  240. }
  241. if (priv->cfg->mod_params->amsdu_size_8K)
  242. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  243. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  244. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  245. ht_info->mcs.rx_mask[0] = 0xFF;
  246. if (rx_chains_num >= 2)
  247. ht_info->mcs.rx_mask[1] = 0xFF;
  248. if (rx_chains_num >= 3)
  249. ht_info->mcs.rx_mask[2] = 0xFF;
  250. /* Highest supported Rx data rate */
  251. max_bit_rate *= rx_chains_num;
  252. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  253. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  254. /* Tx MCS capabilities */
  255. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  256. if (tx_chains_num != rx_chains_num) {
  257. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  258. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  259. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  260. }
  261. }
  262. /**
  263. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  264. */
  265. int iwlcore_init_geos(struct iwl_priv *priv)
  266. {
  267. struct iwl_channel_info *ch;
  268. struct ieee80211_supported_band *sband;
  269. struct ieee80211_channel *channels;
  270. struct ieee80211_channel *geo_ch;
  271. struct ieee80211_rate *rates;
  272. int i = 0;
  273. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  274. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  275. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  276. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  277. return 0;
  278. }
  279. channels = kzalloc(sizeof(struct ieee80211_channel) *
  280. priv->channel_count, GFP_KERNEL);
  281. if (!channels)
  282. return -ENOMEM;
  283. rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
  284. GFP_KERNEL);
  285. if (!rates) {
  286. kfree(channels);
  287. return -ENOMEM;
  288. }
  289. /* 5.2GHz channels start after the 2.4GHz channels */
  290. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  291. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  292. /* just OFDM */
  293. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  294. sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
  295. if (priv->cfg->sku & IWL_SKU_N)
  296. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  297. IEEE80211_BAND_5GHZ);
  298. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  299. sband->channels = channels;
  300. /* OFDM & CCK */
  301. sband->bitrates = rates;
  302. sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
  303. if (priv->cfg->sku & IWL_SKU_N)
  304. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  305. IEEE80211_BAND_2GHZ);
  306. priv->ieee_channels = channels;
  307. priv->ieee_rates = rates;
  308. for (i = 0; i < priv->channel_count; i++) {
  309. ch = &priv->channel_info[i];
  310. /* FIXME: might be removed if scan is OK */
  311. if (!is_channel_valid(ch))
  312. continue;
  313. if (is_channel_a_band(ch))
  314. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  315. else
  316. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  317. geo_ch = &sband->channels[sband->n_channels++];
  318. geo_ch->center_freq =
  319. ieee80211_channel_to_frequency(ch->channel);
  320. geo_ch->max_power = ch->max_power_avg;
  321. geo_ch->max_antenna_gain = 0xff;
  322. geo_ch->hw_value = ch->channel;
  323. if (is_channel_valid(ch)) {
  324. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  325. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  326. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  327. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  328. if (ch->flags & EEPROM_CHANNEL_RADAR)
  329. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  330. geo_ch->flags |= ch->ht40_extension_channel;
  331. if (ch->max_power_avg > priv->tx_power_device_lmt)
  332. priv->tx_power_device_lmt = ch->max_power_avg;
  333. } else {
  334. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  335. }
  336. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  337. ch->channel, geo_ch->center_freq,
  338. is_channel_a_band(ch) ? "5.2" : "2.4",
  339. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  340. "restricted" : "valid",
  341. geo_ch->flags);
  342. }
  343. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  344. priv->cfg->sku & IWL_SKU_A) {
  345. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  346. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  347. priv->pci_dev->device,
  348. priv->pci_dev->subsystem_device);
  349. priv->cfg->sku &= ~IWL_SKU_A;
  350. }
  351. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  352. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  353. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  354. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  355. return 0;
  356. }
  357. EXPORT_SYMBOL(iwlcore_init_geos);
  358. /*
  359. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  360. */
  361. void iwlcore_free_geos(struct iwl_priv *priv)
  362. {
  363. kfree(priv->ieee_channels);
  364. kfree(priv->ieee_rates);
  365. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  366. }
  367. EXPORT_SYMBOL(iwlcore_free_geos);
  368. /*
  369. * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
  370. * function.
  371. */
  372. void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
  373. __le32 *tx_flags)
  374. {
  375. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  376. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  377. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  378. } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  379. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  380. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  381. }
  382. }
  383. EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
  384. static bool is_single_rx_stream(struct iwl_priv *priv)
  385. {
  386. return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
  387. priv->current_ht_config.single_chain_sufficient;
  388. }
  389. static u8 iwl_is_channel_extension(struct iwl_priv *priv,
  390. enum ieee80211_band band,
  391. u16 channel, u8 extension_chan_offset)
  392. {
  393. const struct iwl_channel_info *ch_info;
  394. ch_info = iwl_get_channel_info(priv, band, channel);
  395. if (!is_channel_valid(ch_info))
  396. return 0;
  397. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  398. return !(ch_info->ht40_extension_channel &
  399. IEEE80211_CHAN_NO_HT40PLUS);
  400. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  401. return !(ch_info->ht40_extension_channel &
  402. IEEE80211_CHAN_NO_HT40MINUS);
  403. return 0;
  404. }
  405. u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
  406. struct ieee80211_sta_ht_cap *sta_ht_inf)
  407. {
  408. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  409. if (!ht_conf->is_ht || !ht_conf->is_40mhz)
  410. return 0;
  411. /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  412. * the bit will not set if it is pure 40MHz case
  413. */
  414. if (sta_ht_inf) {
  415. if (!sta_ht_inf->ht_supported)
  416. return 0;
  417. }
  418. #ifdef CONFIG_IWLWIFI_DEBUG
  419. if (priv->disable_ht40)
  420. return 0;
  421. #endif
  422. return iwl_is_channel_extension(priv, priv->band,
  423. le16_to_cpu(priv->staging_rxon.channel),
  424. ht_conf->extension_chan_offset);
  425. }
  426. EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
  427. static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  428. {
  429. u16 new_val = 0;
  430. u16 beacon_factor = 0;
  431. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  432. new_val = beacon_val / beacon_factor;
  433. if (!new_val)
  434. new_val = max_beacon_val;
  435. return new_val;
  436. }
  437. void iwl_setup_rxon_timing(struct iwl_priv *priv)
  438. {
  439. u64 tsf;
  440. s32 interval_tm, rem;
  441. unsigned long flags;
  442. struct ieee80211_conf *conf = NULL;
  443. u16 beacon_int;
  444. conf = ieee80211_get_hw_conf(priv->hw);
  445. spin_lock_irqsave(&priv->lock, flags);
  446. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  447. priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
  448. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  449. beacon_int = priv->beacon_int;
  450. priv->rxon_timing.atim_window = 0;
  451. } else {
  452. beacon_int = priv->vif->bss_conf.beacon_int;
  453. /* TODO: we need to get atim_window from upper stack
  454. * for now we set to 0 */
  455. priv->rxon_timing.atim_window = 0;
  456. }
  457. beacon_int = iwl_adjust_beacon_interval(beacon_int,
  458. priv->hw_params.max_beacon_itrvl * 1024);
  459. priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
  460. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  461. interval_tm = beacon_int * 1024;
  462. rem = do_div(tsf, interval_tm);
  463. priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  464. spin_unlock_irqrestore(&priv->lock, flags);
  465. IWL_DEBUG_ASSOC(priv,
  466. "beacon interval %d beacon timer %d beacon tim %d\n",
  467. le16_to_cpu(priv->rxon_timing.beacon_interval),
  468. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  469. le16_to_cpu(priv->rxon_timing.atim_window));
  470. }
  471. EXPORT_SYMBOL(iwl_setup_rxon_timing);
  472. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  473. {
  474. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  475. if (hw_decrypt)
  476. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  477. else
  478. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  479. }
  480. EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
  481. /**
  482. * iwl_check_rxon_cmd - validate RXON structure is valid
  483. *
  484. * NOTE: This is really only useful during development and can eventually
  485. * be #ifdef'd out once the driver is stable and folks aren't actively
  486. * making changes
  487. */
  488. int iwl_check_rxon_cmd(struct iwl_priv *priv)
  489. {
  490. int error = 0;
  491. int counter = 1;
  492. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  493. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  494. error |= le32_to_cpu(rxon->flags &
  495. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  496. RXON_FLG_RADAR_DETECT_MSK));
  497. if (error)
  498. IWL_WARN(priv, "check 24G fields %d | %d\n",
  499. counter++, error);
  500. } else {
  501. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  502. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  503. if (error)
  504. IWL_WARN(priv, "check 52 fields %d | %d\n",
  505. counter++, error);
  506. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  507. if (error)
  508. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  509. counter++, error);
  510. }
  511. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  512. if (error)
  513. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  514. /* make sure basic rates 6Mbps and 1Mbps are supported */
  515. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  516. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  517. if (error)
  518. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  519. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  520. if (error)
  521. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  522. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  523. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  524. if (error)
  525. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  526. counter++, error);
  527. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  528. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  529. if (error)
  530. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  531. counter++, error);
  532. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  533. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  534. if (error)
  535. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  536. counter++, error);
  537. if (error)
  538. IWL_WARN(priv, "Tuning to channel %d\n",
  539. le16_to_cpu(rxon->channel));
  540. if (error) {
  541. IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
  542. return -1;
  543. }
  544. return 0;
  545. }
  546. EXPORT_SYMBOL(iwl_check_rxon_cmd);
  547. /**
  548. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  549. * @priv: staging_rxon is compared to active_rxon
  550. *
  551. * If the RXON structure is changing enough to require a new tune,
  552. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  553. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  554. */
  555. int iwl_full_rxon_required(struct iwl_priv *priv)
  556. {
  557. /* These items are only settable from the full RXON command */
  558. if (!(iwl_is_associated(priv)) ||
  559. compare_ether_addr(priv->staging_rxon.bssid_addr,
  560. priv->active_rxon.bssid_addr) ||
  561. compare_ether_addr(priv->staging_rxon.node_addr,
  562. priv->active_rxon.node_addr) ||
  563. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  564. priv->active_rxon.wlap_bssid_addr) ||
  565. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  566. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  567. (priv->staging_rxon.air_propagation !=
  568. priv->active_rxon.air_propagation) ||
  569. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  570. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  571. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  572. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  573. (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
  574. priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
  575. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  576. return 1;
  577. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  578. * be updated with the RXON_ASSOC command -- however only some
  579. * flag transitions are allowed using RXON_ASSOC */
  580. /* Check if we are not switching bands */
  581. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  582. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  583. return 1;
  584. /* Check if we are switching association toggle */
  585. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  586. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  587. return 1;
  588. return 0;
  589. }
  590. EXPORT_SYMBOL(iwl_full_rxon_required);
  591. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
  592. {
  593. /*
  594. * Assign the lowest rate -- should really get this from
  595. * the beacon skb from mac80211.
  596. */
  597. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  598. return IWL_RATE_1M_PLCP;
  599. else
  600. return IWL_RATE_6M_PLCP;
  601. }
  602. EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
  603. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
  604. {
  605. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  606. if (!ht_conf->is_ht) {
  607. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  608. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  609. RXON_FLG_HT40_PROT_MSK |
  610. RXON_FLG_HT_PROT_MSK);
  611. return;
  612. }
  613. /* FIXME: if the definition of ht_protection changed, the "translation"
  614. * will be needed for rxon->flags
  615. */
  616. rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
  617. /* Set up channel bandwidth:
  618. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  619. /* clear the HT channel mode before set the mode */
  620. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  621. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  622. if (iwl_is_ht40_tx_allowed(priv, NULL)) {
  623. /* pure ht40 */
  624. if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  625. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  626. /* Note: control channel is opposite of extension channel */
  627. switch (ht_conf->extension_chan_offset) {
  628. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  629. rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  630. break;
  631. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  632. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  633. break;
  634. }
  635. } else {
  636. /* Note: control channel is opposite of extension channel */
  637. switch (ht_conf->extension_chan_offset) {
  638. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  639. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  640. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  641. break;
  642. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  643. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  644. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  645. break;
  646. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  647. default:
  648. /* channel location only valid if in Mixed mode */
  649. IWL_ERR(priv, "invalid extension channel offset\n");
  650. break;
  651. }
  652. }
  653. } else {
  654. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  655. }
  656. if (priv->cfg->ops->hcmd->set_rxon_chain)
  657. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  658. IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
  659. "extension channel offset 0x%x\n",
  660. le32_to_cpu(rxon->flags), ht_conf->ht_protection,
  661. ht_conf->extension_chan_offset);
  662. return;
  663. }
  664. EXPORT_SYMBOL(iwl_set_rxon_ht);
  665. #define IWL_NUM_RX_CHAINS_MULTIPLE 3
  666. #define IWL_NUM_RX_CHAINS_SINGLE 2
  667. #define IWL_NUM_IDLE_CHAINS_DUAL 2
  668. #define IWL_NUM_IDLE_CHAINS_SINGLE 1
  669. /*
  670. * Determine how many receiver/antenna chains to use.
  671. *
  672. * More provides better reception via diversity. Fewer saves power
  673. * at the expense of throughput, but only when not in powersave to
  674. * start with.
  675. *
  676. * MIMO (dual stream) requires at least 2, but works better with 3.
  677. * This does not determine *which* chains to use, just how many.
  678. */
  679. static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
  680. {
  681. /* # of Rx chains to use when expecting MIMO. */
  682. if (is_single_rx_stream(priv))
  683. return IWL_NUM_RX_CHAINS_SINGLE;
  684. else
  685. return IWL_NUM_RX_CHAINS_MULTIPLE;
  686. }
  687. /*
  688. * When we are in power saving mode, unless device support spatial
  689. * multiplexing power save, use the active count for rx chain count.
  690. */
  691. static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
  692. {
  693. /* # Rx chains when idling, depending on SMPS mode */
  694. switch (priv->current_ht_config.smps) {
  695. case IEEE80211_SMPS_STATIC:
  696. case IEEE80211_SMPS_DYNAMIC:
  697. return IWL_NUM_IDLE_CHAINS_SINGLE;
  698. case IEEE80211_SMPS_OFF:
  699. return active_cnt;
  700. default:
  701. WARN(1, "invalid SMPS mode %d",
  702. priv->current_ht_config.smps);
  703. return active_cnt;
  704. }
  705. }
  706. /* up to 4 chains */
  707. static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
  708. {
  709. u8 res;
  710. res = (chain_bitmap & BIT(0)) >> 0;
  711. res += (chain_bitmap & BIT(1)) >> 1;
  712. res += (chain_bitmap & BIT(2)) >> 2;
  713. res += (chain_bitmap & BIT(3)) >> 3;
  714. return res;
  715. }
  716. /**
  717. * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  718. *
  719. * Selects how many and which Rx receivers/antennas/chains to use.
  720. * This should not be used for scan command ... it puts data in wrong place.
  721. */
  722. void iwl_set_rxon_chain(struct iwl_priv *priv)
  723. {
  724. bool is_single = is_single_rx_stream(priv);
  725. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  726. u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
  727. u32 active_chains;
  728. u16 rx_chain;
  729. /* Tell uCode which antennas are actually connected.
  730. * Before first association, we assume all antennas are connected.
  731. * Just after first association, iwl_chain_noise_calibration()
  732. * checks which antennas actually *are* connected. */
  733. if (priv->chain_noise_data.active_chains)
  734. active_chains = priv->chain_noise_data.active_chains;
  735. else
  736. active_chains = priv->hw_params.valid_rx_ant;
  737. rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
  738. /* How many receivers should we use? */
  739. active_rx_cnt = iwl_get_active_rx_chain_count(priv);
  740. idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
  741. /* correct rx chain count according hw settings
  742. * and chain noise calibration
  743. */
  744. valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
  745. if (valid_rx_cnt < active_rx_cnt)
  746. active_rx_cnt = valid_rx_cnt;
  747. if (valid_rx_cnt < idle_rx_cnt)
  748. idle_rx_cnt = valid_rx_cnt;
  749. rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
  750. rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
  751. priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
  752. if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
  753. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  754. else
  755. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  756. IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
  757. priv->staging_rxon.rx_chain,
  758. active_rx_cnt, idle_rx_cnt);
  759. WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
  760. active_rx_cnt < idle_rx_cnt);
  761. }
  762. EXPORT_SYMBOL(iwl_set_rxon_chain);
  763. /**
  764. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  765. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  766. * @channel: Any channel valid for the requested phymode
  767. * In addition to setting the staging RXON, priv->phymode is also set.
  768. *
  769. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  770. * in the staging RXON flag structure based on the phymode
  771. */
  772. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
  773. {
  774. enum ieee80211_band band = ch->band;
  775. u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
  776. if (!iwl_get_channel_info(priv, band, channel)) {
  777. IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
  778. channel, band);
  779. return -EINVAL;
  780. }
  781. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  782. (priv->band == band))
  783. return 0;
  784. priv->staging_rxon.channel = cpu_to_le16(channel);
  785. if (band == IEEE80211_BAND_5GHZ)
  786. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  787. else
  788. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  789. priv->band = band;
  790. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  791. return 0;
  792. }
  793. EXPORT_SYMBOL(iwl_set_rxon_channel);
  794. void iwl_set_flags_for_band(struct iwl_priv *priv,
  795. enum ieee80211_band band)
  796. {
  797. if (band == IEEE80211_BAND_5GHZ) {
  798. priv->staging_rxon.flags &=
  799. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  800. | RXON_FLG_CCK_MSK);
  801. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  802. } else {
  803. /* Copied from iwl_post_associate() */
  804. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  805. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  806. else
  807. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  808. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  809. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  810. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  811. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  812. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  813. }
  814. }
  815. /*
  816. * initialize rxon structure with default values from eeprom
  817. */
  818. void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
  819. {
  820. const struct iwl_channel_info *ch_info;
  821. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  822. switch (mode) {
  823. case NL80211_IFTYPE_AP:
  824. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  825. break;
  826. case NL80211_IFTYPE_STATION:
  827. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  828. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  829. break;
  830. case NL80211_IFTYPE_ADHOC:
  831. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  832. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  833. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  834. RXON_FILTER_ACCEPT_GRP_MSK;
  835. break;
  836. default:
  837. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  838. break;
  839. }
  840. #if 0
  841. /* TODO: Figure out when short_preamble would be set and cache from
  842. * that */
  843. if (!hw_to_local(priv->hw)->short_preamble)
  844. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  845. else
  846. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  847. #endif
  848. ch_info = iwl_get_channel_info(priv, priv->band,
  849. le16_to_cpu(priv->active_rxon.channel));
  850. if (!ch_info)
  851. ch_info = &priv->channel_info[0];
  852. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  853. priv->band = ch_info->band;
  854. iwl_set_flags_for_band(priv, priv->band);
  855. priv->staging_rxon.ofdm_basic_rates =
  856. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  857. priv->staging_rxon.cck_basic_rates =
  858. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  859. /* clear both MIX and PURE40 mode flag */
  860. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  861. RXON_FLG_CHANNEL_MODE_PURE_40);
  862. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  863. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  864. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  865. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  866. priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
  867. }
  868. EXPORT_SYMBOL(iwl_connection_init_rx_config);
  869. static void iwl_set_rate(struct iwl_priv *priv)
  870. {
  871. const struct ieee80211_supported_band *hw = NULL;
  872. struct ieee80211_rate *rate;
  873. int i;
  874. hw = iwl_get_hw_mode(priv, priv->band);
  875. if (!hw) {
  876. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  877. return;
  878. }
  879. priv->active_rate = 0;
  880. for (i = 0; i < hw->n_bitrates; i++) {
  881. rate = &(hw->bitrates[i]);
  882. if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
  883. priv->active_rate |= (1 << rate->hw_value);
  884. }
  885. IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
  886. priv->staging_rxon.cck_basic_rates =
  887. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  888. priv->staging_rxon.ofdm_basic_rates =
  889. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  890. }
  891. void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  892. {
  893. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  894. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  895. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  896. if (priv->switch_rxon.switch_in_progress) {
  897. if (!le32_to_cpu(csa->status) &&
  898. (csa->channel == priv->switch_rxon.channel)) {
  899. rxon->channel = csa->channel;
  900. priv->staging_rxon.channel = csa->channel;
  901. IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
  902. le16_to_cpu(csa->channel));
  903. } else
  904. IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
  905. le16_to_cpu(csa->channel));
  906. priv->switch_rxon.switch_in_progress = false;
  907. }
  908. }
  909. EXPORT_SYMBOL(iwl_rx_csa);
  910. #ifdef CONFIG_IWLWIFI_DEBUG
  911. void iwl_print_rx_config_cmd(struct iwl_priv *priv)
  912. {
  913. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  914. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  915. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  916. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  917. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  918. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  919. le32_to_cpu(rxon->filter_flags));
  920. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  921. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  922. rxon->ofdm_basic_rates);
  923. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  924. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  925. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  926. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  927. }
  928. EXPORT_SYMBOL(iwl_print_rx_config_cmd);
  929. #endif
  930. /**
  931. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  932. */
  933. void iwl_irq_handle_error(struct iwl_priv *priv)
  934. {
  935. /* Set the FW error flag -- cleared on iwl_down */
  936. set_bit(STATUS_FW_ERROR, &priv->status);
  937. /* Cancel currently queued command. */
  938. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  939. priv->cfg->ops->lib->dump_nic_error_log(priv);
  940. if (priv->cfg->ops->lib->dump_csr)
  941. priv->cfg->ops->lib->dump_csr(priv);
  942. if (priv->cfg->ops->lib->dump_fh)
  943. priv->cfg->ops->lib->dump_fh(priv, NULL, false);
  944. priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
  945. #ifdef CONFIG_IWLWIFI_DEBUG
  946. if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
  947. iwl_print_rx_config_cmd(priv);
  948. #endif
  949. wake_up_interruptible(&priv->wait_command_queue);
  950. /* Keep the restart process from trying to send host
  951. * commands by clearing the INIT status bit */
  952. clear_bit(STATUS_READY, &priv->status);
  953. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  954. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  955. "Restarting adapter due to uCode error.\n");
  956. if (priv->cfg->mod_params->restart_fw)
  957. queue_work(priv->workqueue, &priv->restart);
  958. }
  959. }
  960. EXPORT_SYMBOL(iwl_irq_handle_error);
  961. static int iwl_apm_stop_master(struct iwl_priv *priv)
  962. {
  963. int ret = 0;
  964. /* stop device's busmaster DMA activity */
  965. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  966. ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  967. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  968. if (ret)
  969. IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
  970. IWL_DEBUG_INFO(priv, "stop master\n");
  971. return ret;
  972. }
  973. void iwl_apm_stop(struct iwl_priv *priv)
  974. {
  975. IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
  976. /* Stop device's DMA activity */
  977. iwl_apm_stop_master(priv);
  978. /* Reset the entire device */
  979. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  980. udelay(10);
  981. /*
  982. * Clear "initialization complete" bit to move adapter from
  983. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  984. */
  985. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  986. }
  987. EXPORT_SYMBOL(iwl_apm_stop);
  988. /*
  989. * Start up NIC's basic functionality after it has been reset
  990. * (e.g. after platform boot, or shutdown via iwl_apm_stop())
  991. * NOTE: This does not load uCode nor start the embedded processor
  992. */
  993. int iwl_apm_init(struct iwl_priv *priv)
  994. {
  995. int ret = 0;
  996. u16 lctl;
  997. IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
  998. /*
  999. * Use "set_bit" below rather than "write", to preserve any hardware
  1000. * bits already set by default after reset.
  1001. */
  1002. /* Disable L0S exit timer (platform NMI Work/Around) */
  1003. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  1004. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  1005. /*
  1006. * Disable L0s without affecting L1;
  1007. * don't wait for ICH L0s (ICH bug W/A)
  1008. */
  1009. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  1010. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  1011. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  1012. iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
  1013. /*
  1014. * Enable HAP INTA (interrupt from management bus) to
  1015. * wake device's PCI Express link L1a -> L0s
  1016. * NOTE: This is no-op for 3945 (non-existant bit)
  1017. */
  1018. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  1019. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  1020. /*
  1021. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  1022. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  1023. * If so (likely), disable L0S, so device moves directly L0->L1;
  1024. * costs negligible amount of power savings.
  1025. * If not (unlikely), enable L0S, so there is at least some
  1026. * power savings, even without L1.
  1027. */
  1028. if (priv->cfg->set_l0s) {
  1029. lctl = iwl_pcie_link_ctl(priv);
  1030. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  1031. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  1032. /* L1-ASPM enabled; disable(!) L0S */
  1033. iwl_set_bit(priv, CSR_GIO_REG,
  1034. CSR_GIO_REG_VAL_L0S_ENABLED);
  1035. IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
  1036. } else {
  1037. /* L1-ASPM disabled; enable(!) L0S */
  1038. iwl_clear_bit(priv, CSR_GIO_REG,
  1039. CSR_GIO_REG_VAL_L0S_ENABLED);
  1040. IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
  1041. }
  1042. }
  1043. /* Configure analog phase-lock-loop before activating to D0A */
  1044. if (priv->cfg->pll_cfg_val)
  1045. iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
  1046. /*
  1047. * Set "initialization complete" bit to move adapter from
  1048. * D0U* --> D0A* (powered-up active) state.
  1049. */
  1050. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  1051. /*
  1052. * Wait for clock stabilization; once stabilized, access to
  1053. * device-internal resources is supported, e.g. iwl_write_prph()
  1054. * and accesses to uCode SRAM.
  1055. */
  1056. ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
  1057. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  1058. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  1059. if (ret < 0) {
  1060. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  1061. goto out;
  1062. }
  1063. /*
  1064. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  1065. * BSM (Boostrap State Machine) is only in 3945 and 4965;
  1066. * later devices (i.e. 5000 and later) have non-volatile SRAM,
  1067. * and don't need BSM to restore data after power-saving sleep.
  1068. *
  1069. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  1070. * do not disable clocks. This preserves any hardware bits already
  1071. * set by default in "CLK_CTRL_REG" after reset.
  1072. */
  1073. if (priv->cfg->use_bsm)
  1074. iwl_write_prph(priv, APMG_CLK_EN_REG,
  1075. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  1076. else
  1077. iwl_write_prph(priv, APMG_CLK_EN_REG,
  1078. APMG_CLK_VAL_DMA_CLK_RQT);
  1079. udelay(20);
  1080. /* Disable L1-Active */
  1081. iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  1082. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  1083. out:
  1084. return ret;
  1085. }
  1086. EXPORT_SYMBOL(iwl_apm_init);
  1087. void iwl_configure_filter(struct ieee80211_hw *hw,
  1088. unsigned int changed_flags,
  1089. unsigned int *total_flags,
  1090. u64 multicast)
  1091. {
  1092. struct iwl_priv *priv = hw->priv;
  1093. __le32 *filter_flags = &priv->staging_rxon.filter_flags;
  1094. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  1095. changed_flags, *total_flags);
  1096. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  1097. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  1098. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  1099. else
  1100. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  1101. }
  1102. if (changed_flags & FIF_ALLMULTI) {
  1103. if (*total_flags & FIF_ALLMULTI)
  1104. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  1105. else
  1106. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  1107. }
  1108. if (changed_flags & FIF_CONTROL) {
  1109. if (*total_flags & FIF_CONTROL)
  1110. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  1111. else
  1112. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  1113. }
  1114. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1115. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1116. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  1117. else
  1118. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  1119. }
  1120. /* We avoid iwl_commit_rxon here to commit the new filter flags
  1121. * since mac80211 will call ieee80211_hw_config immediately.
  1122. * (mc_list is not supported at this time). Otherwise, we need to
  1123. * queue a background iwl_commit_rxon work.
  1124. */
  1125. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  1126. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  1127. }
  1128. EXPORT_SYMBOL(iwl_configure_filter);
  1129. int iwl_set_hw_params(struct iwl_priv *priv)
  1130. {
  1131. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  1132. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1133. if (priv->cfg->mod_params->amsdu_size_8K)
  1134. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
  1135. else
  1136. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
  1137. priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
  1138. if (priv->cfg->mod_params->disable_11n)
  1139. priv->cfg->sku &= ~IWL_SKU_N;
  1140. /* Device-specific setup */
  1141. return priv->cfg->ops->lib->set_hw_params(priv);
  1142. }
  1143. EXPORT_SYMBOL(iwl_set_hw_params);
  1144. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  1145. {
  1146. int ret = 0;
  1147. s8 prev_tx_power = priv->tx_power_user_lmt;
  1148. if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
  1149. IWL_WARN(priv,
  1150. "Requested user TXPOWER %d below lower limit %d.\n",
  1151. tx_power,
  1152. IWLAGN_TX_POWER_TARGET_POWER_MIN);
  1153. return -EINVAL;
  1154. }
  1155. if (tx_power > priv->tx_power_device_lmt) {
  1156. IWL_WARN(priv,
  1157. "Requested user TXPOWER %d above upper limit %d.\n",
  1158. tx_power, priv->tx_power_device_lmt);
  1159. return -EINVAL;
  1160. }
  1161. if (priv->tx_power_user_lmt != tx_power)
  1162. force = true;
  1163. /* if nic is not up don't send command */
  1164. if (iwl_is_ready_rf(priv)) {
  1165. priv->tx_power_user_lmt = tx_power;
  1166. if (force && priv->cfg->ops->lib->send_tx_power)
  1167. ret = priv->cfg->ops->lib->send_tx_power(priv);
  1168. else if (!priv->cfg->ops->lib->send_tx_power)
  1169. ret = -EOPNOTSUPP;
  1170. /*
  1171. * if fail to set tx_power, restore the orig. tx power
  1172. */
  1173. if (ret)
  1174. priv->tx_power_user_lmt = prev_tx_power;
  1175. }
  1176. /*
  1177. * Even this is an async host command, the command
  1178. * will always report success from uCode
  1179. * So once driver can placing the command into the queue
  1180. * successfully, driver can use priv->tx_power_user_lmt
  1181. * to reflect the current tx power
  1182. */
  1183. return ret;
  1184. }
  1185. EXPORT_SYMBOL(iwl_set_tx_power);
  1186. irqreturn_t iwl_isr_legacy(int irq, void *data)
  1187. {
  1188. struct iwl_priv *priv = data;
  1189. u32 inta, inta_mask;
  1190. u32 inta_fh;
  1191. unsigned long flags;
  1192. if (!priv)
  1193. return IRQ_NONE;
  1194. spin_lock_irqsave(&priv->lock, flags);
  1195. /* Disable (but don't clear!) interrupts here to avoid
  1196. * back-to-back ISRs and sporadic interrupts from our NIC.
  1197. * If we have something to service, the tasklet will re-enable ints.
  1198. * If we *don't* have something, we'll re-enable before leaving here. */
  1199. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1200. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1201. /* Discover which interrupts are active/pending */
  1202. inta = iwl_read32(priv, CSR_INT);
  1203. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1204. /* Ignore interrupt if there's nothing in NIC to service.
  1205. * This may be due to IRQ shared with another device,
  1206. * or due to sporadic interrupts thrown from our NIC. */
  1207. if (!inta && !inta_fh) {
  1208. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
  1209. goto none;
  1210. }
  1211. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1212. /* Hardware disappeared. It might have already raised
  1213. * an interrupt */
  1214. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1215. goto unplugged;
  1216. }
  1217. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1218. inta, inta_mask, inta_fh);
  1219. inta &= ~CSR_INT_BIT_SCD;
  1220. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1221. if (likely(inta || inta_fh))
  1222. tasklet_schedule(&priv->irq_tasklet);
  1223. unplugged:
  1224. spin_unlock_irqrestore(&priv->lock, flags);
  1225. return IRQ_HANDLED;
  1226. none:
  1227. /* re-enable interrupts here since we don't have anything to service. */
  1228. /* only Re-enable if diabled by irq */
  1229. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1230. iwl_enable_interrupts(priv);
  1231. spin_unlock_irqrestore(&priv->lock, flags);
  1232. return IRQ_NONE;
  1233. }
  1234. EXPORT_SYMBOL(iwl_isr_legacy);
  1235. void iwl_send_bt_config(struct iwl_priv *priv)
  1236. {
  1237. struct iwl_bt_cmd bt_cmd = {
  1238. .lead_time = BT_LEAD_TIME_DEF,
  1239. .max_kill = BT_MAX_KILL_DEF,
  1240. .kill_ack_mask = 0,
  1241. .kill_cts_mask = 0,
  1242. };
  1243. if (!bt_coex_active)
  1244. bt_cmd.flags = BT_COEX_DISABLE;
  1245. else
  1246. bt_cmd.flags = BT_COEX_ENABLE;
  1247. IWL_DEBUG_INFO(priv, "BT coex %s\n",
  1248. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  1249. if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1250. sizeof(struct iwl_bt_cmd), &bt_cmd))
  1251. IWL_ERR(priv, "failed to send BT Coex Config\n");
  1252. }
  1253. EXPORT_SYMBOL(iwl_send_bt_config);
  1254. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
  1255. {
  1256. struct iwl_statistics_cmd statistics_cmd = {
  1257. .configuration_flags =
  1258. clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
  1259. };
  1260. if (flags & CMD_ASYNC)
  1261. return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
  1262. sizeof(struct iwl_statistics_cmd),
  1263. &statistics_cmd, NULL);
  1264. else
  1265. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  1266. sizeof(struct iwl_statistics_cmd),
  1267. &statistics_cmd);
  1268. }
  1269. EXPORT_SYMBOL(iwl_send_statistics_request);
  1270. /**
  1271. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1272. * using sample data 100 bytes apart. If these sample points are good,
  1273. * it's a pretty good bet that everything between them is good, too.
  1274. */
  1275. static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1276. {
  1277. u32 val;
  1278. int ret = 0;
  1279. u32 errcnt = 0;
  1280. u32 i;
  1281. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1282. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1283. /* read data comes through single port, auto-incr addr */
  1284. /* NOTE: Use the debugless read so we don't flood kernel log
  1285. * if IWL_DL_IO is set */
  1286. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1287. i + IWL49_RTC_INST_LOWER_BOUND);
  1288. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1289. if (val != le32_to_cpu(*image)) {
  1290. ret = -EIO;
  1291. errcnt++;
  1292. if (errcnt >= 3)
  1293. break;
  1294. }
  1295. }
  1296. return ret;
  1297. }
  1298. /**
  1299. * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
  1300. * looking at all data.
  1301. */
  1302. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  1303. u32 len)
  1304. {
  1305. u32 val;
  1306. u32 save_len = len;
  1307. int ret = 0;
  1308. u32 errcnt;
  1309. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1310. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1311. IWL49_RTC_INST_LOWER_BOUND);
  1312. errcnt = 0;
  1313. for (; len > 0; len -= sizeof(u32), image++) {
  1314. /* read data comes through single port, auto-incr addr */
  1315. /* NOTE: Use the debugless read so we don't flood kernel log
  1316. * if IWL_DL_IO is set */
  1317. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1318. if (val != le32_to_cpu(*image)) {
  1319. IWL_ERR(priv, "uCode INST section is invalid at "
  1320. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1321. save_len - len, val, le32_to_cpu(*image));
  1322. ret = -EIO;
  1323. errcnt++;
  1324. if (errcnt >= 20)
  1325. break;
  1326. }
  1327. }
  1328. if (!errcnt)
  1329. IWL_DEBUG_INFO(priv,
  1330. "ucode image in INSTRUCTION memory is good\n");
  1331. return ret;
  1332. }
  1333. /**
  1334. * iwl_verify_ucode - determine which instruction image is in SRAM,
  1335. * and verify its contents
  1336. */
  1337. int iwl_verify_ucode(struct iwl_priv *priv)
  1338. {
  1339. __le32 *image;
  1340. u32 len;
  1341. int ret;
  1342. /* Try bootstrap */
  1343. image = (__le32 *)priv->ucode_boot.v_addr;
  1344. len = priv->ucode_boot.len;
  1345. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1346. if (!ret) {
  1347. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1348. return 0;
  1349. }
  1350. /* Try initialize */
  1351. image = (__le32 *)priv->ucode_init.v_addr;
  1352. len = priv->ucode_init.len;
  1353. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1354. if (!ret) {
  1355. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1356. return 0;
  1357. }
  1358. /* Try runtime/protocol */
  1359. image = (__le32 *)priv->ucode_code.v_addr;
  1360. len = priv->ucode_code.len;
  1361. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1362. if (!ret) {
  1363. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1364. return 0;
  1365. }
  1366. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1367. /* Since nothing seems to match, show first several data entries in
  1368. * instruction SRAM, so maybe visual inspection will give a clue.
  1369. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1370. image = (__le32 *)priv->ucode_boot.v_addr;
  1371. len = priv->ucode_boot.len;
  1372. ret = iwl_verify_inst_full(priv, image, len);
  1373. return ret;
  1374. }
  1375. EXPORT_SYMBOL(iwl_verify_ucode);
  1376. void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1377. {
  1378. struct iwl_ct_kill_config cmd;
  1379. struct iwl_ct_kill_throttling_config adv_cmd;
  1380. unsigned long flags;
  1381. int ret = 0;
  1382. spin_lock_irqsave(&priv->lock, flags);
  1383. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1384. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1385. spin_unlock_irqrestore(&priv->lock, flags);
  1386. priv->thermal_throttle.ct_kill_toggle = false;
  1387. if (priv->cfg->support_ct_kill_exit) {
  1388. adv_cmd.critical_temperature_enter =
  1389. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1390. adv_cmd.critical_temperature_exit =
  1391. cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
  1392. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1393. sizeof(adv_cmd), &adv_cmd);
  1394. if (ret)
  1395. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1396. else
  1397. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1398. "succeeded, "
  1399. "critical temperature enter is %d,"
  1400. "exit is %d\n",
  1401. priv->hw_params.ct_kill_threshold,
  1402. priv->hw_params.ct_kill_exit_threshold);
  1403. } else {
  1404. cmd.critical_temperature_R =
  1405. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1406. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1407. sizeof(cmd), &cmd);
  1408. if (ret)
  1409. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1410. else
  1411. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1412. "succeeded, "
  1413. "critical temperature is %d\n",
  1414. priv->hw_params.ct_kill_threshold);
  1415. }
  1416. }
  1417. EXPORT_SYMBOL(iwl_rf_kill_ct_config);
  1418. /*
  1419. * CARD_STATE_CMD
  1420. *
  1421. * Use: Sets the device's internal card state to enable, disable, or halt
  1422. *
  1423. * When in the 'enable' state the card operates as normal.
  1424. * When in the 'disable' state, the card enters into a low power mode.
  1425. * When in the 'halt' state, the card is shut down and must be fully
  1426. * restarted to come back on.
  1427. */
  1428. int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1429. {
  1430. struct iwl_host_cmd cmd = {
  1431. .id = REPLY_CARD_STATE_CMD,
  1432. .len = sizeof(u32),
  1433. .data = &flags,
  1434. .flags = meta_flag,
  1435. };
  1436. return iwl_send_cmd(priv, &cmd);
  1437. }
  1438. void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  1439. struct iwl_rx_mem_buffer *rxb)
  1440. {
  1441. #ifdef CONFIG_IWLWIFI_DEBUG
  1442. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1443. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1444. IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
  1445. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1446. #endif
  1447. }
  1448. EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
  1449. void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1450. struct iwl_rx_mem_buffer *rxb)
  1451. {
  1452. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1453. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1454. IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
  1455. "notification for %s:\n", len,
  1456. get_cmd_string(pkt->hdr.cmd));
  1457. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
  1458. }
  1459. EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
  1460. void iwl_rx_reply_error(struct iwl_priv *priv,
  1461. struct iwl_rx_mem_buffer *rxb)
  1462. {
  1463. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1464. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1465. "seq 0x%04X ser 0x%08X\n",
  1466. le32_to_cpu(pkt->u.err_resp.error_type),
  1467. get_cmd_string(pkt->u.err_resp.cmd_id),
  1468. pkt->u.err_resp.cmd_id,
  1469. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1470. le32_to_cpu(pkt->u.err_resp.error_info));
  1471. }
  1472. EXPORT_SYMBOL(iwl_rx_reply_error);
  1473. void iwl_clear_isr_stats(struct iwl_priv *priv)
  1474. {
  1475. memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
  1476. }
  1477. int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1478. const struct ieee80211_tx_queue_params *params)
  1479. {
  1480. struct iwl_priv *priv = hw->priv;
  1481. unsigned long flags;
  1482. int q;
  1483. IWL_DEBUG_MAC80211(priv, "enter\n");
  1484. if (!iwl_is_ready_rf(priv)) {
  1485. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1486. return -EIO;
  1487. }
  1488. if (queue >= AC_NUM) {
  1489. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  1490. return 0;
  1491. }
  1492. q = AC_NUM - 1 - queue;
  1493. spin_lock_irqsave(&priv->lock, flags);
  1494. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  1495. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  1496. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1497. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  1498. cpu_to_le16((params->txop * 32));
  1499. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1500. spin_unlock_irqrestore(&priv->lock, flags);
  1501. IWL_DEBUG_MAC80211(priv, "leave\n");
  1502. return 0;
  1503. }
  1504. EXPORT_SYMBOL(iwl_mac_conf_tx);
  1505. static void iwl_ht_conf(struct iwl_priv *priv,
  1506. struct ieee80211_bss_conf *bss_conf)
  1507. {
  1508. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  1509. struct ieee80211_sta *sta;
  1510. IWL_DEBUG_MAC80211(priv, "enter:\n");
  1511. if (!ht_conf->is_ht)
  1512. return;
  1513. ht_conf->ht_protection =
  1514. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  1515. ht_conf->non_GF_STA_present =
  1516. !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  1517. ht_conf->single_chain_sufficient = false;
  1518. switch (priv->iw_mode) {
  1519. case NL80211_IFTYPE_STATION:
  1520. rcu_read_lock();
  1521. sta = ieee80211_find_sta(priv->vif, priv->bssid);
  1522. if (sta) {
  1523. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  1524. int maxstreams;
  1525. maxstreams = (ht_cap->mcs.tx_params &
  1526. IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  1527. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1528. maxstreams += 1;
  1529. if ((ht_cap->mcs.rx_mask[1] == 0) &&
  1530. (ht_cap->mcs.rx_mask[2] == 0))
  1531. ht_conf->single_chain_sufficient = true;
  1532. if (maxstreams <= 1)
  1533. ht_conf->single_chain_sufficient = true;
  1534. } else {
  1535. /*
  1536. * If at all, this can only happen through a race
  1537. * when the AP disconnects us while we're still
  1538. * setting up the connection, in that case mac80211
  1539. * will soon tell us about that.
  1540. */
  1541. ht_conf->single_chain_sufficient = true;
  1542. }
  1543. rcu_read_unlock();
  1544. break;
  1545. case NL80211_IFTYPE_ADHOC:
  1546. ht_conf->single_chain_sufficient = true;
  1547. break;
  1548. default:
  1549. break;
  1550. }
  1551. IWL_DEBUG_MAC80211(priv, "leave\n");
  1552. }
  1553. static inline void iwl_set_no_assoc(struct iwl_priv *priv)
  1554. {
  1555. priv->assoc_id = 0;
  1556. iwl_led_disassociate(priv);
  1557. /*
  1558. * inform the ucode that there is no longer an
  1559. * association and that no more packets should be
  1560. * sent
  1561. */
  1562. priv->staging_rxon.filter_flags &=
  1563. ~RXON_FILTER_ASSOC_MSK;
  1564. priv->staging_rxon.assoc_id = 0;
  1565. iwlcore_commit_rxon(priv);
  1566. }
  1567. void iwl_bss_info_changed(struct ieee80211_hw *hw,
  1568. struct ieee80211_vif *vif,
  1569. struct ieee80211_bss_conf *bss_conf,
  1570. u32 changes)
  1571. {
  1572. struct iwl_priv *priv = hw->priv;
  1573. int ret;
  1574. IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
  1575. if (!iwl_is_alive(priv))
  1576. return;
  1577. mutex_lock(&priv->mutex);
  1578. if (changes & BSS_CHANGED_BEACON &&
  1579. priv->iw_mode == NL80211_IFTYPE_AP) {
  1580. dev_kfree_skb(priv->ibss_beacon);
  1581. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  1582. }
  1583. if (changes & BSS_CHANGED_BEACON_INT) {
  1584. priv->beacon_int = bss_conf->beacon_int;
  1585. /* TODO: in AP mode, do something to make this take effect */
  1586. }
  1587. if (changes & BSS_CHANGED_BSSID) {
  1588. IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
  1589. /*
  1590. * If there is currently a HW scan going on in the
  1591. * background then we need to cancel it else the RXON
  1592. * below/in post_associate will fail.
  1593. */
  1594. if (iwl_scan_cancel_timeout(priv, 100)) {
  1595. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1596. IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
  1597. mutex_unlock(&priv->mutex);
  1598. return;
  1599. }
  1600. /* mac80211 only sets assoc when in STATION mode */
  1601. if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
  1602. bss_conf->assoc) {
  1603. memcpy(priv->staging_rxon.bssid_addr,
  1604. bss_conf->bssid, ETH_ALEN);
  1605. /* currently needed in a few places */
  1606. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1607. } else {
  1608. priv->staging_rxon.filter_flags &=
  1609. ~RXON_FILTER_ASSOC_MSK;
  1610. }
  1611. }
  1612. /*
  1613. * This needs to be after setting the BSSID in case
  1614. * mac80211 decides to do both changes at once because
  1615. * it will invoke post_associate.
  1616. */
  1617. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  1618. changes & BSS_CHANGED_BEACON) {
  1619. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  1620. if (beacon)
  1621. iwl_mac_beacon_update(hw, beacon);
  1622. }
  1623. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  1624. IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
  1625. bss_conf->use_short_preamble);
  1626. if (bss_conf->use_short_preamble)
  1627. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1628. else
  1629. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1630. }
  1631. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  1632. IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
  1633. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  1634. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  1635. else
  1636. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  1637. }
  1638. if (changes & BSS_CHANGED_BASIC_RATES) {
  1639. /* XXX use this information
  1640. *
  1641. * To do that, remove code from iwl_set_rate() and put something
  1642. * like this here:
  1643. *
  1644. if (A-band)
  1645. priv->staging_rxon.ofdm_basic_rates =
  1646. bss_conf->basic_rates;
  1647. else
  1648. priv->staging_rxon.ofdm_basic_rates =
  1649. bss_conf->basic_rates >> 4;
  1650. priv->staging_rxon.cck_basic_rates =
  1651. bss_conf->basic_rates & 0xF;
  1652. */
  1653. }
  1654. if (changes & BSS_CHANGED_HT) {
  1655. iwl_ht_conf(priv, bss_conf);
  1656. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1657. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1658. }
  1659. if (changes & BSS_CHANGED_ASSOC) {
  1660. IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
  1661. if (bss_conf->assoc) {
  1662. priv->assoc_id = bss_conf->aid;
  1663. priv->beacon_int = bss_conf->beacon_int;
  1664. priv->timestamp = bss_conf->timestamp;
  1665. priv->assoc_capability = bss_conf->assoc_capability;
  1666. iwl_led_associate(priv);
  1667. if (!iwl_is_rfkill(priv))
  1668. priv->cfg->ops->lib->post_associate(priv);
  1669. } else
  1670. iwl_set_no_assoc(priv);
  1671. }
  1672. if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  1673. IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
  1674. changes);
  1675. ret = iwl_send_rxon_assoc(priv);
  1676. if (!ret) {
  1677. /* Sync active_rxon with latest change. */
  1678. memcpy((void *)&priv->active_rxon,
  1679. &priv->staging_rxon,
  1680. sizeof(struct iwl_rxon_cmd));
  1681. }
  1682. }
  1683. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  1684. if (vif->bss_conf.enable_beacon) {
  1685. memcpy(priv->staging_rxon.bssid_addr,
  1686. bss_conf->bssid, ETH_ALEN);
  1687. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1688. iwlcore_config_ap(priv);
  1689. } else
  1690. iwl_set_no_assoc(priv);
  1691. }
  1692. mutex_unlock(&priv->mutex);
  1693. IWL_DEBUG_MAC80211(priv, "leave\n");
  1694. }
  1695. EXPORT_SYMBOL(iwl_bss_info_changed);
  1696. int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  1697. {
  1698. struct iwl_priv *priv = hw->priv;
  1699. unsigned long flags;
  1700. __le64 timestamp;
  1701. IWL_DEBUG_MAC80211(priv, "enter\n");
  1702. if (!iwl_is_ready_rf(priv)) {
  1703. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1704. return -EIO;
  1705. }
  1706. spin_lock_irqsave(&priv->lock, flags);
  1707. if (priv->ibss_beacon)
  1708. dev_kfree_skb(priv->ibss_beacon);
  1709. priv->ibss_beacon = skb;
  1710. priv->assoc_id = 0;
  1711. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  1712. priv->timestamp = le64_to_cpu(timestamp);
  1713. IWL_DEBUG_MAC80211(priv, "leave\n");
  1714. spin_unlock_irqrestore(&priv->lock, flags);
  1715. priv->cfg->ops->lib->post_associate(priv);
  1716. return 0;
  1717. }
  1718. EXPORT_SYMBOL(iwl_mac_beacon_update);
  1719. static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
  1720. {
  1721. iwl_connection_init_rx_config(priv, vif->type);
  1722. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1723. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1724. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1725. return iwlcore_commit_rxon(priv);
  1726. }
  1727. int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1728. {
  1729. struct iwl_priv *priv = hw->priv;
  1730. int err = 0;
  1731. IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
  1732. mutex_lock(&priv->mutex);
  1733. if (WARN_ON(!iwl_is_ready_rf(priv))) {
  1734. err = -EINVAL;
  1735. goto out;
  1736. }
  1737. if (priv->vif) {
  1738. IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
  1739. err = -EOPNOTSUPP;
  1740. goto out;
  1741. }
  1742. priv->vif = vif;
  1743. priv->iw_mode = vif->type;
  1744. IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
  1745. memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
  1746. err = iwl_set_mode(priv, vif);
  1747. if (err)
  1748. goto out_err;
  1749. /* Add the broadcast address so we can send broadcast frames */
  1750. priv->cfg->ops->lib->add_bcast_station(priv);
  1751. goto out;
  1752. out_err:
  1753. priv->vif = NULL;
  1754. priv->iw_mode = NL80211_IFTYPE_STATION;
  1755. out:
  1756. mutex_unlock(&priv->mutex);
  1757. IWL_DEBUG_MAC80211(priv, "leave\n");
  1758. return err;
  1759. }
  1760. EXPORT_SYMBOL(iwl_mac_add_interface);
  1761. void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  1762. struct ieee80211_vif *vif)
  1763. {
  1764. struct iwl_priv *priv = hw->priv;
  1765. IWL_DEBUG_MAC80211(priv, "enter\n");
  1766. mutex_lock(&priv->mutex);
  1767. iwl_clear_ucode_stations(priv, true);
  1768. if (iwl_is_ready_rf(priv)) {
  1769. iwl_scan_cancel_timeout(priv, 100);
  1770. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1771. iwlcore_commit_rxon(priv);
  1772. }
  1773. if (priv->vif == vif) {
  1774. priv->vif = NULL;
  1775. memset(priv->bssid, 0, ETH_ALEN);
  1776. }
  1777. mutex_unlock(&priv->mutex);
  1778. IWL_DEBUG_MAC80211(priv, "leave\n");
  1779. }
  1780. EXPORT_SYMBOL(iwl_mac_remove_interface);
  1781. /**
  1782. * iwl_mac_config - mac80211 config callback
  1783. *
  1784. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  1785. * be set inappropriately and the driver currently sets the hardware up to
  1786. * use it whenever needed.
  1787. */
  1788. int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
  1789. {
  1790. struct iwl_priv *priv = hw->priv;
  1791. const struct iwl_channel_info *ch_info;
  1792. struct ieee80211_conf *conf = &hw->conf;
  1793. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  1794. unsigned long flags = 0;
  1795. int ret = 0;
  1796. u16 ch;
  1797. int scan_active = 0;
  1798. mutex_lock(&priv->mutex);
  1799. IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
  1800. conf->channel->hw_value, changed);
  1801. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  1802. test_bit(STATUS_SCANNING, &priv->status))) {
  1803. scan_active = 1;
  1804. IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
  1805. }
  1806. if (changed & (IEEE80211_CONF_CHANGE_SMPS |
  1807. IEEE80211_CONF_CHANGE_CHANNEL)) {
  1808. /* mac80211 uses static for non-HT which is what we want */
  1809. priv->current_ht_config.smps = conf->smps_mode;
  1810. /*
  1811. * Recalculate chain counts.
  1812. *
  1813. * If monitor mode is enabled then mac80211 will
  1814. * set up the SM PS mode to OFF if an HT channel is
  1815. * configured.
  1816. */
  1817. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1818. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1819. }
  1820. /* during scanning mac80211 will delay channel setting until
  1821. * scan finish with changed = 0
  1822. */
  1823. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  1824. if (scan_active)
  1825. goto set_ch_out;
  1826. ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
  1827. ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
  1828. if (!is_channel_valid(ch_info)) {
  1829. IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
  1830. ret = -EINVAL;
  1831. goto set_ch_out;
  1832. }
  1833. spin_lock_irqsave(&priv->lock, flags);
  1834. /* Configure HT40 channels */
  1835. ht_conf->is_ht = conf_is_ht(conf);
  1836. if (ht_conf->is_ht) {
  1837. if (conf_is_ht40_minus(conf)) {
  1838. ht_conf->extension_chan_offset =
  1839. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  1840. ht_conf->is_40mhz = true;
  1841. } else if (conf_is_ht40_plus(conf)) {
  1842. ht_conf->extension_chan_offset =
  1843. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  1844. ht_conf->is_40mhz = true;
  1845. } else {
  1846. ht_conf->extension_chan_offset =
  1847. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  1848. ht_conf->is_40mhz = false;
  1849. }
  1850. } else
  1851. ht_conf->is_40mhz = false;
  1852. /* Default to no protection. Protection mode will later be set
  1853. * from BSS config in iwl_ht_conf */
  1854. ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  1855. /* if we are switching from ht to 2.4 clear flags
  1856. * from any ht related info since 2.4 does not
  1857. * support ht */
  1858. if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
  1859. priv->staging_rxon.flags = 0;
  1860. iwl_set_rxon_channel(priv, conf->channel);
  1861. iwl_set_rxon_ht(priv, ht_conf);
  1862. iwl_set_flags_for_band(priv, conf->channel->band);
  1863. spin_unlock_irqrestore(&priv->lock, flags);
  1864. if (iwl_is_associated(priv) &&
  1865. (le16_to_cpu(priv->active_rxon.channel) != ch) &&
  1866. priv->cfg->ops->lib->set_channel_switch) {
  1867. iwl_set_rate(priv);
  1868. /*
  1869. * at this point, staging_rxon has the
  1870. * configuration for channel switch
  1871. */
  1872. ret = priv->cfg->ops->lib->set_channel_switch(priv,
  1873. ch);
  1874. if (!ret) {
  1875. iwl_print_rx_config_cmd(priv);
  1876. goto out;
  1877. }
  1878. priv->switch_rxon.switch_in_progress = false;
  1879. }
  1880. set_ch_out:
  1881. /* The list of supported rates and rate mask can be different
  1882. * for each band; since the band may have changed, reset
  1883. * the rate mask to what mac80211 lists */
  1884. iwl_set_rate(priv);
  1885. }
  1886. if (changed & (IEEE80211_CONF_CHANGE_PS |
  1887. IEEE80211_CONF_CHANGE_IDLE)) {
  1888. ret = iwl_power_update_mode(priv, false);
  1889. if (ret)
  1890. IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
  1891. }
  1892. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1893. IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
  1894. priv->tx_power_user_lmt, conf->power_level);
  1895. iwl_set_tx_power(priv, conf->power_level, false);
  1896. }
  1897. if (changed & IEEE80211_CONF_CHANGE_QOS) {
  1898. bool qos_active = !!(conf->flags & IEEE80211_CONF_QOS);
  1899. spin_lock_irqsave(&priv->lock, flags);
  1900. priv->qos_data.qos_active = qos_active;
  1901. iwl_update_qos(priv);
  1902. spin_unlock_irqrestore(&priv->lock, flags);
  1903. }
  1904. if (!iwl_is_ready(priv)) {
  1905. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  1906. goto out;
  1907. }
  1908. if (scan_active)
  1909. goto out;
  1910. if (memcmp(&priv->active_rxon,
  1911. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  1912. iwlcore_commit_rxon(priv);
  1913. else
  1914. IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
  1915. out:
  1916. IWL_DEBUG_MAC80211(priv, "leave\n");
  1917. mutex_unlock(&priv->mutex);
  1918. return ret;
  1919. }
  1920. EXPORT_SYMBOL(iwl_mac_config);
  1921. void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  1922. {
  1923. struct iwl_priv *priv = hw->priv;
  1924. unsigned long flags;
  1925. mutex_lock(&priv->mutex);
  1926. IWL_DEBUG_MAC80211(priv, "enter\n");
  1927. spin_lock_irqsave(&priv->lock, flags);
  1928. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
  1929. spin_unlock_irqrestore(&priv->lock, flags);
  1930. spin_lock_irqsave(&priv->lock, flags);
  1931. priv->assoc_id = 0;
  1932. priv->assoc_capability = 0;
  1933. /* new association get rid of ibss beacon skb */
  1934. if (priv->ibss_beacon)
  1935. dev_kfree_skb(priv->ibss_beacon);
  1936. priv->ibss_beacon = NULL;
  1937. priv->beacon_int = priv->vif->bss_conf.beacon_int;
  1938. priv->timestamp = 0;
  1939. spin_unlock_irqrestore(&priv->lock, flags);
  1940. if (!iwl_is_ready_rf(priv)) {
  1941. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  1942. mutex_unlock(&priv->mutex);
  1943. return;
  1944. }
  1945. /* we are restarting association process
  1946. * clear RXON_FILTER_ASSOC_MSK bit
  1947. */
  1948. iwl_scan_cancel_timeout(priv, 100);
  1949. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1950. iwlcore_commit_rxon(priv);
  1951. iwl_set_rate(priv);
  1952. mutex_unlock(&priv->mutex);
  1953. IWL_DEBUG_MAC80211(priv, "leave\n");
  1954. }
  1955. EXPORT_SYMBOL(iwl_mac_reset_tsf);
  1956. int iwl_alloc_txq_mem(struct iwl_priv *priv)
  1957. {
  1958. if (!priv->txq)
  1959. priv->txq = kzalloc(
  1960. sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
  1961. GFP_KERNEL);
  1962. if (!priv->txq) {
  1963. IWL_ERR(priv, "Not enough memory for txq\n");
  1964. return -ENOMEM;
  1965. }
  1966. return 0;
  1967. }
  1968. EXPORT_SYMBOL(iwl_alloc_txq_mem);
  1969. void iwl_free_txq_mem(struct iwl_priv *priv)
  1970. {
  1971. kfree(priv->txq);
  1972. priv->txq = NULL;
  1973. }
  1974. EXPORT_SYMBOL(iwl_free_txq_mem);
  1975. int iwl_send_wimax_coex(struct iwl_priv *priv)
  1976. {
  1977. struct iwl_wimax_coex_cmd uninitialized_var(coex_cmd);
  1978. if (priv->cfg->support_wimax_coexist) {
  1979. /* UnMask wake up src at associated sleep */
  1980. coex_cmd.flags |= COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
  1981. /* UnMask wake up src at unassociated sleep */
  1982. coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
  1983. memcpy(coex_cmd.sta_prio, cu_priorities,
  1984. sizeof(struct iwl_wimax_coex_event_entry) *
  1985. COEX_NUM_OF_EVENTS);
  1986. /* enabling the coexistence feature */
  1987. coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
  1988. /* enabling the priorities tables */
  1989. coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
  1990. } else {
  1991. /* coexistence is disabled */
  1992. memset(&coex_cmd, 0, sizeof(coex_cmd));
  1993. }
  1994. return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
  1995. sizeof(coex_cmd), &coex_cmd);
  1996. }
  1997. EXPORT_SYMBOL(iwl_send_wimax_coex);
  1998. #ifdef CONFIG_IWLWIFI_DEBUGFS
  1999. #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
  2000. void iwl_reset_traffic_log(struct iwl_priv *priv)
  2001. {
  2002. priv->tx_traffic_idx = 0;
  2003. priv->rx_traffic_idx = 0;
  2004. if (priv->tx_traffic)
  2005. memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  2006. if (priv->rx_traffic)
  2007. memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  2008. }
  2009. int iwl_alloc_traffic_mem(struct iwl_priv *priv)
  2010. {
  2011. u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
  2012. if (iwl_debug_level & IWL_DL_TX) {
  2013. if (!priv->tx_traffic) {
  2014. priv->tx_traffic =
  2015. kzalloc(traffic_size, GFP_KERNEL);
  2016. if (!priv->tx_traffic)
  2017. return -ENOMEM;
  2018. }
  2019. }
  2020. if (iwl_debug_level & IWL_DL_RX) {
  2021. if (!priv->rx_traffic) {
  2022. priv->rx_traffic =
  2023. kzalloc(traffic_size, GFP_KERNEL);
  2024. if (!priv->rx_traffic)
  2025. return -ENOMEM;
  2026. }
  2027. }
  2028. iwl_reset_traffic_log(priv);
  2029. return 0;
  2030. }
  2031. EXPORT_SYMBOL(iwl_alloc_traffic_mem);
  2032. void iwl_free_traffic_mem(struct iwl_priv *priv)
  2033. {
  2034. kfree(priv->tx_traffic);
  2035. priv->tx_traffic = NULL;
  2036. kfree(priv->rx_traffic);
  2037. priv->rx_traffic = NULL;
  2038. }
  2039. EXPORT_SYMBOL(iwl_free_traffic_mem);
  2040. void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
  2041. u16 length, struct ieee80211_hdr *header)
  2042. {
  2043. __le16 fc;
  2044. u16 len;
  2045. if (likely(!(iwl_debug_level & IWL_DL_TX)))
  2046. return;
  2047. if (!priv->tx_traffic)
  2048. return;
  2049. fc = header->frame_control;
  2050. if (ieee80211_is_data(fc)) {
  2051. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2052. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2053. memcpy((priv->tx_traffic +
  2054. (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2055. header, len);
  2056. priv->tx_traffic_idx =
  2057. (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2058. }
  2059. }
  2060. EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
  2061. void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
  2062. u16 length, struct ieee80211_hdr *header)
  2063. {
  2064. __le16 fc;
  2065. u16 len;
  2066. if (likely(!(iwl_debug_level & IWL_DL_RX)))
  2067. return;
  2068. if (!priv->rx_traffic)
  2069. return;
  2070. fc = header->frame_control;
  2071. if (ieee80211_is_data(fc)) {
  2072. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2073. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2074. memcpy((priv->rx_traffic +
  2075. (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2076. header, len);
  2077. priv->rx_traffic_idx =
  2078. (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2079. }
  2080. }
  2081. EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
  2082. const char *get_mgmt_string(int cmd)
  2083. {
  2084. switch (cmd) {
  2085. IWL_CMD(MANAGEMENT_ASSOC_REQ);
  2086. IWL_CMD(MANAGEMENT_ASSOC_RESP);
  2087. IWL_CMD(MANAGEMENT_REASSOC_REQ);
  2088. IWL_CMD(MANAGEMENT_REASSOC_RESP);
  2089. IWL_CMD(MANAGEMENT_PROBE_REQ);
  2090. IWL_CMD(MANAGEMENT_PROBE_RESP);
  2091. IWL_CMD(MANAGEMENT_BEACON);
  2092. IWL_CMD(MANAGEMENT_ATIM);
  2093. IWL_CMD(MANAGEMENT_DISASSOC);
  2094. IWL_CMD(MANAGEMENT_AUTH);
  2095. IWL_CMD(MANAGEMENT_DEAUTH);
  2096. IWL_CMD(MANAGEMENT_ACTION);
  2097. default:
  2098. return "UNKNOWN";
  2099. }
  2100. }
  2101. const char *get_ctrl_string(int cmd)
  2102. {
  2103. switch (cmd) {
  2104. IWL_CMD(CONTROL_BACK_REQ);
  2105. IWL_CMD(CONTROL_BACK);
  2106. IWL_CMD(CONTROL_PSPOLL);
  2107. IWL_CMD(CONTROL_RTS);
  2108. IWL_CMD(CONTROL_CTS);
  2109. IWL_CMD(CONTROL_ACK);
  2110. IWL_CMD(CONTROL_CFEND);
  2111. IWL_CMD(CONTROL_CFENDACK);
  2112. default:
  2113. return "UNKNOWN";
  2114. }
  2115. }
  2116. void iwl_clear_traffic_stats(struct iwl_priv *priv)
  2117. {
  2118. memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
  2119. memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
  2120. priv->led_tpt = 0;
  2121. }
  2122. /*
  2123. * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
  2124. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
  2125. * Use debugFs to display the rx/rx_statistics
  2126. * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
  2127. * information will be recorded, but DATA pkt still will be recorded
  2128. * for the reason of iwl_led.c need to control the led blinking based on
  2129. * number of tx and rx data.
  2130. *
  2131. */
  2132. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  2133. {
  2134. struct traffic_stats *stats;
  2135. if (is_tx)
  2136. stats = &priv->tx_stats;
  2137. else
  2138. stats = &priv->rx_stats;
  2139. if (ieee80211_is_mgmt(fc)) {
  2140. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2141. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  2142. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  2143. break;
  2144. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  2145. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  2146. break;
  2147. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  2148. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  2149. break;
  2150. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  2151. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  2152. break;
  2153. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  2154. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  2155. break;
  2156. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  2157. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  2158. break;
  2159. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  2160. stats->mgmt[MANAGEMENT_BEACON]++;
  2161. break;
  2162. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  2163. stats->mgmt[MANAGEMENT_ATIM]++;
  2164. break;
  2165. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  2166. stats->mgmt[MANAGEMENT_DISASSOC]++;
  2167. break;
  2168. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  2169. stats->mgmt[MANAGEMENT_AUTH]++;
  2170. break;
  2171. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  2172. stats->mgmt[MANAGEMENT_DEAUTH]++;
  2173. break;
  2174. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  2175. stats->mgmt[MANAGEMENT_ACTION]++;
  2176. break;
  2177. }
  2178. } else if (ieee80211_is_ctl(fc)) {
  2179. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2180. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  2181. stats->ctrl[CONTROL_BACK_REQ]++;
  2182. break;
  2183. case cpu_to_le16(IEEE80211_STYPE_BACK):
  2184. stats->ctrl[CONTROL_BACK]++;
  2185. break;
  2186. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  2187. stats->ctrl[CONTROL_PSPOLL]++;
  2188. break;
  2189. case cpu_to_le16(IEEE80211_STYPE_RTS):
  2190. stats->ctrl[CONTROL_RTS]++;
  2191. break;
  2192. case cpu_to_le16(IEEE80211_STYPE_CTS):
  2193. stats->ctrl[CONTROL_CTS]++;
  2194. break;
  2195. case cpu_to_le16(IEEE80211_STYPE_ACK):
  2196. stats->ctrl[CONTROL_ACK]++;
  2197. break;
  2198. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  2199. stats->ctrl[CONTROL_CFEND]++;
  2200. break;
  2201. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  2202. stats->ctrl[CONTROL_CFENDACK]++;
  2203. break;
  2204. }
  2205. } else {
  2206. /* data */
  2207. stats->data_cnt++;
  2208. stats->data_bytes += len;
  2209. }
  2210. iwl_leds_background(priv);
  2211. }
  2212. EXPORT_SYMBOL(iwl_update_stats);
  2213. #endif
  2214. const static char *get_csr_string(int cmd)
  2215. {
  2216. switch (cmd) {
  2217. IWL_CMD(CSR_HW_IF_CONFIG_REG);
  2218. IWL_CMD(CSR_INT_COALESCING);
  2219. IWL_CMD(CSR_INT);
  2220. IWL_CMD(CSR_INT_MASK);
  2221. IWL_CMD(CSR_FH_INT_STATUS);
  2222. IWL_CMD(CSR_GPIO_IN);
  2223. IWL_CMD(CSR_RESET);
  2224. IWL_CMD(CSR_GP_CNTRL);
  2225. IWL_CMD(CSR_HW_REV);
  2226. IWL_CMD(CSR_EEPROM_REG);
  2227. IWL_CMD(CSR_EEPROM_GP);
  2228. IWL_CMD(CSR_OTP_GP_REG);
  2229. IWL_CMD(CSR_GIO_REG);
  2230. IWL_CMD(CSR_GP_UCODE_REG);
  2231. IWL_CMD(CSR_GP_DRIVER_REG);
  2232. IWL_CMD(CSR_UCODE_DRV_GP1);
  2233. IWL_CMD(CSR_UCODE_DRV_GP2);
  2234. IWL_CMD(CSR_LED_REG);
  2235. IWL_CMD(CSR_DRAM_INT_TBL_REG);
  2236. IWL_CMD(CSR_GIO_CHICKEN_BITS);
  2237. IWL_CMD(CSR_ANA_PLL_CFG);
  2238. IWL_CMD(CSR_HW_REV_WA_REG);
  2239. IWL_CMD(CSR_DBG_HPET_MEM_REG);
  2240. default:
  2241. return "UNKNOWN";
  2242. }
  2243. }
  2244. void iwl_dump_csr(struct iwl_priv *priv)
  2245. {
  2246. int i;
  2247. u32 csr_tbl[] = {
  2248. CSR_HW_IF_CONFIG_REG,
  2249. CSR_INT_COALESCING,
  2250. CSR_INT,
  2251. CSR_INT_MASK,
  2252. CSR_FH_INT_STATUS,
  2253. CSR_GPIO_IN,
  2254. CSR_RESET,
  2255. CSR_GP_CNTRL,
  2256. CSR_HW_REV,
  2257. CSR_EEPROM_REG,
  2258. CSR_EEPROM_GP,
  2259. CSR_OTP_GP_REG,
  2260. CSR_GIO_REG,
  2261. CSR_GP_UCODE_REG,
  2262. CSR_GP_DRIVER_REG,
  2263. CSR_UCODE_DRV_GP1,
  2264. CSR_UCODE_DRV_GP2,
  2265. CSR_LED_REG,
  2266. CSR_DRAM_INT_TBL_REG,
  2267. CSR_GIO_CHICKEN_BITS,
  2268. CSR_ANA_PLL_CFG,
  2269. CSR_HW_REV_WA_REG,
  2270. CSR_DBG_HPET_MEM_REG
  2271. };
  2272. IWL_ERR(priv, "CSR values:\n");
  2273. IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
  2274. "CSR_INT_PERIODIC_REG)\n");
  2275. for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
  2276. IWL_ERR(priv, " %25s: 0X%08x\n",
  2277. get_csr_string(csr_tbl[i]),
  2278. iwl_read32(priv, csr_tbl[i]));
  2279. }
  2280. }
  2281. EXPORT_SYMBOL(iwl_dump_csr);
  2282. const static char *get_fh_string(int cmd)
  2283. {
  2284. switch (cmd) {
  2285. IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
  2286. IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
  2287. IWL_CMD(FH_RSCSR_CHNL0_WPTR);
  2288. IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
  2289. IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
  2290. IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
  2291. IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
  2292. IWL_CMD(FH_TSSR_TX_STATUS_REG);
  2293. IWL_CMD(FH_TSSR_TX_ERROR_REG);
  2294. default:
  2295. return "UNKNOWN";
  2296. }
  2297. }
  2298. int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
  2299. {
  2300. int i;
  2301. #ifdef CONFIG_IWLWIFI_DEBUG
  2302. int pos = 0;
  2303. size_t bufsz = 0;
  2304. #endif
  2305. u32 fh_tbl[] = {
  2306. FH_RSCSR_CHNL0_STTS_WPTR_REG,
  2307. FH_RSCSR_CHNL0_RBDCB_BASE_REG,
  2308. FH_RSCSR_CHNL0_WPTR,
  2309. FH_MEM_RCSR_CHNL0_CONFIG_REG,
  2310. FH_MEM_RSSR_SHARED_CTRL_REG,
  2311. FH_MEM_RSSR_RX_STATUS_REG,
  2312. FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
  2313. FH_TSSR_TX_STATUS_REG,
  2314. FH_TSSR_TX_ERROR_REG
  2315. };
  2316. #ifdef CONFIG_IWLWIFI_DEBUG
  2317. if (display) {
  2318. bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
  2319. *buf = kmalloc(bufsz, GFP_KERNEL);
  2320. if (!*buf)
  2321. return -ENOMEM;
  2322. pos += scnprintf(*buf + pos, bufsz - pos,
  2323. "FH register values:\n");
  2324. for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
  2325. pos += scnprintf(*buf + pos, bufsz - pos,
  2326. " %34s: 0X%08x\n",
  2327. get_fh_string(fh_tbl[i]),
  2328. iwl_read_direct32(priv, fh_tbl[i]));
  2329. }
  2330. return pos;
  2331. }
  2332. #endif
  2333. IWL_ERR(priv, "FH register values:\n");
  2334. for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
  2335. IWL_ERR(priv, " %34s: 0X%08x\n",
  2336. get_fh_string(fh_tbl[i]),
  2337. iwl_read_direct32(priv, fh_tbl[i]));
  2338. }
  2339. return 0;
  2340. }
  2341. EXPORT_SYMBOL(iwl_dump_fh);
  2342. static void iwl_force_rf_reset(struct iwl_priv *priv)
  2343. {
  2344. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2345. return;
  2346. if (!iwl_is_associated(priv)) {
  2347. IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
  2348. return;
  2349. }
  2350. /*
  2351. * There is no easy and better way to force reset the radio,
  2352. * the only known method is switching channel which will force to
  2353. * reset and tune the radio.
  2354. * Use internal short scan (single channel) operation to should
  2355. * achieve this objective.
  2356. * Driver should reset the radio when number of consecutive missed
  2357. * beacon, or any other uCode error condition detected.
  2358. */
  2359. IWL_DEBUG_INFO(priv, "perform radio reset.\n");
  2360. iwl_internal_short_hw_scan(priv);
  2361. }
  2362. int iwl_force_reset(struct iwl_priv *priv, int mode)
  2363. {
  2364. struct iwl_force_reset *force_reset;
  2365. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2366. return -EINVAL;
  2367. if (mode >= IWL_MAX_FORCE_RESET) {
  2368. IWL_DEBUG_INFO(priv, "invalid reset request.\n");
  2369. return -EINVAL;
  2370. }
  2371. force_reset = &priv->force_reset[mode];
  2372. force_reset->reset_request_count++;
  2373. if (force_reset->last_force_reset_jiffies &&
  2374. time_after(force_reset->last_force_reset_jiffies +
  2375. force_reset->reset_duration, jiffies)) {
  2376. IWL_DEBUG_INFO(priv, "force reset rejected\n");
  2377. force_reset->reset_reject_count++;
  2378. return -EAGAIN;
  2379. }
  2380. force_reset->reset_success_count++;
  2381. force_reset->last_force_reset_jiffies = jiffies;
  2382. IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
  2383. switch (mode) {
  2384. case IWL_RF_RESET:
  2385. iwl_force_rf_reset(priv);
  2386. break;
  2387. case IWL_FW_RESET:
  2388. IWL_ERR(priv, "On demand firmware reload\n");
  2389. /* Set the FW error flag -- cleared on iwl_down */
  2390. set_bit(STATUS_FW_ERROR, &priv->status);
  2391. wake_up_interruptible(&priv->wait_command_queue);
  2392. /*
  2393. * Keep the restart process from trying to send host
  2394. * commands by clearing the INIT status bit
  2395. */
  2396. clear_bit(STATUS_READY, &priv->status);
  2397. queue_work(priv->workqueue, &priv->restart);
  2398. break;
  2399. }
  2400. return 0;
  2401. }
  2402. EXPORT_SYMBOL(iwl_force_reset);
  2403. /**
  2404. * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
  2405. *
  2406. * During normal condition (no queue is stuck), the timer is continually set to
  2407. * execute every monitor_recover_period milliseconds after the last timer
  2408. * expired. When the queue read_ptr is at the same place, the timer is
  2409. * shorten to 100mSecs. This is
  2410. * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
  2411. * 2) to detect the stuck queues quicker before the station and AP can
  2412. * disassociate each other.
  2413. *
  2414. * This function monitors all the tx queues and recover from it if any
  2415. * of the queues are stuck.
  2416. * 1. It first check the cmd queue for stuck conditions. If it is stuck,
  2417. * it will recover by resetting the firmware and return.
  2418. * 2. Then, it checks for station association. If it associates it will check
  2419. * other queues. If any queue is stuck, it will recover by resetting
  2420. * the firmware.
  2421. * Note: It the number of times the queue read_ptr to be at the same place to
  2422. * be MAX_REPEAT+1 in order to consider to be stuck.
  2423. */
  2424. /*
  2425. * The maximum number of times the read pointer of the tx queue at the
  2426. * same place without considering to be stuck.
  2427. */
  2428. #define MAX_REPEAT (2)
  2429. static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
  2430. {
  2431. struct iwl_tx_queue *txq;
  2432. struct iwl_queue *q;
  2433. txq = &priv->txq[cnt];
  2434. q = &txq->q;
  2435. /* queue is empty, skip */
  2436. if (q->read_ptr != q->write_ptr) {
  2437. if (q->read_ptr == q->last_read_ptr) {
  2438. /* a queue has not been read from last time */
  2439. if (q->repeat_same_read_ptr > MAX_REPEAT) {
  2440. IWL_ERR(priv,
  2441. "queue %d stuck %d time. Fw reload.\n",
  2442. q->id, q->repeat_same_read_ptr);
  2443. q->repeat_same_read_ptr = 0;
  2444. iwl_force_reset(priv, IWL_FW_RESET);
  2445. } else {
  2446. q->repeat_same_read_ptr++;
  2447. IWL_DEBUG_RADIO(priv,
  2448. "queue %d, not read %d time\n",
  2449. q->id,
  2450. q->repeat_same_read_ptr);
  2451. mod_timer(&priv->monitor_recover, jiffies +
  2452. msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
  2453. }
  2454. return 1;
  2455. } else {
  2456. q->last_read_ptr = q->read_ptr;
  2457. q->repeat_same_read_ptr = 0;
  2458. }
  2459. }
  2460. return 0;
  2461. }
  2462. void iwl_bg_monitor_recover(unsigned long data)
  2463. {
  2464. struct iwl_priv *priv = (struct iwl_priv *)data;
  2465. int cnt;
  2466. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2467. return;
  2468. /* monitor and check for stuck cmd queue */
  2469. if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
  2470. return;
  2471. /* monitor and check for other stuck queues */
  2472. if (iwl_is_associated(priv)) {
  2473. for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
  2474. /* skip as we already checked the command queue */
  2475. if (cnt == IWL_CMD_QUEUE_NUM)
  2476. continue;
  2477. if (iwl_check_stuck_queue(priv, cnt))
  2478. return;
  2479. }
  2480. }
  2481. /*
  2482. * Reschedule the timer to occur in
  2483. * priv->cfg->monitor_recover_period
  2484. */
  2485. mod_timer(&priv->monitor_recover,
  2486. jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
  2487. }
  2488. EXPORT_SYMBOL(iwl_bg_monitor_recover);
  2489. #ifdef CONFIG_PM
  2490. int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  2491. {
  2492. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2493. /*
  2494. * This function is called when system goes into suspend state
  2495. * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
  2496. * first but since iwl_mac_stop() has no knowledge of who the caller is,
  2497. * it will not call apm_ops.stop() to stop the DMA operation.
  2498. * Calling apm_ops.stop here to make sure we stop the DMA.
  2499. */
  2500. priv->cfg->ops->lib->apm_ops.stop(priv);
  2501. pci_save_state(pdev);
  2502. pci_disable_device(pdev);
  2503. pci_set_power_state(pdev, PCI_D3hot);
  2504. return 0;
  2505. }
  2506. EXPORT_SYMBOL(iwl_pci_suspend);
  2507. int iwl_pci_resume(struct pci_dev *pdev)
  2508. {
  2509. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2510. int ret;
  2511. pci_set_power_state(pdev, PCI_D0);
  2512. ret = pci_enable_device(pdev);
  2513. if (ret)
  2514. return ret;
  2515. pci_restore_state(pdev);
  2516. iwl_enable_interrupts(priv);
  2517. return 0;
  2518. }
  2519. EXPORT_SYMBOL(iwl_pci_resume);
  2520. #endif /* CONFIG_PM */