mwl8k.c 102 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <net/mac80211.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/firmware.h>
  24. #include <linux/workqueue.h>
  25. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  26. #define MWL8K_NAME KBUILD_MODNAME
  27. #define MWL8K_VERSION "0.11"
  28. /* Register definitions */
  29. #define MWL8K_HIU_GEN_PTR 0x00000c10
  30. #define MWL8K_MODE_STA 0x0000005a
  31. #define MWL8K_MODE_AP 0x000000a5
  32. #define MWL8K_HIU_INT_CODE 0x00000c14
  33. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  34. #define MWL8K_FWAP_READY 0xf1f2f4a5
  35. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  36. #define MWL8K_HIU_SCRATCH 0x00000c40
  37. /* Host->device communications */
  38. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  39. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  40. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  41. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  42. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  43. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  44. #define MWL8K_H2A_INT_RESET (1 << 15)
  45. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  46. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  47. /* Device->host communications */
  48. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  49. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  50. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  51. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  52. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  53. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  54. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  55. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  56. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  57. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  58. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  59. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  60. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  61. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  62. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  63. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  64. MWL8K_A2H_INT_CHNL_SWITCHED | \
  65. MWL8K_A2H_INT_QUEUE_EMPTY | \
  66. MWL8K_A2H_INT_RADAR_DETECT | \
  67. MWL8K_A2H_INT_RADIO_ON | \
  68. MWL8K_A2H_INT_RADIO_OFF | \
  69. MWL8K_A2H_INT_MAC_EVENT | \
  70. MWL8K_A2H_INT_OPC_DONE | \
  71. MWL8K_A2H_INT_RX_READY | \
  72. MWL8K_A2H_INT_TX_DONE)
  73. #define MWL8K_RX_QUEUES 1
  74. #define MWL8K_TX_QUEUES 4
  75. struct rxd_ops {
  76. int rxd_size;
  77. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  78. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  79. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  80. __le16 *qos);
  81. };
  82. struct mwl8k_device_info {
  83. char *part_name;
  84. char *helper_image;
  85. char *fw_image;
  86. struct rxd_ops *ap_rxd_ops;
  87. };
  88. struct mwl8k_rx_queue {
  89. int rxd_count;
  90. /* hw receives here */
  91. int head;
  92. /* refill descs here */
  93. int tail;
  94. void *rxd;
  95. dma_addr_t rxd_dma;
  96. struct {
  97. struct sk_buff *skb;
  98. DECLARE_PCI_UNMAP_ADDR(dma)
  99. } *buf;
  100. };
  101. struct mwl8k_tx_queue {
  102. /* hw transmits here */
  103. int head;
  104. /* sw appends here */
  105. int tail;
  106. struct ieee80211_tx_queue_stats stats;
  107. struct mwl8k_tx_desc *txd;
  108. dma_addr_t txd_dma;
  109. struct sk_buff **skb;
  110. };
  111. struct mwl8k_priv {
  112. struct ieee80211_hw *hw;
  113. struct pci_dev *pdev;
  114. struct mwl8k_device_info *device_info;
  115. void __iomem *sram;
  116. void __iomem *regs;
  117. /* firmware */
  118. struct firmware *fw_helper;
  119. struct firmware *fw_ucode;
  120. /* hardware/firmware parameters */
  121. bool ap_fw;
  122. struct rxd_ops *rxd_ops;
  123. struct ieee80211_supported_band band_24;
  124. struct ieee80211_channel channels_24[14];
  125. struct ieee80211_rate rates_24[14];
  126. struct ieee80211_supported_band band_50;
  127. struct ieee80211_channel channels_50[4];
  128. struct ieee80211_rate rates_50[9];
  129. u32 ap_macids_supported;
  130. u32 sta_macids_supported;
  131. /* firmware access */
  132. struct mutex fw_mutex;
  133. struct task_struct *fw_mutex_owner;
  134. int fw_mutex_depth;
  135. struct completion *hostcmd_wait;
  136. /* lock held over TX and TX reap */
  137. spinlock_t tx_lock;
  138. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  139. struct completion *tx_wait;
  140. /* List of interfaces. */
  141. u32 macids_used;
  142. struct list_head vif_list;
  143. /* power management status cookie from firmware */
  144. u32 *cookie;
  145. dma_addr_t cookie_dma;
  146. u16 num_mcaddrs;
  147. u8 hw_rev;
  148. u32 fw_rev;
  149. /*
  150. * Running count of TX packets in flight, to avoid
  151. * iterating over the transmit rings each time.
  152. */
  153. int pending_tx_pkts;
  154. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  155. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  156. bool radio_on;
  157. bool radio_short_preamble;
  158. bool sniffer_enabled;
  159. bool wmm_enabled;
  160. struct work_struct sta_notify_worker;
  161. spinlock_t sta_notify_list_lock;
  162. struct list_head sta_notify_list;
  163. /* XXX need to convert this to handle multiple interfaces */
  164. bool capture_beacon;
  165. u8 capture_bssid[ETH_ALEN];
  166. struct sk_buff *beacon_skb;
  167. /*
  168. * This FJ worker has to be global as it is scheduled from the
  169. * RX handler. At this point we don't know which interface it
  170. * belongs to until the list of bssids waiting to complete join
  171. * is checked.
  172. */
  173. struct work_struct finalize_join_worker;
  174. /* Tasklet to perform TX reclaim. */
  175. struct tasklet_struct poll_tx_task;
  176. /* Tasklet to perform RX. */
  177. struct tasklet_struct poll_rx_task;
  178. };
  179. /* Per interface specific private data */
  180. struct mwl8k_vif {
  181. struct list_head list;
  182. struct ieee80211_vif *vif;
  183. /* Firmware macid for this vif. */
  184. int macid;
  185. /* Non AMPDU sequence number assigned by driver. */
  186. u16 seqno;
  187. };
  188. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  189. struct mwl8k_sta {
  190. /* Index into station database. Returned by UPDATE_STADB. */
  191. u8 peer_id;
  192. };
  193. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  194. static const struct ieee80211_channel mwl8k_channels_24[] = {
  195. { .center_freq = 2412, .hw_value = 1, },
  196. { .center_freq = 2417, .hw_value = 2, },
  197. { .center_freq = 2422, .hw_value = 3, },
  198. { .center_freq = 2427, .hw_value = 4, },
  199. { .center_freq = 2432, .hw_value = 5, },
  200. { .center_freq = 2437, .hw_value = 6, },
  201. { .center_freq = 2442, .hw_value = 7, },
  202. { .center_freq = 2447, .hw_value = 8, },
  203. { .center_freq = 2452, .hw_value = 9, },
  204. { .center_freq = 2457, .hw_value = 10, },
  205. { .center_freq = 2462, .hw_value = 11, },
  206. { .center_freq = 2467, .hw_value = 12, },
  207. { .center_freq = 2472, .hw_value = 13, },
  208. { .center_freq = 2484, .hw_value = 14, },
  209. };
  210. static const struct ieee80211_rate mwl8k_rates_24[] = {
  211. { .bitrate = 10, .hw_value = 2, },
  212. { .bitrate = 20, .hw_value = 4, },
  213. { .bitrate = 55, .hw_value = 11, },
  214. { .bitrate = 110, .hw_value = 22, },
  215. { .bitrate = 220, .hw_value = 44, },
  216. { .bitrate = 60, .hw_value = 12, },
  217. { .bitrate = 90, .hw_value = 18, },
  218. { .bitrate = 120, .hw_value = 24, },
  219. { .bitrate = 180, .hw_value = 36, },
  220. { .bitrate = 240, .hw_value = 48, },
  221. { .bitrate = 360, .hw_value = 72, },
  222. { .bitrate = 480, .hw_value = 96, },
  223. { .bitrate = 540, .hw_value = 108, },
  224. { .bitrate = 720, .hw_value = 144, },
  225. };
  226. static const struct ieee80211_channel mwl8k_channels_50[] = {
  227. { .center_freq = 5180, .hw_value = 36, },
  228. { .center_freq = 5200, .hw_value = 40, },
  229. { .center_freq = 5220, .hw_value = 44, },
  230. { .center_freq = 5240, .hw_value = 48, },
  231. };
  232. static const struct ieee80211_rate mwl8k_rates_50[] = {
  233. { .bitrate = 60, .hw_value = 12, },
  234. { .bitrate = 90, .hw_value = 18, },
  235. { .bitrate = 120, .hw_value = 24, },
  236. { .bitrate = 180, .hw_value = 36, },
  237. { .bitrate = 240, .hw_value = 48, },
  238. { .bitrate = 360, .hw_value = 72, },
  239. { .bitrate = 480, .hw_value = 96, },
  240. { .bitrate = 540, .hw_value = 108, },
  241. { .bitrate = 720, .hw_value = 144, },
  242. };
  243. /* Set or get info from Firmware */
  244. #define MWL8K_CMD_SET 0x0001
  245. #define MWL8K_CMD_GET 0x0000
  246. /* Firmware command codes */
  247. #define MWL8K_CMD_CODE_DNLD 0x0001
  248. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  249. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  250. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  251. #define MWL8K_CMD_GET_STAT 0x0014
  252. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  253. #define MWL8K_CMD_RF_TX_POWER 0x001e
  254. #define MWL8K_CMD_RF_ANTENNA 0x0020
  255. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  256. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  257. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  258. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  259. #define MWL8K_CMD_SET_AID 0x010d
  260. #define MWL8K_CMD_SET_RATE 0x0110
  261. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  262. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  263. #define MWL8K_CMD_SET_SLOT 0x0114
  264. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  265. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  266. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  267. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  268. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  269. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  270. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  271. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  272. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  273. #define MWL8K_CMD_UPDATE_STADB 0x1123
  274. static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
  275. {
  276. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  277. snprintf(buf, bufsize, "%s", #x);\
  278. return buf;\
  279. } while (0)
  280. switch (cmd & ~0x8000) {
  281. MWL8K_CMDNAME(CODE_DNLD);
  282. MWL8K_CMDNAME(GET_HW_SPEC);
  283. MWL8K_CMDNAME(SET_HW_SPEC);
  284. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  285. MWL8K_CMDNAME(GET_STAT);
  286. MWL8K_CMDNAME(RADIO_CONTROL);
  287. MWL8K_CMDNAME(RF_TX_POWER);
  288. MWL8K_CMDNAME(RF_ANTENNA);
  289. MWL8K_CMDNAME(SET_BEACON);
  290. MWL8K_CMDNAME(SET_PRE_SCAN);
  291. MWL8K_CMDNAME(SET_POST_SCAN);
  292. MWL8K_CMDNAME(SET_RF_CHANNEL);
  293. MWL8K_CMDNAME(SET_AID);
  294. MWL8K_CMDNAME(SET_RATE);
  295. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  296. MWL8K_CMDNAME(RTS_THRESHOLD);
  297. MWL8K_CMDNAME(SET_SLOT);
  298. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  299. MWL8K_CMDNAME(SET_WMM_MODE);
  300. MWL8K_CMDNAME(MIMO_CONFIG);
  301. MWL8K_CMDNAME(USE_FIXED_RATE);
  302. MWL8K_CMDNAME(ENABLE_SNIFFER);
  303. MWL8K_CMDNAME(SET_MAC_ADDR);
  304. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  305. MWL8K_CMDNAME(BSS_START);
  306. MWL8K_CMDNAME(SET_NEW_STN);
  307. MWL8K_CMDNAME(UPDATE_STADB);
  308. default:
  309. snprintf(buf, bufsize, "0x%x", cmd);
  310. }
  311. #undef MWL8K_CMDNAME
  312. return buf;
  313. }
  314. /* Hardware and firmware reset */
  315. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  316. {
  317. iowrite32(MWL8K_H2A_INT_RESET,
  318. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  319. iowrite32(MWL8K_H2A_INT_RESET,
  320. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  321. msleep(20);
  322. }
  323. /* Release fw image */
  324. static void mwl8k_release_fw(struct firmware **fw)
  325. {
  326. if (*fw == NULL)
  327. return;
  328. release_firmware(*fw);
  329. *fw = NULL;
  330. }
  331. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  332. {
  333. mwl8k_release_fw(&priv->fw_ucode);
  334. mwl8k_release_fw(&priv->fw_helper);
  335. }
  336. /* Request fw image */
  337. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  338. const char *fname, struct firmware **fw)
  339. {
  340. /* release current image */
  341. if (*fw != NULL)
  342. mwl8k_release_fw(fw);
  343. return request_firmware((const struct firmware **)fw,
  344. fname, &priv->pdev->dev);
  345. }
  346. static int mwl8k_request_firmware(struct mwl8k_priv *priv)
  347. {
  348. struct mwl8k_device_info *di = priv->device_info;
  349. int rc;
  350. if (di->helper_image != NULL) {
  351. rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
  352. if (rc) {
  353. printk(KERN_ERR "%s: Error requesting helper "
  354. "firmware file %s\n", pci_name(priv->pdev),
  355. di->helper_image);
  356. return rc;
  357. }
  358. }
  359. rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
  360. if (rc) {
  361. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  362. pci_name(priv->pdev), di->fw_image);
  363. mwl8k_release_fw(&priv->fw_helper);
  364. return rc;
  365. }
  366. return 0;
  367. }
  368. struct mwl8k_cmd_pkt {
  369. __le16 code;
  370. __le16 length;
  371. __u8 seq_num;
  372. __u8 macid;
  373. __le16 result;
  374. char payload[0];
  375. } __attribute__((packed));
  376. /*
  377. * Firmware loading.
  378. */
  379. static int
  380. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  381. {
  382. void __iomem *regs = priv->regs;
  383. dma_addr_t dma_addr;
  384. int loops;
  385. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  386. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  387. return -ENOMEM;
  388. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  389. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  390. iowrite32(MWL8K_H2A_INT_DOORBELL,
  391. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  392. iowrite32(MWL8K_H2A_INT_DUMMY,
  393. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  394. loops = 1000;
  395. do {
  396. u32 int_code;
  397. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  398. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  399. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  400. break;
  401. }
  402. cond_resched();
  403. udelay(1);
  404. } while (--loops);
  405. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  406. return loops ? 0 : -ETIMEDOUT;
  407. }
  408. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  409. const u8 *data, size_t length)
  410. {
  411. struct mwl8k_cmd_pkt *cmd;
  412. int done;
  413. int rc = 0;
  414. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  415. if (cmd == NULL)
  416. return -ENOMEM;
  417. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  418. cmd->seq_num = 0;
  419. cmd->macid = 0;
  420. cmd->result = 0;
  421. done = 0;
  422. while (length) {
  423. int block_size = length > 256 ? 256 : length;
  424. memcpy(cmd->payload, data + done, block_size);
  425. cmd->length = cpu_to_le16(block_size);
  426. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  427. sizeof(*cmd) + block_size);
  428. if (rc)
  429. break;
  430. done += block_size;
  431. length -= block_size;
  432. }
  433. if (!rc) {
  434. cmd->length = 0;
  435. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  436. }
  437. kfree(cmd);
  438. return rc;
  439. }
  440. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  441. const u8 *data, size_t length)
  442. {
  443. unsigned char *buffer;
  444. int may_continue, rc = 0;
  445. u32 done, prev_block_size;
  446. buffer = kmalloc(1024, GFP_KERNEL);
  447. if (buffer == NULL)
  448. return -ENOMEM;
  449. done = 0;
  450. prev_block_size = 0;
  451. may_continue = 1000;
  452. while (may_continue > 0) {
  453. u32 block_size;
  454. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  455. if (block_size & 1) {
  456. block_size &= ~1;
  457. may_continue--;
  458. } else {
  459. done += prev_block_size;
  460. length -= prev_block_size;
  461. }
  462. if (block_size > 1024 || block_size > length) {
  463. rc = -EOVERFLOW;
  464. break;
  465. }
  466. if (length == 0) {
  467. rc = 0;
  468. break;
  469. }
  470. if (block_size == 0) {
  471. rc = -EPROTO;
  472. may_continue--;
  473. udelay(1);
  474. continue;
  475. }
  476. prev_block_size = block_size;
  477. memcpy(buffer, data + done, block_size);
  478. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  479. if (rc)
  480. break;
  481. }
  482. if (!rc && length != 0)
  483. rc = -EREMOTEIO;
  484. kfree(buffer);
  485. return rc;
  486. }
  487. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  488. {
  489. struct mwl8k_priv *priv = hw->priv;
  490. struct firmware *fw = priv->fw_ucode;
  491. int rc;
  492. int loops;
  493. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  494. struct firmware *helper = priv->fw_helper;
  495. if (helper == NULL) {
  496. printk(KERN_ERR "%s: helper image needed but none "
  497. "given\n", pci_name(priv->pdev));
  498. return -EINVAL;
  499. }
  500. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  501. if (rc) {
  502. printk(KERN_ERR "%s: unable to load firmware "
  503. "helper image\n", pci_name(priv->pdev));
  504. return rc;
  505. }
  506. msleep(5);
  507. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  508. } else {
  509. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  510. }
  511. if (rc) {
  512. printk(KERN_ERR "%s: unable to load firmware image\n",
  513. pci_name(priv->pdev));
  514. return rc;
  515. }
  516. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  517. loops = 500000;
  518. do {
  519. u32 ready_code;
  520. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  521. if (ready_code == MWL8K_FWAP_READY) {
  522. priv->ap_fw = 1;
  523. break;
  524. } else if (ready_code == MWL8K_FWSTA_READY) {
  525. priv->ap_fw = 0;
  526. break;
  527. }
  528. cond_resched();
  529. udelay(1);
  530. } while (--loops);
  531. return loops ? 0 : -ETIMEDOUT;
  532. }
  533. /* DMA header used by firmware and hardware. */
  534. struct mwl8k_dma_data {
  535. __le16 fwlen;
  536. struct ieee80211_hdr wh;
  537. char data[0];
  538. } __attribute__((packed));
  539. /* Routines to add/remove DMA header from skb. */
  540. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  541. {
  542. struct mwl8k_dma_data *tr;
  543. int hdrlen;
  544. tr = (struct mwl8k_dma_data *)skb->data;
  545. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  546. if (hdrlen != sizeof(tr->wh)) {
  547. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  548. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  549. *((__le16 *)(tr->data - 2)) = qos;
  550. } else {
  551. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  552. }
  553. }
  554. if (hdrlen != sizeof(*tr))
  555. skb_pull(skb, sizeof(*tr) - hdrlen);
  556. }
  557. static inline void mwl8k_add_dma_header(struct sk_buff *skb)
  558. {
  559. struct ieee80211_hdr *wh;
  560. int hdrlen;
  561. struct mwl8k_dma_data *tr;
  562. /*
  563. * Add a firmware DMA header; the firmware requires that we
  564. * present a 2-byte payload length followed by a 4-address
  565. * header (without QoS field), followed (optionally) by any
  566. * WEP/ExtIV header (but only filled in for CCMP).
  567. */
  568. wh = (struct ieee80211_hdr *)skb->data;
  569. hdrlen = ieee80211_hdrlen(wh->frame_control);
  570. if (hdrlen != sizeof(*tr))
  571. skb_push(skb, sizeof(*tr) - hdrlen);
  572. if (ieee80211_is_data_qos(wh->frame_control))
  573. hdrlen -= 2;
  574. tr = (struct mwl8k_dma_data *)skb->data;
  575. if (wh != &tr->wh)
  576. memmove(&tr->wh, wh, hdrlen);
  577. if (hdrlen != sizeof(tr->wh))
  578. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  579. /*
  580. * Firmware length is the length of the fully formed "802.11
  581. * payload". That is, everything except for the 802.11 header.
  582. * This includes all crypto material including the MIC.
  583. */
  584. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
  585. }
  586. /*
  587. * Packet reception for 88w8366 AP firmware.
  588. */
  589. struct mwl8k_rxd_8366_ap {
  590. __le16 pkt_len;
  591. __u8 sq2;
  592. __u8 rate;
  593. __le32 pkt_phys_addr;
  594. __le32 next_rxd_phys_addr;
  595. __le16 qos_control;
  596. __le16 htsig2;
  597. __le32 hw_rssi_info;
  598. __le32 hw_noise_floor_info;
  599. __u8 noise_floor;
  600. __u8 pad0[3];
  601. __u8 rssi;
  602. __u8 rx_status;
  603. __u8 channel;
  604. __u8 rx_ctrl;
  605. } __attribute__((packed));
  606. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  607. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  608. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  609. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  610. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  611. {
  612. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  613. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  614. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  615. }
  616. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  617. {
  618. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  619. rxd->pkt_len = cpu_to_le16(len);
  620. rxd->pkt_phys_addr = cpu_to_le32(addr);
  621. wmb();
  622. rxd->rx_ctrl = 0;
  623. }
  624. static int
  625. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  626. __le16 *qos)
  627. {
  628. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  629. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  630. return -1;
  631. rmb();
  632. memset(status, 0, sizeof(*status));
  633. status->signal = -rxd->rssi;
  634. status->noise = -rxd->noise_floor;
  635. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  636. status->flag |= RX_FLAG_HT;
  637. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  638. status->flag |= RX_FLAG_40MHZ;
  639. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  640. } else {
  641. int i;
  642. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  643. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  644. status->rate_idx = i;
  645. break;
  646. }
  647. }
  648. }
  649. if (rxd->channel > 14) {
  650. status->band = IEEE80211_BAND_5GHZ;
  651. if (!(status->flag & RX_FLAG_HT))
  652. status->rate_idx -= 5;
  653. } else {
  654. status->band = IEEE80211_BAND_2GHZ;
  655. }
  656. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  657. *qos = rxd->qos_control;
  658. return le16_to_cpu(rxd->pkt_len);
  659. }
  660. static struct rxd_ops rxd_8366_ap_ops = {
  661. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  662. .rxd_init = mwl8k_rxd_8366_ap_init,
  663. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  664. .rxd_process = mwl8k_rxd_8366_ap_process,
  665. };
  666. /*
  667. * Packet reception for STA firmware.
  668. */
  669. struct mwl8k_rxd_sta {
  670. __le16 pkt_len;
  671. __u8 link_quality;
  672. __u8 noise_level;
  673. __le32 pkt_phys_addr;
  674. __le32 next_rxd_phys_addr;
  675. __le16 qos_control;
  676. __le16 rate_info;
  677. __le32 pad0[4];
  678. __u8 rssi;
  679. __u8 channel;
  680. __le16 pad1;
  681. __u8 rx_ctrl;
  682. __u8 rx_status;
  683. __u8 pad2[2];
  684. } __attribute__((packed));
  685. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  686. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  687. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  688. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  689. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  690. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  691. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  692. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  693. {
  694. struct mwl8k_rxd_sta *rxd = _rxd;
  695. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  696. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  697. }
  698. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  699. {
  700. struct mwl8k_rxd_sta *rxd = _rxd;
  701. rxd->pkt_len = cpu_to_le16(len);
  702. rxd->pkt_phys_addr = cpu_to_le32(addr);
  703. wmb();
  704. rxd->rx_ctrl = 0;
  705. }
  706. static int
  707. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  708. __le16 *qos)
  709. {
  710. struct mwl8k_rxd_sta *rxd = _rxd;
  711. u16 rate_info;
  712. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  713. return -1;
  714. rmb();
  715. rate_info = le16_to_cpu(rxd->rate_info);
  716. memset(status, 0, sizeof(*status));
  717. status->signal = -rxd->rssi;
  718. status->noise = -rxd->noise_level;
  719. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  720. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  721. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  722. status->flag |= RX_FLAG_SHORTPRE;
  723. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  724. status->flag |= RX_FLAG_40MHZ;
  725. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  726. status->flag |= RX_FLAG_SHORT_GI;
  727. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  728. status->flag |= RX_FLAG_HT;
  729. if (rxd->channel > 14) {
  730. status->band = IEEE80211_BAND_5GHZ;
  731. if (!(status->flag & RX_FLAG_HT))
  732. status->rate_idx -= 5;
  733. } else {
  734. status->band = IEEE80211_BAND_2GHZ;
  735. }
  736. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  737. *qos = rxd->qos_control;
  738. return le16_to_cpu(rxd->pkt_len);
  739. }
  740. static struct rxd_ops rxd_sta_ops = {
  741. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  742. .rxd_init = mwl8k_rxd_sta_init,
  743. .rxd_refill = mwl8k_rxd_sta_refill,
  744. .rxd_process = mwl8k_rxd_sta_process,
  745. };
  746. #define MWL8K_RX_DESCS 256
  747. #define MWL8K_RX_MAXSZ 3800
  748. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  749. {
  750. struct mwl8k_priv *priv = hw->priv;
  751. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  752. int size;
  753. int i;
  754. rxq->rxd_count = 0;
  755. rxq->head = 0;
  756. rxq->tail = 0;
  757. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  758. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  759. if (rxq->rxd == NULL) {
  760. printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
  761. wiphy_name(hw->wiphy));
  762. return -ENOMEM;
  763. }
  764. memset(rxq->rxd, 0, size);
  765. rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
  766. if (rxq->buf == NULL) {
  767. printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
  768. wiphy_name(hw->wiphy));
  769. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  770. return -ENOMEM;
  771. }
  772. memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
  773. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  774. int desc_size;
  775. void *rxd;
  776. int nexti;
  777. dma_addr_t next_dma_addr;
  778. desc_size = priv->rxd_ops->rxd_size;
  779. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  780. nexti = i + 1;
  781. if (nexti == MWL8K_RX_DESCS)
  782. nexti = 0;
  783. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  784. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  785. }
  786. return 0;
  787. }
  788. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  789. {
  790. struct mwl8k_priv *priv = hw->priv;
  791. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  792. int refilled;
  793. refilled = 0;
  794. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  795. struct sk_buff *skb;
  796. dma_addr_t addr;
  797. int rx;
  798. void *rxd;
  799. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  800. if (skb == NULL)
  801. break;
  802. addr = pci_map_single(priv->pdev, skb->data,
  803. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  804. rxq->rxd_count++;
  805. rx = rxq->tail++;
  806. if (rxq->tail == MWL8K_RX_DESCS)
  807. rxq->tail = 0;
  808. rxq->buf[rx].skb = skb;
  809. pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
  810. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  811. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  812. refilled++;
  813. }
  814. return refilled;
  815. }
  816. /* Must be called only when the card's reception is completely halted */
  817. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  818. {
  819. struct mwl8k_priv *priv = hw->priv;
  820. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  821. int i;
  822. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  823. if (rxq->buf[i].skb != NULL) {
  824. pci_unmap_single(priv->pdev,
  825. pci_unmap_addr(&rxq->buf[i], dma),
  826. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  827. pci_unmap_addr_set(&rxq->buf[i], dma, 0);
  828. kfree_skb(rxq->buf[i].skb);
  829. rxq->buf[i].skb = NULL;
  830. }
  831. }
  832. kfree(rxq->buf);
  833. rxq->buf = NULL;
  834. pci_free_consistent(priv->pdev,
  835. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  836. rxq->rxd, rxq->rxd_dma);
  837. rxq->rxd = NULL;
  838. }
  839. /*
  840. * Scan a list of BSSIDs to process for finalize join.
  841. * Allows for extension to process multiple BSSIDs.
  842. */
  843. static inline int
  844. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  845. {
  846. return priv->capture_beacon &&
  847. ieee80211_is_beacon(wh->frame_control) &&
  848. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  849. }
  850. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  851. struct sk_buff *skb)
  852. {
  853. struct mwl8k_priv *priv = hw->priv;
  854. priv->capture_beacon = false;
  855. memset(priv->capture_bssid, 0, ETH_ALEN);
  856. /*
  857. * Use GFP_ATOMIC as rxq_process is called from
  858. * the primary interrupt handler, memory allocation call
  859. * must not sleep.
  860. */
  861. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  862. if (priv->beacon_skb != NULL)
  863. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  864. }
  865. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  866. {
  867. struct mwl8k_priv *priv = hw->priv;
  868. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  869. int processed;
  870. processed = 0;
  871. while (rxq->rxd_count && limit--) {
  872. struct sk_buff *skb;
  873. void *rxd;
  874. int pkt_len;
  875. struct ieee80211_rx_status status;
  876. __le16 qos;
  877. skb = rxq->buf[rxq->head].skb;
  878. if (skb == NULL)
  879. break;
  880. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  881. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
  882. if (pkt_len < 0)
  883. break;
  884. rxq->buf[rxq->head].skb = NULL;
  885. pci_unmap_single(priv->pdev,
  886. pci_unmap_addr(&rxq->buf[rxq->head], dma),
  887. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  888. pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  889. rxq->head++;
  890. if (rxq->head == MWL8K_RX_DESCS)
  891. rxq->head = 0;
  892. rxq->rxd_count--;
  893. skb_put(skb, pkt_len);
  894. mwl8k_remove_dma_header(skb, qos);
  895. /*
  896. * Check for a pending join operation. Save a
  897. * copy of the beacon and schedule a tasklet to
  898. * send a FINALIZE_JOIN command to the firmware.
  899. */
  900. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  901. mwl8k_save_beacon(hw, skb);
  902. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  903. ieee80211_rx_irqsafe(hw, skb);
  904. processed++;
  905. }
  906. return processed;
  907. }
  908. /*
  909. * Packet transmission.
  910. */
  911. #define MWL8K_TXD_STATUS_OK 0x00000001
  912. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  913. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  914. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  915. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  916. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  917. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  918. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  919. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  920. #define MWL8K_QOS_EOSP 0x0010
  921. struct mwl8k_tx_desc {
  922. __le32 status;
  923. __u8 data_rate;
  924. __u8 tx_priority;
  925. __le16 qos_control;
  926. __le32 pkt_phys_addr;
  927. __le16 pkt_len;
  928. __u8 dest_MAC_addr[ETH_ALEN];
  929. __le32 next_txd_phys_addr;
  930. __le32 reserved;
  931. __le16 rate_info;
  932. __u8 peer_id;
  933. __u8 tx_frag_cnt;
  934. } __attribute__((packed));
  935. #define MWL8K_TX_DESCS 128
  936. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  937. {
  938. struct mwl8k_priv *priv = hw->priv;
  939. struct mwl8k_tx_queue *txq = priv->txq + index;
  940. int size;
  941. int i;
  942. memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
  943. txq->stats.limit = MWL8K_TX_DESCS;
  944. txq->head = 0;
  945. txq->tail = 0;
  946. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  947. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  948. if (txq->txd == NULL) {
  949. printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
  950. wiphy_name(hw->wiphy));
  951. return -ENOMEM;
  952. }
  953. memset(txq->txd, 0, size);
  954. txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
  955. if (txq->skb == NULL) {
  956. printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
  957. wiphy_name(hw->wiphy));
  958. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  959. return -ENOMEM;
  960. }
  961. memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
  962. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  963. struct mwl8k_tx_desc *tx_desc;
  964. int nexti;
  965. tx_desc = txq->txd + i;
  966. nexti = (i + 1) % MWL8K_TX_DESCS;
  967. tx_desc->status = 0;
  968. tx_desc->next_txd_phys_addr =
  969. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  970. }
  971. return 0;
  972. }
  973. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  974. {
  975. iowrite32(MWL8K_H2A_INT_PPA_READY,
  976. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  977. iowrite32(MWL8K_H2A_INT_DUMMY,
  978. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  979. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  980. }
  981. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  982. {
  983. struct mwl8k_priv *priv = hw->priv;
  984. int i;
  985. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  986. struct mwl8k_tx_queue *txq = priv->txq + i;
  987. int fw_owned = 0;
  988. int drv_owned = 0;
  989. int unused = 0;
  990. int desc;
  991. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  992. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  993. u32 status;
  994. status = le32_to_cpu(tx_desc->status);
  995. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  996. fw_owned++;
  997. else
  998. drv_owned++;
  999. if (tx_desc->pkt_len == 0)
  1000. unused++;
  1001. }
  1002. printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
  1003. "fw_owned=%d drv_owned=%d unused=%d\n",
  1004. wiphy_name(hw->wiphy), i,
  1005. txq->stats.len, txq->head, txq->tail,
  1006. fw_owned, drv_owned, unused);
  1007. }
  1008. }
  1009. /*
  1010. * Must be called with priv->fw_mutex held and tx queues stopped.
  1011. */
  1012. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1013. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1014. {
  1015. struct mwl8k_priv *priv = hw->priv;
  1016. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1017. int retry;
  1018. int rc;
  1019. might_sleep();
  1020. /*
  1021. * The TX queues are stopped at this point, so this test
  1022. * doesn't need to take ->tx_lock.
  1023. */
  1024. if (!priv->pending_tx_pkts)
  1025. return 0;
  1026. retry = 0;
  1027. rc = 0;
  1028. spin_lock_bh(&priv->tx_lock);
  1029. priv->tx_wait = &tx_wait;
  1030. while (!rc) {
  1031. int oldcount;
  1032. unsigned long timeout;
  1033. oldcount = priv->pending_tx_pkts;
  1034. spin_unlock_bh(&priv->tx_lock);
  1035. timeout = wait_for_completion_timeout(&tx_wait,
  1036. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1037. spin_lock_bh(&priv->tx_lock);
  1038. if (timeout) {
  1039. WARN_ON(priv->pending_tx_pkts);
  1040. if (retry) {
  1041. printk(KERN_NOTICE "%s: tx rings drained\n",
  1042. wiphy_name(hw->wiphy));
  1043. }
  1044. break;
  1045. }
  1046. if (priv->pending_tx_pkts < oldcount) {
  1047. printk(KERN_NOTICE "%s: waiting for tx rings "
  1048. "to drain (%d -> %d pkts)\n",
  1049. wiphy_name(hw->wiphy), oldcount,
  1050. priv->pending_tx_pkts);
  1051. retry = 1;
  1052. continue;
  1053. }
  1054. priv->tx_wait = NULL;
  1055. printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
  1056. wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
  1057. mwl8k_dump_tx_rings(hw);
  1058. rc = -ETIMEDOUT;
  1059. }
  1060. spin_unlock_bh(&priv->tx_lock);
  1061. return rc;
  1062. }
  1063. #define MWL8K_TXD_SUCCESS(status) \
  1064. ((status) & (MWL8K_TXD_STATUS_OK | \
  1065. MWL8K_TXD_STATUS_OK_RETRY | \
  1066. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1067. static int
  1068. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1069. {
  1070. struct mwl8k_priv *priv = hw->priv;
  1071. struct mwl8k_tx_queue *txq = priv->txq + index;
  1072. int processed;
  1073. processed = 0;
  1074. while (txq->stats.len > 0 && limit--) {
  1075. int tx;
  1076. struct mwl8k_tx_desc *tx_desc;
  1077. unsigned long addr;
  1078. int size;
  1079. struct sk_buff *skb;
  1080. struct ieee80211_tx_info *info;
  1081. u32 status;
  1082. tx = txq->head;
  1083. tx_desc = txq->txd + tx;
  1084. status = le32_to_cpu(tx_desc->status);
  1085. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1086. if (!force)
  1087. break;
  1088. tx_desc->status &=
  1089. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1090. }
  1091. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1092. BUG_ON(txq->stats.len == 0);
  1093. txq->stats.len--;
  1094. priv->pending_tx_pkts--;
  1095. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1096. size = le16_to_cpu(tx_desc->pkt_len);
  1097. skb = txq->skb[tx];
  1098. txq->skb[tx] = NULL;
  1099. BUG_ON(skb == NULL);
  1100. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1101. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1102. /* Mark descriptor as unused */
  1103. tx_desc->pkt_phys_addr = 0;
  1104. tx_desc->pkt_len = 0;
  1105. info = IEEE80211_SKB_CB(skb);
  1106. ieee80211_tx_info_clear_status(info);
  1107. if (MWL8K_TXD_SUCCESS(status))
  1108. info->flags |= IEEE80211_TX_STAT_ACK;
  1109. ieee80211_tx_status_irqsafe(hw, skb);
  1110. processed++;
  1111. }
  1112. if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
  1113. ieee80211_wake_queue(hw, index);
  1114. return processed;
  1115. }
  1116. /* must be called only when the card's transmit is completely halted */
  1117. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1118. {
  1119. struct mwl8k_priv *priv = hw->priv;
  1120. struct mwl8k_tx_queue *txq = priv->txq + index;
  1121. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1122. kfree(txq->skb);
  1123. txq->skb = NULL;
  1124. pci_free_consistent(priv->pdev,
  1125. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1126. txq->txd, txq->txd_dma);
  1127. txq->txd = NULL;
  1128. }
  1129. static int
  1130. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1131. {
  1132. struct mwl8k_priv *priv = hw->priv;
  1133. struct ieee80211_tx_info *tx_info;
  1134. struct mwl8k_vif *mwl8k_vif;
  1135. struct ieee80211_hdr *wh;
  1136. struct mwl8k_tx_queue *txq;
  1137. struct mwl8k_tx_desc *tx;
  1138. dma_addr_t dma;
  1139. u32 txstatus;
  1140. u8 txdatarate;
  1141. u16 qos;
  1142. wh = (struct ieee80211_hdr *)skb->data;
  1143. if (ieee80211_is_data_qos(wh->frame_control))
  1144. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1145. else
  1146. qos = 0;
  1147. mwl8k_add_dma_header(skb);
  1148. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1149. tx_info = IEEE80211_SKB_CB(skb);
  1150. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1151. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1152. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1153. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1154. mwl8k_vif->seqno += 0x10;
  1155. }
  1156. /* Setup firmware control bit fields for each frame type. */
  1157. txstatus = 0;
  1158. txdatarate = 0;
  1159. if (ieee80211_is_mgmt(wh->frame_control) ||
  1160. ieee80211_is_ctl(wh->frame_control)) {
  1161. txdatarate = 0;
  1162. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1163. } else if (ieee80211_is_data(wh->frame_control)) {
  1164. txdatarate = 1;
  1165. if (is_multicast_ether_addr(wh->addr1))
  1166. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1167. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1168. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1169. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1170. else
  1171. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1172. }
  1173. dma = pci_map_single(priv->pdev, skb->data,
  1174. skb->len, PCI_DMA_TODEVICE);
  1175. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1176. printk(KERN_DEBUG "%s: failed to dma map skb, "
  1177. "dropping TX frame.\n", wiphy_name(hw->wiphy));
  1178. dev_kfree_skb(skb);
  1179. return NETDEV_TX_OK;
  1180. }
  1181. spin_lock_bh(&priv->tx_lock);
  1182. txq = priv->txq + index;
  1183. BUG_ON(txq->skb[txq->tail] != NULL);
  1184. txq->skb[txq->tail] = skb;
  1185. tx = txq->txd + txq->tail;
  1186. tx->data_rate = txdatarate;
  1187. tx->tx_priority = index;
  1188. tx->qos_control = cpu_to_le16(qos);
  1189. tx->pkt_phys_addr = cpu_to_le32(dma);
  1190. tx->pkt_len = cpu_to_le16(skb->len);
  1191. tx->rate_info = 0;
  1192. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1193. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1194. else
  1195. tx->peer_id = 0;
  1196. wmb();
  1197. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1198. txq->stats.count++;
  1199. txq->stats.len++;
  1200. priv->pending_tx_pkts++;
  1201. txq->tail++;
  1202. if (txq->tail == MWL8K_TX_DESCS)
  1203. txq->tail = 0;
  1204. if (txq->head == txq->tail)
  1205. ieee80211_stop_queue(hw, index);
  1206. mwl8k_tx_start(priv);
  1207. spin_unlock_bh(&priv->tx_lock);
  1208. return NETDEV_TX_OK;
  1209. }
  1210. /*
  1211. * Firmware access.
  1212. *
  1213. * We have the following requirements for issuing firmware commands:
  1214. * - Some commands require that the packet transmit path is idle when
  1215. * the command is issued. (For simplicity, we'll just quiesce the
  1216. * transmit path for every command.)
  1217. * - There are certain sequences of commands that need to be issued to
  1218. * the hardware sequentially, with no other intervening commands.
  1219. *
  1220. * This leads to an implementation of a "firmware lock" as a mutex that
  1221. * can be taken recursively, and which is taken by both the low-level
  1222. * command submission function (mwl8k_post_cmd) as well as any users of
  1223. * that function that require issuing of an atomic sequence of commands,
  1224. * and quiesces the transmit path whenever it's taken.
  1225. */
  1226. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1227. {
  1228. struct mwl8k_priv *priv = hw->priv;
  1229. if (priv->fw_mutex_owner != current) {
  1230. int rc;
  1231. mutex_lock(&priv->fw_mutex);
  1232. ieee80211_stop_queues(hw);
  1233. rc = mwl8k_tx_wait_empty(hw);
  1234. if (rc) {
  1235. ieee80211_wake_queues(hw);
  1236. mutex_unlock(&priv->fw_mutex);
  1237. return rc;
  1238. }
  1239. priv->fw_mutex_owner = current;
  1240. }
  1241. priv->fw_mutex_depth++;
  1242. return 0;
  1243. }
  1244. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1245. {
  1246. struct mwl8k_priv *priv = hw->priv;
  1247. if (!--priv->fw_mutex_depth) {
  1248. ieee80211_wake_queues(hw);
  1249. priv->fw_mutex_owner = NULL;
  1250. mutex_unlock(&priv->fw_mutex);
  1251. }
  1252. }
  1253. /*
  1254. * Command processing.
  1255. */
  1256. /* Timeout firmware commands after 10s */
  1257. #define MWL8K_CMD_TIMEOUT_MS 10000
  1258. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1259. {
  1260. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1261. struct mwl8k_priv *priv = hw->priv;
  1262. void __iomem *regs = priv->regs;
  1263. dma_addr_t dma_addr;
  1264. unsigned int dma_size;
  1265. int rc;
  1266. unsigned long timeout = 0;
  1267. u8 buf[32];
  1268. cmd->result = 0xffff;
  1269. dma_size = le16_to_cpu(cmd->length);
  1270. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1271. PCI_DMA_BIDIRECTIONAL);
  1272. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1273. return -ENOMEM;
  1274. rc = mwl8k_fw_lock(hw);
  1275. if (rc) {
  1276. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1277. PCI_DMA_BIDIRECTIONAL);
  1278. return rc;
  1279. }
  1280. priv->hostcmd_wait = &cmd_wait;
  1281. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1282. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1283. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1284. iowrite32(MWL8K_H2A_INT_DUMMY,
  1285. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1286. timeout = wait_for_completion_timeout(&cmd_wait,
  1287. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1288. priv->hostcmd_wait = NULL;
  1289. mwl8k_fw_unlock(hw);
  1290. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1291. PCI_DMA_BIDIRECTIONAL);
  1292. if (!timeout) {
  1293. printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
  1294. wiphy_name(hw->wiphy),
  1295. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1296. MWL8K_CMD_TIMEOUT_MS);
  1297. rc = -ETIMEDOUT;
  1298. } else {
  1299. int ms;
  1300. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1301. rc = cmd->result ? -EINVAL : 0;
  1302. if (rc)
  1303. printk(KERN_ERR "%s: Command %s error 0x%x\n",
  1304. wiphy_name(hw->wiphy),
  1305. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1306. le16_to_cpu(cmd->result));
  1307. else if (ms > 2000)
  1308. printk(KERN_NOTICE "%s: Command %s took %d ms\n",
  1309. wiphy_name(hw->wiphy),
  1310. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1311. ms);
  1312. }
  1313. return rc;
  1314. }
  1315. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1316. struct ieee80211_vif *vif,
  1317. struct mwl8k_cmd_pkt *cmd)
  1318. {
  1319. if (vif != NULL)
  1320. cmd->macid = MWL8K_VIF(vif)->macid;
  1321. return mwl8k_post_cmd(hw, cmd);
  1322. }
  1323. /*
  1324. * Setup code shared between STA and AP firmware images.
  1325. */
  1326. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1327. {
  1328. struct mwl8k_priv *priv = hw->priv;
  1329. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1330. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1331. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1332. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1333. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1334. priv->band_24.channels = priv->channels_24;
  1335. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1336. priv->band_24.bitrates = priv->rates_24;
  1337. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1338. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1339. }
  1340. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1341. {
  1342. struct mwl8k_priv *priv = hw->priv;
  1343. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1344. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1345. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1346. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1347. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1348. priv->band_50.channels = priv->channels_50;
  1349. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1350. priv->band_50.bitrates = priv->rates_50;
  1351. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1352. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1353. }
  1354. /*
  1355. * CMD_GET_HW_SPEC (STA version).
  1356. */
  1357. struct mwl8k_cmd_get_hw_spec_sta {
  1358. struct mwl8k_cmd_pkt header;
  1359. __u8 hw_rev;
  1360. __u8 host_interface;
  1361. __le16 num_mcaddrs;
  1362. __u8 perm_addr[ETH_ALEN];
  1363. __le16 region_code;
  1364. __le32 fw_rev;
  1365. __le32 ps_cookie;
  1366. __le32 caps;
  1367. __u8 mcs_bitmap[16];
  1368. __le32 rx_queue_ptr;
  1369. __le32 num_tx_queues;
  1370. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1371. __le32 caps2;
  1372. __le32 num_tx_desc_per_queue;
  1373. __le32 total_rxd;
  1374. } __attribute__((packed));
  1375. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1376. #define MWL8K_CAP_GREENFIELD 0x08000000
  1377. #define MWL8K_CAP_AMPDU 0x04000000
  1378. #define MWL8K_CAP_RX_STBC 0x01000000
  1379. #define MWL8K_CAP_TX_STBC 0x00800000
  1380. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1381. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1382. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1383. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1384. #define MWL8K_CAP_DELAY_BA 0x00003000
  1385. #define MWL8K_CAP_MIMO 0x00000200
  1386. #define MWL8K_CAP_40MHZ 0x00000100
  1387. #define MWL8K_CAP_BAND_MASK 0x00000007
  1388. #define MWL8K_CAP_5GHZ 0x00000004
  1389. #define MWL8K_CAP_2GHZ4 0x00000001
  1390. static void
  1391. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1392. struct ieee80211_supported_band *band, u32 cap)
  1393. {
  1394. int rx_streams;
  1395. int tx_streams;
  1396. band->ht_cap.ht_supported = 1;
  1397. if (cap & MWL8K_CAP_MAX_AMSDU)
  1398. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1399. if (cap & MWL8K_CAP_GREENFIELD)
  1400. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1401. if (cap & MWL8K_CAP_AMPDU) {
  1402. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1403. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1404. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1405. }
  1406. if (cap & MWL8K_CAP_RX_STBC)
  1407. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1408. if (cap & MWL8K_CAP_TX_STBC)
  1409. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1410. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1411. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1412. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1413. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1414. if (cap & MWL8K_CAP_DELAY_BA)
  1415. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1416. if (cap & MWL8K_CAP_40MHZ)
  1417. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1418. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1419. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1420. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1421. if (rx_streams >= 2)
  1422. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1423. if (rx_streams >= 3)
  1424. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1425. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1426. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1427. if (rx_streams != tx_streams) {
  1428. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1429. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1430. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1431. }
  1432. }
  1433. static void
  1434. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1435. {
  1436. struct mwl8k_priv *priv = hw->priv;
  1437. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1438. mwl8k_setup_2ghz_band(hw);
  1439. if (caps & MWL8K_CAP_MIMO)
  1440. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1441. }
  1442. if (caps & MWL8K_CAP_5GHZ) {
  1443. mwl8k_setup_5ghz_band(hw);
  1444. if (caps & MWL8K_CAP_MIMO)
  1445. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1446. }
  1447. }
  1448. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1449. {
  1450. struct mwl8k_priv *priv = hw->priv;
  1451. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1452. int rc;
  1453. int i;
  1454. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1455. if (cmd == NULL)
  1456. return -ENOMEM;
  1457. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1458. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1459. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1460. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1461. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1462. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1463. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1464. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1465. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1466. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1467. rc = mwl8k_post_cmd(hw, &cmd->header);
  1468. if (!rc) {
  1469. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1470. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1471. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1472. priv->hw_rev = cmd->hw_rev;
  1473. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  1474. priv->ap_macids_supported = 0x00000000;
  1475. priv->sta_macids_supported = 0x00000001;
  1476. }
  1477. kfree(cmd);
  1478. return rc;
  1479. }
  1480. /*
  1481. * CMD_GET_HW_SPEC (AP version).
  1482. */
  1483. struct mwl8k_cmd_get_hw_spec_ap {
  1484. struct mwl8k_cmd_pkt header;
  1485. __u8 hw_rev;
  1486. __u8 host_interface;
  1487. __le16 num_wcb;
  1488. __le16 num_mcaddrs;
  1489. __u8 perm_addr[ETH_ALEN];
  1490. __le16 region_code;
  1491. __le16 num_antenna;
  1492. __le32 fw_rev;
  1493. __le32 wcbbase0;
  1494. __le32 rxwrptr;
  1495. __le32 rxrdptr;
  1496. __le32 ps_cookie;
  1497. __le32 wcbbase1;
  1498. __le32 wcbbase2;
  1499. __le32 wcbbase3;
  1500. } __attribute__((packed));
  1501. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1502. {
  1503. struct mwl8k_priv *priv = hw->priv;
  1504. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1505. int rc;
  1506. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1507. if (cmd == NULL)
  1508. return -ENOMEM;
  1509. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1510. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1511. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1512. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1513. rc = mwl8k_post_cmd(hw, &cmd->header);
  1514. if (!rc) {
  1515. int off;
  1516. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1517. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1518. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1519. priv->hw_rev = cmd->hw_rev;
  1520. mwl8k_setup_2ghz_band(hw);
  1521. priv->ap_macids_supported = 0x000000ff;
  1522. priv->sta_macids_supported = 0x00000000;
  1523. off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  1524. iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
  1525. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  1526. iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
  1527. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  1528. iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
  1529. off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  1530. iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
  1531. off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  1532. iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
  1533. off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  1534. iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
  1535. }
  1536. kfree(cmd);
  1537. return rc;
  1538. }
  1539. /*
  1540. * CMD_SET_HW_SPEC.
  1541. */
  1542. struct mwl8k_cmd_set_hw_spec {
  1543. struct mwl8k_cmd_pkt header;
  1544. __u8 hw_rev;
  1545. __u8 host_interface;
  1546. __le16 num_mcaddrs;
  1547. __u8 perm_addr[ETH_ALEN];
  1548. __le16 region_code;
  1549. __le32 fw_rev;
  1550. __le32 ps_cookie;
  1551. __le32 caps;
  1552. __le32 rx_queue_ptr;
  1553. __le32 num_tx_queues;
  1554. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1555. __le32 flags;
  1556. __le32 num_tx_desc_per_queue;
  1557. __le32 total_rxd;
  1558. } __attribute__((packed));
  1559. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  1560. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  1561. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  1562. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  1563. {
  1564. struct mwl8k_priv *priv = hw->priv;
  1565. struct mwl8k_cmd_set_hw_spec *cmd;
  1566. int rc;
  1567. int i;
  1568. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1569. if (cmd == NULL)
  1570. return -ENOMEM;
  1571. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  1572. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1573. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1574. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1575. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1576. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1577. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1578. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  1579. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  1580. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
  1581. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1582. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1583. rc = mwl8k_post_cmd(hw, &cmd->header);
  1584. kfree(cmd);
  1585. return rc;
  1586. }
  1587. /*
  1588. * CMD_MAC_MULTICAST_ADR.
  1589. */
  1590. struct mwl8k_cmd_mac_multicast_adr {
  1591. struct mwl8k_cmd_pkt header;
  1592. __le16 action;
  1593. __le16 numaddr;
  1594. __u8 addr[0][ETH_ALEN];
  1595. };
  1596. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  1597. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  1598. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  1599. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  1600. static struct mwl8k_cmd_pkt *
  1601. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  1602. int mc_count, struct dev_addr_list *mclist)
  1603. {
  1604. struct mwl8k_priv *priv = hw->priv;
  1605. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1606. int size;
  1607. if (allmulti || mc_count > priv->num_mcaddrs) {
  1608. allmulti = 1;
  1609. mc_count = 0;
  1610. }
  1611. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1612. cmd = kzalloc(size, GFP_ATOMIC);
  1613. if (cmd == NULL)
  1614. return NULL;
  1615. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1616. cmd->header.length = cpu_to_le16(size);
  1617. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  1618. MWL8K_ENABLE_RX_BROADCAST);
  1619. if (allmulti) {
  1620. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  1621. } else if (mc_count) {
  1622. int i;
  1623. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1624. cmd->numaddr = cpu_to_le16(mc_count);
  1625. for (i = 0; i < mc_count && mclist; i++) {
  1626. if (mclist->da_addrlen != ETH_ALEN) {
  1627. kfree(cmd);
  1628. return NULL;
  1629. }
  1630. memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
  1631. mclist = mclist->next;
  1632. }
  1633. }
  1634. return &cmd->header;
  1635. }
  1636. /*
  1637. * CMD_GET_STAT.
  1638. */
  1639. struct mwl8k_cmd_get_stat {
  1640. struct mwl8k_cmd_pkt header;
  1641. __le32 stats[64];
  1642. } __attribute__((packed));
  1643. #define MWL8K_STAT_ACK_FAILURE 9
  1644. #define MWL8K_STAT_RTS_FAILURE 12
  1645. #define MWL8K_STAT_FCS_ERROR 24
  1646. #define MWL8K_STAT_RTS_SUCCESS 11
  1647. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  1648. struct ieee80211_low_level_stats *stats)
  1649. {
  1650. struct mwl8k_cmd_get_stat *cmd;
  1651. int rc;
  1652. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1653. if (cmd == NULL)
  1654. return -ENOMEM;
  1655. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1656. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1657. rc = mwl8k_post_cmd(hw, &cmd->header);
  1658. if (!rc) {
  1659. stats->dot11ACKFailureCount =
  1660. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1661. stats->dot11RTSFailureCount =
  1662. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1663. stats->dot11FCSErrorCount =
  1664. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1665. stats->dot11RTSSuccessCount =
  1666. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1667. }
  1668. kfree(cmd);
  1669. return rc;
  1670. }
  1671. /*
  1672. * CMD_RADIO_CONTROL.
  1673. */
  1674. struct mwl8k_cmd_radio_control {
  1675. struct mwl8k_cmd_pkt header;
  1676. __le16 action;
  1677. __le16 control;
  1678. __le16 radio_on;
  1679. } __attribute__((packed));
  1680. static int
  1681. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1682. {
  1683. struct mwl8k_priv *priv = hw->priv;
  1684. struct mwl8k_cmd_radio_control *cmd;
  1685. int rc;
  1686. if (enable == priv->radio_on && !force)
  1687. return 0;
  1688. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1689. if (cmd == NULL)
  1690. return -ENOMEM;
  1691. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1692. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1693. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1694. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1695. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1696. rc = mwl8k_post_cmd(hw, &cmd->header);
  1697. kfree(cmd);
  1698. if (!rc)
  1699. priv->radio_on = enable;
  1700. return rc;
  1701. }
  1702. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  1703. {
  1704. return mwl8k_cmd_radio_control(hw, 0, 0);
  1705. }
  1706. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  1707. {
  1708. return mwl8k_cmd_radio_control(hw, 1, 0);
  1709. }
  1710. static int
  1711. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1712. {
  1713. struct mwl8k_priv *priv = hw->priv;
  1714. priv->radio_short_preamble = short_preamble;
  1715. return mwl8k_cmd_radio_control(hw, 1, 1);
  1716. }
  1717. /*
  1718. * CMD_RF_TX_POWER.
  1719. */
  1720. #define MWL8K_TX_POWER_LEVEL_TOTAL 8
  1721. struct mwl8k_cmd_rf_tx_power {
  1722. struct mwl8k_cmd_pkt header;
  1723. __le16 action;
  1724. __le16 support_level;
  1725. __le16 current_level;
  1726. __le16 reserved;
  1727. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1728. } __attribute__((packed));
  1729. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1730. {
  1731. struct mwl8k_cmd_rf_tx_power *cmd;
  1732. int rc;
  1733. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1734. if (cmd == NULL)
  1735. return -ENOMEM;
  1736. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1737. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1738. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1739. cmd->support_level = cpu_to_le16(dBm);
  1740. rc = mwl8k_post_cmd(hw, &cmd->header);
  1741. kfree(cmd);
  1742. return rc;
  1743. }
  1744. /*
  1745. * CMD_RF_ANTENNA.
  1746. */
  1747. struct mwl8k_cmd_rf_antenna {
  1748. struct mwl8k_cmd_pkt header;
  1749. __le16 antenna;
  1750. __le16 mode;
  1751. } __attribute__((packed));
  1752. #define MWL8K_RF_ANTENNA_RX 1
  1753. #define MWL8K_RF_ANTENNA_TX 2
  1754. static int
  1755. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  1756. {
  1757. struct mwl8k_cmd_rf_antenna *cmd;
  1758. int rc;
  1759. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1760. if (cmd == NULL)
  1761. return -ENOMEM;
  1762. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  1763. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1764. cmd->antenna = cpu_to_le16(antenna);
  1765. cmd->mode = cpu_to_le16(mask);
  1766. rc = mwl8k_post_cmd(hw, &cmd->header);
  1767. kfree(cmd);
  1768. return rc;
  1769. }
  1770. /*
  1771. * CMD_SET_BEACON.
  1772. */
  1773. struct mwl8k_cmd_set_beacon {
  1774. struct mwl8k_cmd_pkt header;
  1775. __le16 beacon_len;
  1776. __u8 beacon[0];
  1777. };
  1778. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  1779. struct ieee80211_vif *vif, u8 *beacon, int len)
  1780. {
  1781. struct mwl8k_cmd_set_beacon *cmd;
  1782. int rc;
  1783. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  1784. if (cmd == NULL)
  1785. return -ENOMEM;
  1786. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  1787. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  1788. cmd->beacon_len = cpu_to_le16(len);
  1789. memcpy(cmd->beacon, beacon, len);
  1790. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  1791. kfree(cmd);
  1792. return rc;
  1793. }
  1794. /*
  1795. * CMD_SET_PRE_SCAN.
  1796. */
  1797. struct mwl8k_cmd_set_pre_scan {
  1798. struct mwl8k_cmd_pkt header;
  1799. } __attribute__((packed));
  1800. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1801. {
  1802. struct mwl8k_cmd_set_pre_scan *cmd;
  1803. int rc;
  1804. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1805. if (cmd == NULL)
  1806. return -ENOMEM;
  1807. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1808. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1809. rc = mwl8k_post_cmd(hw, &cmd->header);
  1810. kfree(cmd);
  1811. return rc;
  1812. }
  1813. /*
  1814. * CMD_SET_POST_SCAN.
  1815. */
  1816. struct mwl8k_cmd_set_post_scan {
  1817. struct mwl8k_cmd_pkt header;
  1818. __le32 isibss;
  1819. __u8 bssid[ETH_ALEN];
  1820. } __attribute__((packed));
  1821. static int
  1822. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  1823. {
  1824. struct mwl8k_cmd_set_post_scan *cmd;
  1825. int rc;
  1826. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1827. if (cmd == NULL)
  1828. return -ENOMEM;
  1829. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1830. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1831. cmd->isibss = 0;
  1832. memcpy(cmd->bssid, mac, ETH_ALEN);
  1833. rc = mwl8k_post_cmd(hw, &cmd->header);
  1834. kfree(cmd);
  1835. return rc;
  1836. }
  1837. /*
  1838. * CMD_SET_RF_CHANNEL.
  1839. */
  1840. struct mwl8k_cmd_set_rf_channel {
  1841. struct mwl8k_cmd_pkt header;
  1842. __le16 action;
  1843. __u8 current_channel;
  1844. __le32 channel_flags;
  1845. } __attribute__((packed));
  1846. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1847. struct ieee80211_conf *conf)
  1848. {
  1849. struct ieee80211_channel *channel = conf->channel;
  1850. struct mwl8k_cmd_set_rf_channel *cmd;
  1851. int rc;
  1852. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1853. if (cmd == NULL)
  1854. return -ENOMEM;
  1855. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1856. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1857. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1858. cmd->current_channel = channel->hw_value;
  1859. if (channel->band == IEEE80211_BAND_2GHZ)
  1860. cmd->channel_flags |= cpu_to_le32(0x00000001);
  1861. else if (channel->band == IEEE80211_BAND_5GHZ)
  1862. cmd->channel_flags |= cpu_to_le32(0x00000004);
  1863. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1864. conf->channel_type == NL80211_CHAN_HT20)
  1865. cmd->channel_flags |= cpu_to_le32(0x00000080);
  1866. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1867. cmd->channel_flags |= cpu_to_le32(0x000001900);
  1868. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1869. cmd->channel_flags |= cpu_to_le32(0x000000900);
  1870. rc = mwl8k_post_cmd(hw, &cmd->header);
  1871. kfree(cmd);
  1872. return rc;
  1873. }
  1874. /*
  1875. * CMD_SET_AID.
  1876. */
  1877. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1878. #define MWL8K_FRAME_PROT_11G 0x07
  1879. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1880. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1881. struct mwl8k_cmd_update_set_aid {
  1882. struct mwl8k_cmd_pkt header;
  1883. __le16 aid;
  1884. /* AP's MAC address (BSSID) */
  1885. __u8 bssid[ETH_ALEN];
  1886. __le16 protection_mode;
  1887. __u8 supp_rates[14];
  1888. } __attribute__((packed));
  1889. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  1890. {
  1891. int i;
  1892. int j;
  1893. /*
  1894. * Clear nonstandard rates 4 and 13.
  1895. */
  1896. mask &= 0x1fef;
  1897. for (i = 0, j = 0; i < 14; i++) {
  1898. if (mask & (1 << i))
  1899. rates[j++] = mwl8k_rates_24[i].hw_value;
  1900. }
  1901. }
  1902. static int
  1903. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1904. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  1905. {
  1906. struct mwl8k_cmd_update_set_aid *cmd;
  1907. u16 prot_mode;
  1908. int rc;
  1909. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1910. if (cmd == NULL)
  1911. return -ENOMEM;
  1912. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1913. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1914. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  1915. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  1916. if (vif->bss_conf.use_cts_prot) {
  1917. prot_mode = MWL8K_FRAME_PROT_11G;
  1918. } else {
  1919. switch (vif->bss_conf.ht_operation_mode &
  1920. IEEE80211_HT_OP_MODE_PROTECTION) {
  1921. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1922. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1923. break;
  1924. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1925. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1926. break;
  1927. default:
  1928. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1929. break;
  1930. }
  1931. }
  1932. cmd->protection_mode = cpu_to_le16(prot_mode);
  1933. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  1934. rc = mwl8k_post_cmd(hw, &cmd->header);
  1935. kfree(cmd);
  1936. return rc;
  1937. }
  1938. /*
  1939. * CMD_SET_RATE.
  1940. */
  1941. struct mwl8k_cmd_set_rate {
  1942. struct mwl8k_cmd_pkt header;
  1943. __u8 legacy_rates[14];
  1944. /* Bitmap for supported MCS codes. */
  1945. __u8 mcs_set[16];
  1946. __u8 reserved[16];
  1947. } __attribute__((packed));
  1948. static int
  1949. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1950. u32 legacy_rate_mask, u8 *mcs_rates)
  1951. {
  1952. struct mwl8k_cmd_set_rate *cmd;
  1953. int rc;
  1954. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1955. if (cmd == NULL)
  1956. return -ENOMEM;
  1957. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  1958. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1959. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  1960. memcpy(cmd->mcs_set, mcs_rates, 16);
  1961. rc = mwl8k_post_cmd(hw, &cmd->header);
  1962. kfree(cmd);
  1963. return rc;
  1964. }
  1965. /*
  1966. * CMD_FINALIZE_JOIN.
  1967. */
  1968. #define MWL8K_FJ_BEACON_MAXLEN 128
  1969. struct mwl8k_cmd_finalize_join {
  1970. struct mwl8k_cmd_pkt header;
  1971. __le32 sleep_interval; /* Number of beacon periods to sleep */
  1972. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  1973. } __attribute__((packed));
  1974. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  1975. int framelen, int dtim)
  1976. {
  1977. struct mwl8k_cmd_finalize_join *cmd;
  1978. struct ieee80211_mgmt *payload = frame;
  1979. int payload_len;
  1980. int rc;
  1981. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1982. if (cmd == NULL)
  1983. return -ENOMEM;
  1984. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  1985. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1986. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  1987. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  1988. if (payload_len < 0)
  1989. payload_len = 0;
  1990. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1991. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  1992. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  1993. rc = mwl8k_post_cmd(hw, &cmd->header);
  1994. kfree(cmd);
  1995. return rc;
  1996. }
  1997. /*
  1998. * CMD_SET_RTS_THRESHOLD.
  1999. */
  2000. struct mwl8k_cmd_set_rts_threshold {
  2001. struct mwl8k_cmd_pkt header;
  2002. __le16 action;
  2003. __le16 threshold;
  2004. } __attribute__((packed));
  2005. static int
  2006. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2007. {
  2008. struct mwl8k_cmd_set_rts_threshold *cmd;
  2009. int rc;
  2010. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2011. if (cmd == NULL)
  2012. return -ENOMEM;
  2013. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2014. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2015. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2016. cmd->threshold = cpu_to_le16(rts_thresh);
  2017. rc = mwl8k_post_cmd(hw, &cmd->header);
  2018. kfree(cmd);
  2019. return rc;
  2020. }
  2021. /*
  2022. * CMD_SET_SLOT.
  2023. */
  2024. struct mwl8k_cmd_set_slot {
  2025. struct mwl8k_cmd_pkt header;
  2026. __le16 action;
  2027. __u8 short_slot;
  2028. } __attribute__((packed));
  2029. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2030. {
  2031. struct mwl8k_cmd_set_slot *cmd;
  2032. int rc;
  2033. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2034. if (cmd == NULL)
  2035. return -ENOMEM;
  2036. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2037. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2038. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2039. cmd->short_slot = short_slot_time;
  2040. rc = mwl8k_post_cmd(hw, &cmd->header);
  2041. kfree(cmd);
  2042. return rc;
  2043. }
  2044. /*
  2045. * CMD_SET_EDCA_PARAMS.
  2046. */
  2047. struct mwl8k_cmd_set_edca_params {
  2048. struct mwl8k_cmd_pkt header;
  2049. /* See MWL8K_SET_EDCA_XXX below */
  2050. __le16 action;
  2051. /* TX opportunity in units of 32 us */
  2052. __le16 txop;
  2053. union {
  2054. struct {
  2055. /* Log exponent of max contention period: 0...15 */
  2056. __le32 log_cw_max;
  2057. /* Log exponent of min contention period: 0...15 */
  2058. __le32 log_cw_min;
  2059. /* Adaptive interframe spacing in units of 32us */
  2060. __u8 aifs;
  2061. /* TX queue to configure */
  2062. __u8 txq;
  2063. } ap;
  2064. struct {
  2065. /* Log exponent of max contention period: 0...15 */
  2066. __u8 log_cw_max;
  2067. /* Log exponent of min contention period: 0...15 */
  2068. __u8 log_cw_min;
  2069. /* Adaptive interframe spacing in units of 32us */
  2070. __u8 aifs;
  2071. /* TX queue to configure */
  2072. __u8 txq;
  2073. } sta;
  2074. };
  2075. } __attribute__((packed));
  2076. #define MWL8K_SET_EDCA_CW 0x01
  2077. #define MWL8K_SET_EDCA_TXOP 0x02
  2078. #define MWL8K_SET_EDCA_AIFS 0x04
  2079. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2080. MWL8K_SET_EDCA_TXOP | \
  2081. MWL8K_SET_EDCA_AIFS)
  2082. static int
  2083. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2084. __u16 cw_min, __u16 cw_max,
  2085. __u8 aifs, __u16 txop)
  2086. {
  2087. struct mwl8k_priv *priv = hw->priv;
  2088. struct mwl8k_cmd_set_edca_params *cmd;
  2089. int rc;
  2090. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2091. if (cmd == NULL)
  2092. return -ENOMEM;
  2093. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2094. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2095. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2096. cmd->txop = cpu_to_le16(txop);
  2097. if (priv->ap_fw) {
  2098. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2099. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2100. cmd->ap.aifs = aifs;
  2101. cmd->ap.txq = qnum;
  2102. } else {
  2103. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2104. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2105. cmd->sta.aifs = aifs;
  2106. cmd->sta.txq = qnum;
  2107. }
  2108. rc = mwl8k_post_cmd(hw, &cmd->header);
  2109. kfree(cmd);
  2110. return rc;
  2111. }
  2112. /*
  2113. * CMD_SET_WMM_MODE.
  2114. */
  2115. struct mwl8k_cmd_set_wmm_mode {
  2116. struct mwl8k_cmd_pkt header;
  2117. __le16 action;
  2118. } __attribute__((packed));
  2119. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2120. {
  2121. struct mwl8k_priv *priv = hw->priv;
  2122. struct mwl8k_cmd_set_wmm_mode *cmd;
  2123. int rc;
  2124. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2125. if (cmd == NULL)
  2126. return -ENOMEM;
  2127. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2128. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2129. cmd->action = cpu_to_le16(!!enable);
  2130. rc = mwl8k_post_cmd(hw, &cmd->header);
  2131. kfree(cmd);
  2132. if (!rc)
  2133. priv->wmm_enabled = enable;
  2134. return rc;
  2135. }
  2136. /*
  2137. * CMD_MIMO_CONFIG.
  2138. */
  2139. struct mwl8k_cmd_mimo_config {
  2140. struct mwl8k_cmd_pkt header;
  2141. __le32 action;
  2142. __u8 rx_antenna_map;
  2143. __u8 tx_antenna_map;
  2144. } __attribute__((packed));
  2145. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2146. {
  2147. struct mwl8k_cmd_mimo_config *cmd;
  2148. int rc;
  2149. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2150. if (cmd == NULL)
  2151. return -ENOMEM;
  2152. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2153. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2154. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2155. cmd->rx_antenna_map = rx;
  2156. cmd->tx_antenna_map = tx;
  2157. rc = mwl8k_post_cmd(hw, &cmd->header);
  2158. kfree(cmd);
  2159. return rc;
  2160. }
  2161. /*
  2162. * CMD_USE_FIXED_RATE (STA version).
  2163. */
  2164. struct mwl8k_cmd_use_fixed_rate_sta {
  2165. struct mwl8k_cmd_pkt header;
  2166. __le32 action;
  2167. __le32 allow_rate_drop;
  2168. __le32 num_rates;
  2169. struct {
  2170. __le32 is_ht_rate;
  2171. __le32 enable_retry;
  2172. __le32 rate;
  2173. __le32 retry_count;
  2174. } rate_entry[8];
  2175. __le32 rate_type;
  2176. __le32 reserved1;
  2177. __le32 reserved2;
  2178. } __attribute__((packed));
  2179. #define MWL8K_USE_AUTO_RATE 0x0002
  2180. #define MWL8K_UCAST_RATE 0
  2181. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2182. {
  2183. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2184. int rc;
  2185. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2186. if (cmd == NULL)
  2187. return -ENOMEM;
  2188. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2189. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2190. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2191. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2192. rc = mwl8k_post_cmd(hw, &cmd->header);
  2193. kfree(cmd);
  2194. return rc;
  2195. }
  2196. /*
  2197. * CMD_USE_FIXED_RATE (AP version).
  2198. */
  2199. struct mwl8k_cmd_use_fixed_rate_ap {
  2200. struct mwl8k_cmd_pkt header;
  2201. __le32 action;
  2202. __le32 allow_rate_drop;
  2203. __le32 num_rates;
  2204. struct mwl8k_rate_entry_ap {
  2205. __le32 is_ht_rate;
  2206. __le32 enable_retry;
  2207. __le32 rate;
  2208. __le32 retry_count;
  2209. } rate_entry[4];
  2210. u8 multicast_rate;
  2211. u8 multicast_rate_type;
  2212. u8 management_rate;
  2213. } __attribute__((packed));
  2214. static int
  2215. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2216. {
  2217. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2218. int rc;
  2219. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2220. if (cmd == NULL)
  2221. return -ENOMEM;
  2222. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2223. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2224. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2225. cmd->multicast_rate = mcast;
  2226. cmd->management_rate = mgmt;
  2227. rc = mwl8k_post_cmd(hw, &cmd->header);
  2228. kfree(cmd);
  2229. return rc;
  2230. }
  2231. /*
  2232. * CMD_ENABLE_SNIFFER.
  2233. */
  2234. struct mwl8k_cmd_enable_sniffer {
  2235. struct mwl8k_cmd_pkt header;
  2236. __le32 action;
  2237. } __attribute__((packed));
  2238. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2239. {
  2240. struct mwl8k_cmd_enable_sniffer *cmd;
  2241. int rc;
  2242. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2243. if (cmd == NULL)
  2244. return -ENOMEM;
  2245. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2246. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2247. cmd->action = cpu_to_le32(!!enable);
  2248. rc = mwl8k_post_cmd(hw, &cmd->header);
  2249. kfree(cmd);
  2250. return rc;
  2251. }
  2252. /*
  2253. * CMD_SET_MAC_ADDR.
  2254. */
  2255. struct mwl8k_cmd_set_mac_addr {
  2256. struct mwl8k_cmd_pkt header;
  2257. union {
  2258. struct {
  2259. __le16 mac_type;
  2260. __u8 mac_addr[ETH_ALEN];
  2261. } mbss;
  2262. __u8 mac_addr[ETH_ALEN];
  2263. };
  2264. } __attribute__((packed));
  2265. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2266. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2267. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2268. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2269. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2270. struct ieee80211_vif *vif, u8 *mac)
  2271. {
  2272. struct mwl8k_priv *priv = hw->priv;
  2273. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2274. struct mwl8k_cmd_set_mac_addr *cmd;
  2275. int mac_type;
  2276. int rc;
  2277. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2278. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2279. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2280. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2281. else
  2282. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2283. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2284. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2285. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2286. else
  2287. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2288. }
  2289. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2290. if (cmd == NULL)
  2291. return -ENOMEM;
  2292. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2293. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2294. if (priv->ap_fw) {
  2295. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2296. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2297. } else {
  2298. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2299. }
  2300. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2301. kfree(cmd);
  2302. return rc;
  2303. }
  2304. /*
  2305. * CMD_SET_RATEADAPT_MODE.
  2306. */
  2307. struct mwl8k_cmd_set_rate_adapt_mode {
  2308. struct mwl8k_cmd_pkt header;
  2309. __le16 action;
  2310. __le16 mode;
  2311. } __attribute__((packed));
  2312. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2313. {
  2314. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2315. int rc;
  2316. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2317. if (cmd == NULL)
  2318. return -ENOMEM;
  2319. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2320. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2321. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2322. cmd->mode = cpu_to_le16(mode);
  2323. rc = mwl8k_post_cmd(hw, &cmd->header);
  2324. kfree(cmd);
  2325. return rc;
  2326. }
  2327. /*
  2328. * CMD_BSS_START.
  2329. */
  2330. struct mwl8k_cmd_bss_start {
  2331. struct mwl8k_cmd_pkt header;
  2332. __le32 enable;
  2333. } __attribute__((packed));
  2334. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  2335. struct ieee80211_vif *vif, int enable)
  2336. {
  2337. struct mwl8k_cmd_bss_start *cmd;
  2338. int rc;
  2339. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2340. if (cmd == NULL)
  2341. return -ENOMEM;
  2342. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2343. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2344. cmd->enable = cpu_to_le32(enable);
  2345. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2346. kfree(cmd);
  2347. return rc;
  2348. }
  2349. /*
  2350. * CMD_SET_NEW_STN.
  2351. */
  2352. struct mwl8k_cmd_set_new_stn {
  2353. struct mwl8k_cmd_pkt header;
  2354. __le16 aid;
  2355. __u8 mac_addr[6];
  2356. __le16 stn_id;
  2357. __le16 action;
  2358. __le16 rsvd;
  2359. __le32 legacy_rates;
  2360. __u8 ht_rates[4];
  2361. __le16 cap_info;
  2362. __le16 ht_capabilities_info;
  2363. __u8 mac_ht_param_info;
  2364. __u8 rev;
  2365. __u8 control_channel;
  2366. __u8 add_channel;
  2367. __le16 op_mode;
  2368. __le16 stbc;
  2369. __u8 add_qos_info;
  2370. __u8 is_qos_sta;
  2371. __le32 fw_sta_ptr;
  2372. } __attribute__((packed));
  2373. #define MWL8K_STA_ACTION_ADD 0
  2374. #define MWL8K_STA_ACTION_REMOVE 2
  2375. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  2376. struct ieee80211_vif *vif,
  2377. struct ieee80211_sta *sta)
  2378. {
  2379. struct mwl8k_cmd_set_new_stn *cmd;
  2380. u32 rates;
  2381. int rc;
  2382. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2383. if (cmd == NULL)
  2384. return -ENOMEM;
  2385. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2386. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2387. cmd->aid = cpu_to_le16(sta->aid);
  2388. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  2389. cmd->stn_id = cpu_to_le16(sta->aid);
  2390. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  2391. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2392. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2393. else
  2394. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2395. cmd->legacy_rates = cpu_to_le32(rates);
  2396. if (sta->ht_cap.ht_supported) {
  2397. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  2398. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  2399. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  2400. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  2401. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  2402. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  2403. ((sta->ht_cap.ampdu_density & 7) << 2);
  2404. cmd->is_qos_sta = 1;
  2405. }
  2406. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2407. kfree(cmd);
  2408. return rc;
  2409. }
  2410. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  2411. struct ieee80211_vif *vif)
  2412. {
  2413. struct mwl8k_cmd_set_new_stn *cmd;
  2414. int rc;
  2415. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2416. if (cmd == NULL)
  2417. return -ENOMEM;
  2418. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2419. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2420. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  2421. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2422. kfree(cmd);
  2423. return rc;
  2424. }
  2425. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  2426. struct ieee80211_vif *vif, u8 *addr)
  2427. {
  2428. struct mwl8k_cmd_set_new_stn *cmd;
  2429. int rc;
  2430. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2431. if (cmd == NULL)
  2432. return -ENOMEM;
  2433. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2434. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2435. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  2436. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  2437. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2438. kfree(cmd);
  2439. return rc;
  2440. }
  2441. /*
  2442. * CMD_UPDATE_STADB.
  2443. */
  2444. struct ewc_ht_info {
  2445. __le16 control1;
  2446. __le16 control2;
  2447. __le16 control3;
  2448. } __attribute__((packed));
  2449. struct peer_capability_info {
  2450. /* Peer type - AP vs. STA. */
  2451. __u8 peer_type;
  2452. /* Basic 802.11 capabilities from assoc resp. */
  2453. __le16 basic_caps;
  2454. /* Set if peer supports 802.11n high throughput (HT). */
  2455. __u8 ht_support;
  2456. /* Valid if HT is supported. */
  2457. __le16 ht_caps;
  2458. __u8 extended_ht_caps;
  2459. struct ewc_ht_info ewc_info;
  2460. /* Legacy rate table. Intersection of our rates and peer rates. */
  2461. __u8 legacy_rates[12];
  2462. /* HT rate table. Intersection of our rates and peer rates. */
  2463. __u8 ht_rates[16];
  2464. __u8 pad[16];
  2465. /* If set, interoperability mode, no proprietary extensions. */
  2466. __u8 interop;
  2467. __u8 pad2;
  2468. __u8 station_id;
  2469. __le16 amsdu_enabled;
  2470. } __attribute__((packed));
  2471. struct mwl8k_cmd_update_stadb {
  2472. struct mwl8k_cmd_pkt header;
  2473. /* See STADB_ACTION_TYPE */
  2474. __le32 action;
  2475. /* Peer MAC address */
  2476. __u8 peer_addr[ETH_ALEN];
  2477. __le32 reserved;
  2478. /* Peer info - valid during add/update. */
  2479. struct peer_capability_info peer_info;
  2480. } __attribute__((packed));
  2481. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  2482. #define MWL8K_STA_DB_DEL_ENTRY 2
  2483. /* Peer Entry flags - used to define the type of the peer node */
  2484. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  2485. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  2486. struct ieee80211_vif *vif,
  2487. struct ieee80211_sta *sta)
  2488. {
  2489. struct mwl8k_cmd_update_stadb *cmd;
  2490. struct peer_capability_info *p;
  2491. u32 rates;
  2492. int rc;
  2493. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2494. if (cmd == NULL)
  2495. return -ENOMEM;
  2496. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2497. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2498. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  2499. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  2500. p = &cmd->peer_info;
  2501. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  2502. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  2503. p->ht_support = sta->ht_cap.ht_supported;
  2504. p->ht_caps = sta->ht_cap.cap;
  2505. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  2506. ((sta->ht_cap.ampdu_density & 7) << 2);
  2507. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2508. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2509. else
  2510. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2511. legacy_rate_mask_to_array(p->legacy_rates, rates);
  2512. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  2513. p->interop = 1;
  2514. p->amsdu_enabled = 0;
  2515. rc = mwl8k_post_cmd(hw, &cmd->header);
  2516. kfree(cmd);
  2517. return rc ? rc : p->station_id;
  2518. }
  2519. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  2520. struct ieee80211_vif *vif, u8 *addr)
  2521. {
  2522. struct mwl8k_cmd_update_stadb *cmd;
  2523. int rc;
  2524. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2525. if (cmd == NULL)
  2526. return -ENOMEM;
  2527. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2528. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2529. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  2530. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  2531. rc = mwl8k_post_cmd(hw, &cmd->header);
  2532. kfree(cmd);
  2533. return rc;
  2534. }
  2535. /*
  2536. * Interrupt handling.
  2537. */
  2538. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2539. {
  2540. struct ieee80211_hw *hw = dev_id;
  2541. struct mwl8k_priv *priv = hw->priv;
  2542. u32 status;
  2543. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2544. if (!status)
  2545. return IRQ_NONE;
  2546. if (status & MWL8K_A2H_INT_TX_DONE) {
  2547. status &= ~MWL8K_A2H_INT_TX_DONE;
  2548. tasklet_schedule(&priv->poll_tx_task);
  2549. }
  2550. if (status & MWL8K_A2H_INT_RX_READY) {
  2551. status &= ~MWL8K_A2H_INT_RX_READY;
  2552. tasklet_schedule(&priv->poll_rx_task);
  2553. }
  2554. if (status)
  2555. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2556. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2557. if (priv->hostcmd_wait != NULL)
  2558. complete(priv->hostcmd_wait);
  2559. }
  2560. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2561. if (!mutex_is_locked(&priv->fw_mutex) &&
  2562. priv->radio_on && priv->pending_tx_pkts)
  2563. mwl8k_tx_start(priv);
  2564. }
  2565. return IRQ_HANDLED;
  2566. }
  2567. static void mwl8k_tx_poll(unsigned long data)
  2568. {
  2569. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2570. struct mwl8k_priv *priv = hw->priv;
  2571. int limit;
  2572. int i;
  2573. limit = 32;
  2574. spin_lock_bh(&priv->tx_lock);
  2575. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2576. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  2577. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  2578. complete(priv->tx_wait);
  2579. priv->tx_wait = NULL;
  2580. }
  2581. spin_unlock_bh(&priv->tx_lock);
  2582. if (limit) {
  2583. writel(~MWL8K_A2H_INT_TX_DONE,
  2584. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2585. } else {
  2586. tasklet_schedule(&priv->poll_tx_task);
  2587. }
  2588. }
  2589. static void mwl8k_rx_poll(unsigned long data)
  2590. {
  2591. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2592. struct mwl8k_priv *priv = hw->priv;
  2593. int limit;
  2594. limit = 32;
  2595. limit -= rxq_process(hw, 0, limit);
  2596. limit -= rxq_refill(hw, 0, limit);
  2597. if (limit) {
  2598. writel(~MWL8K_A2H_INT_RX_READY,
  2599. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2600. } else {
  2601. tasklet_schedule(&priv->poll_rx_task);
  2602. }
  2603. }
  2604. /*
  2605. * Core driver operations.
  2606. */
  2607. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2608. {
  2609. struct mwl8k_priv *priv = hw->priv;
  2610. int index = skb_get_queue_mapping(skb);
  2611. int rc;
  2612. if (!priv->radio_on) {
  2613. printk(KERN_DEBUG "%s: dropped TX frame since radio "
  2614. "disabled\n", wiphy_name(hw->wiphy));
  2615. dev_kfree_skb(skb);
  2616. return NETDEV_TX_OK;
  2617. }
  2618. rc = mwl8k_txq_xmit(hw, index, skb);
  2619. return rc;
  2620. }
  2621. static int mwl8k_start(struct ieee80211_hw *hw)
  2622. {
  2623. struct mwl8k_priv *priv = hw->priv;
  2624. int rc;
  2625. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  2626. IRQF_SHARED, MWL8K_NAME, hw);
  2627. if (rc) {
  2628. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2629. wiphy_name(hw->wiphy));
  2630. return -EIO;
  2631. }
  2632. /* Enable TX reclaim and RX tasklets. */
  2633. tasklet_enable(&priv->poll_tx_task);
  2634. tasklet_enable(&priv->poll_rx_task);
  2635. /* Enable interrupts */
  2636. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2637. rc = mwl8k_fw_lock(hw);
  2638. if (!rc) {
  2639. rc = mwl8k_cmd_radio_enable(hw);
  2640. if (!priv->ap_fw) {
  2641. if (!rc)
  2642. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  2643. if (!rc)
  2644. rc = mwl8k_cmd_set_pre_scan(hw);
  2645. if (!rc)
  2646. rc = mwl8k_cmd_set_post_scan(hw,
  2647. "\x00\x00\x00\x00\x00\x00");
  2648. }
  2649. if (!rc)
  2650. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  2651. if (!rc)
  2652. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  2653. mwl8k_fw_unlock(hw);
  2654. }
  2655. if (rc) {
  2656. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2657. free_irq(priv->pdev->irq, hw);
  2658. tasklet_disable(&priv->poll_tx_task);
  2659. tasklet_disable(&priv->poll_rx_task);
  2660. }
  2661. return rc;
  2662. }
  2663. static void mwl8k_stop(struct ieee80211_hw *hw)
  2664. {
  2665. struct mwl8k_priv *priv = hw->priv;
  2666. int i;
  2667. mwl8k_cmd_radio_disable(hw);
  2668. ieee80211_stop_queues(hw);
  2669. /* Disable interrupts */
  2670. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2671. free_irq(priv->pdev->irq, hw);
  2672. /* Stop finalize join worker */
  2673. cancel_work_sync(&priv->finalize_join_worker);
  2674. if (priv->beacon_skb != NULL)
  2675. dev_kfree_skb(priv->beacon_skb);
  2676. /* Stop TX reclaim and RX tasklets. */
  2677. tasklet_disable(&priv->poll_tx_task);
  2678. tasklet_disable(&priv->poll_rx_task);
  2679. /* Return all skbs to mac80211 */
  2680. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2681. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  2682. }
  2683. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2684. struct ieee80211_vif *vif)
  2685. {
  2686. struct mwl8k_priv *priv = hw->priv;
  2687. struct mwl8k_vif *mwl8k_vif;
  2688. u32 macids_supported;
  2689. int macid;
  2690. /*
  2691. * Reject interface creation if sniffer mode is active, as
  2692. * STA operation is mutually exclusive with hardware sniffer
  2693. * mode. (Sniffer mode is only used on STA firmware.)
  2694. */
  2695. if (priv->sniffer_enabled) {
  2696. printk(KERN_INFO "%s: unable to create STA "
  2697. "interface due to sniffer mode being enabled\n",
  2698. wiphy_name(hw->wiphy));
  2699. return -EINVAL;
  2700. }
  2701. switch (vif->type) {
  2702. case NL80211_IFTYPE_AP:
  2703. macids_supported = priv->ap_macids_supported;
  2704. break;
  2705. case NL80211_IFTYPE_STATION:
  2706. macids_supported = priv->sta_macids_supported;
  2707. break;
  2708. default:
  2709. return -EINVAL;
  2710. }
  2711. macid = ffs(macids_supported & ~priv->macids_used);
  2712. if (!macid--)
  2713. return -EBUSY;
  2714. /* Setup driver private area. */
  2715. mwl8k_vif = MWL8K_VIF(vif);
  2716. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2717. mwl8k_vif->vif = vif;
  2718. mwl8k_vif->macid = macid;
  2719. mwl8k_vif->seqno = 0;
  2720. /* Set the mac address. */
  2721. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  2722. if (priv->ap_fw)
  2723. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  2724. priv->macids_used |= 1 << mwl8k_vif->macid;
  2725. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  2726. return 0;
  2727. }
  2728. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2729. struct ieee80211_vif *vif)
  2730. {
  2731. struct mwl8k_priv *priv = hw->priv;
  2732. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2733. if (priv->ap_fw)
  2734. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  2735. mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
  2736. priv->macids_used &= ~(1 << mwl8k_vif->macid);
  2737. list_del(&mwl8k_vif->list);
  2738. }
  2739. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2740. {
  2741. struct ieee80211_conf *conf = &hw->conf;
  2742. struct mwl8k_priv *priv = hw->priv;
  2743. int rc;
  2744. if (conf->flags & IEEE80211_CONF_IDLE) {
  2745. mwl8k_cmd_radio_disable(hw);
  2746. return 0;
  2747. }
  2748. rc = mwl8k_fw_lock(hw);
  2749. if (rc)
  2750. return rc;
  2751. rc = mwl8k_cmd_radio_enable(hw);
  2752. if (rc)
  2753. goto out;
  2754. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  2755. if (rc)
  2756. goto out;
  2757. if (conf->power_level > 18)
  2758. conf->power_level = 18;
  2759. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  2760. if (rc)
  2761. goto out;
  2762. if (priv->ap_fw) {
  2763. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
  2764. if (!rc)
  2765. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  2766. } else {
  2767. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  2768. }
  2769. out:
  2770. mwl8k_fw_unlock(hw);
  2771. return rc;
  2772. }
  2773. static void
  2774. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2775. struct ieee80211_bss_conf *info, u32 changed)
  2776. {
  2777. struct mwl8k_priv *priv = hw->priv;
  2778. u32 ap_legacy_rates;
  2779. u8 ap_mcs_rates[16];
  2780. int rc;
  2781. if (mwl8k_fw_lock(hw))
  2782. return;
  2783. /*
  2784. * No need to capture a beacon if we're no longer associated.
  2785. */
  2786. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  2787. priv->capture_beacon = false;
  2788. /*
  2789. * Get the AP's legacy and MCS rates.
  2790. */
  2791. if (vif->bss_conf.assoc) {
  2792. struct ieee80211_sta *ap;
  2793. rcu_read_lock();
  2794. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  2795. if (ap == NULL) {
  2796. rcu_read_unlock();
  2797. goto out;
  2798. }
  2799. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  2800. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  2801. } else {
  2802. ap_legacy_rates =
  2803. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2804. }
  2805. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  2806. rcu_read_unlock();
  2807. }
  2808. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  2809. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  2810. if (rc)
  2811. goto out;
  2812. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  2813. if (rc)
  2814. goto out;
  2815. }
  2816. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2817. rc = mwl8k_set_radio_preamble(hw,
  2818. vif->bss_conf.use_short_preamble);
  2819. if (rc)
  2820. goto out;
  2821. }
  2822. if (changed & BSS_CHANGED_ERP_SLOT) {
  2823. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  2824. if (rc)
  2825. goto out;
  2826. }
  2827. if (vif->bss_conf.assoc &&
  2828. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  2829. BSS_CHANGED_HT))) {
  2830. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  2831. if (rc)
  2832. goto out;
  2833. }
  2834. if (vif->bss_conf.assoc &&
  2835. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  2836. /*
  2837. * Finalize the join. Tell rx handler to process
  2838. * next beacon from our BSSID.
  2839. */
  2840. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  2841. priv->capture_beacon = true;
  2842. }
  2843. out:
  2844. mwl8k_fw_unlock(hw);
  2845. }
  2846. static void
  2847. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2848. struct ieee80211_bss_conf *info, u32 changed)
  2849. {
  2850. int rc;
  2851. if (mwl8k_fw_lock(hw))
  2852. return;
  2853. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2854. rc = mwl8k_set_radio_preamble(hw,
  2855. vif->bss_conf.use_short_preamble);
  2856. if (rc)
  2857. goto out;
  2858. }
  2859. if (changed & BSS_CHANGED_BASIC_RATES) {
  2860. int idx;
  2861. int rate;
  2862. /*
  2863. * Use lowest supported basic rate for multicasts
  2864. * and management frames (such as probe responses --
  2865. * beacons will always go out at 1 Mb/s).
  2866. */
  2867. idx = ffs(vif->bss_conf.basic_rates);
  2868. if (idx)
  2869. idx--;
  2870. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2871. rate = mwl8k_rates_24[idx].hw_value;
  2872. else
  2873. rate = mwl8k_rates_50[idx].hw_value;
  2874. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  2875. }
  2876. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  2877. struct sk_buff *skb;
  2878. skb = ieee80211_beacon_get(hw, vif);
  2879. if (skb != NULL) {
  2880. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  2881. kfree_skb(skb);
  2882. }
  2883. }
  2884. if (changed & BSS_CHANGED_BEACON_ENABLED)
  2885. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  2886. out:
  2887. mwl8k_fw_unlock(hw);
  2888. }
  2889. static void
  2890. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2891. struct ieee80211_bss_conf *info, u32 changed)
  2892. {
  2893. struct mwl8k_priv *priv = hw->priv;
  2894. if (!priv->ap_fw)
  2895. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  2896. else
  2897. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  2898. }
  2899. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  2900. int mc_count, struct dev_addr_list *mclist)
  2901. {
  2902. struct mwl8k_cmd_pkt *cmd;
  2903. /*
  2904. * Synthesize and return a command packet that programs the
  2905. * hardware multicast address filter. At this point we don't
  2906. * know whether FIF_ALLMULTI is being requested, but if it is,
  2907. * we'll end up throwing this packet away and creating a new
  2908. * one in mwl8k_configure_filter().
  2909. */
  2910. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
  2911. return (unsigned long)cmd;
  2912. }
  2913. static int
  2914. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  2915. unsigned int changed_flags,
  2916. unsigned int *total_flags)
  2917. {
  2918. struct mwl8k_priv *priv = hw->priv;
  2919. /*
  2920. * Hardware sniffer mode is mutually exclusive with STA
  2921. * operation, so refuse to enable sniffer mode if a STA
  2922. * interface is active.
  2923. */
  2924. if (!list_empty(&priv->vif_list)) {
  2925. if (net_ratelimit())
  2926. printk(KERN_INFO "%s: not enabling sniffer "
  2927. "mode because STA interface is active\n",
  2928. wiphy_name(hw->wiphy));
  2929. return 0;
  2930. }
  2931. if (!priv->sniffer_enabled) {
  2932. if (mwl8k_cmd_enable_sniffer(hw, 1))
  2933. return 0;
  2934. priv->sniffer_enabled = true;
  2935. }
  2936. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  2937. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  2938. FIF_OTHER_BSS;
  2939. return 1;
  2940. }
  2941. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  2942. {
  2943. if (!list_empty(&priv->vif_list))
  2944. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  2945. return NULL;
  2946. }
  2947. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2948. unsigned int changed_flags,
  2949. unsigned int *total_flags,
  2950. u64 multicast)
  2951. {
  2952. struct mwl8k_priv *priv = hw->priv;
  2953. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  2954. /*
  2955. * AP firmware doesn't allow fine-grained control over
  2956. * the receive filter.
  2957. */
  2958. if (priv->ap_fw) {
  2959. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2960. kfree(cmd);
  2961. return;
  2962. }
  2963. /*
  2964. * Enable hardware sniffer mode if FIF_CONTROL or
  2965. * FIF_OTHER_BSS is requested.
  2966. */
  2967. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  2968. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  2969. kfree(cmd);
  2970. return;
  2971. }
  2972. /* Clear unsupported feature flags */
  2973. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2974. if (mwl8k_fw_lock(hw)) {
  2975. kfree(cmd);
  2976. return;
  2977. }
  2978. if (priv->sniffer_enabled) {
  2979. mwl8k_cmd_enable_sniffer(hw, 0);
  2980. priv->sniffer_enabled = false;
  2981. }
  2982. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  2983. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  2984. /*
  2985. * Disable the BSS filter.
  2986. */
  2987. mwl8k_cmd_set_pre_scan(hw);
  2988. } else {
  2989. struct mwl8k_vif *mwl8k_vif;
  2990. const u8 *bssid;
  2991. /*
  2992. * Enable the BSS filter.
  2993. *
  2994. * If there is an active STA interface, use that
  2995. * interface's BSSID, otherwise use a dummy one
  2996. * (where the OUI part needs to be nonzero for
  2997. * the BSSID to be accepted by POST_SCAN).
  2998. */
  2999. mwl8k_vif = mwl8k_first_vif(priv);
  3000. if (mwl8k_vif != NULL)
  3001. bssid = mwl8k_vif->vif->bss_conf.bssid;
  3002. else
  3003. bssid = "\x01\x00\x00\x00\x00\x00";
  3004. mwl8k_cmd_set_post_scan(hw, bssid);
  3005. }
  3006. }
  3007. /*
  3008. * If FIF_ALLMULTI is being requested, throw away the command
  3009. * packet that ->prepare_multicast() built and replace it with
  3010. * a command packet that enables reception of all multicast
  3011. * packets.
  3012. */
  3013. if (*total_flags & FIF_ALLMULTI) {
  3014. kfree(cmd);
  3015. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
  3016. }
  3017. if (cmd != NULL) {
  3018. mwl8k_post_cmd(hw, cmd);
  3019. kfree(cmd);
  3020. }
  3021. mwl8k_fw_unlock(hw);
  3022. }
  3023. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  3024. {
  3025. return mwl8k_cmd_set_rts_threshold(hw, value);
  3026. }
  3027. struct mwl8k_sta_notify_item
  3028. {
  3029. struct list_head list;
  3030. struct ieee80211_vif *vif;
  3031. enum sta_notify_cmd cmd;
  3032. struct ieee80211_sta sta;
  3033. };
  3034. static void
  3035. mwl8k_do_sta_notify(struct ieee80211_hw *hw, struct mwl8k_sta_notify_item *s)
  3036. {
  3037. struct mwl8k_priv *priv = hw->priv;
  3038. /*
  3039. * STA firmware uses UPDATE_STADB, AP firmware uses SET_NEW_STN.
  3040. */
  3041. if (!priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
  3042. int rc;
  3043. rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta);
  3044. if (rc >= 0) {
  3045. struct ieee80211_sta *sta;
  3046. rcu_read_lock();
  3047. sta = ieee80211_find_sta(s->vif, s->sta.addr);
  3048. if (sta != NULL)
  3049. MWL8K_STA(sta)->peer_id = rc;
  3050. rcu_read_unlock();
  3051. }
  3052. } else if (!priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
  3053. mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr);
  3054. } else if (priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
  3055. mwl8k_cmd_set_new_stn_add(hw, s->vif, &s->sta);
  3056. } else if (priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
  3057. mwl8k_cmd_set_new_stn_del(hw, s->vif, s->sta.addr);
  3058. }
  3059. }
  3060. static void mwl8k_sta_notify_worker(struct work_struct *work)
  3061. {
  3062. struct mwl8k_priv *priv =
  3063. container_of(work, struct mwl8k_priv, sta_notify_worker);
  3064. struct ieee80211_hw *hw = priv->hw;
  3065. spin_lock_bh(&priv->sta_notify_list_lock);
  3066. while (!list_empty(&priv->sta_notify_list)) {
  3067. struct mwl8k_sta_notify_item *s;
  3068. s = list_entry(priv->sta_notify_list.next,
  3069. struct mwl8k_sta_notify_item, list);
  3070. list_del(&s->list);
  3071. spin_unlock_bh(&priv->sta_notify_list_lock);
  3072. mwl8k_do_sta_notify(hw, s);
  3073. kfree(s);
  3074. spin_lock_bh(&priv->sta_notify_list_lock);
  3075. }
  3076. spin_unlock_bh(&priv->sta_notify_list_lock);
  3077. }
  3078. static void
  3079. mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3080. enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
  3081. {
  3082. struct mwl8k_priv *priv = hw->priv;
  3083. struct mwl8k_sta_notify_item *s;
  3084. if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
  3085. return;
  3086. s = kmalloc(sizeof(*s), GFP_ATOMIC);
  3087. if (s != NULL) {
  3088. s->vif = vif;
  3089. s->cmd = cmd;
  3090. s->sta = *sta;
  3091. spin_lock(&priv->sta_notify_list_lock);
  3092. list_add_tail(&s->list, &priv->sta_notify_list);
  3093. spin_unlock(&priv->sta_notify_list_lock);
  3094. ieee80211_queue_work(hw, &priv->sta_notify_worker);
  3095. }
  3096. }
  3097. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  3098. const struct ieee80211_tx_queue_params *params)
  3099. {
  3100. struct mwl8k_priv *priv = hw->priv;
  3101. int rc;
  3102. rc = mwl8k_fw_lock(hw);
  3103. if (!rc) {
  3104. if (!priv->wmm_enabled)
  3105. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  3106. if (!rc)
  3107. rc = mwl8k_cmd_set_edca_params(hw, queue,
  3108. params->cw_min,
  3109. params->cw_max,
  3110. params->aifs,
  3111. params->txop);
  3112. mwl8k_fw_unlock(hw);
  3113. }
  3114. return rc;
  3115. }
  3116. static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
  3117. struct ieee80211_tx_queue_stats *stats)
  3118. {
  3119. struct mwl8k_priv *priv = hw->priv;
  3120. struct mwl8k_tx_queue *txq;
  3121. int index;
  3122. spin_lock_bh(&priv->tx_lock);
  3123. for (index = 0; index < MWL8K_TX_QUEUES; index++) {
  3124. txq = priv->txq + index;
  3125. memcpy(&stats[index], &txq->stats,
  3126. sizeof(struct ieee80211_tx_queue_stats));
  3127. }
  3128. spin_unlock_bh(&priv->tx_lock);
  3129. return 0;
  3130. }
  3131. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  3132. struct ieee80211_low_level_stats *stats)
  3133. {
  3134. return mwl8k_cmd_get_stat(hw, stats);
  3135. }
  3136. static int
  3137. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3138. enum ieee80211_ampdu_mlme_action action,
  3139. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  3140. {
  3141. switch (action) {
  3142. case IEEE80211_AMPDU_RX_START:
  3143. case IEEE80211_AMPDU_RX_STOP:
  3144. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  3145. return -ENOTSUPP;
  3146. return 0;
  3147. default:
  3148. return -ENOTSUPP;
  3149. }
  3150. }
  3151. static const struct ieee80211_ops mwl8k_ops = {
  3152. .tx = mwl8k_tx,
  3153. .start = mwl8k_start,
  3154. .stop = mwl8k_stop,
  3155. .add_interface = mwl8k_add_interface,
  3156. .remove_interface = mwl8k_remove_interface,
  3157. .config = mwl8k_config,
  3158. .bss_info_changed = mwl8k_bss_info_changed,
  3159. .prepare_multicast = mwl8k_prepare_multicast,
  3160. .configure_filter = mwl8k_configure_filter,
  3161. .set_rts_threshold = mwl8k_set_rts_threshold,
  3162. .sta_notify = mwl8k_sta_notify,
  3163. .conf_tx = mwl8k_conf_tx,
  3164. .get_tx_stats = mwl8k_get_tx_stats,
  3165. .get_stats = mwl8k_get_stats,
  3166. .ampdu_action = mwl8k_ampdu_action,
  3167. };
  3168. static void mwl8k_finalize_join_worker(struct work_struct *work)
  3169. {
  3170. struct mwl8k_priv *priv =
  3171. container_of(work, struct mwl8k_priv, finalize_join_worker);
  3172. struct sk_buff *skb = priv->beacon_skb;
  3173. struct mwl8k_vif *mwl8k_vif;
  3174. mwl8k_vif = mwl8k_first_vif(priv);
  3175. if (mwl8k_vif != NULL)
  3176. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
  3177. mwl8k_vif->vif->bss_conf.dtim_period);
  3178. dev_kfree_skb(skb);
  3179. priv->beacon_skb = NULL;
  3180. }
  3181. enum {
  3182. MWL8363 = 0,
  3183. MWL8687,
  3184. MWL8366,
  3185. };
  3186. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  3187. [MWL8363] = {
  3188. .part_name = "88w8363",
  3189. .helper_image = "mwl8k/helper_8363.fw",
  3190. .fw_image = "mwl8k/fmimage_8363.fw",
  3191. },
  3192. [MWL8687] = {
  3193. .part_name = "88w8687",
  3194. .helper_image = "mwl8k/helper_8687.fw",
  3195. .fw_image = "mwl8k/fmimage_8687.fw",
  3196. },
  3197. [MWL8366] = {
  3198. .part_name = "88w8366",
  3199. .helper_image = "mwl8k/helper_8366.fw",
  3200. .fw_image = "mwl8k/fmimage_8366.fw",
  3201. .ap_rxd_ops = &rxd_8366_ap_ops,
  3202. },
  3203. };
  3204. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  3205. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  3206. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  3207. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  3208. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  3209. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  3210. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  3211. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  3212. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  3213. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  3214. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  3215. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  3216. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  3217. { },
  3218. };
  3219. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  3220. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  3221. const struct pci_device_id *id)
  3222. {
  3223. static int printed_version = 0;
  3224. struct ieee80211_hw *hw;
  3225. struct mwl8k_priv *priv;
  3226. int rc;
  3227. int i;
  3228. if (!printed_version) {
  3229. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  3230. printed_version = 1;
  3231. }
  3232. rc = pci_enable_device(pdev);
  3233. if (rc) {
  3234. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  3235. MWL8K_NAME);
  3236. return rc;
  3237. }
  3238. rc = pci_request_regions(pdev, MWL8K_NAME);
  3239. if (rc) {
  3240. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  3241. MWL8K_NAME);
  3242. goto err_disable_device;
  3243. }
  3244. pci_set_master(pdev);
  3245. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  3246. if (hw == NULL) {
  3247. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  3248. rc = -ENOMEM;
  3249. goto err_free_reg;
  3250. }
  3251. SET_IEEE80211_DEV(hw, &pdev->dev);
  3252. pci_set_drvdata(pdev, hw);
  3253. priv = hw->priv;
  3254. priv->hw = hw;
  3255. priv->pdev = pdev;
  3256. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  3257. priv->sram = pci_iomap(pdev, 0, 0x10000);
  3258. if (priv->sram == NULL) {
  3259. printk(KERN_ERR "%s: Cannot map device SRAM\n",
  3260. wiphy_name(hw->wiphy));
  3261. goto err_iounmap;
  3262. }
  3263. /*
  3264. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  3265. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  3266. */
  3267. priv->regs = pci_iomap(pdev, 1, 0x10000);
  3268. if (priv->regs == NULL) {
  3269. priv->regs = pci_iomap(pdev, 2, 0x10000);
  3270. if (priv->regs == NULL) {
  3271. printk(KERN_ERR "%s: Cannot map device registers\n",
  3272. wiphy_name(hw->wiphy));
  3273. goto err_iounmap;
  3274. }
  3275. }
  3276. /* Reset firmware and hardware */
  3277. mwl8k_hw_reset(priv);
  3278. /* Ask userland hotplug daemon for the device firmware */
  3279. rc = mwl8k_request_firmware(priv);
  3280. if (rc) {
  3281. printk(KERN_ERR "%s: Firmware files not found\n",
  3282. wiphy_name(hw->wiphy));
  3283. goto err_stop_firmware;
  3284. }
  3285. /* Load firmware into hardware */
  3286. rc = mwl8k_load_firmware(hw);
  3287. if (rc) {
  3288. printk(KERN_ERR "%s: Cannot start firmware\n",
  3289. wiphy_name(hw->wiphy));
  3290. goto err_stop_firmware;
  3291. }
  3292. /* Reclaim memory once firmware is successfully loaded */
  3293. mwl8k_release_firmware(priv);
  3294. if (priv->ap_fw) {
  3295. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  3296. if (priv->rxd_ops == NULL) {
  3297. printk(KERN_ERR "%s: Driver does not have AP "
  3298. "firmware image support for this hardware\n",
  3299. wiphy_name(hw->wiphy));
  3300. goto err_stop_firmware;
  3301. }
  3302. } else {
  3303. priv->rxd_ops = &rxd_sta_ops;
  3304. }
  3305. priv->sniffer_enabled = false;
  3306. priv->wmm_enabled = false;
  3307. priv->pending_tx_pkts = 0;
  3308. /*
  3309. * Extra headroom is the size of the required DMA header
  3310. * minus the size of the smallest 802.11 frame (CTS frame).
  3311. */
  3312. hw->extra_tx_headroom =
  3313. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  3314. hw->channel_change_time = 10;
  3315. hw->queues = MWL8K_TX_QUEUES;
  3316. /* Set rssi and noise values to dBm */
  3317. hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
  3318. hw->vif_data_size = sizeof(struct mwl8k_vif);
  3319. hw->sta_data_size = sizeof(struct mwl8k_sta);
  3320. priv->macids_used = 0;
  3321. INIT_LIST_HEAD(&priv->vif_list);
  3322. /* Set default radio state and preamble */
  3323. priv->radio_on = 0;
  3324. priv->radio_short_preamble = 0;
  3325. /* Station database handling */
  3326. INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
  3327. spin_lock_init(&priv->sta_notify_list_lock);
  3328. INIT_LIST_HEAD(&priv->sta_notify_list);
  3329. /* Finalize join worker */
  3330. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  3331. /* TX reclaim and RX tasklets. */
  3332. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  3333. tasklet_disable(&priv->poll_tx_task);
  3334. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  3335. tasklet_disable(&priv->poll_rx_task);
  3336. /* Power management cookie */
  3337. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  3338. if (priv->cookie == NULL)
  3339. goto err_stop_firmware;
  3340. rc = mwl8k_rxq_init(hw, 0);
  3341. if (rc)
  3342. goto err_free_cookie;
  3343. rxq_refill(hw, 0, INT_MAX);
  3344. mutex_init(&priv->fw_mutex);
  3345. priv->fw_mutex_owner = NULL;
  3346. priv->fw_mutex_depth = 0;
  3347. priv->hostcmd_wait = NULL;
  3348. spin_lock_init(&priv->tx_lock);
  3349. priv->tx_wait = NULL;
  3350. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3351. rc = mwl8k_txq_init(hw, i);
  3352. if (rc)
  3353. goto err_free_queues;
  3354. }
  3355. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3356. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3357. iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
  3358. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  3359. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3360. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3361. IRQF_SHARED, MWL8K_NAME, hw);
  3362. if (rc) {
  3363. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  3364. wiphy_name(hw->wiphy));
  3365. goto err_free_queues;
  3366. }
  3367. /*
  3368. * Temporarily enable interrupts. Initial firmware host
  3369. * commands use interrupts and avoid polling. Disable
  3370. * interrupts when done.
  3371. */
  3372. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3373. /* Get config data, mac addrs etc */
  3374. if (priv->ap_fw) {
  3375. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  3376. if (!rc)
  3377. rc = mwl8k_cmd_set_hw_spec(hw);
  3378. } else {
  3379. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  3380. }
  3381. if (rc) {
  3382. printk(KERN_ERR "%s: Cannot initialise firmware\n",
  3383. wiphy_name(hw->wiphy));
  3384. goto err_free_irq;
  3385. }
  3386. hw->wiphy->interface_modes = 0;
  3387. if (priv->ap_macids_supported)
  3388. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  3389. if (priv->sta_macids_supported)
  3390. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  3391. /* Turn radio off */
  3392. rc = mwl8k_cmd_radio_disable(hw);
  3393. if (rc) {
  3394. printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
  3395. goto err_free_irq;
  3396. }
  3397. /* Clear MAC address */
  3398. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  3399. if (rc) {
  3400. printk(KERN_ERR "%s: Cannot clear MAC address\n",
  3401. wiphy_name(hw->wiphy));
  3402. goto err_free_irq;
  3403. }
  3404. /* Disable interrupts */
  3405. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3406. free_irq(priv->pdev->irq, hw);
  3407. rc = ieee80211_register_hw(hw);
  3408. if (rc) {
  3409. printk(KERN_ERR "%s: Cannot register device\n",
  3410. wiphy_name(hw->wiphy));
  3411. goto err_free_queues;
  3412. }
  3413. printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
  3414. wiphy_name(hw->wiphy), priv->device_info->part_name,
  3415. priv->hw_rev, hw->wiphy->perm_addr,
  3416. priv->ap_fw ? "AP" : "STA",
  3417. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  3418. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  3419. return 0;
  3420. err_free_irq:
  3421. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3422. free_irq(priv->pdev->irq, hw);
  3423. err_free_queues:
  3424. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3425. mwl8k_txq_deinit(hw, i);
  3426. mwl8k_rxq_deinit(hw, 0);
  3427. err_free_cookie:
  3428. if (priv->cookie != NULL)
  3429. pci_free_consistent(priv->pdev, 4,
  3430. priv->cookie, priv->cookie_dma);
  3431. err_stop_firmware:
  3432. mwl8k_hw_reset(priv);
  3433. mwl8k_release_firmware(priv);
  3434. err_iounmap:
  3435. if (priv->regs != NULL)
  3436. pci_iounmap(pdev, priv->regs);
  3437. if (priv->sram != NULL)
  3438. pci_iounmap(pdev, priv->sram);
  3439. pci_set_drvdata(pdev, NULL);
  3440. ieee80211_free_hw(hw);
  3441. err_free_reg:
  3442. pci_release_regions(pdev);
  3443. err_disable_device:
  3444. pci_disable_device(pdev);
  3445. return rc;
  3446. }
  3447. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3448. {
  3449. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3450. }
  3451. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3452. {
  3453. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3454. struct mwl8k_priv *priv;
  3455. int i;
  3456. if (hw == NULL)
  3457. return;
  3458. priv = hw->priv;
  3459. ieee80211_stop_queues(hw);
  3460. ieee80211_unregister_hw(hw);
  3461. /* Remove TX reclaim and RX tasklets. */
  3462. tasklet_kill(&priv->poll_tx_task);
  3463. tasklet_kill(&priv->poll_rx_task);
  3464. /* Stop hardware */
  3465. mwl8k_hw_reset(priv);
  3466. /* Return all skbs to mac80211 */
  3467. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3468. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3469. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3470. mwl8k_txq_deinit(hw, i);
  3471. mwl8k_rxq_deinit(hw, 0);
  3472. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  3473. pci_iounmap(pdev, priv->regs);
  3474. pci_iounmap(pdev, priv->sram);
  3475. pci_set_drvdata(pdev, NULL);
  3476. ieee80211_free_hw(hw);
  3477. pci_release_regions(pdev);
  3478. pci_disable_device(pdev);
  3479. }
  3480. static struct pci_driver mwl8k_driver = {
  3481. .name = MWL8K_NAME,
  3482. .id_table = mwl8k_pci_id_table,
  3483. .probe = mwl8k_probe,
  3484. .remove = __devexit_p(mwl8k_remove),
  3485. .shutdown = __devexit_p(mwl8k_shutdown),
  3486. };
  3487. static int __init mwl8k_init(void)
  3488. {
  3489. return pci_register_driver(&mwl8k_driver);
  3490. }
  3491. static void __exit mwl8k_exit(void)
  3492. {
  3493. pci_unregister_driver(&mwl8k_driver);
  3494. }
  3495. module_init(mwl8k_init);
  3496. module_exit(mwl8k_exit);
  3497. MODULE_DESCRIPTION(MWL8K_DESC);
  3498. MODULE_VERSION(MWL8K_VERSION);
  3499. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  3500. MODULE_LICENSE("GPL");