mmu.c 43 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "mmu.h"
  21. #include <linux/kvm_host.h>
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <linux/swap.h>
  28. #include <asm/page.h>
  29. #include <asm/cmpxchg.h>
  30. #include <asm/io.h>
  31. #undef MMU_DEBUG
  32. #undef AUDIT
  33. #ifdef AUDIT
  34. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  35. #else
  36. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  37. #endif
  38. #ifdef MMU_DEBUG
  39. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  40. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  41. #else
  42. #define pgprintk(x...) do { } while (0)
  43. #define rmap_printk(x...) do { } while (0)
  44. #endif
  45. #if defined(MMU_DEBUG) || defined(AUDIT)
  46. static int dbg = 1;
  47. #endif
  48. #ifndef MMU_DEBUG
  49. #define ASSERT(x) do { } while (0)
  50. #else
  51. #define ASSERT(x) \
  52. if (!(x)) { \
  53. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  54. __FILE__, __LINE__, #x); \
  55. }
  56. #endif
  57. #define PT64_PT_BITS 9
  58. #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  59. #define PT32_PT_BITS 10
  60. #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  61. #define PT_WRITABLE_SHIFT 1
  62. #define PT_PRESENT_MASK (1ULL << 0)
  63. #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  64. #define PT_USER_MASK (1ULL << 2)
  65. #define PT_PWT_MASK (1ULL << 3)
  66. #define PT_PCD_MASK (1ULL << 4)
  67. #define PT_ACCESSED_MASK (1ULL << 5)
  68. #define PT_DIRTY_MASK (1ULL << 6)
  69. #define PT_PAGE_SIZE_MASK (1ULL << 7)
  70. #define PT_PAT_MASK (1ULL << 7)
  71. #define PT_GLOBAL_MASK (1ULL << 8)
  72. #define PT64_NX_SHIFT 63
  73. #define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
  74. #define PT_PAT_SHIFT 7
  75. #define PT_DIR_PAT_SHIFT 12
  76. #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  77. #define PT32_DIR_PSE36_SIZE 4
  78. #define PT32_DIR_PSE36_SHIFT 13
  79. #define PT32_DIR_PSE36_MASK \
  80. (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  81. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  82. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  83. #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  84. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  85. #define PT64_LEVEL_BITS 9
  86. #define PT64_LEVEL_SHIFT(level) \
  87. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  88. #define PT64_LEVEL_MASK(level) \
  89. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  90. #define PT64_INDEX(address, level)\
  91. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  92. #define PT32_LEVEL_BITS 10
  93. #define PT32_LEVEL_SHIFT(level) \
  94. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  95. #define PT32_LEVEL_MASK(level) \
  96. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  97. #define PT32_INDEX(address, level)\
  98. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  99. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  100. #define PT64_DIR_BASE_ADDR_MASK \
  101. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  102. #define PT32_BASE_ADDR_MASK PAGE_MASK
  103. #define PT32_DIR_BASE_ADDR_MASK \
  104. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  105. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  106. | PT64_NX_MASK)
  107. #define PFERR_PRESENT_MASK (1U << 0)
  108. #define PFERR_WRITE_MASK (1U << 1)
  109. #define PFERR_USER_MASK (1U << 2)
  110. #define PFERR_FETCH_MASK (1U << 4)
  111. #define PT64_ROOT_LEVEL 4
  112. #define PT32_ROOT_LEVEL 2
  113. #define PT32E_ROOT_LEVEL 3
  114. #define PT_DIRECTORY_LEVEL 2
  115. #define PT_PAGE_TABLE_LEVEL 1
  116. #define RMAP_EXT 4
  117. #define ACC_EXEC_MASK 1
  118. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  119. #define ACC_USER_MASK PT_USER_MASK
  120. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  121. struct kvm_rmap_desc {
  122. u64 *shadow_ptes[RMAP_EXT];
  123. struct kvm_rmap_desc *more;
  124. };
  125. static struct kmem_cache *pte_chain_cache;
  126. static struct kmem_cache *rmap_desc_cache;
  127. static struct kmem_cache *mmu_page_header_cache;
  128. static u64 __read_mostly shadow_trap_nonpresent_pte;
  129. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  130. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  131. {
  132. shadow_trap_nonpresent_pte = trap_pte;
  133. shadow_notrap_nonpresent_pte = notrap_pte;
  134. }
  135. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  136. static int is_write_protection(struct kvm_vcpu *vcpu)
  137. {
  138. return vcpu->arch.cr0 & X86_CR0_WP;
  139. }
  140. static int is_cpuid_PSE36(void)
  141. {
  142. return 1;
  143. }
  144. static int is_nx(struct kvm_vcpu *vcpu)
  145. {
  146. return vcpu->arch.shadow_efer & EFER_NX;
  147. }
  148. static int is_present_pte(unsigned long pte)
  149. {
  150. return pte & PT_PRESENT_MASK;
  151. }
  152. static int is_shadow_present_pte(u64 pte)
  153. {
  154. pte &= ~PT_SHADOW_IO_MARK;
  155. return pte != shadow_trap_nonpresent_pte
  156. && pte != shadow_notrap_nonpresent_pte;
  157. }
  158. static int is_writeble_pte(unsigned long pte)
  159. {
  160. return pte & PT_WRITABLE_MASK;
  161. }
  162. static int is_dirty_pte(unsigned long pte)
  163. {
  164. return pte & PT_DIRTY_MASK;
  165. }
  166. static int is_io_pte(unsigned long pte)
  167. {
  168. return pte & PT_SHADOW_IO_MARK;
  169. }
  170. static int is_rmap_pte(u64 pte)
  171. {
  172. return pte != shadow_trap_nonpresent_pte
  173. && pte != shadow_notrap_nonpresent_pte;
  174. }
  175. static gfn_t pse36_gfn_delta(u32 gpte)
  176. {
  177. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  178. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  179. }
  180. static void set_shadow_pte(u64 *sptep, u64 spte)
  181. {
  182. #ifdef CONFIG_X86_64
  183. set_64bit((unsigned long *)sptep, spte);
  184. #else
  185. set_64bit((unsigned long long *)sptep, spte);
  186. #endif
  187. }
  188. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  189. struct kmem_cache *base_cache, int min)
  190. {
  191. void *obj;
  192. if (cache->nobjs >= min)
  193. return 0;
  194. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  195. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  196. if (!obj)
  197. return -ENOMEM;
  198. cache->objects[cache->nobjs++] = obj;
  199. }
  200. return 0;
  201. }
  202. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  203. {
  204. while (mc->nobjs)
  205. kfree(mc->objects[--mc->nobjs]);
  206. }
  207. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  208. int min)
  209. {
  210. struct page *page;
  211. if (cache->nobjs >= min)
  212. return 0;
  213. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  214. page = alloc_page(GFP_KERNEL);
  215. if (!page)
  216. return -ENOMEM;
  217. set_page_private(page, 0);
  218. cache->objects[cache->nobjs++] = page_address(page);
  219. }
  220. return 0;
  221. }
  222. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  223. {
  224. while (mc->nobjs)
  225. free_page((unsigned long)mc->objects[--mc->nobjs]);
  226. }
  227. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  228. {
  229. int r;
  230. kvm_mmu_free_some_pages(vcpu);
  231. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  232. pte_chain_cache, 4);
  233. if (r)
  234. goto out;
  235. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  236. rmap_desc_cache, 1);
  237. if (r)
  238. goto out;
  239. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  240. if (r)
  241. goto out;
  242. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  243. mmu_page_header_cache, 4);
  244. out:
  245. return r;
  246. }
  247. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  248. {
  249. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  250. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  251. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  252. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  253. }
  254. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  255. size_t size)
  256. {
  257. void *p;
  258. BUG_ON(!mc->nobjs);
  259. p = mc->objects[--mc->nobjs];
  260. memset(p, 0, size);
  261. return p;
  262. }
  263. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  264. {
  265. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  266. sizeof(struct kvm_pte_chain));
  267. }
  268. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  269. {
  270. kfree(pc);
  271. }
  272. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  273. {
  274. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  275. sizeof(struct kvm_rmap_desc));
  276. }
  277. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  278. {
  279. kfree(rd);
  280. }
  281. /*
  282. * Take gfn and return the reverse mapping to it.
  283. * Note: gfn must be unaliased before this function get called
  284. */
  285. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
  286. {
  287. struct kvm_memory_slot *slot;
  288. slot = gfn_to_memslot(kvm, gfn);
  289. return &slot->rmap[gfn - slot->base_gfn];
  290. }
  291. /*
  292. * Reverse mapping data structures:
  293. *
  294. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  295. * that points to page_address(page).
  296. *
  297. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  298. * containing more mappings.
  299. */
  300. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
  301. {
  302. struct kvm_mmu_page *sp;
  303. struct kvm_rmap_desc *desc;
  304. unsigned long *rmapp;
  305. int i;
  306. if (!is_rmap_pte(*spte))
  307. return;
  308. gfn = unalias_gfn(vcpu->kvm, gfn);
  309. sp = page_header(__pa(spte));
  310. sp->gfns[spte - sp->spt] = gfn;
  311. rmapp = gfn_to_rmap(vcpu->kvm, gfn);
  312. if (!*rmapp) {
  313. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  314. *rmapp = (unsigned long)spte;
  315. } else if (!(*rmapp & 1)) {
  316. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  317. desc = mmu_alloc_rmap_desc(vcpu);
  318. desc->shadow_ptes[0] = (u64 *)*rmapp;
  319. desc->shadow_ptes[1] = spte;
  320. *rmapp = (unsigned long)desc | 1;
  321. } else {
  322. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  323. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  324. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  325. desc = desc->more;
  326. if (desc->shadow_ptes[RMAP_EXT-1]) {
  327. desc->more = mmu_alloc_rmap_desc(vcpu);
  328. desc = desc->more;
  329. }
  330. for (i = 0; desc->shadow_ptes[i]; ++i)
  331. ;
  332. desc->shadow_ptes[i] = spte;
  333. }
  334. }
  335. static void rmap_desc_remove_entry(unsigned long *rmapp,
  336. struct kvm_rmap_desc *desc,
  337. int i,
  338. struct kvm_rmap_desc *prev_desc)
  339. {
  340. int j;
  341. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  342. ;
  343. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  344. desc->shadow_ptes[j] = NULL;
  345. if (j != 0)
  346. return;
  347. if (!prev_desc && !desc->more)
  348. *rmapp = (unsigned long)desc->shadow_ptes[0];
  349. else
  350. if (prev_desc)
  351. prev_desc->more = desc->more;
  352. else
  353. *rmapp = (unsigned long)desc->more | 1;
  354. mmu_free_rmap_desc(desc);
  355. }
  356. static void rmap_remove(struct kvm *kvm, u64 *spte)
  357. {
  358. struct kvm_rmap_desc *desc;
  359. struct kvm_rmap_desc *prev_desc;
  360. struct kvm_mmu_page *sp;
  361. struct page *page;
  362. unsigned long *rmapp;
  363. int i;
  364. if (!is_rmap_pte(*spte))
  365. return;
  366. sp = page_header(__pa(spte));
  367. page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  368. mark_page_accessed(page);
  369. if (is_writeble_pte(*spte))
  370. kvm_release_page_dirty(page);
  371. else
  372. kvm_release_page_clean(page);
  373. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt]);
  374. if (!*rmapp) {
  375. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  376. BUG();
  377. } else if (!(*rmapp & 1)) {
  378. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  379. if ((u64 *)*rmapp != spte) {
  380. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  381. spte, *spte);
  382. BUG();
  383. }
  384. *rmapp = 0;
  385. } else {
  386. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  387. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  388. prev_desc = NULL;
  389. while (desc) {
  390. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  391. if (desc->shadow_ptes[i] == spte) {
  392. rmap_desc_remove_entry(rmapp,
  393. desc, i,
  394. prev_desc);
  395. return;
  396. }
  397. prev_desc = desc;
  398. desc = desc->more;
  399. }
  400. BUG();
  401. }
  402. }
  403. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  404. {
  405. struct kvm_rmap_desc *desc;
  406. struct kvm_rmap_desc *prev_desc;
  407. u64 *prev_spte;
  408. int i;
  409. if (!*rmapp)
  410. return NULL;
  411. else if (!(*rmapp & 1)) {
  412. if (!spte)
  413. return (u64 *)*rmapp;
  414. return NULL;
  415. }
  416. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  417. prev_desc = NULL;
  418. prev_spte = NULL;
  419. while (desc) {
  420. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  421. if (prev_spte == spte)
  422. return desc->shadow_ptes[i];
  423. prev_spte = desc->shadow_ptes[i];
  424. }
  425. desc = desc->more;
  426. }
  427. return NULL;
  428. }
  429. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  430. {
  431. unsigned long *rmapp;
  432. u64 *spte;
  433. gfn = unalias_gfn(kvm, gfn);
  434. rmapp = gfn_to_rmap(kvm, gfn);
  435. spte = rmap_next(kvm, rmapp, NULL);
  436. while (spte) {
  437. BUG_ON(!spte);
  438. BUG_ON(!(*spte & PT_PRESENT_MASK));
  439. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  440. if (is_writeble_pte(*spte))
  441. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  442. kvm_flush_remote_tlbs(kvm);
  443. spte = rmap_next(kvm, rmapp, spte);
  444. }
  445. }
  446. #ifdef MMU_DEBUG
  447. static int is_empty_shadow_page(u64 *spt)
  448. {
  449. u64 *pos;
  450. u64 *end;
  451. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  452. if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
  453. printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
  454. pos, *pos);
  455. return 0;
  456. }
  457. return 1;
  458. }
  459. #endif
  460. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  461. {
  462. ASSERT(is_empty_shadow_page(sp->spt));
  463. list_del(&sp->link);
  464. __free_page(virt_to_page(sp->spt));
  465. __free_page(virt_to_page(sp->gfns));
  466. kfree(sp);
  467. ++kvm->arch.n_free_mmu_pages;
  468. }
  469. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  470. {
  471. return gfn;
  472. }
  473. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  474. u64 *parent_pte)
  475. {
  476. struct kvm_mmu_page *sp;
  477. if (!vcpu->kvm->arch.n_free_mmu_pages)
  478. return NULL;
  479. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  480. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  481. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  482. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  483. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  484. ASSERT(is_empty_shadow_page(sp->spt));
  485. sp->slot_bitmap = 0;
  486. sp->multimapped = 0;
  487. sp->parent_pte = parent_pte;
  488. --vcpu->kvm->arch.n_free_mmu_pages;
  489. return sp;
  490. }
  491. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  492. struct kvm_mmu_page *sp, u64 *parent_pte)
  493. {
  494. struct kvm_pte_chain *pte_chain;
  495. struct hlist_node *node;
  496. int i;
  497. if (!parent_pte)
  498. return;
  499. if (!sp->multimapped) {
  500. u64 *old = sp->parent_pte;
  501. if (!old) {
  502. sp->parent_pte = parent_pte;
  503. return;
  504. }
  505. sp->multimapped = 1;
  506. pte_chain = mmu_alloc_pte_chain(vcpu);
  507. INIT_HLIST_HEAD(&sp->parent_ptes);
  508. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  509. pte_chain->parent_ptes[0] = old;
  510. }
  511. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  512. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  513. continue;
  514. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  515. if (!pte_chain->parent_ptes[i]) {
  516. pte_chain->parent_ptes[i] = parent_pte;
  517. return;
  518. }
  519. }
  520. pte_chain = mmu_alloc_pte_chain(vcpu);
  521. BUG_ON(!pte_chain);
  522. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  523. pte_chain->parent_ptes[0] = parent_pte;
  524. }
  525. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  526. u64 *parent_pte)
  527. {
  528. struct kvm_pte_chain *pte_chain;
  529. struct hlist_node *node;
  530. int i;
  531. if (!sp->multimapped) {
  532. BUG_ON(sp->parent_pte != parent_pte);
  533. sp->parent_pte = NULL;
  534. return;
  535. }
  536. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  537. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  538. if (!pte_chain->parent_ptes[i])
  539. break;
  540. if (pte_chain->parent_ptes[i] != parent_pte)
  541. continue;
  542. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  543. && pte_chain->parent_ptes[i + 1]) {
  544. pte_chain->parent_ptes[i]
  545. = pte_chain->parent_ptes[i + 1];
  546. ++i;
  547. }
  548. pte_chain->parent_ptes[i] = NULL;
  549. if (i == 0) {
  550. hlist_del(&pte_chain->link);
  551. mmu_free_pte_chain(pte_chain);
  552. if (hlist_empty(&sp->parent_ptes)) {
  553. sp->multimapped = 0;
  554. sp->parent_pte = NULL;
  555. }
  556. }
  557. return;
  558. }
  559. BUG();
  560. }
  561. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  562. {
  563. unsigned index;
  564. struct hlist_head *bucket;
  565. struct kvm_mmu_page *sp;
  566. struct hlist_node *node;
  567. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  568. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  569. bucket = &kvm->arch.mmu_page_hash[index];
  570. hlist_for_each_entry(sp, node, bucket, hash_link)
  571. if (sp->gfn == gfn && !sp->role.metaphysical) {
  572. pgprintk("%s: found role %x\n",
  573. __FUNCTION__, sp->role.word);
  574. return sp;
  575. }
  576. return NULL;
  577. }
  578. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  579. gfn_t gfn,
  580. gva_t gaddr,
  581. unsigned level,
  582. int metaphysical,
  583. unsigned access,
  584. u64 *parent_pte,
  585. bool *new_page)
  586. {
  587. union kvm_mmu_page_role role;
  588. unsigned index;
  589. unsigned quadrant;
  590. struct hlist_head *bucket;
  591. struct kvm_mmu_page *sp;
  592. struct hlist_node *node;
  593. role.word = 0;
  594. role.glevels = vcpu->arch.mmu.root_level;
  595. role.level = level;
  596. role.metaphysical = metaphysical;
  597. role.access = access;
  598. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  599. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  600. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  601. role.quadrant = quadrant;
  602. }
  603. pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
  604. gfn, role.word);
  605. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  606. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  607. hlist_for_each_entry(sp, node, bucket, hash_link)
  608. if (sp->gfn == gfn && sp->role.word == role.word) {
  609. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  610. pgprintk("%s: found\n", __FUNCTION__);
  611. return sp;
  612. }
  613. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  614. if (!sp)
  615. return sp;
  616. pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
  617. sp->gfn = gfn;
  618. sp->role = role;
  619. hlist_add_head(&sp->hash_link, bucket);
  620. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  621. if (!metaphysical)
  622. rmap_write_protect(vcpu->kvm, gfn);
  623. if (new_page)
  624. *new_page = 1;
  625. return sp;
  626. }
  627. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  628. struct kvm_mmu_page *sp)
  629. {
  630. unsigned i;
  631. u64 *pt;
  632. u64 ent;
  633. pt = sp->spt;
  634. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  635. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  636. if (is_shadow_present_pte(pt[i]))
  637. rmap_remove(kvm, &pt[i]);
  638. pt[i] = shadow_trap_nonpresent_pte;
  639. }
  640. kvm_flush_remote_tlbs(kvm);
  641. return;
  642. }
  643. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  644. ent = pt[i];
  645. pt[i] = shadow_trap_nonpresent_pte;
  646. if (!is_shadow_present_pte(ent))
  647. continue;
  648. ent &= PT64_BASE_ADDR_MASK;
  649. mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
  650. }
  651. kvm_flush_remote_tlbs(kvm);
  652. }
  653. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  654. {
  655. mmu_page_remove_parent_pte(sp, parent_pte);
  656. }
  657. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  658. {
  659. int i;
  660. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  661. if (kvm->vcpus[i])
  662. kvm->vcpus[i]->arch.last_pte_updated = NULL;
  663. }
  664. static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  665. {
  666. u64 *parent_pte;
  667. ++kvm->stat.mmu_shadow_zapped;
  668. while (sp->multimapped || sp->parent_pte) {
  669. if (!sp->multimapped)
  670. parent_pte = sp->parent_pte;
  671. else {
  672. struct kvm_pte_chain *chain;
  673. chain = container_of(sp->parent_ptes.first,
  674. struct kvm_pte_chain, link);
  675. parent_pte = chain->parent_ptes[0];
  676. }
  677. BUG_ON(!parent_pte);
  678. kvm_mmu_put_page(sp, parent_pte);
  679. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  680. }
  681. kvm_mmu_page_unlink_children(kvm, sp);
  682. if (!sp->root_count) {
  683. hlist_del(&sp->hash_link);
  684. kvm_mmu_free_page(kvm, sp);
  685. } else
  686. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  687. kvm_mmu_reset_last_pte_updated(kvm);
  688. }
  689. /*
  690. * Changing the number of mmu pages allocated to the vm
  691. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  692. */
  693. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  694. {
  695. /*
  696. * If we set the number of mmu pages to be smaller be than the
  697. * number of actived pages , we must to free some mmu pages before we
  698. * change the value
  699. */
  700. if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
  701. kvm_nr_mmu_pages) {
  702. int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
  703. - kvm->arch.n_free_mmu_pages;
  704. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  705. struct kvm_mmu_page *page;
  706. page = container_of(kvm->arch.active_mmu_pages.prev,
  707. struct kvm_mmu_page, link);
  708. kvm_mmu_zap_page(kvm, page);
  709. n_used_mmu_pages--;
  710. }
  711. kvm->arch.n_free_mmu_pages = 0;
  712. }
  713. else
  714. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  715. - kvm->arch.n_alloc_mmu_pages;
  716. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  717. }
  718. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  719. {
  720. unsigned index;
  721. struct hlist_head *bucket;
  722. struct kvm_mmu_page *sp;
  723. struct hlist_node *node, *n;
  724. int r;
  725. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  726. r = 0;
  727. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  728. bucket = &kvm->arch.mmu_page_hash[index];
  729. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  730. if (sp->gfn == gfn && !sp->role.metaphysical) {
  731. pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
  732. sp->role.word);
  733. kvm_mmu_zap_page(kvm, sp);
  734. r = 1;
  735. }
  736. return r;
  737. }
  738. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  739. {
  740. struct kvm_mmu_page *sp;
  741. while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  742. pgprintk("%s: zap %lx %x\n", __FUNCTION__, gfn, sp->role.word);
  743. kvm_mmu_zap_page(kvm, sp);
  744. }
  745. }
  746. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  747. {
  748. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  749. struct kvm_mmu_page *sp = page_header(__pa(pte));
  750. __set_bit(slot, &sp->slot_bitmap);
  751. }
  752. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  753. {
  754. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  755. if (gpa == UNMAPPED_GVA)
  756. return NULL;
  757. return gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  758. }
  759. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  760. unsigned pt_access, unsigned pte_access,
  761. int user_fault, int write_fault, int dirty,
  762. int *ptwrite, gfn_t gfn)
  763. {
  764. u64 spte;
  765. int was_rmapped = is_rmap_pte(*shadow_pte);
  766. struct page *page;
  767. pgprintk("%s: spte %llx access %x write_fault %d"
  768. " user_fault %d gfn %lx\n",
  769. __FUNCTION__, *shadow_pte, pt_access,
  770. write_fault, user_fault, gfn);
  771. /*
  772. * We don't set the accessed bit, since we sometimes want to see
  773. * whether the guest actually used the pte (in order to detect
  774. * demand paging).
  775. */
  776. spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
  777. if (!dirty)
  778. pte_access &= ~ACC_WRITE_MASK;
  779. if (!(pte_access & ACC_EXEC_MASK))
  780. spte |= PT64_NX_MASK;
  781. page = gfn_to_page(vcpu->kvm, gfn);
  782. spte |= PT_PRESENT_MASK;
  783. if (pte_access & ACC_USER_MASK)
  784. spte |= PT_USER_MASK;
  785. if (is_error_page(page)) {
  786. set_shadow_pte(shadow_pte,
  787. shadow_trap_nonpresent_pte | PT_SHADOW_IO_MARK);
  788. kvm_release_page_clean(page);
  789. return;
  790. }
  791. spte |= page_to_phys(page);
  792. if ((pte_access & ACC_WRITE_MASK)
  793. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  794. struct kvm_mmu_page *shadow;
  795. spte |= PT_WRITABLE_MASK;
  796. if (user_fault) {
  797. mmu_unshadow(vcpu->kvm, gfn);
  798. goto unshadowed;
  799. }
  800. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  801. if (shadow) {
  802. pgprintk("%s: found shadow page for %lx, marking ro\n",
  803. __FUNCTION__, gfn);
  804. pte_access &= ~ACC_WRITE_MASK;
  805. if (is_writeble_pte(spte)) {
  806. spte &= ~PT_WRITABLE_MASK;
  807. kvm_x86_ops->tlb_flush(vcpu);
  808. }
  809. if (write_fault)
  810. *ptwrite = 1;
  811. }
  812. }
  813. unshadowed:
  814. if (pte_access & ACC_WRITE_MASK)
  815. mark_page_dirty(vcpu->kvm, gfn);
  816. pgprintk("%s: setting spte %llx\n", __FUNCTION__, spte);
  817. set_shadow_pte(shadow_pte, spte);
  818. page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
  819. if (!was_rmapped) {
  820. rmap_add(vcpu, shadow_pte, gfn);
  821. if (!is_rmap_pte(*shadow_pte))
  822. kvm_release_page_clean(page);
  823. }
  824. else
  825. kvm_release_page_clean(page);
  826. if (!ptwrite || !*ptwrite)
  827. vcpu->arch.last_pte_updated = shadow_pte;
  828. }
  829. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  830. {
  831. }
  832. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  833. {
  834. int level = PT32E_ROOT_LEVEL;
  835. hpa_t table_addr = vcpu->arch.mmu.root_hpa;
  836. int pt_write = 0;
  837. for (; ; level--) {
  838. u32 index = PT64_INDEX(v, level);
  839. u64 *table;
  840. ASSERT(VALID_PAGE(table_addr));
  841. table = __va(table_addr);
  842. if (level == 1) {
  843. mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
  844. 0, write, 1, &pt_write, gfn);
  845. return pt_write || is_io_pte(table[index]);
  846. }
  847. if (table[index] == shadow_trap_nonpresent_pte) {
  848. struct kvm_mmu_page *new_table;
  849. gfn_t pseudo_gfn;
  850. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  851. >> PAGE_SHIFT;
  852. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  853. v, level - 1,
  854. 1, ACC_ALL, &table[index],
  855. NULL);
  856. if (!new_table) {
  857. pgprintk("nonpaging_map: ENOMEM\n");
  858. return -ENOMEM;
  859. }
  860. table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
  861. | PT_WRITABLE_MASK | PT_USER_MASK;
  862. }
  863. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  864. }
  865. }
  866. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  867. struct kvm_mmu_page *sp)
  868. {
  869. int i;
  870. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  871. sp->spt[i] = shadow_trap_nonpresent_pte;
  872. }
  873. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  874. {
  875. int i;
  876. struct kvm_mmu_page *sp;
  877. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  878. return;
  879. #ifdef CONFIG_X86_64
  880. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  881. hpa_t root = vcpu->arch.mmu.root_hpa;
  882. sp = page_header(root);
  883. --sp->root_count;
  884. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  885. return;
  886. }
  887. #endif
  888. for (i = 0; i < 4; ++i) {
  889. hpa_t root = vcpu->arch.mmu.pae_root[i];
  890. if (root) {
  891. root &= PT64_BASE_ADDR_MASK;
  892. sp = page_header(root);
  893. --sp->root_count;
  894. }
  895. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  896. }
  897. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  898. }
  899. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  900. {
  901. int i;
  902. gfn_t root_gfn;
  903. struct kvm_mmu_page *sp;
  904. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  905. #ifdef CONFIG_X86_64
  906. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  907. hpa_t root = vcpu->arch.mmu.root_hpa;
  908. ASSERT(!VALID_PAGE(root));
  909. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  910. PT64_ROOT_LEVEL, 0, ACC_ALL, NULL, NULL);
  911. root = __pa(sp->spt);
  912. ++sp->root_count;
  913. vcpu->arch.mmu.root_hpa = root;
  914. return;
  915. }
  916. #endif
  917. for (i = 0; i < 4; ++i) {
  918. hpa_t root = vcpu->arch.mmu.pae_root[i];
  919. ASSERT(!VALID_PAGE(root));
  920. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  921. if (!is_present_pte(vcpu->arch.pdptrs[i])) {
  922. vcpu->arch.mmu.pae_root[i] = 0;
  923. continue;
  924. }
  925. root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
  926. } else if (vcpu->arch.mmu.root_level == 0)
  927. root_gfn = 0;
  928. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  929. PT32_ROOT_LEVEL, !is_paging(vcpu),
  930. ACC_ALL, NULL, NULL);
  931. root = __pa(sp->spt);
  932. ++sp->root_count;
  933. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  934. }
  935. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  936. }
  937. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  938. {
  939. return vaddr;
  940. }
  941. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  942. u32 error_code)
  943. {
  944. gfn_t gfn;
  945. int r;
  946. pgprintk("%s: gva %lx error %x\n", __FUNCTION__, gva, error_code);
  947. r = mmu_topup_memory_caches(vcpu);
  948. if (r)
  949. return r;
  950. ASSERT(vcpu);
  951. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  952. gfn = gva >> PAGE_SHIFT;
  953. return nonpaging_map(vcpu, gva & PAGE_MASK,
  954. error_code & PFERR_WRITE_MASK, gfn);
  955. }
  956. static void nonpaging_free(struct kvm_vcpu *vcpu)
  957. {
  958. mmu_free_roots(vcpu);
  959. }
  960. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  961. {
  962. struct kvm_mmu *context = &vcpu->arch.mmu;
  963. context->new_cr3 = nonpaging_new_cr3;
  964. context->page_fault = nonpaging_page_fault;
  965. context->gva_to_gpa = nonpaging_gva_to_gpa;
  966. context->free = nonpaging_free;
  967. context->prefetch_page = nonpaging_prefetch_page;
  968. context->root_level = 0;
  969. context->shadow_root_level = PT32E_ROOT_LEVEL;
  970. context->root_hpa = INVALID_PAGE;
  971. return 0;
  972. }
  973. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  974. {
  975. ++vcpu->stat.tlb_flush;
  976. kvm_x86_ops->tlb_flush(vcpu);
  977. }
  978. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  979. {
  980. pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
  981. mmu_free_roots(vcpu);
  982. }
  983. static void inject_page_fault(struct kvm_vcpu *vcpu,
  984. u64 addr,
  985. u32 err_code)
  986. {
  987. kvm_inject_page_fault(vcpu, addr, err_code);
  988. }
  989. static void paging_free(struct kvm_vcpu *vcpu)
  990. {
  991. nonpaging_free(vcpu);
  992. }
  993. #define PTTYPE 64
  994. #include "paging_tmpl.h"
  995. #undef PTTYPE
  996. #define PTTYPE 32
  997. #include "paging_tmpl.h"
  998. #undef PTTYPE
  999. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1000. {
  1001. struct kvm_mmu *context = &vcpu->arch.mmu;
  1002. ASSERT(is_pae(vcpu));
  1003. context->new_cr3 = paging_new_cr3;
  1004. context->page_fault = paging64_page_fault;
  1005. context->gva_to_gpa = paging64_gva_to_gpa;
  1006. context->prefetch_page = paging64_prefetch_page;
  1007. context->free = paging_free;
  1008. context->root_level = level;
  1009. context->shadow_root_level = level;
  1010. context->root_hpa = INVALID_PAGE;
  1011. return 0;
  1012. }
  1013. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1014. {
  1015. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1016. }
  1017. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1018. {
  1019. struct kvm_mmu *context = &vcpu->arch.mmu;
  1020. context->new_cr3 = paging_new_cr3;
  1021. context->page_fault = paging32_page_fault;
  1022. context->gva_to_gpa = paging32_gva_to_gpa;
  1023. context->free = paging_free;
  1024. context->prefetch_page = paging32_prefetch_page;
  1025. context->root_level = PT32_ROOT_LEVEL;
  1026. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1027. context->root_hpa = INVALID_PAGE;
  1028. return 0;
  1029. }
  1030. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1031. {
  1032. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1033. }
  1034. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1035. {
  1036. ASSERT(vcpu);
  1037. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1038. if (!is_paging(vcpu))
  1039. return nonpaging_init_context(vcpu);
  1040. else if (is_long_mode(vcpu))
  1041. return paging64_init_context(vcpu);
  1042. else if (is_pae(vcpu))
  1043. return paging32E_init_context(vcpu);
  1044. else
  1045. return paging32_init_context(vcpu);
  1046. }
  1047. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1048. {
  1049. ASSERT(vcpu);
  1050. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1051. vcpu->arch.mmu.free(vcpu);
  1052. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1053. }
  1054. }
  1055. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1056. {
  1057. destroy_kvm_mmu(vcpu);
  1058. return init_kvm_mmu(vcpu);
  1059. }
  1060. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1061. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1062. {
  1063. int r;
  1064. mutex_lock(&vcpu->kvm->lock);
  1065. r = mmu_topup_memory_caches(vcpu);
  1066. if (r)
  1067. goto out;
  1068. mmu_alloc_roots(vcpu);
  1069. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  1070. kvm_mmu_flush_tlb(vcpu);
  1071. out:
  1072. mutex_unlock(&vcpu->kvm->lock);
  1073. return r;
  1074. }
  1075. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1076. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1077. {
  1078. mmu_free_roots(vcpu);
  1079. }
  1080. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1081. struct kvm_mmu_page *sp,
  1082. u64 *spte)
  1083. {
  1084. u64 pte;
  1085. struct kvm_mmu_page *child;
  1086. pte = *spte;
  1087. if (is_shadow_present_pte(pte)) {
  1088. if (sp->role.level == PT_PAGE_TABLE_LEVEL)
  1089. rmap_remove(vcpu->kvm, spte);
  1090. else {
  1091. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1092. mmu_page_remove_parent_pte(child, spte);
  1093. }
  1094. }
  1095. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1096. }
  1097. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1098. struct kvm_mmu_page *sp,
  1099. u64 *spte,
  1100. const void *new, int bytes,
  1101. int offset_in_pte)
  1102. {
  1103. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  1104. ++vcpu->kvm->stat.mmu_pde_zapped;
  1105. return;
  1106. }
  1107. ++vcpu->kvm->stat.mmu_pte_updated;
  1108. if (sp->role.glevels == PT32_ROOT_LEVEL)
  1109. paging32_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
  1110. else
  1111. paging64_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
  1112. }
  1113. static bool need_remote_flush(u64 old, u64 new)
  1114. {
  1115. if (!is_shadow_present_pte(old))
  1116. return false;
  1117. if (!is_shadow_present_pte(new))
  1118. return true;
  1119. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  1120. return true;
  1121. old ^= PT64_NX_MASK;
  1122. new ^= PT64_NX_MASK;
  1123. return (old & ~new & PT64_PERM_MASK) != 0;
  1124. }
  1125. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  1126. {
  1127. if (need_remote_flush(old, new))
  1128. kvm_flush_remote_tlbs(vcpu->kvm);
  1129. else
  1130. kvm_mmu_flush_tlb(vcpu);
  1131. }
  1132. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  1133. {
  1134. u64 *spte = vcpu->arch.last_pte_updated;
  1135. return !!(spte && (*spte & PT_ACCESSED_MASK));
  1136. }
  1137. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1138. const u8 *new, int bytes)
  1139. {
  1140. gfn_t gfn = gpa >> PAGE_SHIFT;
  1141. struct kvm_mmu_page *sp;
  1142. struct hlist_node *node, *n;
  1143. struct hlist_head *bucket;
  1144. unsigned index;
  1145. u64 entry;
  1146. u64 *spte;
  1147. unsigned offset = offset_in_page(gpa);
  1148. unsigned pte_size;
  1149. unsigned page_offset;
  1150. unsigned misaligned;
  1151. unsigned quadrant;
  1152. int level;
  1153. int flooded = 0;
  1154. int npte;
  1155. pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
  1156. ++vcpu->kvm->stat.mmu_pte_write;
  1157. kvm_mmu_audit(vcpu, "pre pte write");
  1158. if (gfn == vcpu->arch.last_pt_write_gfn
  1159. && !last_updated_pte_accessed(vcpu)) {
  1160. ++vcpu->arch.last_pt_write_count;
  1161. if (vcpu->arch.last_pt_write_count >= 3)
  1162. flooded = 1;
  1163. } else {
  1164. vcpu->arch.last_pt_write_gfn = gfn;
  1165. vcpu->arch.last_pt_write_count = 1;
  1166. vcpu->arch.last_pte_updated = NULL;
  1167. }
  1168. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  1169. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1170. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  1171. if (sp->gfn != gfn || sp->role.metaphysical)
  1172. continue;
  1173. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  1174. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  1175. misaligned |= bytes < 4;
  1176. if (misaligned || flooded) {
  1177. /*
  1178. * Misaligned accesses are too much trouble to fix
  1179. * up; also, they usually indicate a page is not used
  1180. * as a page table.
  1181. *
  1182. * If we're seeing too many writes to a page,
  1183. * it may no longer be a page table, or we may be
  1184. * forking, in which case it is better to unmap the
  1185. * page.
  1186. */
  1187. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  1188. gpa, bytes, sp->role.word);
  1189. kvm_mmu_zap_page(vcpu->kvm, sp);
  1190. ++vcpu->kvm->stat.mmu_flooded;
  1191. continue;
  1192. }
  1193. page_offset = offset;
  1194. level = sp->role.level;
  1195. npte = 1;
  1196. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  1197. page_offset <<= 1; /* 32->64 */
  1198. /*
  1199. * A 32-bit pde maps 4MB while the shadow pdes map
  1200. * only 2MB. So we need to double the offset again
  1201. * and zap two pdes instead of one.
  1202. */
  1203. if (level == PT32_ROOT_LEVEL) {
  1204. page_offset &= ~7; /* kill rounding error */
  1205. page_offset <<= 1;
  1206. npte = 2;
  1207. }
  1208. quadrant = page_offset >> PAGE_SHIFT;
  1209. page_offset &= ~PAGE_MASK;
  1210. if (quadrant != sp->role.quadrant)
  1211. continue;
  1212. }
  1213. spte = &sp->spt[page_offset / sizeof(*spte)];
  1214. while (npte--) {
  1215. entry = *spte;
  1216. mmu_pte_write_zap_pte(vcpu, sp, spte);
  1217. mmu_pte_write_new_pte(vcpu, sp, spte, new, bytes,
  1218. page_offset & (pte_size - 1));
  1219. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  1220. ++spte;
  1221. }
  1222. }
  1223. kvm_mmu_audit(vcpu, "post pte write");
  1224. }
  1225. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1226. {
  1227. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1228. return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1229. }
  1230. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1231. {
  1232. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  1233. struct kvm_mmu_page *sp;
  1234. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  1235. struct kvm_mmu_page, link);
  1236. kvm_mmu_zap_page(vcpu->kvm, sp);
  1237. ++vcpu->kvm->stat.mmu_recycled;
  1238. }
  1239. }
  1240. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  1241. {
  1242. int r;
  1243. enum emulation_result er;
  1244. mutex_lock(&vcpu->kvm->lock);
  1245. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  1246. if (r < 0)
  1247. goto out;
  1248. if (!r) {
  1249. r = 1;
  1250. goto out;
  1251. }
  1252. r = mmu_topup_memory_caches(vcpu);
  1253. if (r)
  1254. goto out;
  1255. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  1256. mutex_unlock(&vcpu->kvm->lock);
  1257. switch (er) {
  1258. case EMULATE_DONE:
  1259. return 1;
  1260. case EMULATE_DO_MMIO:
  1261. ++vcpu->stat.mmio_exits;
  1262. return 0;
  1263. case EMULATE_FAIL:
  1264. kvm_report_emulation_failure(vcpu, "pagetable");
  1265. return 1;
  1266. default:
  1267. BUG();
  1268. }
  1269. out:
  1270. mutex_unlock(&vcpu->kvm->lock);
  1271. return r;
  1272. }
  1273. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  1274. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1275. {
  1276. struct kvm_mmu_page *sp;
  1277. while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
  1278. sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
  1279. struct kvm_mmu_page, link);
  1280. kvm_mmu_zap_page(vcpu->kvm, sp);
  1281. }
  1282. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  1283. }
  1284. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1285. {
  1286. struct page *page;
  1287. int i;
  1288. ASSERT(vcpu);
  1289. if (vcpu->kvm->arch.n_requested_mmu_pages)
  1290. vcpu->kvm->arch.n_free_mmu_pages =
  1291. vcpu->kvm->arch.n_requested_mmu_pages;
  1292. else
  1293. vcpu->kvm->arch.n_free_mmu_pages =
  1294. vcpu->kvm->arch.n_alloc_mmu_pages;
  1295. /*
  1296. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1297. * Therefore we need to allocate shadow page tables in the first
  1298. * 4GB of memory, which happens to fit the DMA32 zone.
  1299. */
  1300. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1301. if (!page)
  1302. goto error_1;
  1303. vcpu->arch.mmu.pae_root = page_address(page);
  1304. for (i = 0; i < 4; ++i)
  1305. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1306. return 0;
  1307. error_1:
  1308. free_mmu_pages(vcpu);
  1309. return -ENOMEM;
  1310. }
  1311. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1312. {
  1313. ASSERT(vcpu);
  1314. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1315. return alloc_mmu_pages(vcpu);
  1316. }
  1317. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1318. {
  1319. ASSERT(vcpu);
  1320. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1321. return init_kvm_mmu(vcpu);
  1322. }
  1323. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1324. {
  1325. ASSERT(vcpu);
  1326. destroy_kvm_mmu(vcpu);
  1327. free_mmu_pages(vcpu);
  1328. mmu_free_memory_caches(vcpu);
  1329. }
  1330. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  1331. {
  1332. struct kvm_mmu_page *sp;
  1333. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  1334. int i;
  1335. u64 *pt;
  1336. if (!test_bit(slot, &sp->slot_bitmap))
  1337. continue;
  1338. pt = sp->spt;
  1339. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1340. /* avoid RMW */
  1341. if (pt[i] & PT_WRITABLE_MASK)
  1342. pt[i] &= ~PT_WRITABLE_MASK;
  1343. }
  1344. }
  1345. void kvm_mmu_zap_all(struct kvm *kvm)
  1346. {
  1347. struct kvm_mmu_page *sp, *node;
  1348. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  1349. kvm_mmu_zap_page(kvm, sp);
  1350. kvm_flush_remote_tlbs(kvm);
  1351. }
  1352. void kvm_mmu_module_exit(void)
  1353. {
  1354. if (pte_chain_cache)
  1355. kmem_cache_destroy(pte_chain_cache);
  1356. if (rmap_desc_cache)
  1357. kmem_cache_destroy(rmap_desc_cache);
  1358. if (mmu_page_header_cache)
  1359. kmem_cache_destroy(mmu_page_header_cache);
  1360. }
  1361. int kvm_mmu_module_init(void)
  1362. {
  1363. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1364. sizeof(struct kvm_pte_chain),
  1365. 0, 0, NULL);
  1366. if (!pte_chain_cache)
  1367. goto nomem;
  1368. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1369. sizeof(struct kvm_rmap_desc),
  1370. 0, 0, NULL);
  1371. if (!rmap_desc_cache)
  1372. goto nomem;
  1373. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1374. sizeof(struct kvm_mmu_page),
  1375. 0, 0, NULL);
  1376. if (!mmu_page_header_cache)
  1377. goto nomem;
  1378. return 0;
  1379. nomem:
  1380. kvm_mmu_module_exit();
  1381. return -ENOMEM;
  1382. }
  1383. /*
  1384. * Caculate mmu pages needed for kvm.
  1385. */
  1386. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  1387. {
  1388. int i;
  1389. unsigned int nr_mmu_pages;
  1390. unsigned int nr_pages = 0;
  1391. for (i = 0; i < kvm->nmemslots; i++)
  1392. nr_pages += kvm->memslots[i].npages;
  1393. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  1394. nr_mmu_pages = max(nr_mmu_pages,
  1395. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  1396. return nr_mmu_pages;
  1397. }
  1398. #ifdef AUDIT
  1399. static const char *audit_msg;
  1400. static gva_t canonicalize(gva_t gva)
  1401. {
  1402. #ifdef CONFIG_X86_64
  1403. gva = (long long)(gva << 16) >> 16;
  1404. #endif
  1405. return gva;
  1406. }
  1407. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1408. gva_t va, int level)
  1409. {
  1410. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1411. int i;
  1412. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1413. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1414. u64 ent = pt[i];
  1415. if (ent == shadow_trap_nonpresent_pte)
  1416. continue;
  1417. va = canonicalize(va);
  1418. if (level > 1) {
  1419. if (ent == shadow_notrap_nonpresent_pte)
  1420. printk(KERN_ERR "audit: (%s) nontrapping pte"
  1421. " in nonleaf level: levels %d gva %lx"
  1422. " level %d pte %llx\n", audit_msg,
  1423. vcpu->arch.mmu.root_level, va, level, ent);
  1424. audit_mappings_page(vcpu, ent, va, level - 1);
  1425. } else {
  1426. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  1427. struct page *page = gpa_to_page(vcpu, gpa);
  1428. hpa_t hpa = page_to_phys(page);
  1429. if (is_shadow_present_pte(ent)
  1430. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  1431. printk(KERN_ERR "xx audit error: (%s) levels %d"
  1432. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  1433. audit_msg, vcpu->arch.mmu.root_level,
  1434. va, gpa, hpa, ent,
  1435. is_shadow_present_pte(ent));
  1436. else if (ent == shadow_notrap_nonpresent_pte
  1437. && !is_error_hpa(hpa))
  1438. printk(KERN_ERR "audit: (%s) notrap shadow,"
  1439. " valid guest gva %lx\n", audit_msg, va);
  1440. kvm_release_page_clean(page);
  1441. }
  1442. }
  1443. }
  1444. static void audit_mappings(struct kvm_vcpu *vcpu)
  1445. {
  1446. unsigned i;
  1447. if (vcpu->arch.mmu.root_level == 4)
  1448. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  1449. else
  1450. for (i = 0; i < 4; ++i)
  1451. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  1452. audit_mappings_page(vcpu,
  1453. vcpu->arch.mmu.pae_root[i],
  1454. i << 30,
  1455. 2);
  1456. }
  1457. static int count_rmaps(struct kvm_vcpu *vcpu)
  1458. {
  1459. int nmaps = 0;
  1460. int i, j, k;
  1461. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  1462. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  1463. struct kvm_rmap_desc *d;
  1464. for (j = 0; j < m->npages; ++j) {
  1465. unsigned long *rmapp = &m->rmap[j];
  1466. if (!*rmapp)
  1467. continue;
  1468. if (!(*rmapp & 1)) {
  1469. ++nmaps;
  1470. continue;
  1471. }
  1472. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  1473. while (d) {
  1474. for (k = 0; k < RMAP_EXT; ++k)
  1475. if (d->shadow_ptes[k])
  1476. ++nmaps;
  1477. else
  1478. break;
  1479. d = d->more;
  1480. }
  1481. }
  1482. }
  1483. return nmaps;
  1484. }
  1485. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  1486. {
  1487. int nmaps = 0;
  1488. struct kvm_mmu_page *sp;
  1489. int i;
  1490. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  1491. u64 *pt = sp->spt;
  1492. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  1493. continue;
  1494. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1495. u64 ent = pt[i];
  1496. if (!(ent & PT_PRESENT_MASK))
  1497. continue;
  1498. if (!(ent & PT_WRITABLE_MASK))
  1499. continue;
  1500. ++nmaps;
  1501. }
  1502. }
  1503. return nmaps;
  1504. }
  1505. static void audit_rmap(struct kvm_vcpu *vcpu)
  1506. {
  1507. int n_rmap = count_rmaps(vcpu);
  1508. int n_actual = count_writable_mappings(vcpu);
  1509. if (n_rmap != n_actual)
  1510. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  1511. __FUNCTION__, audit_msg, n_rmap, n_actual);
  1512. }
  1513. static void audit_write_protection(struct kvm_vcpu *vcpu)
  1514. {
  1515. struct kvm_mmu_page *sp;
  1516. struct kvm_memory_slot *slot;
  1517. unsigned long *rmapp;
  1518. gfn_t gfn;
  1519. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  1520. if (sp->role.metaphysical)
  1521. continue;
  1522. slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
  1523. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  1524. rmapp = &slot->rmap[gfn - slot->base_gfn];
  1525. if (*rmapp)
  1526. printk(KERN_ERR "%s: (%s) shadow page has writable"
  1527. " mappings: gfn %lx role %x\n",
  1528. __FUNCTION__, audit_msg, sp->gfn,
  1529. sp->role.word);
  1530. }
  1531. }
  1532. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  1533. {
  1534. int olddbg = dbg;
  1535. dbg = 0;
  1536. audit_msg = msg;
  1537. audit_rmap(vcpu);
  1538. audit_write_protection(vcpu);
  1539. audit_mappings(vcpu);
  1540. dbg = olddbg;
  1541. }
  1542. #endif