tcm_bf537.c 18 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/etherdevice.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/partitions.h>
  14. #include <linux/mtd/physmap.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/spi/flash.h>
  17. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  18. #include <linux/usb/isp1362.h>
  19. #endif
  20. #include <linux/ata_platform.h>
  21. #include <linux/irq.h>
  22. #include <asm/dma.h>
  23. #include <asm/bfin5xx_spi.h>
  24. #include <asm/portmux.h>
  25. #include <asm/dpmc.h>
  26. #include <linux/spi/mmc_spi.h>
  27. /*
  28. * Name the Board for the /proc/cpuinfo
  29. */
  30. const char bfin_board_name[] = "Bluetechnix TCM BF537";
  31. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  32. /* all SPI peripherals info goes here */
  33. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  34. static struct mtd_partition bfin_spi_flash_partitions[] = {
  35. {
  36. .name = "bootloader(spi)",
  37. .size = 0x00020000,
  38. .offset = 0,
  39. .mask_flags = MTD_CAP_ROM
  40. }, {
  41. .name = "linux kernel(spi)",
  42. .size = 0xe0000,
  43. .offset = 0x20000
  44. }, {
  45. .name = "file system(spi)",
  46. .size = 0x700000,
  47. .offset = 0x00100000,
  48. }
  49. };
  50. static struct flash_platform_data bfin_spi_flash_data = {
  51. .name = "m25p80",
  52. .parts = bfin_spi_flash_partitions,
  53. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  54. .type = "m25p64",
  55. };
  56. /* SPI flash chip (m25p64) */
  57. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  58. .enable_dma = 0, /* use dma transfer with this chip*/
  59. };
  60. #endif
  61. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  62. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  63. .enable_dma = 0,
  64. };
  65. #endif
  66. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  67. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  68. {
  69. /* the modalias must be the same as spi device driver name */
  70. .modalias = "m25p80", /* Name of spi_driver for this device */
  71. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  72. .bus_num = 0, /* Framework bus number */
  73. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  74. .platform_data = &bfin_spi_flash_data,
  75. .controller_data = &spi_flash_chip_info,
  76. .mode = SPI_MODE_3,
  77. },
  78. #endif
  79. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  80. {
  81. .modalias = "ad183x",
  82. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  83. .bus_num = 0,
  84. .chip_select = 4,
  85. },
  86. #endif
  87. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  88. {
  89. .modalias = "mmc_spi",
  90. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  91. .bus_num = 0,
  92. .chip_select = 1,
  93. .controller_data = &mmc_spi_chip_info,
  94. .mode = SPI_MODE_3,
  95. },
  96. #endif
  97. };
  98. /* SPI (0) */
  99. static struct resource bfin_spi0_resource[] = {
  100. [0] = {
  101. .start = SPI0_REGBASE,
  102. .end = SPI0_REGBASE + 0xFF,
  103. .flags = IORESOURCE_MEM,
  104. },
  105. [1] = {
  106. .start = CH_SPI,
  107. .end = CH_SPI,
  108. .flags = IORESOURCE_DMA,
  109. },
  110. [2] = {
  111. .start = IRQ_SPI,
  112. .end = IRQ_SPI,
  113. .flags = IORESOURCE_IRQ,
  114. }
  115. };
  116. /* SPI controller data */
  117. static struct bfin5xx_spi_master bfin_spi0_info = {
  118. .num_chipselect = 8,
  119. .enable_dma = 1, /* master has the ability to do dma transfer */
  120. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  121. };
  122. static struct platform_device bfin_spi0_device = {
  123. .name = "bfin-spi",
  124. .id = 0, /* Bus number */
  125. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  126. .resource = bfin_spi0_resource,
  127. .dev = {
  128. .platform_data = &bfin_spi0_info, /* Passed to driver */
  129. },
  130. };
  131. #endif /* spi master and devices */
  132. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  133. static struct platform_device rtc_device = {
  134. .name = "rtc-bfin",
  135. .id = -1,
  136. };
  137. #endif
  138. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  139. static struct platform_device hitachi_fb_device = {
  140. .name = "hitachi-tx09",
  141. };
  142. #endif
  143. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  144. #include <linux/smc91x.h>
  145. static struct smc91x_platdata smc91x_info = {
  146. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  147. .leda = RPC_LED_100_10,
  148. .ledb = RPC_LED_TX_RX,
  149. };
  150. static struct resource smc91x_resources[] = {
  151. {
  152. .start = 0x20200300,
  153. .end = 0x20200300 + 16,
  154. .flags = IORESOURCE_MEM,
  155. }, {
  156. .start = IRQ_PF14,
  157. .end = IRQ_PF14,
  158. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  159. },
  160. };
  161. static struct platform_device smc91x_device = {
  162. .name = "smc91x",
  163. .id = 0,
  164. .num_resources = ARRAY_SIZE(smc91x_resources),
  165. .resource = smc91x_resources,
  166. .dev = {
  167. .platform_data = &smc91x_info,
  168. },
  169. };
  170. #endif
  171. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  172. static struct resource isp1362_hcd_resources[] = {
  173. {
  174. .start = 0x20308000,
  175. .end = 0x20308000,
  176. .flags = IORESOURCE_MEM,
  177. }, {
  178. .start = 0x20308004,
  179. .end = 0x20308004,
  180. .flags = IORESOURCE_MEM,
  181. }, {
  182. .start = IRQ_PG15,
  183. .end = IRQ_PG15,
  184. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  185. },
  186. };
  187. static struct isp1362_platform_data isp1362_priv = {
  188. .sel15Kres = 1,
  189. .clknotstop = 0,
  190. .oc_enable = 0,
  191. .int_act_high = 0,
  192. .int_edge_triggered = 0,
  193. .remote_wakeup_connected = 0,
  194. .no_power_switching = 1,
  195. .power_switching_mode = 0,
  196. };
  197. static struct platform_device isp1362_hcd_device = {
  198. .name = "isp1362-hcd",
  199. .id = 0,
  200. .dev = {
  201. .platform_data = &isp1362_priv,
  202. },
  203. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  204. .resource = isp1362_hcd_resources,
  205. };
  206. #endif
  207. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  208. static struct resource net2272_bfin_resources[] = {
  209. {
  210. .start = 0x20300000,
  211. .end = 0x20300000 + 0x100,
  212. .flags = IORESOURCE_MEM,
  213. }, {
  214. .start = IRQ_PG13,
  215. .end = IRQ_PG13,
  216. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  217. },
  218. };
  219. static struct platform_device net2272_bfin_device = {
  220. .name = "net2272",
  221. .id = -1,
  222. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  223. .resource = net2272_bfin_resources,
  224. };
  225. #endif
  226. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  227. static struct mtd_partition cm_partitions[] = {
  228. {
  229. .name = "bootloader(nor)",
  230. .size = 0x40000,
  231. .offset = 0,
  232. }, {
  233. .name = "linux kernel(nor)",
  234. .size = 0x100000,
  235. .offset = MTDPART_OFS_APPEND,
  236. }, {
  237. .name = "file system(nor)",
  238. .size = MTDPART_SIZ_FULL,
  239. .offset = MTDPART_OFS_APPEND,
  240. }
  241. };
  242. static struct physmap_flash_data cm_flash_data = {
  243. .width = 2,
  244. .parts = cm_partitions,
  245. .nr_parts = ARRAY_SIZE(cm_partitions),
  246. };
  247. static unsigned cm_flash_gpios[] = { GPIO_PF4, GPIO_PF5 };
  248. static struct resource cm_flash_resource[] = {
  249. {
  250. .name = "cfi_probe",
  251. .start = 0x20000000,
  252. .end = 0x201fffff,
  253. .flags = IORESOURCE_MEM,
  254. }, {
  255. .start = (unsigned long)cm_flash_gpios,
  256. .end = ARRAY_SIZE(cm_flash_gpios),
  257. .flags = IORESOURCE_IRQ,
  258. }
  259. };
  260. static struct platform_device cm_flash_device = {
  261. .name = "gpio-addr-flash",
  262. .id = 0,
  263. .dev = {
  264. .platform_data = &cm_flash_data,
  265. },
  266. .num_resources = ARRAY_SIZE(cm_flash_resource),
  267. .resource = cm_flash_resource,
  268. };
  269. #endif
  270. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  271. #ifdef CONFIG_SERIAL_BFIN_UART0
  272. static struct resource bfin_uart0_resources[] = {
  273. {
  274. .start = UART0_THR,
  275. .end = UART0_GCTL+2,
  276. .flags = IORESOURCE_MEM,
  277. },
  278. {
  279. .start = IRQ_UART0_TX,
  280. .end = IRQ_UART0_TX,
  281. .flags = IORESOURCE_IRQ,
  282. },
  283. {
  284. .start = IRQ_UART0_RX,
  285. .end = IRQ_UART0_RX,
  286. .flags = IORESOURCE_IRQ,
  287. },
  288. {
  289. .start = IRQ_UART0_ERROR,
  290. .end = IRQ_UART0_ERROR,
  291. .flags = IORESOURCE_IRQ,
  292. },
  293. {
  294. .start = CH_UART0_TX,
  295. .end = CH_UART0_TX,
  296. .flags = IORESOURCE_DMA,
  297. },
  298. {
  299. .start = CH_UART0_RX,
  300. .end = CH_UART0_RX,
  301. .flags = IORESOURCE_DMA,
  302. },
  303. };
  304. static unsigned short bfin_uart0_peripherals[] = {
  305. P_UART0_TX, P_UART0_RX, 0
  306. };
  307. static struct platform_device bfin_uart0_device = {
  308. .name = "bfin-uart",
  309. .id = 0,
  310. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  311. .resource = bfin_uart0_resources,
  312. .dev = {
  313. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  314. },
  315. };
  316. #endif
  317. #ifdef CONFIG_SERIAL_BFIN_UART1
  318. static struct resource bfin_uart1_resources[] = {
  319. {
  320. .start = UART1_THR,
  321. .end = UART1_GCTL+2,
  322. .flags = IORESOURCE_MEM,
  323. },
  324. {
  325. .start = IRQ_UART1_TX,
  326. .end = IRQ_UART1_TX,
  327. .flags = IORESOURCE_IRQ,
  328. },
  329. {
  330. .start = IRQ_UART1_RX,
  331. .end = IRQ_UART1_RX,
  332. .flags = IORESOURCE_IRQ,
  333. },
  334. {
  335. .start = IRQ_UART1_ERROR,
  336. .end = IRQ_UART1_ERROR,
  337. .flags = IORESOURCE_IRQ,
  338. },
  339. {
  340. .start = CH_UART1_TX,
  341. .end = CH_UART1_TX,
  342. .flags = IORESOURCE_DMA,
  343. },
  344. {
  345. .start = CH_UART1_RX,
  346. .end = CH_UART1_RX,
  347. .flags = IORESOURCE_DMA,
  348. },
  349. };
  350. static unsigned short bfin_uart1_peripherals[] = {
  351. P_UART1_TX, P_UART1_RX, 0
  352. };
  353. static struct platform_device bfin_uart1_device = {
  354. .name = "bfin-uart",
  355. .id = 1,
  356. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  357. .resource = bfin_uart1_resources,
  358. .dev = {
  359. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  360. },
  361. };
  362. #endif
  363. #endif
  364. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  365. #ifdef CONFIG_BFIN_SIR0
  366. static struct resource bfin_sir0_resources[] = {
  367. {
  368. .start = 0xFFC00400,
  369. .end = 0xFFC004FF,
  370. .flags = IORESOURCE_MEM,
  371. },
  372. {
  373. .start = IRQ_UART0_RX,
  374. .end = IRQ_UART0_RX+1,
  375. .flags = IORESOURCE_IRQ,
  376. },
  377. {
  378. .start = CH_UART0_RX,
  379. .end = CH_UART0_RX+1,
  380. .flags = IORESOURCE_DMA,
  381. },
  382. };
  383. static struct platform_device bfin_sir0_device = {
  384. .name = "bfin_sir",
  385. .id = 0,
  386. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  387. .resource = bfin_sir0_resources,
  388. };
  389. #endif
  390. #ifdef CONFIG_BFIN_SIR1
  391. static struct resource bfin_sir1_resources[] = {
  392. {
  393. .start = 0xFFC02000,
  394. .end = 0xFFC020FF,
  395. .flags = IORESOURCE_MEM,
  396. },
  397. {
  398. .start = IRQ_UART1_RX,
  399. .end = IRQ_UART1_RX+1,
  400. .flags = IORESOURCE_IRQ,
  401. },
  402. {
  403. .start = CH_UART1_RX,
  404. .end = CH_UART1_RX+1,
  405. .flags = IORESOURCE_DMA,
  406. },
  407. };
  408. static struct platform_device bfin_sir1_device = {
  409. .name = "bfin_sir",
  410. .id = 1,
  411. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  412. .resource = bfin_sir1_resources,
  413. };
  414. #endif
  415. #endif
  416. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  417. static struct resource bfin_twi0_resource[] = {
  418. [0] = {
  419. .start = TWI0_REGBASE,
  420. .end = TWI0_REGBASE,
  421. .flags = IORESOURCE_MEM,
  422. },
  423. [1] = {
  424. .start = IRQ_TWI,
  425. .end = IRQ_TWI,
  426. .flags = IORESOURCE_IRQ,
  427. },
  428. };
  429. static struct platform_device i2c_bfin_twi_device = {
  430. .name = "i2c-bfin-twi",
  431. .id = 0,
  432. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  433. .resource = bfin_twi0_resource,
  434. };
  435. #endif
  436. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  437. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  438. static struct resource bfin_sport0_uart_resources[] = {
  439. {
  440. .start = SPORT0_TCR1,
  441. .end = SPORT0_MRCS3+4,
  442. .flags = IORESOURCE_MEM,
  443. },
  444. {
  445. .start = IRQ_SPORT0_RX,
  446. .end = IRQ_SPORT0_RX+1,
  447. .flags = IORESOURCE_IRQ,
  448. },
  449. {
  450. .start = IRQ_SPORT0_ERROR,
  451. .end = IRQ_SPORT0_ERROR,
  452. .flags = IORESOURCE_IRQ,
  453. },
  454. };
  455. static unsigned short bfin_sport0_peripherals[] = {
  456. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  457. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  458. };
  459. static struct platform_device bfin_sport0_uart_device = {
  460. .name = "bfin-sport-uart",
  461. .id = 0,
  462. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  463. .resource = bfin_sport0_uart_resources,
  464. .dev = {
  465. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  466. },
  467. };
  468. #endif
  469. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  470. static struct resource bfin_sport1_uart_resources[] = {
  471. {
  472. .start = SPORT1_TCR1,
  473. .end = SPORT1_MRCS3+4,
  474. .flags = IORESOURCE_MEM,
  475. },
  476. {
  477. .start = IRQ_SPORT1_RX,
  478. .end = IRQ_SPORT1_RX+1,
  479. .flags = IORESOURCE_IRQ,
  480. },
  481. {
  482. .start = IRQ_SPORT1_ERROR,
  483. .end = IRQ_SPORT1_ERROR,
  484. .flags = IORESOURCE_IRQ,
  485. },
  486. };
  487. static unsigned short bfin_sport1_peripherals[] = {
  488. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  489. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  490. };
  491. static struct platform_device bfin_sport1_uart_device = {
  492. .name = "bfin-sport-uart",
  493. .id = 1,
  494. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  495. .resource = bfin_sport1_uart_resources,
  496. .dev = {
  497. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  498. },
  499. };
  500. #endif
  501. #endif
  502. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  503. #include <linux/bfin_mac.h>
  504. #include <linux/export.h>
  505. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  506. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  507. {
  508. .addr = 1,
  509. .irq = IRQ_MAC_PHYINT,
  510. },
  511. };
  512. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  513. .phydev_number = 1,
  514. .phydev_data = bfin_phydev_data,
  515. .phy_mode = PHY_INTERFACE_MODE_MII,
  516. .mac_peripherals = bfin_mac_peripherals,
  517. };
  518. static struct platform_device bfin_mii_bus = {
  519. .name = "bfin_mii_bus",
  520. .dev = {
  521. .platform_data = &bfin_mii_bus_data,
  522. }
  523. };
  524. static struct platform_device bfin_mac_device = {
  525. .name = "bfin_mac",
  526. .dev = {
  527. .platform_data = &bfin_mii_bus,
  528. }
  529. };
  530. #endif
  531. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  532. #define PATA_INT IRQ_PF14
  533. static struct pata_platform_info bfin_pata_platform_data = {
  534. .ioport_shift = 2,
  535. .irq_type = IRQF_TRIGGER_HIGH,
  536. };
  537. static struct resource bfin_pata_resources[] = {
  538. {
  539. .start = 0x2030C000,
  540. .end = 0x2030C01F,
  541. .flags = IORESOURCE_MEM,
  542. },
  543. {
  544. .start = 0x2030D018,
  545. .end = 0x2030D01B,
  546. .flags = IORESOURCE_MEM,
  547. },
  548. {
  549. .start = PATA_INT,
  550. .end = PATA_INT,
  551. .flags = IORESOURCE_IRQ,
  552. },
  553. };
  554. static struct platform_device bfin_pata_device = {
  555. .name = "pata_platform",
  556. .id = -1,
  557. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  558. .resource = bfin_pata_resources,
  559. .dev = {
  560. .platform_data = &bfin_pata_platform_data,
  561. }
  562. };
  563. #endif
  564. static const unsigned int cclk_vlev_datasheet[] =
  565. {
  566. VRPAIR(VLEV_085, 250000000),
  567. VRPAIR(VLEV_090, 376000000),
  568. VRPAIR(VLEV_095, 426000000),
  569. VRPAIR(VLEV_100, 426000000),
  570. VRPAIR(VLEV_105, 476000000),
  571. VRPAIR(VLEV_110, 476000000),
  572. VRPAIR(VLEV_115, 476000000),
  573. VRPAIR(VLEV_120, 500000000),
  574. VRPAIR(VLEV_125, 533000000),
  575. VRPAIR(VLEV_130, 600000000),
  576. };
  577. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  578. .tuple_tab = cclk_vlev_datasheet,
  579. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  580. .vr_settling_time = 25 /* us */,
  581. };
  582. static struct platform_device bfin_dpmc = {
  583. .name = "bfin dpmc",
  584. .dev = {
  585. .platform_data = &bfin_dmpc_vreg_data,
  586. },
  587. };
  588. static struct platform_device *cm_bf537_devices[] __initdata = {
  589. &bfin_dpmc,
  590. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  591. &hitachi_fb_device,
  592. #endif
  593. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  594. &rtc_device,
  595. #endif
  596. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  597. #ifdef CONFIG_SERIAL_BFIN_UART0
  598. &bfin_uart0_device,
  599. #endif
  600. #ifdef CONFIG_SERIAL_BFIN_UART1
  601. &bfin_uart1_device,
  602. #endif
  603. #endif
  604. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  605. #ifdef CONFIG_BFIN_SIR0
  606. &bfin_sir0_device,
  607. #endif
  608. #ifdef CONFIG_BFIN_SIR1
  609. &bfin_sir1_device,
  610. #endif
  611. #endif
  612. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  613. &i2c_bfin_twi_device,
  614. #endif
  615. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  616. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  617. &bfin_sport0_uart_device,
  618. #endif
  619. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  620. &bfin_sport1_uart_device,
  621. #endif
  622. #endif
  623. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  624. &isp1362_hcd_device,
  625. #endif
  626. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  627. &smc91x_device,
  628. #endif
  629. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  630. &bfin_mii_bus,
  631. &bfin_mac_device,
  632. #endif
  633. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  634. &net2272_bfin_device,
  635. #endif
  636. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  637. &bfin_spi0_device,
  638. #endif
  639. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  640. &bfin_pata_device,
  641. #endif
  642. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  643. &cm_flash_device,
  644. #endif
  645. };
  646. static int __init net2272_init(void)
  647. {
  648. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  649. int ret;
  650. ret = gpio_request(GPIO_PG14, "net2272");
  651. if (ret)
  652. return ret;
  653. /* Reset USB Chip, PG14 */
  654. gpio_direction_output(GPIO_PG14, 0);
  655. mdelay(2);
  656. gpio_set_value(GPIO_PG14, 1);
  657. #endif
  658. return 0;
  659. }
  660. static int __init tcm_bf537_init(void)
  661. {
  662. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  663. platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
  664. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  665. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  666. #endif
  667. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  668. irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
  669. #endif
  670. if (net2272_init())
  671. pr_warning("unable to configure net2272; it probably won't work\n");
  672. return 0;
  673. }
  674. arch_initcall(tcm_bf537_init);
  675. static struct platform_device *cm_bf537_early_devices[] __initdata = {
  676. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  677. #ifdef CONFIG_SERIAL_BFIN_UART0
  678. &bfin_uart0_device,
  679. #endif
  680. #ifdef CONFIG_SERIAL_BFIN_UART1
  681. &bfin_uart1_device,
  682. #endif
  683. #endif
  684. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  685. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  686. &bfin_sport0_uart_device,
  687. #endif
  688. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  689. &bfin_sport1_uart_device,
  690. #endif
  691. #endif
  692. };
  693. void __init native_machine_early_platform_add_devices(void)
  694. {
  695. printk(KERN_INFO "register early platform devices\n");
  696. early_platform_add_devices(cm_bf537_early_devices,
  697. ARRAY_SIZE(cm_bf537_early_devices));
  698. }
  699. void bfin_get_ether_addr(char *addr)
  700. {
  701. random_ether_addr(addr);
  702. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  703. }
  704. EXPORT_SYMBOL(bfin_get_ether_addr);