iwl4965-base.c 231 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-eeprom.h"
  45. #include "iwl-core.h"
  46. #include "iwl-4965.h"
  47. #include "iwl-io.h"
  48. #include "iwl-helpers.h"
  49. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  50. struct iwl4965_tx_queue *txq);
  51. /******************************************************************************
  52. *
  53. * module boiler plate
  54. *
  55. ******************************************************************************/
  56. /*
  57. * module name, copyright, version, etc.
  58. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  59. */
  60. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  61. #ifdef CONFIG_IWLWIFI_DEBUG
  62. #define VD "d"
  63. #else
  64. #define VD
  65. #endif
  66. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  67. #define VS "s"
  68. #else
  69. #define VS
  70. #endif
  71. #define DRV_VERSION IWLWIFI_VERSION VD VS
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT);
  75. MODULE_LICENSE("GPL");
  76. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  77. {
  78. u16 fc = le16_to_cpu(hdr->frame_control);
  79. int hdr_len = ieee80211_get_hdrlen(fc);
  80. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  81. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  82. return NULL;
  83. }
  84. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  85. struct iwl_priv *priv, enum ieee80211_band band)
  86. {
  87. return priv->hw->wiphy->bands[band];
  88. }
  89. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  90. {
  91. /* Single white space is for Linksys APs */
  92. if (essid_len == 1 && essid[0] == ' ')
  93. return 1;
  94. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  95. while (essid_len) {
  96. essid_len--;
  97. if (essid[essid_len] != '\0')
  98. return 0;
  99. }
  100. return 1;
  101. }
  102. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  103. {
  104. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  105. const char *s = essid;
  106. char *d = escaped;
  107. if (iwl4965_is_empty_essid(essid, essid_len)) {
  108. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  109. return escaped;
  110. }
  111. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  112. while (essid_len--) {
  113. if (*s == '\0') {
  114. *d++ = '\\';
  115. *d++ = '0';
  116. s++;
  117. } else
  118. *d++ = *s++;
  119. }
  120. *d = '\0';
  121. return escaped;
  122. }
  123. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  124. * DMA services
  125. *
  126. * Theory of operation
  127. *
  128. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  129. * of buffer descriptors, each of which points to one or more data buffers for
  130. * the device to read from or fill. Driver and device exchange status of each
  131. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  132. * entries in each circular buffer, to protect against confusing empty and full
  133. * queue states.
  134. *
  135. * The device reads or writes the data in the queues via the device's several
  136. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  137. *
  138. * For Tx queue, there are low mark and high mark limits. If, after queuing
  139. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  140. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  141. * Tx queue resumed.
  142. *
  143. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  144. * queue (#4) for sending commands to the device firmware, and 15 other
  145. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  146. *
  147. * See more detailed info in iwl-4965-hw.h.
  148. ***************************************************/
  149. int iwl4965_queue_space(const struct iwl4965_queue *q)
  150. {
  151. int s = q->read_ptr - q->write_ptr;
  152. if (q->read_ptr > q->write_ptr)
  153. s -= q->n_bd;
  154. if (s <= 0)
  155. s += q->n_window;
  156. /* keep some reserve to not confuse empty and full situations */
  157. s -= 2;
  158. if (s < 0)
  159. s = 0;
  160. return s;
  161. }
  162. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  163. {
  164. return q->write_ptr > q->read_ptr ?
  165. (i >= q->read_ptr && i < q->write_ptr) :
  166. !(i < q->read_ptr && i >= q->write_ptr);
  167. }
  168. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  169. {
  170. /* This is for scan command, the big buffer at end of command array */
  171. if (is_huge)
  172. return q->n_window; /* must be power of 2 */
  173. /* Otherwise, use normal size buffers */
  174. return index & (q->n_window - 1);
  175. }
  176. /**
  177. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  178. */
  179. static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
  180. int count, int slots_num, u32 id)
  181. {
  182. q->n_bd = count;
  183. q->n_window = slots_num;
  184. q->id = id;
  185. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  186. * and iwl_queue_dec_wrap are broken. */
  187. BUG_ON(!is_power_of_2(count));
  188. /* slots_num must be power-of-two size, otherwise
  189. * get_cmd_index is broken. */
  190. BUG_ON(!is_power_of_2(slots_num));
  191. q->low_mark = q->n_window / 4;
  192. if (q->low_mark < 4)
  193. q->low_mark = 4;
  194. q->high_mark = q->n_window / 8;
  195. if (q->high_mark < 2)
  196. q->high_mark = 2;
  197. q->write_ptr = q->read_ptr = 0;
  198. return 0;
  199. }
  200. /**
  201. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  202. */
  203. static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
  204. struct iwl4965_tx_queue *txq, u32 id)
  205. {
  206. struct pci_dev *dev = priv->pci_dev;
  207. /* Driver private data, only for Tx (not command) queues,
  208. * not shared with device. */
  209. if (id != IWL_CMD_QUEUE_NUM) {
  210. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  211. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  212. if (!txq->txb) {
  213. IWL_ERROR("kmalloc for auxiliary BD "
  214. "structures failed\n");
  215. goto error;
  216. }
  217. } else
  218. txq->txb = NULL;
  219. /* Circular buffer of transmit frame descriptors (TFDs),
  220. * shared with device */
  221. txq->bd = pci_alloc_consistent(dev,
  222. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  223. &txq->q.dma_addr);
  224. if (!txq->bd) {
  225. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  226. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  227. goto error;
  228. }
  229. txq->q.id = id;
  230. return 0;
  231. error:
  232. if (txq->txb) {
  233. kfree(txq->txb);
  234. txq->txb = NULL;
  235. }
  236. return -ENOMEM;
  237. }
  238. /**
  239. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  240. */
  241. int iwl4965_tx_queue_init(struct iwl_priv *priv,
  242. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  243. {
  244. struct pci_dev *dev = priv->pci_dev;
  245. int len;
  246. int rc = 0;
  247. /*
  248. * Alloc buffer array for commands (Tx or other types of commands).
  249. * For the command queue (#4), allocate command space + one big
  250. * command for scan, since scan command is very huge; the system will
  251. * not have two scans at the same time, so only one is needed.
  252. * For normal Tx queues (all other queues), no super-size command
  253. * space is needed.
  254. */
  255. len = sizeof(struct iwl_cmd) * slots_num;
  256. if (txq_id == IWL_CMD_QUEUE_NUM)
  257. len += IWL_MAX_SCAN_SIZE;
  258. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  259. if (!txq->cmd)
  260. return -ENOMEM;
  261. /* Alloc driver data array and TFD circular buffer */
  262. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  263. if (rc) {
  264. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  265. return -ENOMEM;
  266. }
  267. txq->need_update = 0;
  268. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  269. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  270. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  271. /* Initialize queue's high/low-water marks, and head/tail indexes */
  272. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  273. /* Tell device where to find queue */
  274. iwl4965_hw_tx_queue_init(priv, txq);
  275. return 0;
  276. }
  277. /**
  278. * iwl4965_tx_queue_free - Deallocate DMA queue.
  279. * @txq: Transmit queue to deallocate.
  280. *
  281. * Empty queue by removing and destroying all BD's.
  282. * Free all buffers.
  283. * 0-fill, but do not free "txq" descriptor structure.
  284. */
  285. void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
  286. {
  287. struct iwl4965_queue *q = &txq->q;
  288. struct pci_dev *dev = priv->pci_dev;
  289. int len;
  290. if (q->n_bd == 0)
  291. return;
  292. /* first, empty all BD's */
  293. for (; q->write_ptr != q->read_ptr;
  294. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  295. iwl4965_hw_txq_free_tfd(priv, txq);
  296. len = sizeof(struct iwl_cmd) * q->n_window;
  297. if (q->id == IWL_CMD_QUEUE_NUM)
  298. len += IWL_MAX_SCAN_SIZE;
  299. /* De-alloc array of command/tx buffers */
  300. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  301. /* De-alloc circular buffer of TFDs */
  302. if (txq->q.n_bd)
  303. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  304. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  305. /* De-alloc array of per-TFD driver data */
  306. if (txq->txb) {
  307. kfree(txq->txb);
  308. txq->txb = NULL;
  309. }
  310. /* 0-fill queue descriptor structure */
  311. memset(txq, 0, sizeof(*txq));
  312. }
  313. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  314. /*************** STATION TABLE MANAGEMENT ****
  315. * mac80211 should be examined to determine if sta_info is duplicating
  316. * the functionality provided here
  317. */
  318. /**************************************************************/
  319. #if 0 /* temporary disable till we add real remove station */
  320. /**
  321. * iwl4965_remove_station - Remove driver's knowledge of station.
  322. *
  323. * NOTE: This does not remove station from device's station table.
  324. */
  325. static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  326. {
  327. int index = IWL_INVALID_STATION;
  328. int i;
  329. unsigned long flags;
  330. spin_lock_irqsave(&priv->sta_lock, flags);
  331. if (is_ap)
  332. index = IWL_AP_ID;
  333. else if (is_broadcast_ether_addr(addr))
  334. index = priv->hw_setting.bcast_sta_id;
  335. else
  336. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  337. if (priv->stations[i].used &&
  338. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  339. addr)) {
  340. index = i;
  341. break;
  342. }
  343. if (unlikely(index == IWL_INVALID_STATION))
  344. goto out;
  345. if (priv->stations[index].used) {
  346. priv->stations[index].used = 0;
  347. priv->num_stations--;
  348. }
  349. BUG_ON(priv->num_stations < 0);
  350. out:
  351. spin_unlock_irqrestore(&priv->sta_lock, flags);
  352. return 0;
  353. }
  354. #endif
  355. /**
  356. * iwl4965_add_station_flags - Add station to tables in driver and device
  357. */
  358. u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
  359. int is_ap, u8 flags, void *ht_data)
  360. {
  361. int i;
  362. int index = IWL_INVALID_STATION;
  363. struct iwl4965_station_entry *station;
  364. unsigned long flags_spin;
  365. DECLARE_MAC_BUF(mac);
  366. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  367. if (is_ap)
  368. index = IWL_AP_ID;
  369. else if (is_broadcast_ether_addr(addr))
  370. index = priv->hw_setting.bcast_sta_id;
  371. else
  372. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  373. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  374. addr)) {
  375. index = i;
  376. break;
  377. }
  378. if (!priv->stations[i].used &&
  379. index == IWL_INVALID_STATION)
  380. index = i;
  381. }
  382. /* These two conditions have the same outcome, but keep them separate
  383. since they have different meanings */
  384. if (unlikely(index == IWL_INVALID_STATION)) {
  385. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  386. return index;
  387. }
  388. if (priv->stations[index].used &&
  389. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  390. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  391. return index;
  392. }
  393. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  394. station = &priv->stations[index];
  395. station->used = 1;
  396. priv->num_stations++;
  397. /* Set up the REPLY_ADD_STA command to send to device */
  398. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  399. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  400. station->sta.mode = 0;
  401. station->sta.sta.sta_id = index;
  402. station->sta.station_flags = 0;
  403. #ifdef CONFIG_IWL4965_HT
  404. /* BCAST station and IBSS stations do not work in HT mode */
  405. if (index != priv->hw_setting.bcast_sta_id &&
  406. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  407. iwl4965_set_ht_add_station(priv, index,
  408. (struct ieee80211_ht_info *) ht_data);
  409. #endif /*CONFIG_IWL4965_HT*/
  410. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  411. /* Add station to device's station table */
  412. iwl4965_send_add_station(priv, &station->sta, flags);
  413. return index;
  414. }
  415. /*************** DRIVER STATUS FUNCTIONS *****/
  416. static inline int iwl4965_is_ready(struct iwl_priv *priv)
  417. {
  418. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  419. * set but EXIT_PENDING is not */
  420. return test_bit(STATUS_READY, &priv->status) &&
  421. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  422. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  423. }
  424. static inline int iwl4965_is_alive(struct iwl_priv *priv)
  425. {
  426. return test_bit(STATUS_ALIVE, &priv->status);
  427. }
  428. static inline int iwl4965_is_init(struct iwl_priv *priv)
  429. {
  430. return test_bit(STATUS_INIT, &priv->status);
  431. }
  432. static inline int iwl4965_is_rfkill(struct iwl_priv *priv)
  433. {
  434. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  435. test_bit(STATUS_RF_KILL_SW, &priv->status);
  436. }
  437. static inline int iwl4965_is_ready_rf(struct iwl_priv *priv)
  438. {
  439. if (iwl4965_is_rfkill(priv))
  440. return 0;
  441. return iwl4965_is_ready(priv);
  442. }
  443. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  444. /**
  445. * iwl4965_enqueue_hcmd - enqueue a uCode command
  446. * @priv: device private data point
  447. * @cmd: a point to the ucode command structure
  448. *
  449. * The function returns < 0 values to indicate the operation is
  450. * failed. On success, it turns the index (> 0) of command in the
  451. * command queue.
  452. */
  453. int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  454. {
  455. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  456. struct iwl4965_queue *q = &txq->q;
  457. struct iwl4965_tfd_frame *tfd;
  458. u32 *control_flags;
  459. struct iwl_cmd *out_cmd;
  460. u32 idx;
  461. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  462. dma_addr_t phys_addr;
  463. int ret;
  464. unsigned long flags;
  465. /* If any of the command structures end up being larger than
  466. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  467. * we will need to increase the size of the TFD entries */
  468. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  469. !(cmd->meta.flags & CMD_SIZE_HUGE));
  470. if (iwl4965_is_rfkill(priv)) {
  471. IWL_DEBUG_INFO("Not sending command - RF KILL");
  472. return -EIO;
  473. }
  474. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  475. IWL_ERROR("No space for Tx\n");
  476. return -ENOSPC;
  477. }
  478. spin_lock_irqsave(&priv->hcmd_lock, flags);
  479. tfd = &txq->bd[q->write_ptr];
  480. memset(tfd, 0, sizeof(*tfd));
  481. control_flags = (u32 *) tfd;
  482. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  483. out_cmd = &txq->cmd[idx];
  484. out_cmd->hdr.cmd = cmd->id;
  485. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  486. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  487. /* At this point, the out_cmd now has all of the incoming cmd
  488. * information */
  489. out_cmd->hdr.flags = 0;
  490. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  491. INDEX_TO_SEQ(q->write_ptr));
  492. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  493. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  494. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  495. offsetof(struct iwl_cmd, hdr);
  496. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  497. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  498. "%d bytes at %d[%d]:%d\n",
  499. get_cmd_string(out_cmd->hdr.cmd),
  500. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  501. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  502. txq->need_update = 1;
  503. /* Set up entry in queue's byte count circular buffer */
  504. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  505. /* Increment and update queue's write index */
  506. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  507. iwl4965_tx_queue_update_write_ptr(priv, txq);
  508. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  509. return ret ? ret : idx;
  510. }
  511. static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  512. {
  513. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  514. if (hw_decrypt)
  515. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  516. else
  517. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  518. }
  519. int iwl4965_send_statistics_request(struct iwl_priv *priv)
  520. {
  521. u32 flags = 0;
  522. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  523. sizeof(flags), &flags);
  524. }
  525. /**
  526. * iwl4965_rxon_add_station - add station into station table.
  527. *
  528. * there is only one AP station with id= IWL_AP_ID
  529. * NOTE: mutex must be held before calling this fnction
  530. */
  531. static int iwl4965_rxon_add_station(struct iwl_priv *priv,
  532. const u8 *addr, int is_ap)
  533. {
  534. u8 sta_id;
  535. /* Add station to device's station table */
  536. #ifdef CONFIG_IWL4965_HT
  537. struct ieee80211_conf *conf = &priv->hw->conf;
  538. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  539. if ((is_ap) &&
  540. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  541. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  542. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  543. 0, cur_ht_config);
  544. else
  545. #endif /* CONFIG_IWL4965_HT */
  546. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  547. 0, NULL);
  548. /* Set up default rate scaling table in device's station table */
  549. iwl4965_add_station(priv, addr, is_ap);
  550. return sta_id;
  551. }
  552. /**
  553. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  554. *
  555. * NOTE: This is really only useful during development and can eventually
  556. * be #ifdef'd out once the driver is stable and folks aren't actively
  557. * making changes
  558. */
  559. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  560. {
  561. int error = 0;
  562. int counter = 1;
  563. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  564. error |= le32_to_cpu(rxon->flags &
  565. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  566. RXON_FLG_RADAR_DETECT_MSK));
  567. if (error)
  568. IWL_WARNING("check 24G fields %d | %d\n",
  569. counter++, error);
  570. } else {
  571. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  572. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  573. if (error)
  574. IWL_WARNING("check 52 fields %d | %d\n",
  575. counter++, error);
  576. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  577. if (error)
  578. IWL_WARNING("check 52 CCK %d | %d\n",
  579. counter++, error);
  580. }
  581. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  582. if (error)
  583. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  584. /* make sure basic rates 6Mbps and 1Mbps are supported */
  585. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  586. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  587. if (error)
  588. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  589. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  590. if (error)
  591. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  592. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  593. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  594. if (error)
  595. IWL_WARNING("check CCK and short slot %d | %d\n",
  596. counter++, error);
  597. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  598. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  599. if (error)
  600. IWL_WARNING("check CCK & auto detect %d | %d\n",
  601. counter++, error);
  602. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  603. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  604. if (error)
  605. IWL_WARNING("check TGG and auto detect %d | %d\n",
  606. counter++, error);
  607. if (error)
  608. IWL_WARNING("Tuning to channel %d\n",
  609. le16_to_cpu(rxon->channel));
  610. if (error) {
  611. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  612. return -1;
  613. }
  614. return 0;
  615. }
  616. /**
  617. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  618. * @priv: staging_rxon is compared to active_rxon
  619. *
  620. * If the RXON structure is changing enough to require a new tune,
  621. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  622. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  623. */
  624. static int iwl4965_full_rxon_required(struct iwl_priv *priv)
  625. {
  626. /* These items are only settable from the full RXON command */
  627. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  628. compare_ether_addr(priv->staging_rxon.bssid_addr,
  629. priv->active_rxon.bssid_addr) ||
  630. compare_ether_addr(priv->staging_rxon.node_addr,
  631. priv->active_rxon.node_addr) ||
  632. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  633. priv->active_rxon.wlap_bssid_addr) ||
  634. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  635. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  636. (priv->staging_rxon.air_propagation !=
  637. priv->active_rxon.air_propagation) ||
  638. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  639. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  640. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  641. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  642. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  643. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  644. return 1;
  645. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  646. * be updated with the RXON_ASSOC command -- however only some
  647. * flag transitions are allowed using RXON_ASSOC */
  648. /* Check if we are not switching bands */
  649. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  650. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  651. return 1;
  652. /* Check if we are switching association toggle */
  653. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  654. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  655. return 1;
  656. return 0;
  657. }
  658. static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
  659. {
  660. int rc = 0;
  661. struct iwl4965_rx_packet *res = NULL;
  662. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  663. struct iwl_host_cmd cmd = {
  664. .id = REPLY_RXON_ASSOC,
  665. .len = sizeof(rxon_assoc),
  666. .meta.flags = CMD_WANT_SKB,
  667. .data = &rxon_assoc,
  668. };
  669. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  670. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  671. if ((rxon1->flags == rxon2->flags) &&
  672. (rxon1->filter_flags == rxon2->filter_flags) &&
  673. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  674. (rxon1->ofdm_ht_single_stream_basic_rates ==
  675. rxon2->ofdm_ht_single_stream_basic_rates) &&
  676. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  677. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  678. (rxon1->rx_chain == rxon2->rx_chain) &&
  679. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  680. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  681. return 0;
  682. }
  683. rxon_assoc.flags = priv->staging_rxon.flags;
  684. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  685. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  686. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  687. rxon_assoc.reserved = 0;
  688. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  689. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  690. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  691. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  692. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  693. rc = iwl_send_cmd_sync(priv, &cmd);
  694. if (rc)
  695. return rc;
  696. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  697. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  698. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  699. rc = -EIO;
  700. }
  701. priv->alloc_rxb_skb--;
  702. dev_kfree_skb_any(cmd.meta.u.skb);
  703. return rc;
  704. }
  705. /**
  706. * iwl4965_commit_rxon - commit staging_rxon to hardware
  707. *
  708. * The RXON command in staging_rxon is committed to the hardware and
  709. * the active_rxon structure is updated with the new data. This
  710. * function correctly transitions out of the RXON_ASSOC_MSK state if
  711. * a HW tune is required based on the RXON structure changes.
  712. */
  713. static int iwl4965_commit_rxon(struct iwl_priv *priv)
  714. {
  715. /* cast away the const for active_rxon in this function */
  716. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  717. DECLARE_MAC_BUF(mac);
  718. int rc = 0;
  719. if (!iwl4965_is_alive(priv))
  720. return -1;
  721. /* always get timestamp with Rx frame */
  722. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  723. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  724. if (rc) {
  725. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  726. return -EINVAL;
  727. }
  728. /* If we don't need to send a full RXON, we can use
  729. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  730. * and other flags for the current radio configuration. */
  731. if (!iwl4965_full_rxon_required(priv)) {
  732. rc = iwl4965_send_rxon_assoc(priv);
  733. if (rc) {
  734. IWL_ERROR("Error setting RXON_ASSOC "
  735. "configuration (%d).\n", rc);
  736. return rc;
  737. }
  738. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  739. return 0;
  740. }
  741. /* station table will be cleared */
  742. priv->assoc_station_added = 0;
  743. #ifdef CONFIG_IWL4965_SENSITIVITY
  744. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  745. if (!priv->error_recovering)
  746. priv->start_calib = 0;
  747. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  748. #endif /* CONFIG_IWL4965_SENSITIVITY */
  749. /* If we are currently associated and the new config requires
  750. * an RXON_ASSOC and the new config wants the associated mask enabled,
  751. * we must clear the associated from the active configuration
  752. * before we apply the new config */
  753. if (iwl4965_is_associated(priv) &&
  754. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  755. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  756. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  757. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  758. sizeof(struct iwl4965_rxon_cmd),
  759. &priv->active_rxon);
  760. /* If the mask clearing failed then we set
  761. * active_rxon back to what it was previously */
  762. if (rc) {
  763. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  764. IWL_ERROR("Error clearing ASSOC_MSK on current "
  765. "configuration (%d).\n", rc);
  766. return rc;
  767. }
  768. }
  769. IWL_DEBUG_INFO("Sending RXON\n"
  770. "* with%s RXON_FILTER_ASSOC_MSK\n"
  771. "* channel = %d\n"
  772. "* bssid = %s\n",
  773. ((priv->staging_rxon.filter_flags &
  774. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  775. le16_to_cpu(priv->staging_rxon.channel),
  776. print_mac(mac, priv->staging_rxon.bssid_addr));
  777. iwl4965_set_rxon_hwcrypto(priv, priv->cfg->mod_params->hw_crypto);
  778. /* Apply the new configuration */
  779. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  780. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  781. if (rc) {
  782. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  783. return rc;
  784. }
  785. iwlcore_clear_stations_table(priv);
  786. #ifdef CONFIG_IWL4965_SENSITIVITY
  787. if (!priv->error_recovering)
  788. priv->start_calib = 0;
  789. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  790. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  791. #endif /* CONFIG_IWL4965_SENSITIVITY */
  792. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  793. /* If we issue a new RXON command which required a tune then we must
  794. * send a new TXPOWER command or we won't be able to Tx any frames */
  795. rc = iwl4965_hw_reg_send_txpower(priv);
  796. if (rc) {
  797. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  798. return rc;
  799. }
  800. /* Add the broadcast address so we can send broadcast frames */
  801. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  802. IWL_INVALID_STATION) {
  803. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  804. return -EIO;
  805. }
  806. /* If we have set the ASSOC_MSK and we are in BSS mode then
  807. * add the IWL_AP_ID to the station rate table */
  808. if (iwl4965_is_associated(priv) &&
  809. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  810. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  811. == IWL_INVALID_STATION) {
  812. IWL_ERROR("Error adding AP address for transmit.\n");
  813. return -EIO;
  814. }
  815. priv->assoc_station_added = 1;
  816. }
  817. return 0;
  818. }
  819. static int iwl4965_send_bt_config(struct iwl_priv *priv)
  820. {
  821. struct iwl4965_bt_cmd bt_cmd = {
  822. .flags = 3,
  823. .lead_time = 0xAA,
  824. .max_kill = 1,
  825. .kill_ack_mask = 0,
  826. .kill_cts_mask = 0,
  827. };
  828. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  829. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  830. }
  831. static int iwl4965_send_scan_abort(struct iwl_priv *priv)
  832. {
  833. int rc = 0;
  834. struct iwl4965_rx_packet *res;
  835. struct iwl_host_cmd cmd = {
  836. .id = REPLY_SCAN_ABORT_CMD,
  837. .meta.flags = CMD_WANT_SKB,
  838. };
  839. /* If there isn't a scan actively going on in the hardware
  840. * then we are in between scan bands and not actually
  841. * actively scanning, so don't send the abort command */
  842. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  843. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  844. return 0;
  845. }
  846. rc = iwl_send_cmd_sync(priv, &cmd);
  847. if (rc) {
  848. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  849. return rc;
  850. }
  851. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  852. if (res->u.status != CAN_ABORT_STATUS) {
  853. /* The scan abort will return 1 for success or
  854. * 2 for "failure". A failure condition can be
  855. * due to simply not being in an active scan which
  856. * can occur if we send the scan abort before we
  857. * the microcode has notified us that a scan is
  858. * completed. */
  859. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  860. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  861. clear_bit(STATUS_SCAN_HW, &priv->status);
  862. }
  863. dev_kfree_skb_any(cmd.meta.u.skb);
  864. return rc;
  865. }
  866. static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
  867. struct iwl_cmd *cmd,
  868. struct sk_buff *skb)
  869. {
  870. return 1;
  871. }
  872. /*
  873. * CARD_STATE_CMD
  874. *
  875. * Use: Sets the device's internal card state to enable, disable, or halt
  876. *
  877. * When in the 'enable' state the card operates as normal.
  878. * When in the 'disable' state, the card enters into a low power mode.
  879. * When in the 'halt' state, the card is shut down and must be fully
  880. * restarted to come back on.
  881. */
  882. static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  883. {
  884. struct iwl_host_cmd cmd = {
  885. .id = REPLY_CARD_STATE_CMD,
  886. .len = sizeof(u32),
  887. .data = &flags,
  888. .meta.flags = meta_flag,
  889. };
  890. if (meta_flag & CMD_ASYNC)
  891. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  892. return iwl_send_cmd(priv, &cmd);
  893. }
  894. static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
  895. struct iwl_cmd *cmd, struct sk_buff *skb)
  896. {
  897. struct iwl4965_rx_packet *res = NULL;
  898. if (!skb) {
  899. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  900. return 1;
  901. }
  902. res = (struct iwl4965_rx_packet *)skb->data;
  903. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  904. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  905. res->hdr.flags);
  906. return 1;
  907. }
  908. switch (res->u.add_sta.status) {
  909. case ADD_STA_SUCCESS_MSK:
  910. break;
  911. default:
  912. break;
  913. }
  914. /* We didn't cache the SKB; let the caller free it */
  915. return 1;
  916. }
  917. int iwl4965_send_add_station(struct iwl_priv *priv,
  918. struct iwl4965_addsta_cmd *sta, u8 flags)
  919. {
  920. struct iwl4965_rx_packet *res = NULL;
  921. int rc = 0;
  922. struct iwl_host_cmd cmd = {
  923. .id = REPLY_ADD_STA,
  924. .len = sizeof(struct iwl4965_addsta_cmd),
  925. .meta.flags = flags,
  926. .data = sta,
  927. };
  928. if (flags & CMD_ASYNC)
  929. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  930. else
  931. cmd.meta.flags |= CMD_WANT_SKB;
  932. rc = iwl_send_cmd(priv, &cmd);
  933. if (rc || (flags & CMD_ASYNC))
  934. return rc;
  935. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  936. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  937. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  938. res->hdr.flags);
  939. rc = -EIO;
  940. }
  941. if (rc == 0) {
  942. switch (res->u.add_sta.status) {
  943. case ADD_STA_SUCCESS_MSK:
  944. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  945. break;
  946. default:
  947. rc = -EIO;
  948. IWL_WARNING("REPLY_ADD_STA failed\n");
  949. break;
  950. }
  951. }
  952. priv->alloc_rxb_skb--;
  953. dev_kfree_skb_any(cmd.meta.u.skb);
  954. return rc;
  955. }
  956. static int iwl4965_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  957. struct ieee80211_key_conf *keyconf,
  958. u8 sta_id)
  959. {
  960. unsigned long flags;
  961. __le16 key_flags = 0;
  962. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  963. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  964. if (sta_id == priv->hw_setting.bcast_sta_id)
  965. key_flags |= STA_KEY_MULTICAST_MSK;
  966. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  967. keyconf->hw_key_idx = keyconf->keyidx;
  968. key_flags &= ~STA_KEY_FLG_INVALID;
  969. spin_lock_irqsave(&priv->sta_lock, flags);
  970. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  971. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  972. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  973. keyconf->keylen);
  974. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  975. keyconf->keylen);
  976. priv->stations[sta_id].sta.key.key_offset
  977. = (sta_id % STA_KEY_MAX_NUM);/*FIXME*/
  978. priv->stations[sta_id].sta.key.key_flags = key_flags;
  979. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  980. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  981. spin_unlock_irqrestore(&priv->sta_lock, flags);
  982. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  983. return iwl4965_send_add_station(priv,
  984. &priv->stations[sta_id].sta, CMD_ASYNC);
  985. }
  986. static int iwl4965_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  987. struct ieee80211_key_conf *keyconf,
  988. u8 sta_id)
  989. {
  990. unsigned long flags;
  991. int ret = 0;
  992. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  993. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  994. keyconf->hw_key_idx = keyconf->keyidx;
  995. spin_lock_irqsave(&priv->sta_lock, flags);
  996. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  997. priv->stations[sta_id].keyinfo.conf = keyconf;
  998. priv->stations[sta_id].keyinfo.keylen = 16;
  999. /* This copy is acutally not needed: we get the key with each TX */
  1000. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, 16);
  1001. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key, 16);
  1002. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1003. return ret;
  1004. }
  1005. static int iwl4965_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  1006. {
  1007. unsigned long flags;
  1008. spin_lock_irqsave(&priv->sta_lock, flags);
  1009. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1010. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1011. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1012. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1013. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1014. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1015. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1016. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1017. return 0;
  1018. }
  1019. static int iwl4965_set_dynamic_key(struct iwl_priv *priv,
  1020. struct ieee80211_key_conf *key, u8 sta_id)
  1021. {
  1022. int ret;
  1023. switch (key->alg) {
  1024. case ALG_CCMP:
  1025. ret = iwl4965_set_ccmp_dynamic_key_info(priv, key, sta_id);
  1026. break;
  1027. case ALG_TKIP:
  1028. ret = iwl4965_set_tkip_dynamic_key_info(priv, key, sta_id);
  1029. break;
  1030. case ALG_WEP:
  1031. ret = -EOPNOTSUPP;
  1032. break;
  1033. default:
  1034. IWL_ERROR("Unknown alg: %s alg = %d\n", __func__, key->alg);
  1035. ret = -EINVAL;
  1036. }
  1037. return ret;
  1038. }
  1039. static int iwl4965_remove_static_key(struct iwl_priv *priv)
  1040. {
  1041. int ret = -EOPNOTSUPP;
  1042. return ret;
  1043. }
  1044. static int iwl4965_set_static_key(struct iwl_priv *priv,
  1045. struct ieee80211_key_conf *key)
  1046. {
  1047. if (key->alg == ALG_WEP)
  1048. return -EOPNOTSUPP;
  1049. IWL_ERROR("Static key invalid: alg %d\n", key->alg);
  1050. return -EINVAL;
  1051. }
  1052. static void iwl4965_clear_free_frames(struct iwl_priv *priv)
  1053. {
  1054. struct list_head *element;
  1055. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1056. priv->frames_count);
  1057. while (!list_empty(&priv->free_frames)) {
  1058. element = priv->free_frames.next;
  1059. list_del(element);
  1060. kfree(list_entry(element, struct iwl4965_frame, list));
  1061. priv->frames_count--;
  1062. }
  1063. if (priv->frames_count) {
  1064. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1065. priv->frames_count);
  1066. priv->frames_count = 0;
  1067. }
  1068. }
  1069. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
  1070. {
  1071. struct iwl4965_frame *frame;
  1072. struct list_head *element;
  1073. if (list_empty(&priv->free_frames)) {
  1074. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1075. if (!frame) {
  1076. IWL_ERROR("Could not allocate frame!\n");
  1077. return NULL;
  1078. }
  1079. priv->frames_count++;
  1080. return frame;
  1081. }
  1082. element = priv->free_frames.next;
  1083. list_del(element);
  1084. return list_entry(element, struct iwl4965_frame, list);
  1085. }
  1086. static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
  1087. {
  1088. memset(frame, 0, sizeof(*frame));
  1089. list_add(&frame->list, &priv->free_frames);
  1090. }
  1091. unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
  1092. struct ieee80211_hdr *hdr,
  1093. const u8 *dest, int left)
  1094. {
  1095. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1096. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1097. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1098. return 0;
  1099. if (priv->ibss_beacon->len > left)
  1100. return 0;
  1101. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1102. return priv->ibss_beacon->len;
  1103. }
  1104. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1105. {
  1106. u8 i;
  1107. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1108. i = iwl4965_rates[i].next_ieee) {
  1109. if (rate_mask & (1 << i))
  1110. return iwl4965_rates[i].plcp;
  1111. }
  1112. return IWL_RATE_INVALID;
  1113. }
  1114. static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
  1115. {
  1116. struct iwl4965_frame *frame;
  1117. unsigned int frame_size;
  1118. int rc;
  1119. u8 rate;
  1120. frame = iwl4965_get_free_frame(priv);
  1121. if (!frame) {
  1122. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1123. "command.\n");
  1124. return -ENOMEM;
  1125. }
  1126. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1127. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1128. 0xFF0);
  1129. if (rate == IWL_INVALID_RATE)
  1130. rate = IWL_RATE_6M_PLCP;
  1131. } else {
  1132. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1133. if (rate == IWL_INVALID_RATE)
  1134. rate = IWL_RATE_1M_PLCP;
  1135. }
  1136. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1137. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1138. &frame->u.cmd[0]);
  1139. iwl4965_free_frame(priv, frame);
  1140. return rc;
  1141. }
  1142. /******************************************************************************
  1143. *
  1144. * Misc. internal state and helper functions
  1145. *
  1146. ******************************************************************************/
  1147. static void iwl4965_unset_hw_setting(struct iwl_priv *priv)
  1148. {
  1149. if (priv->hw_setting.shared_virt)
  1150. pci_free_consistent(priv->pci_dev,
  1151. sizeof(struct iwl4965_shared),
  1152. priv->hw_setting.shared_virt,
  1153. priv->hw_setting.shared_phys);
  1154. }
  1155. /**
  1156. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1157. *
  1158. * return : set the bit for each supported rate insert in ie
  1159. */
  1160. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1161. u16 basic_rate, int *left)
  1162. {
  1163. u16 ret_rates = 0, bit;
  1164. int i;
  1165. u8 *cnt = ie;
  1166. u8 *rates = ie + 1;
  1167. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1168. if (bit & supported_rate) {
  1169. ret_rates |= bit;
  1170. rates[*cnt] = iwl4965_rates[i].ieee |
  1171. ((bit & basic_rate) ? 0x80 : 0x00);
  1172. (*cnt)++;
  1173. (*left)--;
  1174. if ((*left <= 0) ||
  1175. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1176. break;
  1177. }
  1178. }
  1179. return ret_rates;
  1180. }
  1181. /**
  1182. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1183. */
  1184. static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
  1185. enum ieee80211_band band,
  1186. struct ieee80211_mgmt *frame,
  1187. int left, int is_direct)
  1188. {
  1189. int len = 0;
  1190. u8 *pos = NULL;
  1191. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1192. #ifdef CONFIG_IWL4965_HT
  1193. const struct ieee80211_supported_band *sband =
  1194. iwl4965_get_hw_mode(priv, band);
  1195. #endif /* CONFIG_IWL4965_HT */
  1196. /* Make sure there is enough space for the probe request,
  1197. * two mandatory IEs and the data */
  1198. left -= 24;
  1199. if (left < 0)
  1200. return 0;
  1201. len += 24;
  1202. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1203. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1204. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1205. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1206. frame->seq_ctrl = 0;
  1207. /* fill in our indirect SSID IE */
  1208. /* ...next IE... */
  1209. left -= 2;
  1210. if (left < 0)
  1211. return 0;
  1212. len += 2;
  1213. pos = &(frame->u.probe_req.variable[0]);
  1214. *pos++ = WLAN_EID_SSID;
  1215. *pos++ = 0;
  1216. /* fill in our direct SSID IE... */
  1217. if (is_direct) {
  1218. /* ...next IE... */
  1219. left -= 2 + priv->essid_len;
  1220. if (left < 0)
  1221. return 0;
  1222. /* ... fill it in... */
  1223. *pos++ = WLAN_EID_SSID;
  1224. *pos++ = priv->essid_len;
  1225. memcpy(pos, priv->essid, priv->essid_len);
  1226. pos += priv->essid_len;
  1227. len += 2 + priv->essid_len;
  1228. }
  1229. /* fill in supported rate */
  1230. /* ...next IE... */
  1231. left -= 2;
  1232. if (left < 0)
  1233. return 0;
  1234. /* ... fill it in... */
  1235. *pos++ = WLAN_EID_SUPP_RATES;
  1236. *pos = 0;
  1237. /* exclude 60M rate */
  1238. active_rates = priv->rates_mask;
  1239. active_rates &= ~IWL_RATE_60M_MASK;
  1240. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1241. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1242. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1243. active_rate_basic, &left);
  1244. active_rates &= ~ret_rates;
  1245. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1246. active_rate_basic, &left);
  1247. active_rates &= ~ret_rates;
  1248. len += 2 + *pos;
  1249. pos += (*pos) + 1;
  1250. if (active_rates == 0)
  1251. goto fill_end;
  1252. /* fill in supported extended rate */
  1253. /* ...next IE... */
  1254. left -= 2;
  1255. if (left < 0)
  1256. return 0;
  1257. /* ... fill it in... */
  1258. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1259. *pos = 0;
  1260. iwl4965_supported_rate_to_ie(pos, active_rates,
  1261. active_rate_basic, &left);
  1262. if (*pos > 0)
  1263. len += 2 + *pos;
  1264. #ifdef CONFIG_IWL4965_HT
  1265. if (sband && sband->ht_info.ht_supported) {
  1266. struct ieee80211_ht_cap *ht_cap;
  1267. pos += (*pos) + 1;
  1268. *pos++ = WLAN_EID_HT_CAPABILITY;
  1269. *pos++ = sizeof(struct ieee80211_ht_cap);
  1270. ht_cap = (struct ieee80211_ht_cap *)pos;
  1271. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1272. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1273. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1274. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1275. ((sband->ht_info.ampdu_density << 2) &
  1276. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1277. len += 2 + sizeof(struct ieee80211_ht_cap);
  1278. }
  1279. #endif /*CONFIG_IWL4965_HT */
  1280. fill_end:
  1281. return (u16)len;
  1282. }
  1283. /*
  1284. * QoS support
  1285. */
  1286. static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
  1287. struct iwl4965_qosparam_cmd *qos)
  1288. {
  1289. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1290. sizeof(struct iwl4965_qosparam_cmd), qos);
  1291. }
  1292. static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
  1293. {
  1294. unsigned long flags;
  1295. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1296. return;
  1297. if (!priv->qos_data.qos_enable)
  1298. return;
  1299. spin_lock_irqsave(&priv->lock, flags);
  1300. priv->qos_data.def_qos_parm.qos_flags = 0;
  1301. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1302. !priv->qos_data.qos_cap.q_AP.txop_request)
  1303. priv->qos_data.def_qos_parm.qos_flags |=
  1304. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1305. if (priv->qos_data.qos_active)
  1306. priv->qos_data.def_qos_parm.qos_flags |=
  1307. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1308. #ifdef CONFIG_IWL4965_HT
  1309. if (priv->current_ht_config.is_ht)
  1310. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1311. #endif /* CONFIG_IWL4965_HT */
  1312. spin_unlock_irqrestore(&priv->lock, flags);
  1313. if (force || iwl4965_is_associated(priv)) {
  1314. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1315. priv->qos_data.qos_active,
  1316. priv->qos_data.def_qos_parm.qos_flags);
  1317. iwl4965_send_qos_params_command(priv,
  1318. &(priv->qos_data.def_qos_parm));
  1319. }
  1320. }
  1321. /*
  1322. * Power management (not Tx power!) functions
  1323. */
  1324. #define MSEC_TO_USEC 1024
  1325. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1326. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1327. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1328. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1329. __constant_cpu_to_le32(X1), \
  1330. __constant_cpu_to_le32(X2), \
  1331. __constant_cpu_to_le32(X3), \
  1332. __constant_cpu_to_le32(X4)}
  1333. /* default power management (not Tx power) table values */
  1334. /* for tim 0-10 */
  1335. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1336. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1337. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1338. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1339. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1340. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1341. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1342. };
  1343. /* for tim > 10 */
  1344. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1345. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1346. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1347. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1348. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1349. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1350. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1351. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1352. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1353. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1354. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1355. };
  1356. int iwl4965_power_init_handle(struct iwl_priv *priv)
  1357. {
  1358. int rc = 0, i;
  1359. struct iwl4965_power_mgr *pow_data;
  1360. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1361. u16 pci_pm;
  1362. IWL_DEBUG_POWER("Initialize power \n");
  1363. pow_data = &(priv->power_data);
  1364. memset(pow_data, 0, sizeof(*pow_data));
  1365. pow_data->active_index = IWL_POWER_RANGE_0;
  1366. pow_data->dtim_val = 0xffff;
  1367. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1368. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1369. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1370. if (rc != 0)
  1371. return 0;
  1372. else {
  1373. struct iwl4965_powertable_cmd *cmd;
  1374. IWL_DEBUG_POWER("adjust power command flags\n");
  1375. for (i = 0; i < IWL_POWER_AC; i++) {
  1376. cmd = &pow_data->pwr_range_0[i].cmd;
  1377. if (pci_pm & 0x1)
  1378. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1379. else
  1380. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1381. }
  1382. }
  1383. return rc;
  1384. }
  1385. static int iwl4965_update_power_cmd(struct iwl_priv *priv,
  1386. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1387. {
  1388. int rc = 0, i;
  1389. u8 skip;
  1390. u32 max_sleep = 0;
  1391. struct iwl4965_power_vec_entry *range;
  1392. u8 period = 0;
  1393. struct iwl4965_power_mgr *pow_data;
  1394. if (mode > IWL_POWER_INDEX_5) {
  1395. IWL_DEBUG_POWER("Error invalid power mode \n");
  1396. return -1;
  1397. }
  1398. pow_data = &(priv->power_data);
  1399. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1400. range = &pow_data->pwr_range_0[0];
  1401. else
  1402. range = &pow_data->pwr_range_1[1];
  1403. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1404. #ifdef IWL_MAC80211_DISABLE
  1405. if (priv->assoc_network != NULL) {
  1406. unsigned long flags;
  1407. period = priv->assoc_network->tim.tim_period;
  1408. }
  1409. #endif /*IWL_MAC80211_DISABLE */
  1410. skip = range[mode].no_dtim;
  1411. if (period == 0) {
  1412. period = 1;
  1413. skip = 0;
  1414. }
  1415. if (skip == 0) {
  1416. max_sleep = period;
  1417. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1418. } else {
  1419. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1420. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1421. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1422. }
  1423. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1424. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1425. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1426. }
  1427. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1428. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1429. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1430. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1431. le32_to_cpu(cmd->sleep_interval[0]),
  1432. le32_to_cpu(cmd->sleep_interval[1]),
  1433. le32_to_cpu(cmd->sleep_interval[2]),
  1434. le32_to_cpu(cmd->sleep_interval[3]),
  1435. le32_to_cpu(cmd->sleep_interval[4]));
  1436. return rc;
  1437. }
  1438. static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
  1439. {
  1440. u32 uninitialized_var(final_mode);
  1441. int rc;
  1442. struct iwl4965_powertable_cmd cmd;
  1443. /* If on battery, set to 3,
  1444. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1445. * else user level */
  1446. switch (mode) {
  1447. case IWL_POWER_BATTERY:
  1448. final_mode = IWL_POWER_INDEX_3;
  1449. break;
  1450. case IWL_POWER_AC:
  1451. final_mode = IWL_POWER_MODE_CAM;
  1452. break;
  1453. default:
  1454. final_mode = mode;
  1455. break;
  1456. }
  1457. cmd.keep_alive_beacons = 0;
  1458. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1459. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1460. if (final_mode == IWL_POWER_MODE_CAM)
  1461. clear_bit(STATUS_POWER_PMI, &priv->status);
  1462. else
  1463. set_bit(STATUS_POWER_PMI, &priv->status);
  1464. return rc;
  1465. }
  1466. int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1467. {
  1468. /* Filter incoming packets to determine if they are targeted toward
  1469. * this network, discarding packets coming from ourselves */
  1470. switch (priv->iw_mode) {
  1471. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1472. /* packets from our adapter are dropped (echo) */
  1473. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1474. return 0;
  1475. /* {broad,multi}cast packets to our IBSS go through */
  1476. if (is_multicast_ether_addr(header->addr1))
  1477. return !compare_ether_addr(header->addr3, priv->bssid);
  1478. /* packets to our adapter go through */
  1479. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1480. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1481. /* packets from our adapter are dropped (echo) */
  1482. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1483. return 0;
  1484. /* {broad,multi}cast packets to our BSS go through */
  1485. if (is_multicast_ether_addr(header->addr1))
  1486. return !compare_ether_addr(header->addr2, priv->bssid);
  1487. /* packets to our adapter go through */
  1488. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1489. default:
  1490. break;
  1491. }
  1492. return 1;
  1493. }
  1494. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1495. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1496. {
  1497. switch (status & TX_STATUS_MSK) {
  1498. case TX_STATUS_SUCCESS:
  1499. return "SUCCESS";
  1500. TX_STATUS_ENTRY(SHORT_LIMIT);
  1501. TX_STATUS_ENTRY(LONG_LIMIT);
  1502. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1503. TX_STATUS_ENTRY(MGMNT_ABORT);
  1504. TX_STATUS_ENTRY(NEXT_FRAG);
  1505. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1506. TX_STATUS_ENTRY(DEST_PS);
  1507. TX_STATUS_ENTRY(ABORTED);
  1508. TX_STATUS_ENTRY(BT_RETRY);
  1509. TX_STATUS_ENTRY(STA_INVALID);
  1510. TX_STATUS_ENTRY(FRAG_DROPPED);
  1511. TX_STATUS_ENTRY(TID_DISABLE);
  1512. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1513. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1514. TX_STATUS_ENTRY(TX_LOCKED);
  1515. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1516. }
  1517. return "UNKNOWN";
  1518. }
  1519. /**
  1520. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1521. *
  1522. * NOTE: priv->mutex is not required before calling this function
  1523. */
  1524. static int iwl4965_scan_cancel(struct iwl_priv *priv)
  1525. {
  1526. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1527. clear_bit(STATUS_SCANNING, &priv->status);
  1528. return 0;
  1529. }
  1530. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1531. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1532. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1533. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1534. queue_work(priv->workqueue, &priv->abort_scan);
  1535. } else
  1536. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1537. return test_bit(STATUS_SCANNING, &priv->status);
  1538. }
  1539. return 0;
  1540. }
  1541. /**
  1542. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1543. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1544. *
  1545. * NOTE: priv->mutex must be held before calling this function
  1546. */
  1547. static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1548. {
  1549. unsigned long now = jiffies;
  1550. int ret;
  1551. ret = iwl4965_scan_cancel(priv);
  1552. if (ret && ms) {
  1553. mutex_unlock(&priv->mutex);
  1554. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1555. test_bit(STATUS_SCANNING, &priv->status))
  1556. msleep(1);
  1557. mutex_lock(&priv->mutex);
  1558. return test_bit(STATUS_SCANNING, &priv->status);
  1559. }
  1560. return ret;
  1561. }
  1562. static void iwl4965_sequence_reset(struct iwl_priv *priv)
  1563. {
  1564. /* Reset ieee stats */
  1565. /* We don't reset the net_device_stats (ieee->stats) on
  1566. * re-association */
  1567. priv->last_seq_num = -1;
  1568. priv->last_frag_num = -1;
  1569. priv->last_packet_time = 0;
  1570. iwl4965_scan_cancel(priv);
  1571. }
  1572. #define MAX_UCODE_BEACON_INTERVAL 4096
  1573. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1574. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1575. {
  1576. u16 new_val = 0;
  1577. u16 beacon_factor = 0;
  1578. beacon_factor =
  1579. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1580. / MAX_UCODE_BEACON_INTERVAL;
  1581. new_val = beacon_val / beacon_factor;
  1582. return cpu_to_le16(new_val);
  1583. }
  1584. static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
  1585. {
  1586. u64 interval_tm_unit;
  1587. u64 tsf, result;
  1588. unsigned long flags;
  1589. struct ieee80211_conf *conf = NULL;
  1590. u16 beacon_int = 0;
  1591. conf = ieee80211_get_hw_conf(priv->hw);
  1592. spin_lock_irqsave(&priv->lock, flags);
  1593. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1594. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1595. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1596. tsf = priv->timestamp1;
  1597. tsf = ((tsf << 32) | priv->timestamp0);
  1598. beacon_int = priv->beacon_int;
  1599. spin_unlock_irqrestore(&priv->lock, flags);
  1600. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1601. if (beacon_int == 0) {
  1602. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1603. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1604. } else {
  1605. priv->rxon_timing.beacon_interval =
  1606. cpu_to_le16(beacon_int);
  1607. priv->rxon_timing.beacon_interval =
  1608. iwl4965_adjust_beacon_interval(
  1609. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1610. }
  1611. priv->rxon_timing.atim_window = 0;
  1612. } else {
  1613. priv->rxon_timing.beacon_interval =
  1614. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1615. /* TODO: we need to get atim_window from upper stack
  1616. * for now we set to 0 */
  1617. priv->rxon_timing.atim_window = 0;
  1618. }
  1619. interval_tm_unit =
  1620. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1621. result = do_div(tsf, interval_tm_unit);
  1622. priv->rxon_timing.beacon_init_val =
  1623. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1624. IWL_DEBUG_ASSOC
  1625. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1626. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1627. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1628. le16_to_cpu(priv->rxon_timing.atim_window));
  1629. }
  1630. static int iwl4965_scan_initiate(struct iwl_priv *priv)
  1631. {
  1632. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1633. IWL_ERROR("APs don't scan.\n");
  1634. return 0;
  1635. }
  1636. if (!iwl4965_is_ready_rf(priv)) {
  1637. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1638. return -EIO;
  1639. }
  1640. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1641. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1642. return -EAGAIN;
  1643. }
  1644. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1645. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1646. "Queuing.\n");
  1647. return -EAGAIN;
  1648. }
  1649. IWL_DEBUG_INFO("Starting scan...\n");
  1650. priv->scan_bands = 2;
  1651. set_bit(STATUS_SCANNING, &priv->status);
  1652. priv->scan_start = jiffies;
  1653. priv->scan_pass_start = priv->scan_start;
  1654. queue_work(priv->workqueue, &priv->request_scan);
  1655. return 0;
  1656. }
  1657. static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
  1658. enum ieee80211_band band)
  1659. {
  1660. if (band == IEEE80211_BAND_5GHZ) {
  1661. priv->staging_rxon.flags &=
  1662. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1663. | RXON_FLG_CCK_MSK);
  1664. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1665. } else {
  1666. /* Copied from iwl4965_bg_post_associate() */
  1667. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1668. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1669. else
  1670. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1671. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  1672. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1673. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1674. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1675. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1676. }
  1677. }
  1678. /*
  1679. * initialize rxon structure with default values from eeprom
  1680. */
  1681. static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
  1682. {
  1683. const struct iwl_channel_info *ch_info;
  1684. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  1685. switch (priv->iw_mode) {
  1686. case IEEE80211_IF_TYPE_AP:
  1687. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  1688. break;
  1689. case IEEE80211_IF_TYPE_STA:
  1690. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1691. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1692. break;
  1693. case IEEE80211_IF_TYPE_IBSS:
  1694. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1695. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1696. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1697. RXON_FILTER_ACCEPT_GRP_MSK;
  1698. break;
  1699. case IEEE80211_IF_TYPE_MNTR:
  1700. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1701. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1702. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1703. break;
  1704. default:
  1705. IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
  1706. break;
  1707. }
  1708. #if 0
  1709. /* TODO: Figure out when short_preamble would be set and cache from
  1710. * that */
  1711. if (!hw_to_local(priv->hw)->short_preamble)
  1712. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1713. else
  1714. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1715. #endif
  1716. ch_info = iwl_get_channel_info(priv, priv->band,
  1717. le16_to_cpu(priv->staging_rxon.channel));
  1718. if (!ch_info)
  1719. ch_info = &priv->channel_info[0];
  1720. /*
  1721. * in some case A channels are all non IBSS
  1722. * in this case force B/G channel
  1723. */
  1724. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  1725. !(is_channel_ibss(ch_info)))
  1726. ch_info = &priv->channel_info[0];
  1727. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1728. priv->band = ch_info->band;
  1729. iwl4965_set_flags_for_phymode(priv, priv->band);
  1730. priv->staging_rxon.ofdm_basic_rates =
  1731. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1732. priv->staging_rxon.cck_basic_rates =
  1733. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1734. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  1735. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  1736. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1737. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1738. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1739. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1740. iwl4965_set_rxon_chain(priv);
  1741. }
  1742. static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
  1743. {
  1744. if (mode == IEEE80211_IF_TYPE_IBSS) {
  1745. const struct iwl_channel_info *ch_info;
  1746. ch_info = iwl_get_channel_info(priv,
  1747. priv->band,
  1748. le16_to_cpu(priv->staging_rxon.channel));
  1749. if (!ch_info || !is_channel_ibss(ch_info)) {
  1750. IWL_ERROR("channel %d not IBSS channel\n",
  1751. le16_to_cpu(priv->staging_rxon.channel));
  1752. return -EINVAL;
  1753. }
  1754. }
  1755. priv->iw_mode = mode;
  1756. iwl4965_connection_init_rx_config(priv);
  1757. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1758. iwlcore_clear_stations_table(priv);
  1759. /* dont commit rxon if rf-kill is on*/
  1760. if (!iwl4965_is_ready_rf(priv))
  1761. return -EAGAIN;
  1762. cancel_delayed_work(&priv->scan_check);
  1763. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  1764. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  1765. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1766. return -EAGAIN;
  1767. }
  1768. iwl4965_commit_rxon(priv);
  1769. return 0;
  1770. }
  1771. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1772. struct ieee80211_tx_control *ctl,
  1773. struct iwl_cmd *cmd,
  1774. struct sk_buff *skb_frag,
  1775. int sta_id)
  1776. {
  1777. struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  1778. switch (keyinfo->alg) {
  1779. case ALG_CCMP:
  1780. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  1781. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  1782. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1783. cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
  1784. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  1785. break;
  1786. case ALG_TKIP:
  1787. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  1788. ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
  1789. IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
  1790. IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
  1791. break;
  1792. case ALG_WEP:
  1793. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  1794. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  1795. if (keyinfo->keylen == 13)
  1796. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  1797. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  1798. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1799. "with key %d\n", ctl->key_idx);
  1800. break;
  1801. default:
  1802. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  1803. break;
  1804. }
  1805. }
  1806. /*
  1807. * handle build REPLY_TX command notification.
  1808. */
  1809. static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
  1810. struct iwl_cmd *cmd,
  1811. struct ieee80211_tx_control *ctrl,
  1812. struct ieee80211_hdr *hdr,
  1813. int is_unicast, u8 std_id)
  1814. {
  1815. __le16 *qc;
  1816. u16 fc = le16_to_cpu(hdr->frame_control);
  1817. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  1818. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1819. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  1820. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1821. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  1822. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1823. if (ieee80211_is_probe_response(fc) &&
  1824. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1825. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1826. } else {
  1827. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1828. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1829. }
  1830. if (ieee80211_is_back_request(fc))
  1831. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  1832. cmd->cmd.tx.sta_id = std_id;
  1833. if (ieee80211_get_morefrag(hdr))
  1834. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1835. qc = ieee80211_get_qos_ctrl(hdr);
  1836. if (qc) {
  1837. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  1838. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1839. } else
  1840. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1841. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  1842. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1843. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1844. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  1845. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1846. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1847. }
  1848. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1849. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1850. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1851. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  1852. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  1853. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  1854. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  1855. else
  1856. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  1857. } else {
  1858. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  1859. }
  1860. cmd->cmd.tx.driver_txop = 0;
  1861. cmd->cmd.tx.tx_flags = tx_flags;
  1862. cmd->cmd.tx.next_frame_len = 0;
  1863. }
  1864. static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  1865. {
  1866. /* 0 - mgmt, 1 - cnt, 2 - data */
  1867. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  1868. priv->tx_stats[idx].cnt++;
  1869. priv->tx_stats[idx].bytes += len;
  1870. }
  1871. /**
  1872. * iwl4965_get_sta_id - Find station's index within station table
  1873. *
  1874. * If new IBSS station, create new entry in station table
  1875. */
  1876. static int iwl4965_get_sta_id(struct iwl_priv *priv,
  1877. struct ieee80211_hdr *hdr)
  1878. {
  1879. int sta_id;
  1880. u16 fc = le16_to_cpu(hdr->frame_control);
  1881. DECLARE_MAC_BUF(mac);
  1882. /* If this frame is broadcast or management, use broadcast station id */
  1883. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1884. is_multicast_ether_addr(hdr->addr1))
  1885. return priv->hw_setting.bcast_sta_id;
  1886. switch (priv->iw_mode) {
  1887. /* If we are a client station in a BSS network, use the special
  1888. * AP station entry (that's the only station we communicate with) */
  1889. case IEEE80211_IF_TYPE_STA:
  1890. return IWL_AP_ID;
  1891. /* If we are an AP, then find the station, or use BCAST */
  1892. case IEEE80211_IF_TYPE_AP:
  1893. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1894. if (sta_id != IWL_INVALID_STATION)
  1895. return sta_id;
  1896. return priv->hw_setting.bcast_sta_id;
  1897. /* If this frame is going out to an IBSS network, find the station,
  1898. * or create a new station table entry */
  1899. case IEEE80211_IF_TYPE_IBSS:
  1900. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1901. if (sta_id != IWL_INVALID_STATION)
  1902. return sta_id;
  1903. /* Create new station table entry */
  1904. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  1905. 0, CMD_ASYNC, NULL);
  1906. if (sta_id != IWL_INVALID_STATION)
  1907. return sta_id;
  1908. IWL_DEBUG_DROP("Station %s not in station map. "
  1909. "Defaulting to broadcast...\n",
  1910. print_mac(mac, hdr->addr1));
  1911. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1912. return priv->hw_setting.bcast_sta_id;
  1913. default:
  1914. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  1915. return priv->hw_setting.bcast_sta_id;
  1916. }
  1917. }
  1918. /*
  1919. * start REPLY_TX command process
  1920. */
  1921. static int iwl4965_tx_skb(struct iwl_priv *priv,
  1922. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  1923. {
  1924. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1925. struct iwl4965_tfd_frame *tfd;
  1926. u32 *control_flags;
  1927. int txq_id = ctl->queue;
  1928. struct iwl4965_tx_queue *txq = NULL;
  1929. struct iwl4965_queue *q = NULL;
  1930. dma_addr_t phys_addr;
  1931. dma_addr_t txcmd_phys;
  1932. dma_addr_t scratch_phys;
  1933. struct iwl_cmd *out_cmd = NULL;
  1934. u16 len, idx, len_org;
  1935. u8 id, hdr_len, unicast;
  1936. u8 sta_id;
  1937. u16 seq_number = 0;
  1938. u16 fc;
  1939. __le16 *qc;
  1940. u8 wait_write_ptr = 0;
  1941. unsigned long flags;
  1942. int rc;
  1943. spin_lock_irqsave(&priv->lock, flags);
  1944. if (iwl4965_is_rfkill(priv)) {
  1945. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1946. goto drop_unlock;
  1947. }
  1948. if (!priv->vif) {
  1949. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  1950. goto drop_unlock;
  1951. }
  1952. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1953. IWL_ERROR("ERROR: No TX rate available.\n");
  1954. goto drop_unlock;
  1955. }
  1956. unicast = !is_multicast_ether_addr(hdr->addr1);
  1957. id = 0;
  1958. fc = le16_to_cpu(hdr->frame_control);
  1959. #ifdef CONFIG_IWLWIFI_DEBUG
  1960. if (ieee80211_is_auth(fc))
  1961. IWL_DEBUG_TX("Sending AUTH frame\n");
  1962. else if (ieee80211_is_assoc_request(fc))
  1963. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1964. else if (ieee80211_is_reassoc_request(fc))
  1965. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1966. #endif
  1967. /* drop all data frame if we are not associated */
  1968. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  1969. (!iwl4965_is_associated(priv) ||
  1970. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  1971. !priv->assoc_station_added)) {
  1972. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  1973. goto drop_unlock;
  1974. }
  1975. spin_unlock_irqrestore(&priv->lock, flags);
  1976. hdr_len = ieee80211_get_hdrlen(fc);
  1977. /* Find (or create) index into station table for destination station */
  1978. sta_id = iwl4965_get_sta_id(priv, hdr);
  1979. if (sta_id == IWL_INVALID_STATION) {
  1980. DECLARE_MAC_BUF(mac);
  1981. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  1982. print_mac(mac, hdr->addr1));
  1983. goto drop;
  1984. }
  1985. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1986. qc = ieee80211_get_qos_ctrl(hdr);
  1987. if (qc) {
  1988. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  1989. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  1990. IEEE80211_SCTL_SEQ;
  1991. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1992. (hdr->seq_ctrl &
  1993. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1994. seq_number += 0x10;
  1995. #ifdef CONFIG_IWL4965_HT
  1996. /* aggregation is on for this <sta,tid> */
  1997. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1998. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  1999. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  2000. #endif /* CONFIG_IWL4965_HT */
  2001. }
  2002. /* Descriptor for chosen Tx queue */
  2003. txq = &priv->txq[txq_id];
  2004. q = &txq->q;
  2005. spin_lock_irqsave(&priv->lock, flags);
  2006. /* Set up first empty TFD within this queue's circular TFD buffer */
  2007. tfd = &txq->bd[q->write_ptr];
  2008. memset(tfd, 0, sizeof(*tfd));
  2009. control_flags = (u32 *) tfd;
  2010. idx = get_cmd_index(q, q->write_ptr, 0);
  2011. /* Set up driver data for this TFD */
  2012. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2013. txq->txb[q->write_ptr].skb[0] = skb;
  2014. memcpy(&(txq->txb[q->write_ptr].status.control),
  2015. ctl, sizeof(struct ieee80211_tx_control));
  2016. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2017. out_cmd = &txq->cmd[idx];
  2018. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2019. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2020. /*
  2021. * Set up the Tx-command (not MAC!) header.
  2022. * Store the chosen Tx queue and TFD index within the sequence field;
  2023. * after Tx, uCode's Tx response will return this value so driver can
  2024. * locate the frame within the tx queue and do post-tx processing.
  2025. */
  2026. out_cmd->hdr.cmd = REPLY_TX;
  2027. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2028. INDEX_TO_SEQ(q->write_ptr)));
  2029. /* Copy MAC header from skb into command buffer */
  2030. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2031. /*
  2032. * Use the first empty entry in this queue's command buffer array
  2033. * to contain the Tx command and MAC header concatenated together
  2034. * (payload data will be in another buffer).
  2035. * Size of this varies, due to varying MAC header length.
  2036. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2037. * of the MAC header (device reads on dword boundaries).
  2038. * We'll tell device about this padding later.
  2039. */
  2040. len = priv->hw_setting.tx_cmd_len +
  2041. sizeof(struct iwl_cmd_header) + hdr_len;
  2042. len_org = len;
  2043. len = (len + 3) & ~3;
  2044. if (len_org != len)
  2045. len_org = 1;
  2046. else
  2047. len_org = 0;
  2048. /* Physical address of this Tx command's header (not MAC header!),
  2049. * within command buffer array. */
  2050. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2051. offsetof(struct iwl_cmd, hdr);
  2052. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2053. * first entry */
  2054. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2055. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2056. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
  2057. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2058. * if any (802.11 null frames have no payload). */
  2059. len = skb->len - hdr_len;
  2060. if (len) {
  2061. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2062. len, PCI_DMA_TODEVICE);
  2063. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2064. }
  2065. /* Tell 4965 about any 2-byte padding after MAC header */
  2066. if (len_org)
  2067. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2068. /* Total # bytes to be transmitted */
  2069. len = (u16)skb->len;
  2070. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2071. /* TODO need this for burst mode later on */
  2072. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2073. /* set is_hcca to 0; it probably will never be implemented */
  2074. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2075. iwl_update_tx_stats(priv, fc, len);
  2076. scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
  2077. offsetof(struct iwl4965_tx_cmd, scratch);
  2078. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2079. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2080. if (!ieee80211_get_morefrag(hdr)) {
  2081. txq->need_update = 1;
  2082. if (qc) {
  2083. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2084. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2085. }
  2086. } else {
  2087. wait_write_ptr = 1;
  2088. txq->need_update = 0;
  2089. }
  2090. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2091. sizeof(out_cmd->cmd.tx));
  2092. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2093. ieee80211_get_hdrlen(fc));
  2094. /* Set up entry for this TFD in Tx byte-count array */
  2095. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2096. /* Tell device the write index *just past* this latest filled TFD */
  2097. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  2098. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2099. spin_unlock_irqrestore(&priv->lock, flags);
  2100. if (rc)
  2101. return rc;
  2102. if ((iwl4965_queue_space(q) < q->high_mark)
  2103. && priv->mac80211_registered) {
  2104. if (wait_write_ptr) {
  2105. spin_lock_irqsave(&priv->lock, flags);
  2106. txq->need_update = 1;
  2107. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2108. spin_unlock_irqrestore(&priv->lock, flags);
  2109. }
  2110. ieee80211_stop_queue(priv->hw, ctl->queue);
  2111. }
  2112. return 0;
  2113. drop_unlock:
  2114. spin_unlock_irqrestore(&priv->lock, flags);
  2115. drop:
  2116. return -1;
  2117. }
  2118. static void iwl4965_set_rate(struct iwl_priv *priv)
  2119. {
  2120. const struct ieee80211_supported_band *hw = NULL;
  2121. struct ieee80211_rate *rate;
  2122. int i;
  2123. hw = iwl4965_get_hw_mode(priv, priv->band);
  2124. if (!hw) {
  2125. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2126. return;
  2127. }
  2128. priv->active_rate = 0;
  2129. priv->active_rate_basic = 0;
  2130. for (i = 0; i < hw->n_bitrates; i++) {
  2131. rate = &(hw->bitrates[i]);
  2132. if (rate->hw_value < IWL_RATE_COUNT)
  2133. priv->active_rate |= (1 << rate->hw_value);
  2134. }
  2135. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2136. priv->active_rate, priv->active_rate_basic);
  2137. /*
  2138. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2139. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2140. * OFDM
  2141. */
  2142. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2143. priv->staging_rxon.cck_basic_rates =
  2144. ((priv->active_rate_basic &
  2145. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2146. else
  2147. priv->staging_rxon.cck_basic_rates =
  2148. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2149. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2150. priv->staging_rxon.ofdm_basic_rates =
  2151. ((priv->active_rate_basic &
  2152. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2153. IWL_FIRST_OFDM_RATE) & 0xFF;
  2154. else
  2155. priv->staging_rxon.ofdm_basic_rates =
  2156. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2157. }
  2158. static void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2159. {
  2160. unsigned long flags;
  2161. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2162. return;
  2163. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2164. disable_radio ? "OFF" : "ON");
  2165. if (disable_radio) {
  2166. iwl4965_scan_cancel(priv);
  2167. /* FIXME: This is a workaround for AP */
  2168. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2169. spin_lock_irqsave(&priv->lock, flags);
  2170. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2171. CSR_UCODE_SW_BIT_RFKILL);
  2172. spin_unlock_irqrestore(&priv->lock, flags);
  2173. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2174. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2175. }
  2176. return;
  2177. }
  2178. spin_lock_irqsave(&priv->lock, flags);
  2179. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2180. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2181. spin_unlock_irqrestore(&priv->lock, flags);
  2182. /* wake up ucode */
  2183. msleep(10);
  2184. spin_lock_irqsave(&priv->lock, flags);
  2185. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2186. if (!iwl_grab_nic_access(priv))
  2187. iwl_release_nic_access(priv);
  2188. spin_unlock_irqrestore(&priv->lock, flags);
  2189. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2190. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2191. "disabled by HW switch\n");
  2192. return;
  2193. }
  2194. queue_work(priv->workqueue, &priv->restart);
  2195. return;
  2196. }
  2197. void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2198. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2199. {
  2200. u16 fc =
  2201. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2202. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2203. return;
  2204. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2205. return;
  2206. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2207. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2208. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2209. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2210. * Decryption will be done in SW. */
  2211. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2212. RX_RES_STATUS_BAD_KEY_TTAK)
  2213. break;
  2214. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2215. RX_RES_STATUS_BAD_ICV_MIC)
  2216. stats->flag |= RX_FLAG_MMIC_ERROR;
  2217. case RX_RES_STATUS_SEC_TYPE_WEP:
  2218. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2219. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2220. RX_RES_STATUS_DECRYPT_OK) {
  2221. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2222. stats->flag |= RX_FLAG_DECRYPTED;
  2223. }
  2224. break;
  2225. default:
  2226. break;
  2227. }
  2228. }
  2229. #define IWL_PACKET_RETRY_TIME HZ
  2230. int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2231. {
  2232. u16 sc = le16_to_cpu(header->seq_ctrl);
  2233. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2234. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2235. u16 *last_seq, *last_frag;
  2236. unsigned long *last_time;
  2237. switch (priv->iw_mode) {
  2238. case IEEE80211_IF_TYPE_IBSS:{
  2239. struct list_head *p;
  2240. struct iwl4965_ibss_seq *entry = NULL;
  2241. u8 *mac = header->addr2;
  2242. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2243. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2244. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2245. if (!compare_ether_addr(entry->mac, mac))
  2246. break;
  2247. }
  2248. if (p == &priv->ibss_mac_hash[index]) {
  2249. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2250. if (!entry) {
  2251. IWL_ERROR("Cannot malloc new mac entry\n");
  2252. return 0;
  2253. }
  2254. memcpy(entry->mac, mac, ETH_ALEN);
  2255. entry->seq_num = seq;
  2256. entry->frag_num = frag;
  2257. entry->packet_time = jiffies;
  2258. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2259. return 0;
  2260. }
  2261. last_seq = &entry->seq_num;
  2262. last_frag = &entry->frag_num;
  2263. last_time = &entry->packet_time;
  2264. break;
  2265. }
  2266. case IEEE80211_IF_TYPE_STA:
  2267. last_seq = &priv->last_seq_num;
  2268. last_frag = &priv->last_frag_num;
  2269. last_time = &priv->last_packet_time;
  2270. break;
  2271. default:
  2272. return 0;
  2273. }
  2274. if ((*last_seq == seq) &&
  2275. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2276. if (*last_frag == frag)
  2277. goto drop;
  2278. if (*last_frag + 1 != frag)
  2279. /* out-of-order fragment */
  2280. goto drop;
  2281. } else
  2282. *last_seq = seq;
  2283. *last_frag = frag;
  2284. *last_time = jiffies;
  2285. return 0;
  2286. drop:
  2287. return 1;
  2288. }
  2289. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2290. #include "iwl-spectrum.h"
  2291. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2292. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2293. #define TIME_UNIT 1024
  2294. /*
  2295. * extended beacon time format
  2296. * time in usec will be changed into a 32-bit value in 8:24 format
  2297. * the high 1 byte is the beacon counts
  2298. * the lower 3 bytes is the time in usec within one beacon interval
  2299. */
  2300. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2301. {
  2302. u32 quot;
  2303. u32 rem;
  2304. u32 interval = beacon_interval * 1024;
  2305. if (!interval || !usec)
  2306. return 0;
  2307. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2308. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2309. return (quot << 24) + rem;
  2310. }
  2311. /* base is usually what we get from ucode with each received frame,
  2312. * the same as HW timer counter counting down
  2313. */
  2314. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2315. {
  2316. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2317. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2318. u32 interval = beacon_interval * TIME_UNIT;
  2319. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2320. (addon & BEACON_TIME_MASK_HIGH);
  2321. if (base_low > addon_low)
  2322. res += base_low - addon_low;
  2323. else if (base_low < addon_low) {
  2324. res += interval + base_low - addon_low;
  2325. res += (1 << 24);
  2326. } else
  2327. res += (1 << 24);
  2328. return cpu_to_le32(res);
  2329. }
  2330. static int iwl4965_get_measurement(struct iwl_priv *priv,
  2331. struct ieee80211_measurement_params *params,
  2332. u8 type)
  2333. {
  2334. struct iwl4965_spectrum_cmd spectrum;
  2335. struct iwl4965_rx_packet *res;
  2336. struct iwl_host_cmd cmd = {
  2337. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2338. .data = (void *)&spectrum,
  2339. .meta.flags = CMD_WANT_SKB,
  2340. };
  2341. u32 add_time = le64_to_cpu(params->start_time);
  2342. int rc;
  2343. int spectrum_resp_status;
  2344. int duration = le16_to_cpu(params->duration);
  2345. if (iwl4965_is_associated(priv))
  2346. add_time =
  2347. iwl4965_usecs_to_beacons(
  2348. le64_to_cpu(params->start_time) - priv->last_tsf,
  2349. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2350. memset(&spectrum, 0, sizeof(spectrum));
  2351. spectrum.channel_count = cpu_to_le16(1);
  2352. spectrum.flags =
  2353. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2354. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2355. cmd.len = sizeof(spectrum);
  2356. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2357. if (iwl4965_is_associated(priv))
  2358. spectrum.start_time =
  2359. iwl4965_add_beacon_time(priv->last_beacon_time,
  2360. add_time,
  2361. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2362. else
  2363. spectrum.start_time = 0;
  2364. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2365. spectrum.channels[0].channel = params->channel;
  2366. spectrum.channels[0].type = type;
  2367. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2368. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2369. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2370. rc = iwl_send_cmd_sync(priv, &cmd);
  2371. if (rc)
  2372. return rc;
  2373. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2374. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2375. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2376. rc = -EIO;
  2377. }
  2378. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2379. switch (spectrum_resp_status) {
  2380. case 0: /* Command will be handled */
  2381. if (res->u.spectrum.id != 0xff) {
  2382. IWL_DEBUG_INFO
  2383. ("Replaced existing measurement: %d\n",
  2384. res->u.spectrum.id);
  2385. priv->measurement_status &= ~MEASUREMENT_READY;
  2386. }
  2387. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2388. rc = 0;
  2389. break;
  2390. case 1: /* Command will not be handled */
  2391. rc = -EAGAIN;
  2392. break;
  2393. }
  2394. dev_kfree_skb_any(cmd.meta.u.skb);
  2395. return rc;
  2396. }
  2397. #endif
  2398. static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
  2399. struct iwl4965_tx_info *tx_sta)
  2400. {
  2401. tx_sta->status.ack_signal = 0;
  2402. tx_sta->status.excessive_retries = 0;
  2403. tx_sta->status.queue_length = 0;
  2404. tx_sta->status.queue_number = 0;
  2405. if (in_interrupt())
  2406. ieee80211_tx_status_irqsafe(priv->hw,
  2407. tx_sta->skb[0], &(tx_sta->status));
  2408. else
  2409. ieee80211_tx_status(priv->hw,
  2410. tx_sta->skb[0], &(tx_sta->status));
  2411. tx_sta->skb[0] = NULL;
  2412. }
  2413. /**
  2414. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2415. *
  2416. * When FW advances 'R' index, all entries between old and new 'R' index
  2417. * need to be reclaimed. As result, some free space forms. If there is
  2418. * enough free space (> low mark), wake the stack that feeds us.
  2419. */
  2420. int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2421. {
  2422. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2423. struct iwl4965_queue *q = &txq->q;
  2424. int nfreed = 0;
  2425. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2426. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2427. "is out of range [0-%d] %d %d.\n", txq_id,
  2428. index, q->n_bd, q->write_ptr, q->read_ptr);
  2429. return 0;
  2430. }
  2431. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2432. q->read_ptr != index;
  2433. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2434. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2435. iwl4965_txstatus_to_ieee(priv,
  2436. &(txq->txb[txq->q.read_ptr]));
  2437. iwl4965_hw_txq_free_tfd(priv, txq);
  2438. } else if (nfreed > 1) {
  2439. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2440. q->write_ptr, q->read_ptr);
  2441. queue_work(priv->workqueue, &priv->restart);
  2442. }
  2443. nfreed++;
  2444. }
  2445. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2446. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2447. priv->mac80211_registered)
  2448. ieee80211_wake_queue(priv->hw, txq_id); */
  2449. return nfreed;
  2450. }
  2451. static int iwl4965_is_tx_success(u32 status)
  2452. {
  2453. status &= TX_STATUS_MSK;
  2454. return (status == TX_STATUS_SUCCESS)
  2455. || (status == TX_STATUS_DIRECT_DONE);
  2456. }
  2457. /******************************************************************************
  2458. *
  2459. * Generic RX handler implementations
  2460. *
  2461. ******************************************************************************/
  2462. #ifdef CONFIG_IWL4965_HT
  2463. static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
  2464. struct ieee80211_hdr *hdr)
  2465. {
  2466. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2467. return IWL_AP_ID;
  2468. else {
  2469. u8 *da = ieee80211_get_DA(hdr);
  2470. return iwl4965_hw_find_station(priv, da);
  2471. }
  2472. }
  2473. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2474. struct iwl_priv *priv, int txq_id, int idx)
  2475. {
  2476. if (priv->txq[txq_id].txb[idx].skb[0])
  2477. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2478. txb[idx].skb[0]->data;
  2479. return NULL;
  2480. }
  2481. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2482. {
  2483. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2484. tx_resp->frame_count);
  2485. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2486. }
  2487. /**
  2488. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2489. */
  2490. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2491. struct iwl4965_ht_agg *agg,
  2492. struct iwl4965_tx_resp_agg *tx_resp,
  2493. u16 start_idx)
  2494. {
  2495. u16 status;
  2496. struct agg_tx_status *frame_status = &tx_resp->status;
  2497. struct ieee80211_tx_status *tx_status = NULL;
  2498. struct ieee80211_hdr *hdr = NULL;
  2499. int i, sh;
  2500. int txq_id, idx;
  2501. u16 seq;
  2502. if (agg->wait_for_ba)
  2503. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2504. agg->frame_count = tx_resp->frame_count;
  2505. agg->start_idx = start_idx;
  2506. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2507. agg->bitmap = 0;
  2508. /* # frames attempted by Tx command */
  2509. if (agg->frame_count == 1) {
  2510. /* Only one frame was attempted; no block-ack will arrive */
  2511. status = le16_to_cpu(frame_status[0].status);
  2512. seq = le16_to_cpu(frame_status[0].sequence);
  2513. idx = SEQ_TO_INDEX(seq);
  2514. txq_id = SEQ_TO_QUEUE(seq);
  2515. /* FIXME: code repetition */
  2516. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2517. agg->frame_count, agg->start_idx, idx);
  2518. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2519. tx_status->retry_count = tx_resp->failure_frame;
  2520. tx_status->queue_number = status & 0xff;
  2521. tx_status->queue_length = tx_resp->failure_rts;
  2522. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2523. tx_status->flags = iwl4965_is_tx_success(status)?
  2524. IEEE80211_TX_STATUS_ACK : 0;
  2525. iwl4965_hwrate_to_tx_control(priv,
  2526. le32_to_cpu(tx_resp->rate_n_flags),
  2527. &tx_status->control);
  2528. /* FIXME: code repetition end */
  2529. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2530. status & 0xff, tx_resp->failure_frame);
  2531. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2532. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2533. agg->wait_for_ba = 0;
  2534. } else {
  2535. /* Two or more frames were attempted; expect block-ack */
  2536. u64 bitmap = 0;
  2537. int start = agg->start_idx;
  2538. /* Construct bit-map of pending frames within Tx window */
  2539. for (i = 0; i < agg->frame_count; i++) {
  2540. u16 sc;
  2541. status = le16_to_cpu(frame_status[i].status);
  2542. seq = le16_to_cpu(frame_status[i].sequence);
  2543. idx = SEQ_TO_INDEX(seq);
  2544. txq_id = SEQ_TO_QUEUE(seq);
  2545. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2546. AGG_TX_STATE_ABORT_MSK))
  2547. continue;
  2548. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2549. agg->frame_count, txq_id, idx);
  2550. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2551. sc = le16_to_cpu(hdr->seq_ctrl);
  2552. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2553. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2554. " idx=%d, seq_idx=%d, seq=%d\n",
  2555. idx, SEQ_TO_SN(sc),
  2556. hdr->seq_ctrl);
  2557. return -1;
  2558. }
  2559. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2560. i, idx, SEQ_TO_SN(sc));
  2561. sh = idx - start;
  2562. if (sh > 64) {
  2563. sh = (start - idx) + 0xff;
  2564. bitmap = bitmap << sh;
  2565. sh = 0;
  2566. start = idx;
  2567. } else if (sh < -64)
  2568. sh = 0xff - (start - idx);
  2569. else if (sh < 0) {
  2570. sh = start - idx;
  2571. start = idx;
  2572. bitmap = bitmap << sh;
  2573. sh = 0;
  2574. }
  2575. bitmap |= (1 << sh);
  2576. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2577. start, (u32)(bitmap & 0xFFFFFFFF));
  2578. }
  2579. agg->bitmap = bitmap;
  2580. agg->start_idx = start;
  2581. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2582. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2583. agg->frame_count, agg->start_idx,
  2584. agg->bitmap);
  2585. if (bitmap)
  2586. agg->wait_for_ba = 1;
  2587. }
  2588. return 0;
  2589. }
  2590. #endif
  2591. /**
  2592. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2593. */
  2594. static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
  2595. struct iwl4965_rx_mem_buffer *rxb)
  2596. {
  2597. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2598. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2599. int txq_id = SEQ_TO_QUEUE(sequence);
  2600. int index = SEQ_TO_INDEX(sequence);
  2601. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2602. struct ieee80211_tx_status *tx_status;
  2603. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2604. u32 status = le32_to_cpu(tx_resp->status);
  2605. #ifdef CONFIG_IWL4965_HT
  2606. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2607. struct ieee80211_hdr *hdr;
  2608. __le16 *qc;
  2609. #endif
  2610. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2611. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2612. "is out of range [0-%d] %d %d\n", txq_id,
  2613. index, txq->q.n_bd, txq->q.write_ptr,
  2614. txq->q.read_ptr);
  2615. return;
  2616. }
  2617. #ifdef CONFIG_IWL4965_HT
  2618. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2619. qc = ieee80211_get_qos_ctrl(hdr);
  2620. if (qc)
  2621. tid = le16_to_cpu(*qc) & 0xf;
  2622. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2623. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2624. IWL_ERROR("Station not known\n");
  2625. return;
  2626. }
  2627. if (txq->sched_retry) {
  2628. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2629. struct iwl4965_ht_agg *agg = NULL;
  2630. if (!qc)
  2631. return;
  2632. agg = &priv->stations[sta_id].tid[tid].agg;
  2633. iwl4965_tx_status_reply_tx(priv, agg,
  2634. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2635. if ((tx_resp->frame_count == 1) &&
  2636. !iwl4965_is_tx_success(status)) {
  2637. /* TODO: send BAR */
  2638. }
  2639. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2640. int freed;
  2641. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2642. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2643. "%d index %d\n", scd_ssn , index);
  2644. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2645. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2646. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2647. txq_id >= 0 && priv->mac80211_registered &&
  2648. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2649. ieee80211_wake_queue(priv->hw, txq_id);
  2650. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2651. }
  2652. } else {
  2653. #endif /* CONFIG_IWL4965_HT */
  2654. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2655. tx_status->retry_count = tx_resp->failure_frame;
  2656. tx_status->queue_number = status;
  2657. tx_status->queue_length = tx_resp->bt_kill_count;
  2658. tx_status->queue_length |= tx_resp->failure_rts;
  2659. tx_status->flags =
  2660. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2661. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2662. &tx_status->control);
  2663. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2664. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2665. status, le32_to_cpu(tx_resp->rate_n_flags),
  2666. tx_resp->failure_frame);
  2667. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2668. if (index != -1) {
  2669. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2670. #ifdef CONFIG_IWL4965_HT
  2671. if (tid != MAX_TID_COUNT)
  2672. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2673. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2674. (txq_id >= 0) &&
  2675. priv->mac80211_registered)
  2676. ieee80211_wake_queue(priv->hw, txq_id);
  2677. if (tid != MAX_TID_COUNT)
  2678. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2679. #endif
  2680. }
  2681. #ifdef CONFIG_IWL4965_HT
  2682. }
  2683. #endif /* CONFIG_IWL4965_HT */
  2684. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2685. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2686. }
  2687. static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
  2688. struct iwl4965_rx_mem_buffer *rxb)
  2689. {
  2690. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2691. struct iwl4965_alive_resp *palive;
  2692. struct delayed_work *pwork;
  2693. palive = &pkt->u.alive_frame;
  2694. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2695. "0x%01X 0x%01X\n",
  2696. palive->is_valid, palive->ver_type,
  2697. palive->ver_subtype);
  2698. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2699. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2700. memcpy(&priv->card_alive_init,
  2701. &pkt->u.alive_frame,
  2702. sizeof(struct iwl4965_init_alive_resp));
  2703. pwork = &priv->init_alive_start;
  2704. } else {
  2705. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2706. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2707. sizeof(struct iwl4965_alive_resp));
  2708. pwork = &priv->alive_start;
  2709. }
  2710. /* We delay the ALIVE response by 5ms to
  2711. * give the HW RF Kill time to activate... */
  2712. if (palive->is_valid == UCODE_VALID_OK)
  2713. queue_delayed_work(priv->workqueue, pwork,
  2714. msecs_to_jiffies(5));
  2715. else
  2716. IWL_WARNING("uCode did not respond OK.\n");
  2717. }
  2718. static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
  2719. struct iwl4965_rx_mem_buffer *rxb)
  2720. {
  2721. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2722. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2723. return;
  2724. }
  2725. static void iwl4965_rx_reply_error(struct iwl_priv *priv,
  2726. struct iwl4965_rx_mem_buffer *rxb)
  2727. {
  2728. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2729. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2730. "seq 0x%04X ser 0x%08X\n",
  2731. le32_to_cpu(pkt->u.err_resp.error_type),
  2732. get_cmd_string(pkt->u.err_resp.cmd_id),
  2733. pkt->u.err_resp.cmd_id,
  2734. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2735. le32_to_cpu(pkt->u.err_resp.error_info));
  2736. }
  2737. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2738. static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2739. {
  2740. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2741. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2742. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  2743. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2744. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2745. rxon->channel = csa->channel;
  2746. priv->staging_rxon.channel = csa->channel;
  2747. }
  2748. static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2749. struct iwl4965_rx_mem_buffer *rxb)
  2750. {
  2751. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2752. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2753. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2754. if (!report->state) {
  2755. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2756. "Spectrum Measure Notification: Start\n");
  2757. return;
  2758. }
  2759. memcpy(&priv->measure_report, report, sizeof(*report));
  2760. priv->measurement_status |= MEASUREMENT_READY;
  2761. #endif
  2762. }
  2763. static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
  2764. struct iwl4965_rx_mem_buffer *rxb)
  2765. {
  2766. #ifdef CONFIG_IWLWIFI_DEBUG
  2767. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2768. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2769. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2770. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2771. #endif
  2772. }
  2773. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2774. struct iwl4965_rx_mem_buffer *rxb)
  2775. {
  2776. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2777. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2778. "notification for %s:\n",
  2779. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2780. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  2781. }
  2782. static void iwl4965_bg_beacon_update(struct work_struct *work)
  2783. {
  2784. struct iwl_priv *priv =
  2785. container_of(work, struct iwl_priv, beacon_update);
  2786. struct sk_buff *beacon;
  2787. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2788. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  2789. if (!beacon) {
  2790. IWL_ERROR("update beacon failed\n");
  2791. return;
  2792. }
  2793. mutex_lock(&priv->mutex);
  2794. /* new beacon skb is allocated every time; dispose previous.*/
  2795. if (priv->ibss_beacon)
  2796. dev_kfree_skb(priv->ibss_beacon);
  2797. priv->ibss_beacon = beacon;
  2798. mutex_unlock(&priv->mutex);
  2799. iwl4965_send_beacon_cmd(priv);
  2800. }
  2801. static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
  2802. struct iwl4965_rx_mem_buffer *rxb)
  2803. {
  2804. #ifdef CONFIG_IWLWIFI_DEBUG
  2805. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2806. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  2807. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  2808. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  2809. "tsf %d %d rate %d\n",
  2810. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  2811. beacon->beacon_notify_hdr.failure_frame,
  2812. le32_to_cpu(beacon->ibss_mgr_status),
  2813. le32_to_cpu(beacon->high_tsf),
  2814. le32_to_cpu(beacon->low_tsf), rate);
  2815. #endif
  2816. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  2817. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  2818. queue_work(priv->workqueue, &priv->beacon_update);
  2819. }
  2820. /* Service response to REPLY_SCAN_CMD (0x80) */
  2821. static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
  2822. struct iwl4965_rx_mem_buffer *rxb)
  2823. {
  2824. #ifdef CONFIG_IWLWIFI_DEBUG
  2825. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2826. struct iwl4965_scanreq_notification *notif =
  2827. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  2828. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  2829. #endif
  2830. }
  2831. /* Service SCAN_START_NOTIFICATION (0x82) */
  2832. static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
  2833. struct iwl4965_rx_mem_buffer *rxb)
  2834. {
  2835. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2836. struct iwl4965_scanstart_notification *notif =
  2837. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  2838. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  2839. IWL_DEBUG_SCAN("Scan start: "
  2840. "%d [802.11%s] "
  2841. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  2842. notif->channel,
  2843. notif->band ? "bg" : "a",
  2844. notif->tsf_high,
  2845. notif->tsf_low, notif->status, notif->beacon_timer);
  2846. }
  2847. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  2848. static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
  2849. struct iwl4965_rx_mem_buffer *rxb)
  2850. {
  2851. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2852. struct iwl4965_scanresults_notification *notif =
  2853. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  2854. IWL_DEBUG_SCAN("Scan ch.res: "
  2855. "%d [802.11%s] "
  2856. "(TSF: 0x%08X:%08X) - %d "
  2857. "elapsed=%lu usec (%dms since last)\n",
  2858. notif->channel,
  2859. notif->band ? "bg" : "a",
  2860. le32_to_cpu(notif->tsf_high),
  2861. le32_to_cpu(notif->tsf_low),
  2862. le32_to_cpu(notif->statistics[0]),
  2863. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  2864. jiffies_to_msecs(elapsed_jiffies
  2865. (priv->last_scan_jiffies, jiffies)));
  2866. priv->last_scan_jiffies = jiffies;
  2867. priv->next_scan_jiffies = 0;
  2868. }
  2869. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  2870. static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
  2871. struct iwl4965_rx_mem_buffer *rxb)
  2872. {
  2873. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2874. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  2875. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  2876. scan_notif->scanned_channels,
  2877. scan_notif->tsf_low,
  2878. scan_notif->tsf_high, scan_notif->status);
  2879. /* The HW is no longer scanning */
  2880. clear_bit(STATUS_SCAN_HW, &priv->status);
  2881. /* The scan completion notification came in, so kill that timer... */
  2882. cancel_delayed_work(&priv->scan_check);
  2883. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  2884. (priv->scan_bands == 2) ? "2.4" : "5.2",
  2885. jiffies_to_msecs(elapsed_jiffies
  2886. (priv->scan_pass_start, jiffies)));
  2887. /* Remove this scanned band from the list
  2888. * of pending bands to scan */
  2889. priv->scan_bands--;
  2890. /* If a request to abort was given, or the scan did not succeed
  2891. * then we reset the scan state machine and terminate,
  2892. * re-queuing another scan if one has been requested */
  2893. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2894. IWL_DEBUG_INFO("Aborted scan completed.\n");
  2895. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  2896. } else {
  2897. /* If there are more bands on this scan pass reschedule */
  2898. if (priv->scan_bands > 0)
  2899. goto reschedule;
  2900. }
  2901. priv->last_scan_jiffies = jiffies;
  2902. priv->next_scan_jiffies = 0;
  2903. IWL_DEBUG_INFO("Setting scan to off\n");
  2904. clear_bit(STATUS_SCANNING, &priv->status);
  2905. IWL_DEBUG_INFO("Scan took %dms\n",
  2906. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  2907. queue_work(priv->workqueue, &priv->scan_completed);
  2908. return;
  2909. reschedule:
  2910. priv->scan_pass_start = jiffies;
  2911. queue_work(priv->workqueue, &priv->request_scan);
  2912. }
  2913. /* Handle notification from uCode that card's power state is changing
  2914. * due to software, hardware, or critical temperature RFKILL */
  2915. static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
  2916. struct iwl4965_rx_mem_buffer *rxb)
  2917. {
  2918. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2919. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  2920. unsigned long status = priv->status;
  2921. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  2922. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  2923. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  2924. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  2925. RF_CARD_DISABLED)) {
  2926. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2927. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2928. if (!iwl_grab_nic_access(priv)) {
  2929. iwl_write_direct32(
  2930. priv, HBUS_TARG_MBX_C,
  2931. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2932. iwl_release_nic_access(priv);
  2933. }
  2934. if (!(flags & RXON_CARD_DISABLED)) {
  2935. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2936. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2937. if (!iwl_grab_nic_access(priv)) {
  2938. iwl_write_direct32(
  2939. priv, HBUS_TARG_MBX_C,
  2940. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2941. iwl_release_nic_access(priv);
  2942. }
  2943. }
  2944. if (flags & RF_CARD_DISABLED) {
  2945. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2946. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  2947. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2948. if (!iwl_grab_nic_access(priv))
  2949. iwl_release_nic_access(priv);
  2950. }
  2951. }
  2952. if (flags & HW_CARD_DISABLED)
  2953. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2954. else
  2955. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2956. if (flags & SW_CARD_DISABLED)
  2957. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2958. else
  2959. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2960. if (!(flags & RXON_CARD_DISABLED))
  2961. iwl4965_scan_cancel(priv);
  2962. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  2963. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  2964. (test_bit(STATUS_RF_KILL_SW, &status) !=
  2965. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  2966. queue_work(priv->workqueue, &priv->rf_kill);
  2967. else
  2968. wake_up_interruptible(&priv->wait_command_queue);
  2969. }
  2970. /**
  2971. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  2972. *
  2973. * Setup the RX handlers for each of the reply types sent from the uCode
  2974. * to the host.
  2975. *
  2976. * This function chains into the hardware specific files for them to setup
  2977. * any hardware specific handlers as well.
  2978. */
  2979. static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
  2980. {
  2981. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  2982. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  2983. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  2984. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  2985. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  2986. iwl4965_rx_spectrum_measure_notif;
  2987. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  2988. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  2989. iwl4965_rx_pm_debug_statistics_notif;
  2990. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  2991. /*
  2992. * The same handler is used for both the REPLY to a discrete
  2993. * statistics request from the host as well as for the periodic
  2994. * statistics notifications (after received beacons) from the uCode.
  2995. */
  2996. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  2997. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  2998. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  2999. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3000. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3001. iwl4965_rx_scan_results_notif;
  3002. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3003. iwl4965_rx_scan_complete_notif;
  3004. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3005. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3006. /* Set up hardware specific Rx handlers */
  3007. iwl4965_hw_rx_handler_setup(priv);
  3008. }
  3009. /**
  3010. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3011. * @rxb: Rx buffer to reclaim
  3012. *
  3013. * If an Rx buffer has an async callback associated with it the callback
  3014. * will be executed. The attached skb (if present) will only be freed
  3015. * if the callback returns 1
  3016. */
  3017. static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
  3018. struct iwl4965_rx_mem_buffer *rxb)
  3019. {
  3020. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3021. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3022. int txq_id = SEQ_TO_QUEUE(sequence);
  3023. int index = SEQ_TO_INDEX(sequence);
  3024. int huge = sequence & SEQ_HUGE_FRAME;
  3025. int cmd_index;
  3026. struct iwl_cmd *cmd;
  3027. /* If a Tx command is being handled and it isn't in the actual
  3028. * command queue then there a command routing bug has been introduced
  3029. * in the queue management code. */
  3030. if (txq_id != IWL_CMD_QUEUE_NUM)
  3031. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3032. txq_id, pkt->hdr.cmd);
  3033. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3034. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3035. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3036. /* Input error checking is done when commands are added to queue. */
  3037. if (cmd->meta.flags & CMD_WANT_SKB) {
  3038. cmd->meta.source->u.skb = rxb->skb;
  3039. rxb->skb = NULL;
  3040. } else if (cmd->meta.u.callback &&
  3041. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3042. rxb->skb = NULL;
  3043. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3044. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3045. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3046. wake_up_interruptible(&priv->wait_command_queue);
  3047. }
  3048. }
  3049. /************************** RX-FUNCTIONS ****************************/
  3050. /*
  3051. * Rx theory of operation
  3052. *
  3053. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3054. * each of which point to Receive Buffers to be filled by 4965. These get
  3055. * used not only for Rx frames, but for any command response or notification
  3056. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3057. * of indexes into the circular buffer.
  3058. *
  3059. * Rx Queue Indexes
  3060. * The host/firmware share two index registers for managing the Rx buffers.
  3061. *
  3062. * The READ index maps to the first position that the firmware may be writing
  3063. * to -- the driver can read up to (but not including) this position and get
  3064. * good data.
  3065. * The READ index is managed by the firmware once the card is enabled.
  3066. *
  3067. * The WRITE index maps to the last position the driver has read from -- the
  3068. * position preceding WRITE is the last slot the firmware can place a packet.
  3069. *
  3070. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3071. * WRITE = READ.
  3072. *
  3073. * During initialization, the host sets up the READ queue position to the first
  3074. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3075. *
  3076. * When the firmware places a packet in a buffer, it will advance the READ index
  3077. * and fire the RX interrupt. The driver can then query the READ index and
  3078. * process as many packets as possible, moving the WRITE index forward as it
  3079. * resets the Rx queue buffers with new memory.
  3080. *
  3081. * The management in the driver is as follows:
  3082. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3083. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3084. * to replenish the iwl->rxq->rx_free.
  3085. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3086. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3087. * 'processed' and 'read' driver indexes as well)
  3088. * + A received packet is processed and handed to the kernel network stack,
  3089. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3090. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3091. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3092. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3093. * were enough free buffers and RX_STALLED is set it is cleared.
  3094. *
  3095. *
  3096. * Driver sequence:
  3097. *
  3098. * iwl4965_rx_queue_alloc() Allocates rx_free
  3099. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3100. * iwl4965_rx_queue_restock
  3101. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3102. * queue, updates firmware pointers, and updates
  3103. * the WRITE index. If insufficient rx_free buffers
  3104. * are available, schedules iwl4965_rx_replenish
  3105. *
  3106. * -- enable interrupts --
  3107. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3108. * READ INDEX, detaching the SKB from the pool.
  3109. * Moves the packet buffer from queue to rx_used.
  3110. * Calls iwl4965_rx_queue_restock to refill any empty
  3111. * slots.
  3112. * ...
  3113. *
  3114. */
  3115. /**
  3116. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3117. */
  3118. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3119. {
  3120. int s = q->read - q->write;
  3121. if (s <= 0)
  3122. s += RX_QUEUE_SIZE;
  3123. /* keep some buffer to not confuse full and empty queue */
  3124. s -= 2;
  3125. if (s < 0)
  3126. s = 0;
  3127. return s;
  3128. }
  3129. /**
  3130. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3131. */
  3132. int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
  3133. {
  3134. u32 reg = 0;
  3135. int rc = 0;
  3136. unsigned long flags;
  3137. spin_lock_irqsave(&q->lock, flags);
  3138. if (q->need_update == 0)
  3139. goto exit_unlock;
  3140. /* If power-saving is in use, make sure device is awake */
  3141. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3142. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3143. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3144. iwl_set_bit(priv, CSR_GP_CNTRL,
  3145. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3146. goto exit_unlock;
  3147. }
  3148. rc = iwl_grab_nic_access(priv);
  3149. if (rc)
  3150. goto exit_unlock;
  3151. /* Device expects a multiple of 8 */
  3152. iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3153. q->write & ~0x7);
  3154. iwl_release_nic_access(priv);
  3155. /* Else device is assumed to be awake */
  3156. } else
  3157. /* Device expects a multiple of 8 */
  3158. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3159. q->need_update = 0;
  3160. exit_unlock:
  3161. spin_unlock_irqrestore(&q->lock, flags);
  3162. return rc;
  3163. }
  3164. /**
  3165. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3166. */
  3167. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3168. dma_addr_t dma_addr)
  3169. {
  3170. return cpu_to_le32((u32)(dma_addr >> 8));
  3171. }
  3172. /**
  3173. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3174. *
  3175. * If there are slots in the RX queue that need to be restocked,
  3176. * and we have free pre-allocated buffers, fill the ranks as much
  3177. * as we can, pulling from rx_free.
  3178. *
  3179. * This moves the 'write' index forward to catch up with 'processed', and
  3180. * also updates the memory address in the firmware to reference the new
  3181. * target buffer.
  3182. */
  3183. static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
  3184. {
  3185. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3186. struct list_head *element;
  3187. struct iwl4965_rx_mem_buffer *rxb;
  3188. unsigned long flags;
  3189. int write, rc;
  3190. spin_lock_irqsave(&rxq->lock, flags);
  3191. write = rxq->write & ~0x7;
  3192. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3193. /* Get next free Rx buffer, remove from free list */
  3194. element = rxq->rx_free.next;
  3195. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3196. list_del(element);
  3197. /* Point to Rx buffer via next RBD in circular buffer */
  3198. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3199. rxq->queue[rxq->write] = rxb;
  3200. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3201. rxq->free_count--;
  3202. }
  3203. spin_unlock_irqrestore(&rxq->lock, flags);
  3204. /* If the pre-allocated buffer pool is dropping low, schedule to
  3205. * refill it */
  3206. if (rxq->free_count <= RX_LOW_WATERMARK)
  3207. queue_work(priv->workqueue, &priv->rx_replenish);
  3208. /* If we've added more space for the firmware to place data, tell it.
  3209. * Increment device's write pointer in multiples of 8. */
  3210. if ((write != (rxq->write & ~0x7))
  3211. || (abs(rxq->write - rxq->read) > 7)) {
  3212. spin_lock_irqsave(&rxq->lock, flags);
  3213. rxq->need_update = 1;
  3214. spin_unlock_irqrestore(&rxq->lock, flags);
  3215. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3216. if (rc)
  3217. return rc;
  3218. }
  3219. return 0;
  3220. }
  3221. /**
  3222. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3223. *
  3224. * When moving to rx_free an SKB is allocated for the slot.
  3225. *
  3226. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3227. * This is called as a scheduled work item (except for during initialization)
  3228. */
  3229. static void iwl4965_rx_allocate(struct iwl_priv *priv)
  3230. {
  3231. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3232. struct list_head *element;
  3233. struct iwl4965_rx_mem_buffer *rxb;
  3234. unsigned long flags;
  3235. spin_lock_irqsave(&rxq->lock, flags);
  3236. while (!list_empty(&rxq->rx_used)) {
  3237. element = rxq->rx_used.next;
  3238. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3239. /* Alloc a new receive buffer */
  3240. rxb->skb =
  3241. alloc_skb(priv->hw_setting.rx_buf_size,
  3242. __GFP_NOWARN | GFP_ATOMIC);
  3243. if (!rxb->skb) {
  3244. if (net_ratelimit())
  3245. printk(KERN_CRIT DRV_NAME
  3246. ": Can not allocate SKB buffers\n");
  3247. /* We don't reschedule replenish work here -- we will
  3248. * call the restock method and if it still needs
  3249. * more buffers it will schedule replenish */
  3250. break;
  3251. }
  3252. priv->alloc_rxb_skb++;
  3253. list_del(element);
  3254. /* Get physical address of RB/SKB */
  3255. rxb->dma_addr =
  3256. pci_map_single(priv->pci_dev, rxb->skb->data,
  3257. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3258. list_add_tail(&rxb->list, &rxq->rx_free);
  3259. rxq->free_count++;
  3260. }
  3261. spin_unlock_irqrestore(&rxq->lock, flags);
  3262. }
  3263. /*
  3264. * this should be called while priv->lock is locked
  3265. */
  3266. static void __iwl4965_rx_replenish(void *data)
  3267. {
  3268. struct iwl_priv *priv = data;
  3269. iwl4965_rx_allocate(priv);
  3270. iwl4965_rx_queue_restock(priv);
  3271. }
  3272. void iwl4965_rx_replenish(void *data)
  3273. {
  3274. struct iwl_priv *priv = data;
  3275. unsigned long flags;
  3276. iwl4965_rx_allocate(priv);
  3277. spin_lock_irqsave(&priv->lock, flags);
  3278. iwl4965_rx_queue_restock(priv);
  3279. spin_unlock_irqrestore(&priv->lock, flags);
  3280. }
  3281. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3282. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3283. * This free routine walks the list of POOL entries and if SKB is set to
  3284. * non NULL it is unmapped and freed
  3285. */
  3286. static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3287. {
  3288. int i;
  3289. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3290. if (rxq->pool[i].skb != NULL) {
  3291. pci_unmap_single(priv->pci_dev,
  3292. rxq->pool[i].dma_addr,
  3293. priv->hw_setting.rx_buf_size,
  3294. PCI_DMA_FROMDEVICE);
  3295. dev_kfree_skb(rxq->pool[i].skb);
  3296. }
  3297. }
  3298. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3299. rxq->dma_addr);
  3300. rxq->bd = NULL;
  3301. }
  3302. int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
  3303. {
  3304. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3305. struct pci_dev *dev = priv->pci_dev;
  3306. int i;
  3307. spin_lock_init(&rxq->lock);
  3308. INIT_LIST_HEAD(&rxq->rx_free);
  3309. INIT_LIST_HEAD(&rxq->rx_used);
  3310. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3311. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3312. if (!rxq->bd)
  3313. return -ENOMEM;
  3314. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3315. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3316. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3317. /* Set us so that we have processed and used all buffers, but have
  3318. * not restocked the Rx queue with fresh buffers */
  3319. rxq->read = rxq->write = 0;
  3320. rxq->free_count = 0;
  3321. rxq->need_update = 0;
  3322. return 0;
  3323. }
  3324. void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3325. {
  3326. unsigned long flags;
  3327. int i;
  3328. spin_lock_irqsave(&rxq->lock, flags);
  3329. INIT_LIST_HEAD(&rxq->rx_free);
  3330. INIT_LIST_HEAD(&rxq->rx_used);
  3331. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3332. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3333. /* In the reset function, these buffers may have been allocated
  3334. * to an SKB, so we need to unmap and free potential storage */
  3335. if (rxq->pool[i].skb != NULL) {
  3336. pci_unmap_single(priv->pci_dev,
  3337. rxq->pool[i].dma_addr,
  3338. priv->hw_setting.rx_buf_size,
  3339. PCI_DMA_FROMDEVICE);
  3340. priv->alloc_rxb_skb--;
  3341. dev_kfree_skb(rxq->pool[i].skb);
  3342. rxq->pool[i].skb = NULL;
  3343. }
  3344. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3345. }
  3346. /* Set us so that we have processed and used all buffers, but have
  3347. * not restocked the Rx queue with fresh buffers */
  3348. rxq->read = rxq->write = 0;
  3349. rxq->free_count = 0;
  3350. spin_unlock_irqrestore(&rxq->lock, flags);
  3351. }
  3352. /* Convert linear signal-to-noise ratio into dB */
  3353. static u8 ratio2dB[100] = {
  3354. /* 0 1 2 3 4 5 6 7 8 9 */
  3355. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3356. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3357. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3358. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3359. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3360. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3361. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3362. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3363. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3364. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3365. };
  3366. /* Calculates a relative dB value from a ratio of linear
  3367. * (i.e. not dB) signal levels.
  3368. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3369. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3370. {
  3371. /* 1000:1 or higher just report as 60 dB */
  3372. if (sig_ratio >= 1000)
  3373. return 60;
  3374. /* 100:1 or higher, divide by 10 and use table,
  3375. * add 20 dB to make up for divide by 10 */
  3376. if (sig_ratio >= 100)
  3377. return (20 + (int)ratio2dB[sig_ratio/10]);
  3378. /* We shouldn't see this */
  3379. if (sig_ratio < 1)
  3380. return 0;
  3381. /* Use table for ratios 1:1 - 99:1 */
  3382. return (int)ratio2dB[sig_ratio];
  3383. }
  3384. #define PERFECT_RSSI (-20) /* dBm */
  3385. #define WORST_RSSI (-95) /* dBm */
  3386. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3387. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3388. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3389. * about formulas used below. */
  3390. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3391. {
  3392. int sig_qual;
  3393. int degradation = PERFECT_RSSI - rssi_dbm;
  3394. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3395. * as indicator; formula is (signal dbm - noise dbm).
  3396. * SNR at or above 40 is a great signal (100%).
  3397. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3398. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3399. if (noise_dbm) {
  3400. if (rssi_dbm - noise_dbm >= 40)
  3401. return 100;
  3402. else if (rssi_dbm < noise_dbm)
  3403. return 0;
  3404. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3405. /* Else use just the signal level.
  3406. * This formula is a least squares fit of data points collected and
  3407. * compared with a reference system that had a percentage (%) display
  3408. * for signal quality. */
  3409. } else
  3410. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3411. (15 * RSSI_RANGE + 62 * degradation)) /
  3412. (RSSI_RANGE * RSSI_RANGE);
  3413. if (sig_qual > 100)
  3414. sig_qual = 100;
  3415. else if (sig_qual < 1)
  3416. sig_qual = 0;
  3417. return sig_qual;
  3418. }
  3419. /**
  3420. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3421. *
  3422. * Uses the priv->rx_handlers callback function array to invoke
  3423. * the appropriate handlers, including command responses,
  3424. * frame-received notifications, and other notifications.
  3425. */
  3426. static void iwl4965_rx_handle(struct iwl_priv *priv)
  3427. {
  3428. struct iwl4965_rx_mem_buffer *rxb;
  3429. struct iwl4965_rx_packet *pkt;
  3430. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3431. u32 r, i;
  3432. int reclaim;
  3433. unsigned long flags;
  3434. u8 fill_rx = 0;
  3435. u32 count = 8;
  3436. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3437. * buffer that the driver may process (last buffer filled by ucode). */
  3438. r = iwl4965_hw_get_rx_read(priv);
  3439. i = rxq->read;
  3440. /* Rx interrupt, but nothing sent from uCode */
  3441. if (i == r)
  3442. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3443. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3444. fill_rx = 1;
  3445. while (i != r) {
  3446. rxb = rxq->queue[i];
  3447. /* If an RXB doesn't have a Rx queue slot associated with it,
  3448. * then a bug has been introduced in the queue refilling
  3449. * routines -- catch it here */
  3450. BUG_ON(rxb == NULL);
  3451. rxq->queue[i] = NULL;
  3452. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3453. priv->hw_setting.rx_buf_size,
  3454. PCI_DMA_FROMDEVICE);
  3455. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3456. /* Reclaim a command buffer only if this packet is a response
  3457. * to a (driver-originated) command.
  3458. * If the packet (e.g. Rx frame) originated from uCode,
  3459. * there is no command buffer to reclaim.
  3460. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3461. * but apparently a few don't get set; catch them here. */
  3462. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3463. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3464. (pkt->hdr.cmd != REPLY_RX) &&
  3465. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3466. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3467. (pkt->hdr.cmd != REPLY_TX);
  3468. /* Based on type of command response or notification,
  3469. * handle those that need handling via function in
  3470. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3471. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3472. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3473. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3474. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3475. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3476. } else {
  3477. /* No handling needed */
  3478. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3479. "r %d i %d No handler needed for %s, 0x%02x\n",
  3480. r, i, get_cmd_string(pkt->hdr.cmd),
  3481. pkt->hdr.cmd);
  3482. }
  3483. if (reclaim) {
  3484. /* Invoke any callbacks, transfer the skb to caller, and
  3485. * fire off the (possibly) blocking iwl_send_cmd()
  3486. * as we reclaim the driver command queue */
  3487. if (rxb && rxb->skb)
  3488. iwl4965_tx_cmd_complete(priv, rxb);
  3489. else
  3490. IWL_WARNING("Claim null rxb?\n");
  3491. }
  3492. /* For now we just don't re-use anything. We can tweak this
  3493. * later to try and re-use notification packets and SKBs that
  3494. * fail to Rx correctly */
  3495. if (rxb->skb != NULL) {
  3496. priv->alloc_rxb_skb--;
  3497. dev_kfree_skb_any(rxb->skb);
  3498. rxb->skb = NULL;
  3499. }
  3500. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3501. priv->hw_setting.rx_buf_size,
  3502. PCI_DMA_FROMDEVICE);
  3503. spin_lock_irqsave(&rxq->lock, flags);
  3504. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3505. spin_unlock_irqrestore(&rxq->lock, flags);
  3506. i = (i + 1) & RX_QUEUE_MASK;
  3507. /* If there are a lot of unused frames,
  3508. * restock the Rx queue so ucode wont assert. */
  3509. if (fill_rx) {
  3510. count++;
  3511. if (count >= 8) {
  3512. priv->rxq.read = i;
  3513. __iwl4965_rx_replenish(priv);
  3514. count = 0;
  3515. }
  3516. }
  3517. }
  3518. /* Backtrack one entry */
  3519. priv->rxq.read = i;
  3520. iwl4965_rx_queue_restock(priv);
  3521. }
  3522. /**
  3523. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3524. */
  3525. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3526. struct iwl4965_tx_queue *txq)
  3527. {
  3528. u32 reg = 0;
  3529. int rc = 0;
  3530. int txq_id = txq->q.id;
  3531. if (txq->need_update == 0)
  3532. return rc;
  3533. /* if we're trying to save power */
  3534. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3535. /* wake up nic if it's powered down ...
  3536. * uCode will wake up, and interrupt us again, so next
  3537. * time we'll skip this part. */
  3538. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3539. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3540. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3541. iwl_set_bit(priv, CSR_GP_CNTRL,
  3542. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3543. return rc;
  3544. }
  3545. /* restore this queue's parameters in nic hardware. */
  3546. rc = iwl_grab_nic_access(priv);
  3547. if (rc)
  3548. return rc;
  3549. iwl_write_direct32(priv, HBUS_TARG_WRPTR,
  3550. txq->q.write_ptr | (txq_id << 8));
  3551. iwl_release_nic_access(priv);
  3552. /* else not in power-save mode, uCode will never sleep when we're
  3553. * trying to tx (during RFKILL, we're not trying to tx). */
  3554. } else
  3555. iwl_write32(priv, HBUS_TARG_WRPTR,
  3556. txq->q.write_ptr | (txq_id << 8));
  3557. txq->need_update = 0;
  3558. return rc;
  3559. }
  3560. #ifdef CONFIG_IWLWIFI_DEBUG
  3561. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3562. {
  3563. DECLARE_MAC_BUF(mac);
  3564. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3565. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3566. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3567. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3568. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3569. le32_to_cpu(rxon->filter_flags));
  3570. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3571. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3572. rxon->ofdm_basic_rates);
  3573. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3574. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3575. print_mac(mac, rxon->node_addr));
  3576. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3577. print_mac(mac, rxon->bssid_addr));
  3578. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3579. }
  3580. #endif
  3581. static void iwl4965_enable_interrupts(struct iwl_priv *priv)
  3582. {
  3583. IWL_DEBUG_ISR("Enabling interrupts\n");
  3584. set_bit(STATUS_INT_ENABLED, &priv->status);
  3585. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3586. }
  3587. static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
  3588. {
  3589. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3590. /* disable interrupts from uCode/NIC to host */
  3591. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3592. /* acknowledge/clear/reset any interrupts still pending
  3593. * from uCode or flow handler (Rx/Tx DMA) */
  3594. iwl_write32(priv, CSR_INT, 0xffffffff);
  3595. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3596. IWL_DEBUG_ISR("Disabled interrupts\n");
  3597. }
  3598. static const char *desc_lookup(int i)
  3599. {
  3600. switch (i) {
  3601. case 1:
  3602. return "FAIL";
  3603. case 2:
  3604. return "BAD_PARAM";
  3605. case 3:
  3606. return "BAD_CHECKSUM";
  3607. case 4:
  3608. return "NMI_INTERRUPT";
  3609. case 5:
  3610. return "SYSASSERT";
  3611. case 6:
  3612. return "FATAL_ERROR";
  3613. }
  3614. return "UNKNOWN";
  3615. }
  3616. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3617. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3618. static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
  3619. {
  3620. u32 data2, line;
  3621. u32 desc, time, count, base, data1;
  3622. u32 blink1, blink2, ilink1, ilink2;
  3623. int rc;
  3624. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3625. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3626. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3627. return;
  3628. }
  3629. rc = iwl_grab_nic_access(priv);
  3630. if (rc) {
  3631. IWL_WARNING("Can not read from adapter at this time.\n");
  3632. return;
  3633. }
  3634. count = iwl_read_targ_mem(priv, base);
  3635. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3636. IWL_ERROR("Start IWL Error Log Dump:\n");
  3637. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3638. }
  3639. desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
  3640. blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
  3641. blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
  3642. ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
  3643. ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
  3644. data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
  3645. data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
  3646. line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
  3647. time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
  3648. IWL_ERROR("Desc Time "
  3649. "data1 data2 line\n");
  3650. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3651. desc_lookup(desc), desc, time, data1, data2, line);
  3652. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3653. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3654. ilink1, ilink2);
  3655. iwl_release_nic_access(priv);
  3656. }
  3657. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3658. /**
  3659. * iwl4965_print_event_log - Dump error event log to syslog
  3660. *
  3661. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  3662. */
  3663. static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3664. u32 num_events, u32 mode)
  3665. {
  3666. u32 i;
  3667. u32 base; /* SRAM byte address of event log header */
  3668. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3669. u32 ptr; /* SRAM byte address of log data */
  3670. u32 ev, time, data; /* event log data */
  3671. if (num_events == 0)
  3672. return;
  3673. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3674. if (mode == 0)
  3675. event_size = 2 * sizeof(u32);
  3676. else
  3677. event_size = 3 * sizeof(u32);
  3678. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3679. /* "time" is actually "data" for mode 0 (no timestamp).
  3680. * place event id # at far right for easier visual parsing. */
  3681. for (i = 0; i < num_events; i++) {
  3682. ev = iwl_read_targ_mem(priv, ptr);
  3683. ptr += sizeof(u32);
  3684. time = iwl_read_targ_mem(priv, ptr);
  3685. ptr += sizeof(u32);
  3686. if (mode == 0)
  3687. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3688. else {
  3689. data = iwl_read_targ_mem(priv, ptr);
  3690. ptr += sizeof(u32);
  3691. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3692. }
  3693. }
  3694. }
  3695. static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
  3696. {
  3697. int rc;
  3698. u32 base; /* SRAM byte address of event log header */
  3699. u32 capacity; /* event log capacity in # entries */
  3700. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3701. u32 num_wraps; /* # times uCode wrapped to top of log */
  3702. u32 next_entry; /* index of next entry to be written by uCode */
  3703. u32 size; /* # entries that we'll print */
  3704. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3705. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3706. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3707. return;
  3708. }
  3709. rc = iwl_grab_nic_access(priv);
  3710. if (rc) {
  3711. IWL_WARNING("Can not read from adapter at this time.\n");
  3712. return;
  3713. }
  3714. /* event log header */
  3715. capacity = iwl_read_targ_mem(priv, base);
  3716. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  3717. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  3718. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  3719. size = num_wraps ? capacity : next_entry;
  3720. /* bail out if nothing in log */
  3721. if (size == 0) {
  3722. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3723. iwl_release_nic_access(priv);
  3724. return;
  3725. }
  3726. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3727. size, num_wraps);
  3728. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3729. * i.e the next one that uCode would fill. */
  3730. if (num_wraps)
  3731. iwl4965_print_event_log(priv, next_entry,
  3732. capacity - next_entry, mode);
  3733. /* (then/else) start at top of log */
  3734. iwl4965_print_event_log(priv, 0, next_entry, mode);
  3735. iwl_release_nic_access(priv);
  3736. }
  3737. /**
  3738. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  3739. */
  3740. static void iwl4965_irq_handle_error(struct iwl_priv *priv)
  3741. {
  3742. /* Set the FW error flag -- cleared on iwl4965_down */
  3743. set_bit(STATUS_FW_ERROR, &priv->status);
  3744. /* Cancel currently queued command. */
  3745. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3746. #ifdef CONFIG_IWLWIFI_DEBUG
  3747. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3748. iwl4965_dump_nic_error_log(priv);
  3749. iwl4965_dump_nic_event_log(priv);
  3750. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  3751. }
  3752. #endif
  3753. wake_up_interruptible(&priv->wait_command_queue);
  3754. /* Keep the restart process from trying to send host
  3755. * commands by clearing the INIT status bit */
  3756. clear_bit(STATUS_READY, &priv->status);
  3757. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3758. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3759. "Restarting adapter due to uCode error.\n");
  3760. if (iwl4965_is_associated(priv)) {
  3761. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3762. sizeof(priv->recovery_rxon));
  3763. priv->error_recovering = 1;
  3764. }
  3765. queue_work(priv->workqueue, &priv->restart);
  3766. }
  3767. }
  3768. static void iwl4965_error_recovery(struct iwl_priv *priv)
  3769. {
  3770. unsigned long flags;
  3771. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  3772. sizeof(priv->staging_rxon));
  3773. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3774. iwl4965_commit_rxon(priv);
  3775. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  3776. spin_lock_irqsave(&priv->lock, flags);
  3777. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  3778. priv->error_recovering = 0;
  3779. spin_unlock_irqrestore(&priv->lock, flags);
  3780. }
  3781. static void iwl4965_irq_tasklet(struct iwl_priv *priv)
  3782. {
  3783. u32 inta, handled = 0;
  3784. u32 inta_fh;
  3785. unsigned long flags;
  3786. #ifdef CONFIG_IWLWIFI_DEBUG
  3787. u32 inta_mask;
  3788. #endif
  3789. spin_lock_irqsave(&priv->lock, flags);
  3790. /* Ack/clear/reset pending uCode interrupts.
  3791. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3792. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3793. inta = iwl_read32(priv, CSR_INT);
  3794. iwl_write32(priv, CSR_INT, inta);
  3795. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3796. * Any new interrupts that happen after this, either while we're
  3797. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3798. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3799. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3800. #ifdef CONFIG_IWLWIFI_DEBUG
  3801. if (iwl_debug_level & IWL_DL_ISR) {
  3802. /* just for debug */
  3803. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3804. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3805. inta, inta_mask, inta_fh);
  3806. }
  3807. #endif
  3808. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3809. * atomic, make sure that inta covers all the interrupts that
  3810. * we've discovered, even if FH interrupt came in just after
  3811. * reading CSR_INT. */
  3812. if (inta_fh & CSR49_FH_INT_RX_MASK)
  3813. inta |= CSR_INT_BIT_FH_RX;
  3814. if (inta_fh & CSR49_FH_INT_TX_MASK)
  3815. inta |= CSR_INT_BIT_FH_TX;
  3816. /* Now service all interrupt bits discovered above. */
  3817. if (inta & CSR_INT_BIT_HW_ERR) {
  3818. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  3819. /* Tell the device to stop sending interrupts */
  3820. iwl4965_disable_interrupts(priv);
  3821. iwl4965_irq_handle_error(priv);
  3822. handled |= CSR_INT_BIT_HW_ERR;
  3823. spin_unlock_irqrestore(&priv->lock, flags);
  3824. return;
  3825. }
  3826. #ifdef CONFIG_IWLWIFI_DEBUG
  3827. if (iwl_debug_level & (IWL_DL_ISR)) {
  3828. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3829. if (inta & CSR_INT_BIT_SCD)
  3830. IWL_DEBUG_ISR("Scheduler finished to transmit "
  3831. "the frame/frames.\n");
  3832. /* Alive notification via Rx interrupt will do the real work */
  3833. if (inta & CSR_INT_BIT_ALIVE)
  3834. IWL_DEBUG_ISR("Alive interrupt\n");
  3835. }
  3836. #endif
  3837. /* Safely ignore these bits for debug checks below */
  3838. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  3839. /* HW RF KILL switch toggled */
  3840. if (inta & CSR_INT_BIT_RF_KILL) {
  3841. int hw_rf_kill = 0;
  3842. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  3843. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  3844. hw_rf_kill = 1;
  3845. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  3846. "RF_KILL bit toggled to %s.\n",
  3847. hw_rf_kill ? "disable radio":"enable radio");
  3848. /* Queue restart only if RF_KILL switch was set to "kill"
  3849. * when we loaded driver, and is now set to "enable".
  3850. * After we're Alive, RF_KILL gets handled by
  3851. * iwl4965_rx_card_state_notif() */
  3852. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  3853. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3854. queue_work(priv->workqueue, &priv->restart);
  3855. }
  3856. handled |= CSR_INT_BIT_RF_KILL;
  3857. }
  3858. /* Chip got too hot and stopped itself */
  3859. if (inta & CSR_INT_BIT_CT_KILL) {
  3860. IWL_ERROR("Microcode CT kill error detected.\n");
  3861. handled |= CSR_INT_BIT_CT_KILL;
  3862. }
  3863. /* Error detected by uCode */
  3864. if (inta & CSR_INT_BIT_SW_ERR) {
  3865. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  3866. inta);
  3867. iwl4965_irq_handle_error(priv);
  3868. handled |= CSR_INT_BIT_SW_ERR;
  3869. }
  3870. /* uCode wakes up after power-down sleep */
  3871. if (inta & CSR_INT_BIT_WAKEUP) {
  3872. IWL_DEBUG_ISR("Wakeup interrupt\n");
  3873. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  3874. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  3875. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  3876. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  3877. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  3878. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  3879. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  3880. handled |= CSR_INT_BIT_WAKEUP;
  3881. }
  3882. /* All uCode command responses, including Tx command responses,
  3883. * Rx "responses" (frame-received notification), and other
  3884. * notifications from uCode come through here*/
  3885. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  3886. iwl4965_rx_handle(priv);
  3887. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  3888. }
  3889. if (inta & CSR_INT_BIT_FH_TX) {
  3890. IWL_DEBUG_ISR("Tx interrupt\n");
  3891. handled |= CSR_INT_BIT_FH_TX;
  3892. }
  3893. if (inta & ~handled)
  3894. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  3895. if (inta & ~CSR_INI_SET_MASK) {
  3896. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  3897. inta & ~CSR_INI_SET_MASK);
  3898. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  3899. }
  3900. /* Re-enable all interrupts */
  3901. iwl4965_enable_interrupts(priv);
  3902. #ifdef CONFIG_IWLWIFI_DEBUG
  3903. if (iwl_debug_level & (IWL_DL_ISR)) {
  3904. inta = iwl_read32(priv, CSR_INT);
  3905. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3906. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3907. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  3908. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  3909. }
  3910. #endif
  3911. spin_unlock_irqrestore(&priv->lock, flags);
  3912. }
  3913. static irqreturn_t iwl4965_isr(int irq, void *data)
  3914. {
  3915. struct iwl_priv *priv = data;
  3916. u32 inta, inta_mask;
  3917. u32 inta_fh;
  3918. if (!priv)
  3919. return IRQ_NONE;
  3920. spin_lock(&priv->lock);
  3921. /* Disable (but don't clear!) interrupts here to avoid
  3922. * back-to-back ISRs and sporadic interrupts from our NIC.
  3923. * If we have something to service, the tasklet will re-enable ints.
  3924. * If we *don't* have something, we'll re-enable before leaving here. */
  3925. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3926. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3927. /* Discover which interrupts are active/pending */
  3928. inta = iwl_read32(priv, CSR_INT);
  3929. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3930. /* Ignore interrupt if there's nothing in NIC to service.
  3931. * This may be due to IRQ shared with another device,
  3932. * or due to sporadic interrupts thrown from our NIC. */
  3933. if (!inta && !inta_fh) {
  3934. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  3935. goto none;
  3936. }
  3937. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  3938. /* Hardware disappeared. It might have already raised
  3939. * an interrupt */
  3940. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  3941. goto unplugged;
  3942. }
  3943. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3944. inta, inta_mask, inta_fh);
  3945. inta &= ~CSR_INT_BIT_SCD;
  3946. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  3947. if (likely(inta || inta_fh))
  3948. tasklet_schedule(&priv->irq_tasklet);
  3949. unplugged:
  3950. spin_unlock(&priv->lock);
  3951. return IRQ_HANDLED;
  3952. none:
  3953. /* re-enable interrupts here since we don't have anything to service. */
  3954. iwl4965_enable_interrupts(priv);
  3955. spin_unlock(&priv->lock);
  3956. return IRQ_NONE;
  3957. }
  3958. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  3959. * sending probe req. This should be set long enough to hear probe responses
  3960. * from more than one AP. */
  3961. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  3962. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  3963. /* For faster active scanning, scan will move to the next channel if fewer than
  3964. * PLCP_QUIET_THRESH packets are heard on this channel within
  3965. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  3966. * time if it's a quiet channel (nothing responded to our probe, and there's
  3967. * no other traffic).
  3968. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  3969. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  3970. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  3971. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  3972. * Must be set longer than active dwell time.
  3973. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  3974. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  3975. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  3976. #define IWL_PASSIVE_DWELL_BASE (100)
  3977. #define IWL_CHANNEL_TUNE_TIME 5
  3978. static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
  3979. enum ieee80211_band band)
  3980. {
  3981. if (band == IEEE80211_BAND_5GHZ)
  3982. return IWL_ACTIVE_DWELL_TIME_52;
  3983. else
  3984. return IWL_ACTIVE_DWELL_TIME_24;
  3985. }
  3986. static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
  3987. enum ieee80211_band band)
  3988. {
  3989. u16 active = iwl4965_get_active_dwell_time(priv, band);
  3990. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  3991. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  3992. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  3993. if (iwl4965_is_associated(priv)) {
  3994. /* If we're associated, we clamp the maximum passive
  3995. * dwell time to be 98% of the beacon interval (minus
  3996. * 2 * channel tune time) */
  3997. passive = priv->beacon_int;
  3998. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  3999. passive = IWL_PASSIVE_DWELL_BASE;
  4000. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4001. }
  4002. if (passive <= active)
  4003. passive = active + 1;
  4004. return passive;
  4005. }
  4006. static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
  4007. enum ieee80211_band band,
  4008. u8 is_active, u8 direct_mask,
  4009. struct iwl4965_scan_channel *scan_ch)
  4010. {
  4011. const struct ieee80211_channel *channels = NULL;
  4012. const struct ieee80211_supported_band *sband;
  4013. const struct iwl_channel_info *ch_info;
  4014. u16 passive_dwell = 0;
  4015. u16 active_dwell = 0;
  4016. int added, i;
  4017. sband = iwl4965_get_hw_mode(priv, band);
  4018. if (!sband)
  4019. return 0;
  4020. channels = sband->channels;
  4021. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4022. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4023. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4024. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4025. le16_to_cpu(priv->active_rxon.channel)) {
  4026. if (iwl4965_is_associated(priv)) {
  4027. IWL_DEBUG_SCAN
  4028. ("Skipping current channel %d\n",
  4029. le16_to_cpu(priv->active_rxon.channel));
  4030. continue;
  4031. }
  4032. } else if (priv->only_active_channel)
  4033. continue;
  4034. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4035. ch_info = iwl_get_channel_info(priv, band,
  4036. scan_ch->channel);
  4037. if (!is_channel_valid(ch_info)) {
  4038. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4039. scan_ch->channel);
  4040. continue;
  4041. }
  4042. if (!is_active || is_channel_passive(ch_info) ||
  4043. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4044. scan_ch->type = 0; /* passive */
  4045. else
  4046. scan_ch->type = 1; /* active */
  4047. if (scan_ch->type & 1)
  4048. scan_ch->type |= (direct_mask << 1);
  4049. if (is_channel_narrow(ch_info))
  4050. scan_ch->type |= (1 << 7);
  4051. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4052. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4053. /* Set txpower levels to defaults */
  4054. scan_ch->tpc.dsp_atten = 110;
  4055. /* scan_pwr_info->tpc.dsp_atten; */
  4056. /*scan_pwr_info->tpc.tx_gain; */
  4057. if (band == IEEE80211_BAND_5GHZ)
  4058. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4059. else {
  4060. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4061. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4062. * power level:
  4063. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4064. */
  4065. }
  4066. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4067. scan_ch->channel,
  4068. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4069. (scan_ch->type & 1) ?
  4070. active_dwell : passive_dwell);
  4071. scan_ch++;
  4072. added++;
  4073. }
  4074. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4075. return added;
  4076. }
  4077. static void iwl4965_init_hw_rates(struct iwl_priv *priv,
  4078. struct ieee80211_rate *rates)
  4079. {
  4080. int i;
  4081. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4082. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4083. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4084. rates[i].hw_value_short = i;
  4085. rates[i].flags = 0;
  4086. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4087. /*
  4088. * If CCK != 1M then set short preamble rate flag.
  4089. */
  4090. rates[i].flags |=
  4091. (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  4092. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4093. }
  4094. }
  4095. }
  4096. /**
  4097. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4098. */
  4099. int iwl4965_init_geos(struct iwl_priv *priv)
  4100. {
  4101. struct iwl_channel_info *ch;
  4102. struct ieee80211_supported_band *sband;
  4103. struct ieee80211_channel *channels;
  4104. struct ieee80211_channel *geo_ch;
  4105. struct ieee80211_rate *rates;
  4106. int i = 0;
  4107. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4108. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4109. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4110. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4111. return 0;
  4112. }
  4113. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4114. priv->channel_count, GFP_KERNEL);
  4115. if (!channels)
  4116. return -ENOMEM;
  4117. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4118. GFP_KERNEL);
  4119. if (!rates) {
  4120. kfree(channels);
  4121. return -ENOMEM;
  4122. }
  4123. /* 5.2GHz channels start after the 2.4GHz channels */
  4124. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4125. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4126. /* just OFDM */
  4127. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4128. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4129. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_5GHZ);
  4130. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4131. sband->channels = channels;
  4132. /* OFDM & CCK */
  4133. sband->bitrates = rates;
  4134. sband->n_bitrates = IWL_RATE_COUNT;
  4135. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_2GHZ);
  4136. priv->ieee_channels = channels;
  4137. priv->ieee_rates = rates;
  4138. iwl4965_init_hw_rates(priv, rates);
  4139. for (i = 0; i < priv->channel_count; i++) {
  4140. ch = &priv->channel_info[i];
  4141. /* FIXME: might be removed if scan is OK */
  4142. if (!is_channel_valid(ch))
  4143. continue;
  4144. if (is_channel_a_band(ch))
  4145. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4146. else
  4147. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4148. geo_ch = &sband->channels[sband->n_channels++];
  4149. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4150. geo_ch->max_power = ch->max_power_avg;
  4151. geo_ch->max_antenna_gain = 0xff;
  4152. geo_ch->hw_value = ch->channel;
  4153. if (is_channel_valid(ch)) {
  4154. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4155. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4156. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4157. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4158. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4159. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4160. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4161. priv->max_channel_txpower_limit =
  4162. ch->max_power_avg;
  4163. } else {
  4164. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4165. }
  4166. /* Save flags for reg domain usage */
  4167. geo_ch->orig_flags = geo_ch->flags;
  4168. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4169. ch->channel, geo_ch->center_freq,
  4170. is_channel_a_band(ch) ? "5.2" : "2.4",
  4171. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4172. "restricted" : "valid",
  4173. geo_ch->flags);
  4174. }
  4175. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4176. priv->cfg->sku & IWL_SKU_A) {
  4177. printk(KERN_INFO DRV_NAME
  4178. ": Incorrectly detected BG card as ABG. Please send "
  4179. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4180. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4181. priv->cfg->sku &= ~IWL_SKU_A;
  4182. }
  4183. printk(KERN_INFO DRV_NAME
  4184. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4185. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4186. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4187. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  4188. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  4189. &priv->bands[IEEE80211_BAND_2GHZ];
  4190. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  4191. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  4192. &priv->bands[IEEE80211_BAND_5GHZ];
  4193. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4194. return 0;
  4195. }
  4196. /*
  4197. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4198. */
  4199. void iwl4965_free_geos(struct iwl_priv *priv)
  4200. {
  4201. kfree(priv->ieee_channels);
  4202. kfree(priv->ieee_rates);
  4203. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4204. }
  4205. /******************************************************************************
  4206. *
  4207. * uCode download functions
  4208. *
  4209. ******************************************************************************/
  4210. static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
  4211. {
  4212. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4213. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4214. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4215. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4216. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4217. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4218. }
  4219. /**
  4220. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4221. * looking at all data.
  4222. */
  4223. static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  4224. u32 len)
  4225. {
  4226. u32 val;
  4227. u32 save_len = len;
  4228. int rc = 0;
  4229. u32 errcnt;
  4230. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4231. rc = iwl_grab_nic_access(priv);
  4232. if (rc)
  4233. return rc;
  4234. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4235. errcnt = 0;
  4236. for (; len > 0; len -= sizeof(u32), image++) {
  4237. /* read data comes through single port, auto-incr addr */
  4238. /* NOTE: Use the debugless read so we don't flood kernel log
  4239. * if IWL_DL_IO is set */
  4240. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4241. if (val != le32_to_cpu(*image)) {
  4242. IWL_ERROR("uCode INST section is invalid at "
  4243. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4244. save_len - len, val, le32_to_cpu(*image));
  4245. rc = -EIO;
  4246. errcnt++;
  4247. if (errcnt >= 20)
  4248. break;
  4249. }
  4250. }
  4251. iwl_release_nic_access(priv);
  4252. if (!errcnt)
  4253. IWL_DEBUG_INFO
  4254. ("ucode image in INSTRUCTION memory is good\n");
  4255. return rc;
  4256. }
  4257. /**
  4258. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4259. * using sample data 100 bytes apart. If these sample points are good,
  4260. * it's a pretty good bet that everything between them is good, too.
  4261. */
  4262. static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4263. {
  4264. u32 val;
  4265. int rc = 0;
  4266. u32 errcnt = 0;
  4267. u32 i;
  4268. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4269. rc = iwl_grab_nic_access(priv);
  4270. if (rc)
  4271. return rc;
  4272. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4273. /* read data comes through single port, auto-incr addr */
  4274. /* NOTE: Use the debugless read so we don't flood kernel log
  4275. * if IWL_DL_IO is set */
  4276. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4277. i + RTC_INST_LOWER_BOUND);
  4278. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4279. if (val != le32_to_cpu(*image)) {
  4280. #if 0 /* Enable this if you want to see details */
  4281. IWL_ERROR("uCode INST section is invalid at "
  4282. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4283. i, val, *image);
  4284. #endif
  4285. rc = -EIO;
  4286. errcnt++;
  4287. if (errcnt >= 3)
  4288. break;
  4289. }
  4290. }
  4291. iwl_release_nic_access(priv);
  4292. return rc;
  4293. }
  4294. /**
  4295. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4296. * and verify its contents
  4297. */
  4298. static int iwl4965_verify_ucode(struct iwl_priv *priv)
  4299. {
  4300. __le32 *image;
  4301. u32 len;
  4302. int rc = 0;
  4303. /* Try bootstrap */
  4304. image = (__le32 *)priv->ucode_boot.v_addr;
  4305. len = priv->ucode_boot.len;
  4306. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4307. if (rc == 0) {
  4308. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4309. return 0;
  4310. }
  4311. /* Try initialize */
  4312. image = (__le32 *)priv->ucode_init.v_addr;
  4313. len = priv->ucode_init.len;
  4314. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4315. if (rc == 0) {
  4316. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4317. return 0;
  4318. }
  4319. /* Try runtime/protocol */
  4320. image = (__le32 *)priv->ucode_code.v_addr;
  4321. len = priv->ucode_code.len;
  4322. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4323. if (rc == 0) {
  4324. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4325. return 0;
  4326. }
  4327. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4328. /* Since nothing seems to match, show first several data entries in
  4329. * instruction SRAM, so maybe visual inspection will give a clue.
  4330. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4331. image = (__le32 *)priv->ucode_boot.v_addr;
  4332. len = priv->ucode_boot.len;
  4333. rc = iwl4965_verify_inst_full(priv, image, len);
  4334. return rc;
  4335. }
  4336. /* check contents of special bootstrap uCode SRAM */
  4337. static int iwl4965_verify_bsm(struct iwl_priv *priv)
  4338. {
  4339. __le32 *image = priv->ucode_boot.v_addr;
  4340. u32 len = priv->ucode_boot.len;
  4341. u32 reg;
  4342. u32 val;
  4343. IWL_DEBUG_INFO("Begin verify bsm\n");
  4344. /* verify BSM SRAM contents */
  4345. val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  4346. for (reg = BSM_SRAM_LOWER_BOUND;
  4347. reg < BSM_SRAM_LOWER_BOUND + len;
  4348. reg += sizeof(u32), image ++) {
  4349. val = iwl_read_prph(priv, reg);
  4350. if (val != le32_to_cpu(*image)) {
  4351. IWL_ERROR("BSM uCode verification failed at "
  4352. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4353. BSM_SRAM_LOWER_BOUND,
  4354. reg - BSM_SRAM_LOWER_BOUND, len,
  4355. val, le32_to_cpu(*image));
  4356. return -EIO;
  4357. }
  4358. }
  4359. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4360. return 0;
  4361. }
  4362. /**
  4363. * iwl4965_load_bsm - Load bootstrap instructions
  4364. *
  4365. * BSM operation:
  4366. *
  4367. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4368. * in special SRAM that does not power down during RFKILL. When powering back
  4369. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4370. * the bootstrap program into the on-board processor, and starts it.
  4371. *
  4372. * The bootstrap program loads (via DMA) instructions and data for a new
  4373. * program from host DRAM locations indicated by the host driver in the
  4374. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4375. * automatically.
  4376. *
  4377. * When initializing the NIC, the host driver points the BSM to the
  4378. * "initialize" uCode image. This uCode sets up some internal data, then
  4379. * notifies host via "initialize alive" that it is complete.
  4380. *
  4381. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4382. * normal runtime uCode instructions and a backup uCode data cache buffer
  4383. * (filled initially with starting data values for the on-board processor),
  4384. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4385. * which begins normal operation.
  4386. *
  4387. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4388. * the backup data cache in DRAM before SRAM is powered down.
  4389. *
  4390. * When powering back up, the BSM loads the bootstrap program. This reloads
  4391. * the runtime uCode instructions and the backup data cache into SRAM,
  4392. * and re-launches the runtime uCode from where it left off.
  4393. */
  4394. static int iwl4965_load_bsm(struct iwl_priv *priv)
  4395. {
  4396. __le32 *image = priv->ucode_boot.v_addr;
  4397. u32 len = priv->ucode_boot.len;
  4398. dma_addr_t pinst;
  4399. dma_addr_t pdata;
  4400. u32 inst_len;
  4401. u32 data_len;
  4402. int rc;
  4403. int i;
  4404. u32 done;
  4405. u32 reg_offset;
  4406. IWL_DEBUG_INFO("Begin load bsm\n");
  4407. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4408. if (len > IWL_MAX_BSM_SIZE)
  4409. return -EINVAL;
  4410. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4411. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  4412. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  4413. * after the "initialize" uCode has run, to point to
  4414. * runtime/protocol instructions and backup data cache. */
  4415. pinst = priv->ucode_init.p_addr >> 4;
  4416. pdata = priv->ucode_init_data.p_addr >> 4;
  4417. inst_len = priv->ucode_init.len;
  4418. data_len = priv->ucode_init_data.len;
  4419. rc = iwl_grab_nic_access(priv);
  4420. if (rc)
  4421. return rc;
  4422. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4423. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4424. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  4425. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  4426. /* Fill BSM memory with bootstrap instructions */
  4427. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  4428. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  4429. reg_offset += sizeof(u32), image++)
  4430. _iwl_write_prph(priv, reg_offset,
  4431. le32_to_cpu(*image));
  4432. rc = iwl4965_verify_bsm(priv);
  4433. if (rc) {
  4434. iwl_release_nic_access(priv);
  4435. return rc;
  4436. }
  4437. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  4438. iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  4439. iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
  4440. RTC_INST_LOWER_BOUND);
  4441. iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  4442. /* Load bootstrap code into instruction SRAM now,
  4443. * to prepare to load "initialize" uCode */
  4444. iwl_write_prph(priv, BSM_WR_CTRL_REG,
  4445. BSM_WR_CTRL_REG_BIT_START);
  4446. /* Wait for load of bootstrap uCode to finish */
  4447. for (i = 0; i < 100; i++) {
  4448. done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
  4449. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  4450. break;
  4451. udelay(10);
  4452. }
  4453. if (i < 100)
  4454. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  4455. else {
  4456. IWL_ERROR("BSM write did not complete!\n");
  4457. return -EIO;
  4458. }
  4459. /* Enable future boot loads whenever power management unit triggers it
  4460. * (e.g. when powering back up after power-save shutdown) */
  4461. iwl_write_prph(priv, BSM_WR_CTRL_REG,
  4462. BSM_WR_CTRL_REG_BIT_START_EN);
  4463. iwl_release_nic_access(priv);
  4464. return 0;
  4465. }
  4466. static void iwl4965_nic_start(struct iwl_priv *priv)
  4467. {
  4468. /* Remove all resets to allow NIC to operate */
  4469. iwl_write32(priv, CSR_RESET, 0);
  4470. }
  4471. /**
  4472. * iwl4965_read_ucode - Read uCode images from disk file.
  4473. *
  4474. * Copy into buffers for card to fetch via bus-mastering
  4475. */
  4476. static int iwl4965_read_ucode(struct iwl_priv *priv)
  4477. {
  4478. struct iwl4965_ucode *ucode;
  4479. int ret;
  4480. const struct firmware *ucode_raw;
  4481. const char *name = priv->cfg->fw_name;
  4482. u8 *src;
  4483. size_t len;
  4484. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4485. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4486. * request_firmware() is synchronous, file is in memory on return. */
  4487. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4488. if (ret < 0) {
  4489. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  4490. name, ret);
  4491. goto error;
  4492. }
  4493. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4494. name, ucode_raw->size);
  4495. /* Make sure that we got at least our header! */
  4496. if (ucode_raw->size < sizeof(*ucode)) {
  4497. IWL_ERROR("File size way too small!\n");
  4498. ret = -EINVAL;
  4499. goto err_release;
  4500. }
  4501. /* Data from ucode file: header followed by uCode images */
  4502. ucode = (void *)ucode_raw->data;
  4503. ver = le32_to_cpu(ucode->ver);
  4504. inst_size = le32_to_cpu(ucode->inst_size);
  4505. data_size = le32_to_cpu(ucode->data_size);
  4506. init_size = le32_to_cpu(ucode->init_size);
  4507. init_data_size = le32_to_cpu(ucode->init_data_size);
  4508. boot_size = le32_to_cpu(ucode->boot_size);
  4509. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  4510. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  4511. inst_size);
  4512. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  4513. data_size);
  4514. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  4515. init_size);
  4516. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  4517. init_data_size);
  4518. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  4519. boot_size);
  4520. /* Verify size of file vs. image size info in file's header */
  4521. if (ucode_raw->size < sizeof(*ucode) +
  4522. inst_size + data_size + init_size +
  4523. init_data_size + boot_size) {
  4524. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4525. (int)ucode_raw->size);
  4526. ret = -EINVAL;
  4527. goto err_release;
  4528. }
  4529. /* Verify that uCode images will fit in card's SRAM */
  4530. if (inst_size > IWL_MAX_INST_SIZE) {
  4531. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  4532. inst_size);
  4533. ret = -EINVAL;
  4534. goto err_release;
  4535. }
  4536. if (data_size > IWL_MAX_DATA_SIZE) {
  4537. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  4538. data_size);
  4539. ret = -EINVAL;
  4540. goto err_release;
  4541. }
  4542. if (init_size > IWL_MAX_INST_SIZE) {
  4543. IWL_DEBUG_INFO
  4544. ("uCode init instr len %d too large to fit in\n",
  4545. init_size);
  4546. ret = -EINVAL;
  4547. goto err_release;
  4548. }
  4549. if (init_data_size > IWL_MAX_DATA_SIZE) {
  4550. IWL_DEBUG_INFO
  4551. ("uCode init data len %d too large to fit in\n",
  4552. init_data_size);
  4553. ret = -EINVAL;
  4554. goto err_release;
  4555. }
  4556. if (boot_size > IWL_MAX_BSM_SIZE) {
  4557. IWL_DEBUG_INFO
  4558. ("uCode boot instr len %d too large to fit in\n",
  4559. boot_size);
  4560. ret = -EINVAL;
  4561. goto err_release;
  4562. }
  4563. /* Allocate ucode buffers for card's bus-master loading ... */
  4564. /* Runtime instructions and 2 copies of data:
  4565. * 1) unmodified from disk
  4566. * 2) backup cache for save/restore during power-downs */
  4567. priv->ucode_code.len = inst_size;
  4568. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  4569. priv->ucode_data.len = data_size;
  4570. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  4571. priv->ucode_data_backup.len = data_size;
  4572. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4573. /* Initialization instructions and data */
  4574. if (init_size && init_data_size) {
  4575. priv->ucode_init.len = init_size;
  4576. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  4577. priv->ucode_init_data.len = init_data_size;
  4578. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4579. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  4580. goto err_pci_alloc;
  4581. }
  4582. /* Bootstrap (instructions only, no data) */
  4583. if (boot_size) {
  4584. priv->ucode_boot.len = boot_size;
  4585. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4586. if (!priv->ucode_boot.v_addr)
  4587. goto err_pci_alloc;
  4588. }
  4589. /* Copy images into buffers for card's bus-master reads ... */
  4590. /* Runtime instructions (first block of data in file) */
  4591. src = &ucode->data[0];
  4592. len = priv->ucode_code.len;
  4593. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  4594. memcpy(priv->ucode_code.v_addr, src, len);
  4595. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  4596. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  4597. /* Runtime data (2nd block)
  4598. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  4599. src = &ucode->data[inst_size];
  4600. len = priv->ucode_data.len;
  4601. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  4602. memcpy(priv->ucode_data.v_addr, src, len);
  4603. memcpy(priv->ucode_data_backup.v_addr, src, len);
  4604. /* Initialization instructions (3rd block) */
  4605. if (init_size) {
  4606. src = &ucode->data[inst_size + data_size];
  4607. len = priv->ucode_init.len;
  4608. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  4609. len);
  4610. memcpy(priv->ucode_init.v_addr, src, len);
  4611. }
  4612. /* Initialization data (4th block) */
  4613. if (init_data_size) {
  4614. src = &ucode->data[inst_size + data_size + init_size];
  4615. len = priv->ucode_init_data.len;
  4616. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  4617. len);
  4618. memcpy(priv->ucode_init_data.v_addr, src, len);
  4619. }
  4620. /* Bootstrap instructions (5th block) */
  4621. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  4622. len = priv->ucode_boot.len;
  4623. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  4624. memcpy(priv->ucode_boot.v_addr, src, len);
  4625. /* We have our copies now, allow OS release its copies */
  4626. release_firmware(ucode_raw);
  4627. return 0;
  4628. err_pci_alloc:
  4629. IWL_ERROR("failed to allocate pci memory\n");
  4630. ret = -ENOMEM;
  4631. iwl4965_dealloc_ucode_pci(priv);
  4632. err_release:
  4633. release_firmware(ucode_raw);
  4634. error:
  4635. return ret;
  4636. }
  4637. /**
  4638. * iwl4965_set_ucode_ptrs - Set uCode address location
  4639. *
  4640. * Tell initialization uCode where to find runtime uCode.
  4641. *
  4642. * BSM registers initially contain pointers to initialization uCode.
  4643. * We need to replace them to load runtime uCode inst and data,
  4644. * and to save runtime data when powering down.
  4645. */
  4646. static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
  4647. {
  4648. dma_addr_t pinst;
  4649. dma_addr_t pdata;
  4650. int rc = 0;
  4651. unsigned long flags;
  4652. /* bits 35:4 for 4965 */
  4653. pinst = priv->ucode_code.p_addr >> 4;
  4654. pdata = priv->ucode_data_backup.p_addr >> 4;
  4655. spin_lock_irqsave(&priv->lock, flags);
  4656. rc = iwl_grab_nic_access(priv);
  4657. if (rc) {
  4658. spin_unlock_irqrestore(&priv->lock, flags);
  4659. return rc;
  4660. }
  4661. /* Tell bootstrap uCode where to find image to load */
  4662. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4663. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4664. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  4665. priv->ucode_data.len);
  4666. /* Inst bytecount must be last to set up, bit 31 signals uCode
  4667. * that all new ptr/size info is in place */
  4668. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  4669. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  4670. iwl_release_nic_access(priv);
  4671. spin_unlock_irqrestore(&priv->lock, flags);
  4672. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  4673. return rc;
  4674. }
  4675. /**
  4676. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  4677. *
  4678. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  4679. *
  4680. * The 4965 "initialize" ALIVE reply contains calibration data for:
  4681. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  4682. * (3945 does not contain this data).
  4683. *
  4684. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  4685. */
  4686. static void iwl4965_init_alive_start(struct iwl_priv *priv)
  4687. {
  4688. /* Check alive response for "valid" sign from uCode */
  4689. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  4690. /* We had an error bringing up the hardware, so take it
  4691. * all the way back down so we can try again */
  4692. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  4693. goto restart;
  4694. }
  4695. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  4696. * This is a paranoid check, because we would not have gotten the
  4697. * "initialize" alive if code weren't properly loaded. */
  4698. if (iwl4965_verify_ucode(priv)) {
  4699. /* Runtime instruction load was bad;
  4700. * take it all the way back down so we can try again */
  4701. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  4702. goto restart;
  4703. }
  4704. /* Calculate temperature */
  4705. priv->temperature = iwl4965_get_temperature(priv);
  4706. /* Send pointers to protocol/runtime uCode image ... init code will
  4707. * load and launch runtime uCode, which will send us another "Alive"
  4708. * notification. */
  4709. IWL_DEBUG_INFO("Initialization Alive received.\n");
  4710. if (iwl4965_set_ucode_ptrs(priv)) {
  4711. /* Runtime instruction load won't happen;
  4712. * take it all the way back down so we can try again */
  4713. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  4714. goto restart;
  4715. }
  4716. return;
  4717. restart:
  4718. queue_work(priv->workqueue, &priv->restart);
  4719. }
  4720. /**
  4721. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  4722. * from protocol/runtime uCode (initialization uCode's
  4723. * Alive gets handled by iwl4965_init_alive_start()).
  4724. */
  4725. static void iwl4965_alive_start(struct iwl_priv *priv)
  4726. {
  4727. int rc = 0;
  4728. IWL_DEBUG_INFO("Runtime Alive received.\n");
  4729. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  4730. /* We had an error bringing up the hardware, so take it
  4731. * all the way back down so we can try again */
  4732. IWL_DEBUG_INFO("Alive failed.\n");
  4733. goto restart;
  4734. }
  4735. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  4736. * This is a paranoid check, because we would not have gotten the
  4737. * "runtime" alive if code weren't properly loaded. */
  4738. if (iwl4965_verify_ucode(priv)) {
  4739. /* Runtime instruction load was bad;
  4740. * take it all the way back down so we can try again */
  4741. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  4742. goto restart;
  4743. }
  4744. iwlcore_clear_stations_table(priv);
  4745. rc = iwl4965_alive_notify(priv);
  4746. if (rc) {
  4747. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  4748. rc);
  4749. goto restart;
  4750. }
  4751. /* After the ALIVE response, we can send host commands to 4965 uCode */
  4752. set_bit(STATUS_ALIVE, &priv->status);
  4753. /* Clear out the uCode error bit if it is set */
  4754. clear_bit(STATUS_FW_ERROR, &priv->status);
  4755. if (iwl4965_is_rfkill(priv))
  4756. return;
  4757. ieee80211_start_queues(priv->hw);
  4758. priv->active_rate = priv->rates_mask;
  4759. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  4760. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  4761. if (iwl4965_is_associated(priv)) {
  4762. struct iwl4965_rxon_cmd *active_rxon =
  4763. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  4764. memcpy(&priv->staging_rxon, &priv->active_rxon,
  4765. sizeof(priv->staging_rxon));
  4766. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4767. } else {
  4768. /* Initialize our rx_config data */
  4769. iwl4965_connection_init_rx_config(priv);
  4770. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  4771. }
  4772. /* Configure Bluetooth device coexistence support */
  4773. iwl4965_send_bt_config(priv);
  4774. /* Configure the adapter for unassociated operation */
  4775. iwl4965_commit_rxon(priv);
  4776. /* At this point, the NIC is initialized and operational */
  4777. priv->notif_missed_beacons = 0;
  4778. set_bit(STATUS_READY, &priv->status);
  4779. iwl4965_rf_kill_ct_config(priv);
  4780. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  4781. wake_up_interruptible(&priv->wait_command_queue);
  4782. iwl_leds_register(priv);
  4783. if (priv->error_recovering)
  4784. iwl4965_error_recovery(priv);
  4785. return;
  4786. restart:
  4787. queue_work(priv->workqueue, &priv->restart);
  4788. }
  4789. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
  4790. static void __iwl4965_down(struct iwl_priv *priv)
  4791. {
  4792. unsigned long flags;
  4793. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  4794. struct ieee80211_conf *conf = NULL;
  4795. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  4796. conf = ieee80211_get_hw_conf(priv->hw);
  4797. if (!exit_pending)
  4798. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4799. iwl_leds_unregister(priv);
  4800. iwlcore_clear_stations_table(priv);
  4801. /* Unblock any waiting calls */
  4802. wake_up_interruptible_all(&priv->wait_command_queue);
  4803. /* Wipe out the EXIT_PENDING status bit if we are not actually
  4804. * exiting the module */
  4805. if (!exit_pending)
  4806. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4807. /* stop and reset the on-board processor */
  4808. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  4809. /* tell the device to stop sending interrupts */
  4810. iwl4965_disable_interrupts(priv);
  4811. if (priv->mac80211_registered)
  4812. ieee80211_stop_queues(priv->hw);
  4813. /* If we have not previously called iwl4965_init() then
  4814. * clear all bits but the RF Kill and SUSPEND bits and return */
  4815. if (!iwl4965_is_init(priv)) {
  4816. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4817. STATUS_RF_KILL_HW |
  4818. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4819. STATUS_RF_KILL_SW |
  4820. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4821. STATUS_GEO_CONFIGURED |
  4822. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4823. STATUS_IN_SUSPEND;
  4824. goto exit;
  4825. }
  4826. /* ...otherwise clear out all the status bits but the RF Kill and
  4827. * SUSPEND bits and continue taking the NIC down. */
  4828. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4829. STATUS_RF_KILL_HW |
  4830. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4831. STATUS_RF_KILL_SW |
  4832. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4833. STATUS_GEO_CONFIGURED |
  4834. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4835. STATUS_IN_SUSPEND |
  4836. test_bit(STATUS_FW_ERROR, &priv->status) <<
  4837. STATUS_FW_ERROR;
  4838. spin_lock_irqsave(&priv->lock, flags);
  4839. iwl_clear_bit(priv, CSR_GP_CNTRL,
  4840. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4841. spin_unlock_irqrestore(&priv->lock, flags);
  4842. iwl4965_hw_txq_ctx_stop(priv);
  4843. iwl4965_hw_rxq_stop(priv);
  4844. spin_lock_irqsave(&priv->lock, flags);
  4845. if (!iwl_grab_nic_access(priv)) {
  4846. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  4847. APMG_CLK_VAL_DMA_CLK_RQT);
  4848. iwl_release_nic_access(priv);
  4849. }
  4850. spin_unlock_irqrestore(&priv->lock, flags);
  4851. udelay(5);
  4852. iwl4965_hw_nic_stop_master(priv);
  4853. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  4854. iwl4965_hw_nic_reset(priv);
  4855. exit:
  4856. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  4857. if (priv->ibss_beacon)
  4858. dev_kfree_skb(priv->ibss_beacon);
  4859. priv->ibss_beacon = NULL;
  4860. /* clear out any free frames */
  4861. iwl4965_clear_free_frames(priv);
  4862. }
  4863. static void iwl4965_down(struct iwl_priv *priv)
  4864. {
  4865. mutex_lock(&priv->mutex);
  4866. __iwl4965_down(priv);
  4867. mutex_unlock(&priv->mutex);
  4868. iwl4965_cancel_deferred_work(priv);
  4869. }
  4870. #define MAX_HW_RESTARTS 5
  4871. static int __iwl4965_up(struct iwl_priv *priv)
  4872. {
  4873. int rc, i;
  4874. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4875. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  4876. return -EIO;
  4877. }
  4878. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  4879. IWL_WARNING("Radio disabled by SW RF kill (module "
  4880. "parameter)\n");
  4881. return -ENODEV;
  4882. }
  4883. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  4884. IWL_ERROR("ucode not available for device bringup\n");
  4885. return -EIO;
  4886. }
  4887. /* If platform's RF_KILL switch is NOT set to KILL */
  4888. if (iwl_read32(priv, CSR_GP_CNTRL) &
  4889. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4890. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4891. else {
  4892. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4893. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  4894. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  4895. return -ENODEV;
  4896. }
  4897. }
  4898. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4899. rc = iwl4965_hw_nic_init(priv);
  4900. if (rc) {
  4901. IWL_ERROR("Unable to int nic\n");
  4902. return rc;
  4903. }
  4904. /* make sure rfkill handshake bits are cleared */
  4905. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4906. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  4907. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  4908. /* clear (again), then enable host interrupts */
  4909. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4910. iwl4965_enable_interrupts(priv);
  4911. /* really make sure rfkill handshake bits are cleared */
  4912. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4913. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4914. /* Copy original ucode data image from disk into backup cache.
  4915. * This will be used to initialize the on-board processor's
  4916. * data SRAM for a clean start when the runtime program first loads. */
  4917. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  4918. priv->ucode_data.len);
  4919. /* We return success when we resume from suspend and rf_kill is on. */
  4920. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  4921. return 0;
  4922. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  4923. iwlcore_clear_stations_table(priv);
  4924. /* load bootstrap state machine,
  4925. * load bootstrap program into processor's memory,
  4926. * prepare to load the "initialize" uCode */
  4927. rc = iwl4965_load_bsm(priv);
  4928. if (rc) {
  4929. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  4930. continue;
  4931. }
  4932. /* start card; "initialize" will load runtime ucode */
  4933. iwl4965_nic_start(priv);
  4934. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  4935. return 0;
  4936. }
  4937. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4938. __iwl4965_down(priv);
  4939. /* tried to restart and config the device for as long as our
  4940. * patience could withstand */
  4941. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  4942. return -EIO;
  4943. }
  4944. /*****************************************************************************
  4945. *
  4946. * Workqueue callbacks
  4947. *
  4948. *****************************************************************************/
  4949. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  4950. {
  4951. struct iwl_priv *priv =
  4952. container_of(data, struct iwl_priv, init_alive_start.work);
  4953. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4954. return;
  4955. mutex_lock(&priv->mutex);
  4956. iwl4965_init_alive_start(priv);
  4957. mutex_unlock(&priv->mutex);
  4958. }
  4959. static void iwl4965_bg_alive_start(struct work_struct *data)
  4960. {
  4961. struct iwl_priv *priv =
  4962. container_of(data, struct iwl_priv, alive_start.work);
  4963. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4964. return;
  4965. mutex_lock(&priv->mutex);
  4966. iwl4965_alive_start(priv);
  4967. mutex_unlock(&priv->mutex);
  4968. }
  4969. static void iwl4965_bg_rf_kill(struct work_struct *work)
  4970. {
  4971. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  4972. wake_up_interruptible(&priv->wait_command_queue);
  4973. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4974. return;
  4975. mutex_lock(&priv->mutex);
  4976. if (!iwl4965_is_rfkill(priv)) {
  4977. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  4978. "HW and/or SW RF Kill no longer active, restarting "
  4979. "device\n");
  4980. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4981. queue_work(priv->workqueue, &priv->restart);
  4982. } else {
  4983. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  4984. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  4985. "disabled by SW switch\n");
  4986. else
  4987. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  4988. "Kill switch must be turned off for "
  4989. "wireless networking to work.\n");
  4990. }
  4991. mutex_unlock(&priv->mutex);
  4992. }
  4993. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  4994. static void iwl4965_bg_scan_check(struct work_struct *data)
  4995. {
  4996. struct iwl_priv *priv =
  4997. container_of(data, struct iwl_priv, scan_check.work);
  4998. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4999. return;
  5000. mutex_lock(&priv->mutex);
  5001. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5002. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5003. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5004. "Scan completion watchdog resetting adapter (%dms)\n",
  5005. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5006. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5007. iwl4965_send_scan_abort(priv);
  5008. }
  5009. mutex_unlock(&priv->mutex);
  5010. }
  5011. static void iwl4965_bg_request_scan(struct work_struct *data)
  5012. {
  5013. struct iwl_priv *priv =
  5014. container_of(data, struct iwl_priv, request_scan);
  5015. struct iwl_host_cmd cmd = {
  5016. .id = REPLY_SCAN_CMD,
  5017. .len = sizeof(struct iwl4965_scan_cmd),
  5018. .meta.flags = CMD_SIZE_HUGE,
  5019. };
  5020. struct iwl4965_scan_cmd *scan;
  5021. struct ieee80211_conf *conf = NULL;
  5022. u16 cmd_len;
  5023. enum ieee80211_band band;
  5024. u8 direct_mask;
  5025. int ret = 0;
  5026. conf = ieee80211_get_hw_conf(priv->hw);
  5027. mutex_lock(&priv->mutex);
  5028. if (!iwl4965_is_ready(priv)) {
  5029. IWL_WARNING("request scan called when driver not ready.\n");
  5030. goto done;
  5031. }
  5032. /* Make sure the scan wasn't cancelled before this queued work
  5033. * was given the chance to run... */
  5034. if (!test_bit(STATUS_SCANNING, &priv->status))
  5035. goto done;
  5036. /* This should never be called or scheduled if there is currently
  5037. * a scan active in the hardware. */
  5038. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5039. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5040. "Ignoring second request.\n");
  5041. ret = -EIO;
  5042. goto done;
  5043. }
  5044. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5045. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5046. goto done;
  5047. }
  5048. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5049. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5050. goto done;
  5051. }
  5052. if (iwl4965_is_rfkill(priv)) {
  5053. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5054. goto done;
  5055. }
  5056. if (!test_bit(STATUS_READY, &priv->status)) {
  5057. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5058. goto done;
  5059. }
  5060. if (!priv->scan_bands) {
  5061. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5062. goto done;
  5063. }
  5064. if (!priv->scan) {
  5065. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5066. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5067. if (!priv->scan) {
  5068. ret = -ENOMEM;
  5069. goto done;
  5070. }
  5071. }
  5072. scan = priv->scan;
  5073. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5074. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5075. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5076. if (iwl4965_is_associated(priv)) {
  5077. u16 interval = 0;
  5078. u32 extra;
  5079. u32 suspend_time = 100;
  5080. u32 scan_suspend_time = 100;
  5081. unsigned long flags;
  5082. IWL_DEBUG_INFO("Scanning while associated...\n");
  5083. spin_lock_irqsave(&priv->lock, flags);
  5084. interval = priv->beacon_int;
  5085. spin_unlock_irqrestore(&priv->lock, flags);
  5086. scan->suspend_time = 0;
  5087. scan->max_out_time = cpu_to_le32(200 * 1024);
  5088. if (!interval)
  5089. interval = suspend_time;
  5090. extra = (suspend_time / interval) << 22;
  5091. scan_suspend_time = (extra |
  5092. ((suspend_time % interval) * 1024));
  5093. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5094. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5095. scan_suspend_time, interval);
  5096. }
  5097. /* We should add the ability for user to lock to PASSIVE ONLY */
  5098. if (priv->one_direct_scan) {
  5099. IWL_DEBUG_SCAN
  5100. ("Kicking off one direct scan for '%s'\n",
  5101. iwl4965_escape_essid(priv->direct_ssid,
  5102. priv->direct_ssid_len));
  5103. scan->direct_scan[0].id = WLAN_EID_SSID;
  5104. scan->direct_scan[0].len = priv->direct_ssid_len;
  5105. memcpy(scan->direct_scan[0].ssid,
  5106. priv->direct_ssid, priv->direct_ssid_len);
  5107. direct_mask = 1;
  5108. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5109. scan->direct_scan[0].id = WLAN_EID_SSID;
  5110. scan->direct_scan[0].len = priv->essid_len;
  5111. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5112. direct_mask = 1;
  5113. } else {
  5114. direct_mask = 0;
  5115. }
  5116. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5117. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5118. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5119. switch (priv->scan_bands) {
  5120. case 2:
  5121. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5122. scan->tx_cmd.rate_n_flags =
  5123. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5124. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5125. scan->good_CRC_th = 0;
  5126. band = IEEE80211_BAND_2GHZ;
  5127. break;
  5128. case 1:
  5129. scan->tx_cmd.rate_n_flags =
  5130. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5131. RATE_MCS_ANT_B_MSK);
  5132. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5133. band = IEEE80211_BAND_5GHZ;
  5134. break;
  5135. default:
  5136. IWL_WARNING("Invalid scan band count\n");
  5137. goto done;
  5138. }
  5139. /* We don't build a direct scan probe request; the uCode will do
  5140. * that based on the direct_mask added to each channel entry */
  5141. cmd_len = iwl4965_fill_probe_req(priv, band,
  5142. (struct ieee80211_mgmt *)scan->data,
  5143. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5144. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5145. /* select Rx chains */
  5146. /* Force use of chains B and C (0x6) for scan Rx.
  5147. * Avoid A (0x1) because of its off-channel reception on A-band.
  5148. * MIMO is not used here, but value is required to make uCode happy. */
  5149. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5150. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5151. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5152. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5153. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5154. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5155. if (direct_mask) {
  5156. IWL_DEBUG_SCAN
  5157. ("Initiating direct scan for %s.\n",
  5158. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5159. scan->channel_count =
  5160. iwl4965_get_channels_for_scan(
  5161. priv, band, 1, /* active */
  5162. direct_mask,
  5163. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5164. } else {
  5165. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5166. scan->channel_count =
  5167. iwl4965_get_channels_for_scan(
  5168. priv, band, 0, /* passive */
  5169. direct_mask,
  5170. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5171. }
  5172. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5173. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5174. cmd.data = scan;
  5175. scan->len = cpu_to_le16(cmd.len);
  5176. set_bit(STATUS_SCAN_HW, &priv->status);
  5177. ret = iwl_send_cmd_sync(priv, &cmd);
  5178. if (ret)
  5179. goto done;
  5180. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5181. IWL_SCAN_CHECK_WATCHDOG);
  5182. mutex_unlock(&priv->mutex);
  5183. return;
  5184. done:
  5185. /* inform mac80211 scan aborted */
  5186. queue_work(priv->workqueue, &priv->scan_completed);
  5187. mutex_unlock(&priv->mutex);
  5188. }
  5189. static void iwl4965_bg_up(struct work_struct *data)
  5190. {
  5191. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5192. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5193. return;
  5194. mutex_lock(&priv->mutex);
  5195. __iwl4965_up(priv);
  5196. mutex_unlock(&priv->mutex);
  5197. }
  5198. static void iwl4965_bg_restart(struct work_struct *data)
  5199. {
  5200. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5201. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5202. return;
  5203. iwl4965_down(priv);
  5204. queue_work(priv->workqueue, &priv->up);
  5205. }
  5206. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5207. {
  5208. struct iwl_priv *priv =
  5209. container_of(data, struct iwl_priv, rx_replenish);
  5210. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5211. return;
  5212. mutex_lock(&priv->mutex);
  5213. iwl4965_rx_replenish(priv);
  5214. mutex_unlock(&priv->mutex);
  5215. }
  5216. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5217. static void iwl4965_bg_post_associate(struct work_struct *data)
  5218. {
  5219. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5220. post_associate.work);
  5221. struct ieee80211_conf *conf = NULL;
  5222. int ret = 0;
  5223. DECLARE_MAC_BUF(mac);
  5224. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5225. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5226. return;
  5227. }
  5228. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5229. priv->assoc_id,
  5230. print_mac(mac, priv->active_rxon.bssid_addr));
  5231. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5232. return;
  5233. mutex_lock(&priv->mutex);
  5234. if (!priv->vif || !priv->is_open) {
  5235. mutex_unlock(&priv->mutex);
  5236. return;
  5237. }
  5238. iwl4965_scan_cancel_timeout(priv, 200);
  5239. conf = ieee80211_get_hw_conf(priv->hw);
  5240. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5241. iwl4965_commit_rxon(priv);
  5242. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5243. iwl4965_setup_rxon_timing(priv);
  5244. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5245. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5246. if (ret)
  5247. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5248. "Attempting to continue.\n");
  5249. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5250. #ifdef CONFIG_IWL4965_HT
  5251. if (priv->current_ht_config.is_ht)
  5252. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5253. #endif /* CONFIG_IWL4965_HT*/
  5254. iwl4965_set_rxon_chain(priv);
  5255. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5256. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5257. priv->assoc_id, priv->beacon_int);
  5258. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5259. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5260. else
  5261. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5262. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5263. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5264. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5265. else
  5266. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5267. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5268. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5269. }
  5270. iwl4965_commit_rxon(priv);
  5271. switch (priv->iw_mode) {
  5272. case IEEE80211_IF_TYPE_STA:
  5273. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5274. break;
  5275. case IEEE80211_IF_TYPE_IBSS:
  5276. /* clear out the station table */
  5277. iwlcore_clear_stations_table(priv);
  5278. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5279. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5280. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5281. iwl4965_send_beacon_cmd(priv);
  5282. break;
  5283. default:
  5284. IWL_ERROR("%s Should not be called in %d mode\n",
  5285. __FUNCTION__, priv->iw_mode);
  5286. break;
  5287. }
  5288. iwl4965_sequence_reset(priv);
  5289. #ifdef CONFIG_IWL4965_SENSITIVITY
  5290. /* Enable Rx differential gain and sensitivity calibrations */
  5291. iwl4965_chain_noise_reset(priv);
  5292. priv->start_calib = 1;
  5293. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5294. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5295. priv->assoc_station_added = 1;
  5296. iwl4965_activate_qos(priv, 0);
  5297. /* we have just associated, don't start scan too early */
  5298. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5299. mutex_unlock(&priv->mutex);
  5300. }
  5301. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5302. {
  5303. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  5304. if (!iwl4965_is_ready(priv))
  5305. return;
  5306. mutex_lock(&priv->mutex);
  5307. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5308. iwl4965_send_scan_abort(priv);
  5309. mutex_unlock(&priv->mutex);
  5310. }
  5311. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5312. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5313. {
  5314. struct iwl_priv *priv =
  5315. container_of(work, struct iwl_priv, scan_completed);
  5316. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5317. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5318. return;
  5319. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5320. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5321. ieee80211_scan_completed(priv->hw);
  5322. /* Since setting the TXPOWER may have been deferred while
  5323. * performing the scan, fire one off */
  5324. mutex_lock(&priv->mutex);
  5325. iwl4965_hw_reg_send_txpower(priv);
  5326. mutex_unlock(&priv->mutex);
  5327. }
  5328. /*****************************************************************************
  5329. *
  5330. * mac80211 entry point functions
  5331. *
  5332. *****************************************************************************/
  5333. #define UCODE_READY_TIMEOUT (2 * HZ)
  5334. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5335. {
  5336. struct iwl_priv *priv = hw->priv;
  5337. int ret;
  5338. IWL_DEBUG_MAC80211("enter\n");
  5339. if (pci_enable_device(priv->pci_dev)) {
  5340. IWL_ERROR("Fail to pci_enable_device\n");
  5341. return -ENODEV;
  5342. }
  5343. pci_restore_state(priv->pci_dev);
  5344. pci_enable_msi(priv->pci_dev);
  5345. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5346. DRV_NAME, priv);
  5347. if (ret) {
  5348. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5349. goto out_disable_msi;
  5350. }
  5351. /* we should be verifying the device is ready to be opened */
  5352. mutex_lock(&priv->mutex);
  5353. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5354. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5355. * ucode filename and max sizes are card-specific. */
  5356. if (!priv->ucode_code.len) {
  5357. ret = iwl4965_read_ucode(priv);
  5358. if (ret) {
  5359. IWL_ERROR("Could not read microcode: %d\n", ret);
  5360. mutex_unlock(&priv->mutex);
  5361. goto out_release_irq;
  5362. }
  5363. }
  5364. ret = __iwl4965_up(priv);
  5365. mutex_unlock(&priv->mutex);
  5366. if (ret)
  5367. goto out_release_irq;
  5368. IWL_DEBUG_INFO("Start UP work done.\n");
  5369. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5370. return 0;
  5371. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5372. * mac80211 will not be run successfully. */
  5373. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5374. test_bit(STATUS_READY, &priv->status),
  5375. UCODE_READY_TIMEOUT);
  5376. if (!ret) {
  5377. if (!test_bit(STATUS_READY, &priv->status)) {
  5378. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5379. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5380. ret = -ETIMEDOUT;
  5381. goto out_release_irq;
  5382. }
  5383. }
  5384. priv->is_open = 1;
  5385. IWL_DEBUG_MAC80211("leave\n");
  5386. return 0;
  5387. out_release_irq:
  5388. free_irq(priv->pci_dev->irq, priv);
  5389. out_disable_msi:
  5390. pci_disable_msi(priv->pci_dev);
  5391. pci_disable_device(priv->pci_dev);
  5392. priv->is_open = 0;
  5393. IWL_DEBUG_MAC80211("leave - failed\n");
  5394. return ret;
  5395. }
  5396. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5397. {
  5398. struct iwl_priv *priv = hw->priv;
  5399. IWL_DEBUG_MAC80211("enter\n");
  5400. if (!priv->is_open) {
  5401. IWL_DEBUG_MAC80211("leave - skip\n");
  5402. return;
  5403. }
  5404. priv->is_open = 0;
  5405. if (iwl4965_is_ready_rf(priv)) {
  5406. /* stop mac, cancel any scan request and clear
  5407. * RXON_FILTER_ASSOC_MSK BIT
  5408. */
  5409. mutex_lock(&priv->mutex);
  5410. iwl4965_scan_cancel_timeout(priv, 100);
  5411. cancel_delayed_work(&priv->post_associate);
  5412. mutex_unlock(&priv->mutex);
  5413. }
  5414. iwl4965_down(priv);
  5415. flush_workqueue(priv->workqueue);
  5416. free_irq(priv->pci_dev->irq, priv);
  5417. pci_disable_msi(priv->pci_dev);
  5418. pci_save_state(priv->pci_dev);
  5419. pci_disable_device(priv->pci_dev);
  5420. IWL_DEBUG_MAC80211("leave\n");
  5421. }
  5422. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5423. struct ieee80211_tx_control *ctl)
  5424. {
  5425. struct iwl_priv *priv = hw->priv;
  5426. IWL_DEBUG_MAC80211("enter\n");
  5427. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5428. IWL_DEBUG_MAC80211("leave - monitor\n");
  5429. return -1;
  5430. }
  5431. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5432. ctl->tx_rate->bitrate);
  5433. if (iwl4965_tx_skb(priv, skb, ctl))
  5434. dev_kfree_skb_any(skb);
  5435. IWL_DEBUG_MAC80211("leave\n");
  5436. return 0;
  5437. }
  5438. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  5439. struct ieee80211_if_init_conf *conf)
  5440. {
  5441. struct iwl_priv *priv = hw->priv;
  5442. unsigned long flags;
  5443. DECLARE_MAC_BUF(mac);
  5444. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  5445. if (priv->vif) {
  5446. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  5447. return -EOPNOTSUPP;
  5448. }
  5449. spin_lock_irqsave(&priv->lock, flags);
  5450. priv->vif = conf->vif;
  5451. spin_unlock_irqrestore(&priv->lock, flags);
  5452. mutex_lock(&priv->mutex);
  5453. if (conf->mac_addr) {
  5454. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  5455. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  5456. }
  5457. if (iwl4965_is_ready(priv))
  5458. iwl4965_set_mode(priv, conf->type);
  5459. mutex_unlock(&priv->mutex);
  5460. IWL_DEBUG_MAC80211("leave\n");
  5461. return 0;
  5462. }
  5463. /**
  5464. * iwl4965_mac_config - mac80211 config callback
  5465. *
  5466. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5467. * be set inappropriately and the driver currently sets the hardware up to
  5468. * use it whenever needed.
  5469. */
  5470. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5471. {
  5472. struct iwl_priv *priv = hw->priv;
  5473. const struct iwl_channel_info *ch_info;
  5474. unsigned long flags;
  5475. int ret = 0;
  5476. mutex_lock(&priv->mutex);
  5477. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  5478. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  5479. if (!iwl4965_is_ready(priv)) {
  5480. IWL_DEBUG_MAC80211("leave - not ready\n");
  5481. ret = -EIO;
  5482. goto out;
  5483. }
  5484. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  5485. test_bit(STATUS_SCANNING, &priv->status))) {
  5486. IWL_DEBUG_MAC80211("leave - scanning\n");
  5487. set_bit(STATUS_CONF_PENDING, &priv->status);
  5488. mutex_unlock(&priv->mutex);
  5489. return 0;
  5490. }
  5491. spin_lock_irqsave(&priv->lock, flags);
  5492. ch_info = iwl_get_channel_info(priv, conf->channel->band,
  5493. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5494. if (!is_channel_valid(ch_info)) {
  5495. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5496. spin_unlock_irqrestore(&priv->lock, flags);
  5497. ret = -EINVAL;
  5498. goto out;
  5499. }
  5500. #ifdef CONFIG_IWL4965_HT
  5501. /* if we are switching from ht to 2.4 clear flags
  5502. * from any ht related info since 2.4 does not
  5503. * support ht */
  5504. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  5505. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5506. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  5507. #endif
  5508. )
  5509. priv->staging_rxon.flags = 0;
  5510. #endif /* CONFIG_IWL4965_HT */
  5511. iwlcore_set_rxon_channel(priv, conf->channel->band,
  5512. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5513. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  5514. /* The list of supported rates and rate mask can be different
  5515. * for each band; since the band may have changed, reset
  5516. * the rate mask to what mac80211 lists */
  5517. iwl4965_set_rate(priv);
  5518. spin_unlock_irqrestore(&priv->lock, flags);
  5519. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5520. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5521. iwl4965_hw_channel_switch(priv, conf->channel);
  5522. goto out;
  5523. }
  5524. #endif
  5525. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  5526. if (!conf->radio_enabled) {
  5527. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5528. goto out;
  5529. }
  5530. if (iwl4965_is_rfkill(priv)) {
  5531. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5532. ret = -EIO;
  5533. goto out;
  5534. }
  5535. iwl4965_set_rate(priv);
  5536. if (memcmp(&priv->active_rxon,
  5537. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  5538. iwl4965_commit_rxon(priv);
  5539. else
  5540. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5541. IWL_DEBUG_MAC80211("leave\n");
  5542. out:
  5543. clear_bit(STATUS_CONF_PENDING, &priv->status);
  5544. mutex_unlock(&priv->mutex);
  5545. return ret;
  5546. }
  5547. static void iwl4965_config_ap(struct iwl_priv *priv)
  5548. {
  5549. int ret = 0;
  5550. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5551. return;
  5552. /* The following should be done only at AP bring up */
  5553. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  5554. /* RXON - unassoc (to set timing command) */
  5555. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5556. iwl4965_commit_rxon(priv);
  5557. /* RXON Timing */
  5558. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5559. iwl4965_setup_rxon_timing(priv);
  5560. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5561. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5562. if (ret)
  5563. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5564. "Attempting to continue.\n");
  5565. iwl4965_set_rxon_chain(priv);
  5566. /* FIXME: what should be the assoc_id for AP? */
  5567. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5568. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5569. priv->staging_rxon.flags |=
  5570. RXON_FLG_SHORT_PREAMBLE_MSK;
  5571. else
  5572. priv->staging_rxon.flags &=
  5573. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5574. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5575. if (priv->assoc_capability &
  5576. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5577. priv->staging_rxon.flags |=
  5578. RXON_FLG_SHORT_SLOT_MSK;
  5579. else
  5580. priv->staging_rxon.flags &=
  5581. ~RXON_FLG_SHORT_SLOT_MSK;
  5582. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5583. priv->staging_rxon.flags &=
  5584. ~RXON_FLG_SHORT_SLOT_MSK;
  5585. }
  5586. /* restore RXON assoc */
  5587. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5588. iwl4965_commit_rxon(priv);
  5589. iwl4965_activate_qos(priv, 1);
  5590. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5591. }
  5592. iwl4965_send_beacon_cmd(priv);
  5593. /* FIXME - we need to add code here to detect a totally new
  5594. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5595. * clear sta table, add BCAST sta... */
  5596. }
  5597. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  5598. struct ieee80211_vif *vif,
  5599. struct ieee80211_if_conf *conf)
  5600. {
  5601. struct iwl_priv *priv = hw->priv;
  5602. DECLARE_MAC_BUF(mac);
  5603. unsigned long flags;
  5604. int rc;
  5605. if (conf == NULL)
  5606. return -EIO;
  5607. if (priv->vif != vif) {
  5608. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  5609. mutex_unlock(&priv->mutex);
  5610. return 0;
  5611. }
  5612. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  5613. (!conf->beacon || !conf->ssid_len)) {
  5614. IWL_DEBUG_MAC80211
  5615. ("Leaving in AP mode because HostAPD is not ready.\n");
  5616. return 0;
  5617. }
  5618. if (!iwl4965_is_alive(priv))
  5619. return -EAGAIN;
  5620. mutex_lock(&priv->mutex);
  5621. if (conf->bssid)
  5622. IWL_DEBUG_MAC80211("bssid: %s\n",
  5623. print_mac(mac, conf->bssid));
  5624. /*
  5625. * very dubious code was here; the probe filtering flag is never set:
  5626. *
  5627. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5628. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5629. */
  5630. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5631. if (!conf->bssid) {
  5632. conf->bssid = priv->mac_addr;
  5633. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5634. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  5635. print_mac(mac, conf->bssid));
  5636. }
  5637. if (priv->ibss_beacon)
  5638. dev_kfree_skb(priv->ibss_beacon);
  5639. priv->ibss_beacon = conf->beacon;
  5640. }
  5641. if (iwl4965_is_rfkill(priv))
  5642. goto done;
  5643. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5644. !is_multicast_ether_addr(conf->bssid)) {
  5645. /* If there is currently a HW scan going on in the background
  5646. * then we need to cancel it else the RXON below will fail. */
  5647. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  5648. IWL_WARNING("Aborted scan still in progress "
  5649. "after 100ms\n");
  5650. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5651. mutex_unlock(&priv->mutex);
  5652. return -EAGAIN;
  5653. }
  5654. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5655. /* TODO: Audit driver for usage of these members and see
  5656. * if mac80211 deprecates them (priv->bssid looks like it
  5657. * shouldn't be there, but I haven't scanned the IBSS code
  5658. * to verify) - jpk */
  5659. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5660. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5661. iwl4965_config_ap(priv);
  5662. else {
  5663. rc = iwl4965_commit_rxon(priv);
  5664. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  5665. iwl4965_rxon_add_station(
  5666. priv, priv->active_rxon.bssid_addr, 1);
  5667. }
  5668. } else {
  5669. iwl4965_scan_cancel_timeout(priv, 100);
  5670. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5671. iwl4965_commit_rxon(priv);
  5672. }
  5673. done:
  5674. spin_lock_irqsave(&priv->lock, flags);
  5675. if (!conf->ssid_len)
  5676. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5677. else
  5678. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  5679. priv->essid_len = conf->ssid_len;
  5680. spin_unlock_irqrestore(&priv->lock, flags);
  5681. IWL_DEBUG_MAC80211("leave\n");
  5682. mutex_unlock(&priv->mutex);
  5683. return 0;
  5684. }
  5685. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  5686. unsigned int changed_flags,
  5687. unsigned int *total_flags,
  5688. int mc_count, struct dev_addr_list *mc_list)
  5689. {
  5690. /*
  5691. * XXX: dummy
  5692. * see also iwl4965_connection_init_rx_config
  5693. */
  5694. *total_flags = 0;
  5695. }
  5696. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  5697. struct ieee80211_if_init_conf *conf)
  5698. {
  5699. struct iwl_priv *priv = hw->priv;
  5700. IWL_DEBUG_MAC80211("enter\n");
  5701. mutex_lock(&priv->mutex);
  5702. if (iwl4965_is_ready_rf(priv)) {
  5703. iwl4965_scan_cancel_timeout(priv, 100);
  5704. cancel_delayed_work(&priv->post_associate);
  5705. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5706. iwl4965_commit_rxon(priv);
  5707. }
  5708. if (priv->vif == conf->vif) {
  5709. priv->vif = NULL;
  5710. memset(priv->bssid, 0, ETH_ALEN);
  5711. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5712. priv->essid_len = 0;
  5713. }
  5714. mutex_unlock(&priv->mutex);
  5715. IWL_DEBUG_MAC80211("leave\n");
  5716. }
  5717. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  5718. struct ieee80211_vif *vif,
  5719. struct ieee80211_bss_conf *bss_conf,
  5720. u32 changes)
  5721. {
  5722. struct iwl_priv *priv = hw->priv;
  5723. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  5724. if (bss_conf->use_short_preamble)
  5725. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5726. else
  5727. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5728. }
  5729. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  5730. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  5731. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  5732. else
  5733. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  5734. }
  5735. if (changes & BSS_CHANGED_ASSOC) {
  5736. /*
  5737. * TODO:
  5738. * do stuff instead of sniffing assoc resp
  5739. */
  5740. }
  5741. if (iwl4965_is_associated(priv))
  5742. iwl4965_send_rxon_assoc(priv);
  5743. }
  5744. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  5745. {
  5746. int rc = 0;
  5747. unsigned long flags;
  5748. struct iwl_priv *priv = hw->priv;
  5749. IWL_DEBUG_MAC80211("enter\n");
  5750. mutex_lock(&priv->mutex);
  5751. spin_lock_irqsave(&priv->lock, flags);
  5752. if (!iwl4965_is_ready_rf(priv)) {
  5753. rc = -EIO;
  5754. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  5755. goto out_unlock;
  5756. }
  5757. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  5758. rc = -EIO;
  5759. IWL_ERROR("ERROR: APs don't scan\n");
  5760. goto out_unlock;
  5761. }
  5762. /* we don't schedule scan within next_scan_jiffies period */
  5763. if (priv->next_scan_jiffies &&
  5764. time_after(priv->next_scan_jiffies, jiffies)) {
  5765. rc = -EAGAIN;
  5766. goto out_unlock;
  5767. }
  5768. /* if we just finished scan ask for delay */
  5769. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  5770. IWL_DELAY_NEXT_SCAN, jiffies)) {
  5771. rc = -EAGAIN;
  5772. goto out_unlock;
  5773. }
  5774. if (len) {
  5775. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  5776. iwl4965_escape_essid(ssid, len), (int)len);
  5777. priv->one_direct_scan = 1;
  5778. priv->direct_ssid_len = (u8)
  5779. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  5780. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  5781. } else
  5782. priv->one_direct_scan = 0;
  5783. rc = iwl4965_scan_initiate(priv);
  5784. IWL_DEBUG_MAC80211("leave\n");
  5785. out_unlock:
  5786. spin_unlock_irqrestore(&priv->lock, flags);
  5787. mutex_unlock(&priv->mutex);
  5788. return rc;
  5789. }
  5790. static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
  5791. struct ieee80211_key_conf *keyconf, const u8 *addr,
  5792. u32 iv32, u16 *phase1key)
  5793. {
  5794. struct iwl_priv *priv = hw->priv;
  5795. u8 sta_id = IWL_INVALID_STATION;
  5796. unsigned long flags;
  5797. __le16 key_flags = 0;
  5798. int i;
  5799. DECLARE_MAC_BUF(mac);
  5800. IWL_DEBUG_MAC80211("enter\n");
  5801. sta_id = iwl4965_hw_find_station(priv, addr);
  5802. if (sta_id == IWL_INVALID_STATION) {
  5803. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5804. print_mac(mac, addr));
  5805. return;
  5806. }
  5807. iwl4965_scan_cancel_timeout(priv, 100);
  5808. key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
  5809. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  5810. key_flags &= ~STA_KEY_FLG_INVALID;
  5811. if (sta_id == priv->hw_setting.bcast_sta_id)
  5812. key_flags |= STA_KEY_MULTICAST_MSK;
  5813. spin_lock_irqsave(&priv->sta_lock, flags);
  5814. priv->stations[sta_id].sta.key.key_offset =
  5815. (sta_id % STA_KEY_MAX_NUM);/* FIXME */
  5816. priv->stations[sta_id].sta.key.key_flags = key_flags;
  5817. priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
  5818. for (i = 0; i < 5; i++)
  5819. priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
  5820. cpu_to_le16(phase1key[i]);
  5821. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  5822. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  5823. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  5824. spin_unlock_irqrestore(&priv->sta_lock, flags);
  5825. IWL_DEBUG_MAC80211("leave\n");
  5826. }
  5827. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  5828. const u8 *local_addr, const u8 *addr,
  5829. struct ieee80211_key_conf *key)
  5830. {
  5831. struct iwl_priv *priv = hw->priv;
  5832. DECLARE_MAC_BUF(mac);
  5833. int ret = 0;
  5834. u8 sta_id = IWL_INVALID_STATION;
  5835. u8 static_key;
  5836. IWL_DEBUG_MAC80211("enter\n");
  5837. if (!priv->cfg->mod_params->hw_crypto) {
  5838. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  5839. return -EOPNOTSUPP;
  5840. }
  5841. if (is_zero_ether_addr(addr))
  5842. /* only support pairwise keys */
  5843. return -EOPNOTSUPP;
  5844. /* FIXME: need to differenciate between static and dynamic key
  5845. * in the level of mac80211 */
  5846. static_key = !iwl4965_is_associated(priv);
  5847. if (!static_key) {
  5848. sta_id = iwl4965_hw_find_station(priv, addr);
  5849. if (sta_id == IWL_INVALID_STATION) {
  5850. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5851. print_mac(mac, addr));
  5852. return -EINVAL;
  5853. }
  5854. }
  5855. iwl4965_scan_cancel_timeout(priv, 100);
  5856. switch (cmd) {
  5857. case SET_KEY:
  5858. if (static_key)
  5859. ret = iwl4965_set_static_key(priv, key);
  5860. else
  5861. ret = iwl4965_set_dynamic_key(priv, key, sta_id);
  5862. IWL_DEBUG_MAC80211("enable hwcrypto key\n");
  5863. break;
  5864. case DISABLE_KEY:
  5865. if (static_key)
  5866. ret = iwl4965_remove_static_key(priv);
  5867. else
  5868. ret = iwl4965_clear_sta_key_info(priv, sta_id);
  5869. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  5870. break;
  5871. default:
  5872. ret = -EINVAL;
  5873. }
  5874. IWL_DEBUG_MAC80211("leave\n");
  5875. return ret;
  5876. }
  5877. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  5878. const struct ieee80211_tx_queue_params *params)
  5879. {
  5880. struct iwl_priv *priv = hw->priv;
  5881. unsigned long flags;
  5882. int q;
  5883. IWL_DEBUG_MAC80211("enter\n");
  5884. if (!iwl4965_is_ready_rf(priv)) {
  5885. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5886. return -EIO;
  5887. }
  5888. if (queue >= AC_NUM) {
  5889. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  5890. return 0;
  5891. }
  5892. if (!priv->qos_data.qos_enable) {
  5893. priv->qos_data.qos_active = 0;
  5894. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  5895. return 0;
  5896. }
  5897. q = AC_NUM - 1 - queue;
  5898. spin_lock_irqsave(&priv->lock, flags);
  5899. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  5900. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  5901. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  5902. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  5903. cpu_to_le16((params->txop * 32));
  5904. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  5905. priv->qos_data.qos_active = 1;
  5906. spin_unlock_irqrestore(&priv->lock, flags);
  5907. mutex_lock(&priv->mutex);
  5908. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5909. iwl4965_activate_qos(priv, 1);
  5910. else if (priv->assoc_id && iwl4965_is_associated(priv))
  5911. iwl4965_activate_qos(priv, 0);
  5912. mutex_unlock(&priv->mutex);
  5913. IWL_DEBUG_MAC80211("leave\n");
  5914. return 0;
  5915. }
  5916. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  5917. struct ieee80211_tx_queue_stats *stats)
  5918. {
  5919. struct iwl_priv *priv = hw->priv;
  5920. int i, avail;
  5921. struct iwl4965_tx_queue *txq;
  5922. struct iwl4965_queue *q;
  5923. unsigned long flags;
  5924. IWL_DEBUG_MAC80211("enter\n");
  5925. if (!iwl4965_is_ready_rf(priv)) {
  5926. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5927. return -EIO;
  5928. }
  5929. spin_lock_irqsave(&priv->lock, flags);
  5930. for (i = 0; i < AC_NUM; i++) {
  5931. txq = &priv->txq[i];
  5932. q = &txq->q;
  5933. avail = iwl4965_queue_space(q);
  5934. stats->data[i].len = q->n_window - avail;
  5935. stats->data[i].limit = q->n_window - q->high_mark;
  5936. stats->data[i].count = q->n_window;
  5937. }
  5938. spin_unlock_irqrestore(&priv->lock, flags);
  5939. IWL_DEBUG_MAC80211("leave\n");
  5940. return 0;
  5941. }
  5942. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  5943. struct ieee80211_low_level_stats *stats)
  5944. {
  5945. IWL_DEBUG_MAC80211("enter\n");
  5946. IWL_DEBUG_MAC80211("leave\n");
  5947. return 0;
  5948. }
  5949. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  5950. {
  5951. IWL_DEBUG_MAC80211("enter\n");
  5952. IWL_DEBUG_MAC80211("leave\n");
  5953. return 0;
  5954. }
  5955. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  5956. {
  5957. struct iwl_priv *priv = hw->priv;
  5958. unsigned long flags;
  5959. mutex_lock(&priv->mutex);
  5960. IWL_DEBUG_MAC80211("enter\n");
  5961. priv->lq_mngr.lq_ready = 0;
  5962. #ifdef CONFIG_IWL4965_HT
  5963. spin_lock_irqsave(&priv->lock, flags);
  5964. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  5965. spin_unlock_irqrestore(&priv->lock, flags);
  5966. #endif /* CONFIG_IWL4965_HT */
  5967. iwlcore_reset_qos(priv);
  5968. cancel_delayed_work(&priv->post_associate);
  5969. spin_lock_irqsave(&priv->lock, flags);
  5970. priv->assoc_id = 0;
  5971. priv->assoc_capability = 0;
  5972. priv->call_post_assoc_from_beacon = 0;
  5973. priv->assoc_station_added = 0;
  5974. /* new association get rid of ibss beacon skb */
  5975. if (priv->ibss_beacon)
  5976. dev_kfree_skb(priv->ibss_beacon);
  5977. priv->ibss_beacon = NULL;
  5978. priv->beacon_int = priv->hw->conf.beacon_int;
  5979. priv->timestamp1 = 0;
  5980. priv->timestamp0 = 0;
  5981. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  5982. priv->beacon_int = 0;
  5983. spin_unlock_irqrestore(&priv->lock, flags);
  5984. if (!iwl4965_is_ready_rf(priv)) {
  5985. IWL_DEBUG_MAC80211("leave - not ready\n");
  5986. mutex_unlock(&priv->mutex);
  5987. return;
  5988. }
  5989. /* we are restarting association process
  5990. * clear RXON_FILTER_ASSOC_MSK bit
  5991. */
  5992. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  5993. iwl4965_scan_cancel_timeout(priv, 100);
  5994. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5995. iwl4965_commit_rxon(priv);
  5996. }
  5997. /* Per mac80211.h: This is only used in IBSS mode... */
  5998. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  5999. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6000. mutex_unlock(&priv->mutex);
  6001. return;
  6002. }
  6003. priv->only_active_channel = 0;
  6004. iwl4965_set_rate(priv);
  6005. mutex_unlock(&priv->mutex);
  6006. IWL_DEBUG_MAC80211("leave\n");
  6007. }
  6008. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6009. struct ieee80211_tx_control *control)
  6010. {
  6011. struct iwl_priv *priv = hw->priv;
  6012. unsigned long flags;
  6013. mutex_lock(&priv->mutex);
  6014. IWL_DEBUG_MAC80211("enter\n");
  6015. if (!iwl4965_is_ready_rf(priv)) {
  6016. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6017. mutex_unlock(&priv->mutex);
  6018. return -EIO;
  6019. }
  6020. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6021. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6022. mutex_unlock(&priv->mutex);
  6023. return -EIO;
  6024. }
  6025. spin_lock_irqsave(&priv->lock, flags);
  6026. if (priv->ibss_beacon)
  6027. dev_kfree_skb(priv->ibss_beacon);
  6028. priv->ibss_beacon = skb;
  6029. priv->assoc_id = 0;
  6030. IWL_DEBUG_MAC80211("leave\n");
  6031. spin_unlock_irqrestore(&priv->lock, flags);
  6032. iwlcore_reset_qos(priv);
  6033. queue_work(priv->workqueue, &priv->post_associate.work);
  6034. mutex_unlock(&priv->mutex);
  6035. return 0;
  6036. }
  6037. #ifdef CONFIG_IWL4965_HT
  6038. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6039. struct iwl_priv *priv)
  6040. {
  6041. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6042. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6043. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6044. IWL_DEBUG_MAC80211("enter: \n");
  6045. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6046. iwl_conf->is_ht = 0;
  6047. return;
  6048. }
  6049. iwl_conf->is_ht = 1;
  6050. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6051. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6052. iwl_conf->sgf |= 0x1;
  6053. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6054. iwl_conf->sgf |= 0x2;
  6055. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6056. iwl_conf->max_amsdu_size =
  6057. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6058. iwl_conf->supported_chan_width =
  6059. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6060. iwl_conf->extension_chan_offset =
  6061. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6062. /* If no above or below channel supplied disable FAT channel */
  6063. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  6064. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  6065. iwl_conf->supported_chan_width = 0;
  6066. iwl_conf->tx_mimo_ps_mode =
  6067. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6068. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6069. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6070. iwl_conf->tx_chan_width =
  6071. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6072. iwl_conf->ht_protection =
  6073. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6074. iwl_conf->non_GF_STA_present =
  6075. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6076. IWL_DEBUG_MAC80211("control channel %d\n",
  6077. iwl_conf->control_channel);
  6078. IWL_DEBUG_MAC80211("leave\n");
  6079. }
  6080. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6081. struct ieee80211_conf *conf)
  6082. {
  6083. struct iwl_priv *priv = hw->priv;
  6084. IWL_DEBUG_MAC80211("enter: \n");
  6085. iwl4965_ht_info_fill(conf, priv);
  6086. iwl4965_set_rxon_chain(priv);
  6087. if (priv && priv->assoc_id &&
  6088. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6089. unsigned long flags;
  6090. spin_lock_irqsave(&priv->lock, flags);
  6091. if (priv->beacon_int)
  6092. queue_work(priv->workqueue, &priv->post_associate.work);
  6093. else
  6094. priv->call_post_assoc_from_beacon = 1;
  6095. spin_unlock_irqrestore(&priv->lock, flags);
  6096. }
  6097. IWL_DEBUG_MAC80211("leave:\n");
  6098. return 0;
  6099. }
  6100. #endif /*CONFIG_IWL4965_HT*/
  6101. /*****************************************************************************
  6102. *
  6103. * sysfs attributes
  6104. *
  6105. *****************************************************************************/
  6106. #ifdef CONFIG_IWLWIFI_DEBUG
  6107. /*
  6108. * The following adds a new attribute to the sysfs representation
  6109. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6110. * used for controlling the debug level.
  6111. *
  6112. * See the level definitions in iwl for details.
  6113. */
  6114. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6115. {
  6116. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6117. }
  6118. static ssize_t store_debug_level(struct device_driver *d,
  6119. const char *buf, size_t count)
  6120. {
  6121. char *p = (char *)buf;
  6122. u32 val;
  6123. val = simple_strtoul(p, &p, 0);
  6124. if (p == buf)
  6125. printk(KERN_INFO DRV_NAME
  6126. ": %s is not in hex or decimal form.\n", buf);
  6127. else
  6128. iwl_debug_level = val;
  6129. return strnlen(buf, count);
  6130. }
  6131. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6132. show_debug_level, store_debug_level);
  6133. #endif /* CONFIG_IWLWIFI_DEBUG */
  6134. static ssize_t show_rf_kill(struct device *d,
  6135. struct device_attribute *attr, char *buf)
  6136. {
  6137. /*
  6138. * 0 - RF kill not enabled
  6139. * 1 - SW based RF kill active (sysfs)
  6140. * 2 - HW based RF kill active
  6141. * 3 - Both HW and SW based RF kill active
  6142. */
  6143. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6144. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6145. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6146. return sprintf(buf, "%i\n", val);
  6147. }
  6148. static ssize_t store_rf_kill(struct device *d,
  6149. struct device_attribute *attr,
  6150. const char *buf, size_t count)
  6151. {
  6152. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6153. mutex_lock(&priv->mutex);
  6154. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6155. mutex_unlock(&priv->mutex);
  6156. return count;
  6157. }
  6158. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6159. static ssize_t show_temperature(struct device *d,
  6160. struct device_attribute *attr, char *buf)
  6161. {
  6162. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6163. if (!iwl4965_is_alive(priv))
  6164. return -EAGAIN;
  6165. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6166. }
  6167. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6168. static ssize_t show_rs_window(struct device *d,
  6169. struct device_attribute *attr,
  6170. char *buf)
  6171. {
  6172. struct iwl_priv *priv = d->driver_data;
  6173. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6174. }
  6175. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6176. static ssize_t show_tx_power(struct device *d,
  6177. struct device_attribute *attr, char *buf)
  6178. {
  6179. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6180. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6181. }
  6182. static ssize_t store_tx_power(struct device *d,
  6183. struct device_attribute *attr,
  6184. const char *buf, size_t count)
  6185. {
  6186. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6187. char *p = (char *)buf;
  6188. u32 val;
  6189. val = simple_strtoul(p, &p, 10);
  6190. if (p == buf)
  6191. printk(KERN_INFO DRV_NAME
  6192. ": %s is not in decimal form.\n", buf);
  6193. else
  6194. iwl4965_hw_reg_set_txpower(priv, val);
  6195. return count;
  6196. }
  6197. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6198. static ssize_t show_flags(struct device *d,
  6199. struct device_attribute *attr, char *buf)
  6200. {
  6201. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6202. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6203. }
  6204. static ssize_t store_flags(struct device *d,
  6205. struct device_attribute *attr,
  6206. const char *buf, size_t count)
  6207. {
  6208. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6209. u32 flags = simple_strtoul(buf, NULL, 0);
  6210. mutex_lock(&priv->mutex);
  6211. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6212. /* Cancel any currently running scans... */
  6213. if (iwl4965_scan_cancel_timeout(priv, 100))
  6214. IWL_WARNING("Could not cancel scan.\n");
  6215. else {
  6216. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6217. flags);
  6218. priv->staging_rxon.flags = cpu_to_le32(flags);
  6219. iwl4965_commit_rxon(priv);
  6220. }
  6221. }
  6222. mutex_unlock(&priv->mutex);
  6223. return count;
  6224. }
  6225. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6226. static ssize_t show_filter_flags(struct device *d,
  6227. struct device_attribute *attr, char *buf)
  6228. {
  6229. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6230. return sprintf(buf, "0x%04X\n",
  6231. le32_to_cpu(priv->active_rxon.filter_flags));
  6232. }
  6233. static ssize_t store_filter_flags(struct device *d,
  6234. struct device_attribute *attr,
  6235. const char *buf, size_t count)
  6236. {
  6237. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6238. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6239. mutex_lock(&priv->mutex);
  6240. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6241. /* Cancel any currently running scans... */
  6242. if (iwl4965_scan_cancel_timeout(priv, 100))
  6243. IWL_WARNING("Could not cancel scan.\n");
  6244. else {
  6245. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6246. "0x%04X\n", filter_flags);
  6247. priv->staging_rxon.filter_flags =
  6248. cpu_to_le32(filter_flags);
  6249. iwl4965_commit_rxon(priv);
  6250. }
  6251. }
  6252. mutex_unlock(&priv->mutex);
  6253. return count;
  6254. }
  6255. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6256. store_filter_flags);
  6257. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6258. static ssize_t show_measurement(struct device *d,
  6259. struct device_attribute *attr, char *buf)
  6260. {
  6261. struct iwl_priv *priv = dev_get_drvdata(d);
  6262. struct iwl4965_spectrum_notification measure_report;
  6263. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6264. u8 *data = (u8 *) & measure_report;
  6265. unsigned long flags;
  6266. spin_lock_irqsave(&priv->lock, flags);
  6267. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6268. spin_unlock_irqrestore(&priv->lock, flags);
  6269. return 0;
  6270. }
  6271. memcpy(&measure_report, &priv->measure_report, size);
  6272. priv->measurement_status = 0;
  6273. spin_unlock_irqrestore(&priv->lock, flags);
  6274. while (size && (PAGE_SIZE - len)) {
  6275. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6276. PAGE_SIZE - len, 1);
  6277. len = strlen(buf);
  6278. if (PAGE_SIZE - len)
  6279. buf[len++] = '\n';
  6280. ofs += 16;
  6281. size -= min(size, 16U);
  6282. }
  6283. return len;
  6284. }
  6285. static ssize_t store_measurement(struct device *d,
  6286. struct device_attribute *attr,
  6287. const char *buf, size_t count)
  6288. {
  6289. struct iwl_priv *priv = dev_get_drvdata(d);
  6290. struct ieee80211_measurement_params params = {
  6291. .channel = le16_to_cpu(priv->active_rxon.channel),
  6292. .start_time = cpu_to_le64(priv->last_tsf),
  6293. .duration = cpu_to_le16(1),
  6294. };
  6295. u8 type = IWL_MEASURE_BASIC;
  6296. u8 buffer[32];
  6297. u8 channel;
  6298. if (count) {
  6299. char *p = buffer;
  6300. strncpy(buffer, buf, min(sizeof(buffer), count));
  6301. channel = simple_strtoul(p, NULL, 0);
  6302. if (channel)
  6303. params.channel = channel;
  6304. p = buffer;
  6305. while (*p && *p != ' ')
  6306. p++;
  6307. if (*p)
  6308. type = simple_strtoul(p + 1, NULL, 0);
  6309. }
  6310. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6311. "channel %d (for '%s')\n", type, params.channel, buf);
  6312. iwl4965_get_measurement(priv, &params, type);
  6313. return count;
  6314. }
  6315. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6316. show_measurement, store_measurement);
  6317. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6318. static ssize_t store_retry_rate(struct device *d,
  6319. struct device_attribute *attr,
  6320. const char *buf, size_t count)
  6321. {
  6322. struct iwl_priv *priv = dev_get_drvdata(d);
  6323. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6324. if (priv->retry_rate <= 0)
  6325. priv->retry_rate = 1;
  6326. return count;
  6327. }
  6328. static ssize_t show_retry_rate(struct device *d,
  6329. struct device_attribute *attr, char *buf)
  6330. {
  6331. struct iwl_priv *priv = dev_get_drvdata(d);
  6332. return sprintf(buf, "%d", priv->retry_rate);
  6333. }
  6334. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6335. store_retry_rate);
  6336. static ssize_t store_power_level(struct device *d,
  6337. struct device_attribute *attr,
  6338. const char *buf, size_t count)
  6339. {
  6340. struct iwl_priv *priv = dev_get_drvdata(d);
  6341. int rc;
  6342. int mode;
  6343. mode = simple_strtoul(buf, NULL, 0);
  6344. mutex_lock(&priv->mutex);
  6345. if (!iwl4965_is_ready(priv)) {
  6346. rc = -EAGAIN;
  6347. goto out;
  6348. }
  6349. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6350. mode = IWL_POWER_AC;
  6351. else
  6352. mode |= IWL_POWER_ENABLED;
  6353. if (mode != priv->power_mode) {
  6354. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6355. if (rc) {
  6356. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6357. goto out;
  6358. }
  6359. priv->power_mode = mode;
  6360. }
  6361. rc = count;
  6362. out:
  6363. mutex_unlock(&priv->mutex);
  6364. return rc;
  6365. }
  6366. #define MAX_WX_STRING 80
  6367. /* Values are in microsecond */
  6368. static const s32 timeout_duration[] = {
  6369. 350000,
  6370. 250000,
  6371. 75000,
  6372. 37000,
  6373. 25000,
  6374. };
  6375. static const s32 period_duration[] = {
  6376. 400000,
  6377. 700000,
  6378. 1000000,
  6379. 1000000,
  6380. 1000000
  6381. };
  6382. static ssize_t show_power_level(struct device *d,
  6383. struct device_attribute *attr, char *buf)
  6384. {
  6385. struct iwl_priv *priv = dev_get_drvdata(d);
  6386. int level = IWL_POWER_LEVEL(priv->power_mode);
  6387. char *p = buf;
  6388. p += sprintf(p, "%d ", level);
  6389. switch (level) {
  6390. case IWL_POWER_MODE_CAM:
  6391. case IWL_POWER_AC:
  6392. p += sprintf(p, "(AC)");
  6393. break;
  6394. case IWL_POWER_BATTERY:
  6395. p += sprintf(p, "(BATTERY)");
  6396. break;
  6397. default:
  6398. p += sprintf(p,
  6399. "(Timeout %dms, Period %dms)",
  6400. timeout_duration[level - 1] / 1000,
  6401. period_duration[level - 1] / 1000);
  6402. }
  6403. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6404. p += sprintf(p, " OFF\n");
  6405. else
  6406. p += sprintf(p, " \n");
  6407. return (p - buf + 1);
  6408. }
  6409. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6410. store_power_level);
  6411. static ssize_t show_channels(struct device *d,
  6412. struct device_attribute *attr, char *buf)
  6413. {
  6414. /* all this shit doesn't belong into sysfs anyway */
  6415. return 0;
  6416. }
  6417. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6418. static ssize_t show_statistics(struct device *d,
  6419. struct device_attribute *attr, char *buf)
  6420. {
  6421. struct iwl_priv *priv = dev_get_drvdata(d);
  6422. u32 size = sizeof(struct iwl4965_notif_statistics);
  6423. u32 len = 0, ofs = 0;
  6424. u8 *data = (u8 *) & priv->statistics;
  6425. int rc = 0;
  6426. if (!iwl4965_is_alive(priv))
  6427. return -EAGAIN;
  6428. mutex_lock(&priv->mutex);
  6429. rc = iwl4965_send_statistics_request(priv);
  6430. mutex_unlock(&priv->mutex);
  6431. if (rc) {
  6432. len = sprintf(buf,
  6433. "Error sending statistics request: 0x%08X\n", rc);
  6434. return len;
  6435. }
  6436. while (size && (PAGE_SIZE - len)) {
  6437. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6438. PAGE_SIZE - len, 1);
  6439. len = strlen(buf);
  6440. if (PAGE_SIZE - len)
  6441. buf[len++] = '\n';
  6442. ofs += 16;
  6443. size -= min(size, 16U);
  6444. }
  6445. return len;
  6446. }
  6447. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6448. static ssize_t show_antenna(struct device *d,
  6449. struct device_attribute *attr, char *buf)
  6450. {
  6451. struct iwl_priv *priv = dev_get_drvdata(d);
  6452. if (!iwl4965_is_alive(priv))
  6453. return -EAGAIN;
  6454. return sprintf(buf, "%d\n", priv->antenna);
  6455. }
  6456. static ssize_t store_antenna(struct device *d,
  6457. struct device_attribute *attr,
  6458. const char *buf, size_t count)
  6459. {
  6460. int ant;
  6461. struct iwl_priv *priv = dev_get_drvdata(d);
  6462. if (count == 0)
  6463. return 0;
  6464. if (sscanf(buf, "%1i", &ant) != 1) {
  6465. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6466. return count;
  6467. }
  6468. if ((ant >= 0) && (ant <= 2)) {
  6469. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6470. priv->antenna = (enum iwl4965_antenna)ant;
  6471. } else
  6472. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6473. return count;
  6474. }
  6475. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6476. static ssize_t show_status(struct device *d,
  6477. struct device_attribute *attr, char *buf)
  6478. {
  6479. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6480. if (!iwl4965_is_alive(priv))
  6481. return -EAGAIN;
  6482. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6483. }
  6484. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6485. static ssize_t dump_error_log(struct device *d,
  6486. struct device_attribute *attr,
  6487. const char *buf, size_t count)
  6488. {
  6489. char *p = (char *)buf;
  6490. if (p[0] == '1')
  6491. iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6492. return strnlen(buf, count);
  6493. }
  6494. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6495. static ssize_t dump_event_log(struct device *d,
  6496. struct device_attribute *attr,
  6497. const char *buf, size_t count)
  6498. {
  6499. char *p = (char *)buf;
  6500. if (p[0] == '1')
  6501. iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6502. return strnlen(buf, count);
  6503. }
  6504. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6505. /*****************************************************************************
  6506. *
  6507. * driver setup and teardown
  6508. *
  6509. *****************************************************************************/
  6510. static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
  6511. {
  6512. priv->workqueue = create_workqueue(DRV_NAME);
  6513. init_waitqueue_head(&priv->wait_command_queue);
  6514. INIT_WORK(&priv->up, iwl4965_bg_up);
  6515. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  6516. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  6517. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  6518. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  6519. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  6520. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  6521. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  6522. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  6523. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  6524. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  6525. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  6526. iwl4965_hw_setup_deferred_work(priv);
  6527. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6528. iwl4965_irq_tasklet, (unsigned long)priv);
  6529. }
  6530. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
  6531. {
  6532. iwl4965_hw_cancel_deferred_work(priv);
  6533. cancel_delayed_work_sync(&priv->init_alive_start);
  6534. cancel_delayed_work(&priv->scan_check);
  6535. cancel_delayed_work(&priv->alive_start);
  6536. cancel_delayed_work(&priv->post_associate);
  6537. cancel_work_sync(&priv->beacon_update);
  6538. }
  6539. static struct attribute *iwl4965_sysfs_entries[] = {
  6540. &dev_attr_antenna.attr,
  6541. &dev_attr_channels.attr,
  6542. &dev_attr_dump_errors.attr,
  6543. &dev_attr_dump_events.attr,
  6544. &dev_attr_flags.attr,
  6545. &dev_attr_filter_flags.attr,
  6546. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6547. &dev_attr_measurement.attr,
  6548. #endif
  6549. &dev_attr_power_level.attr,
  6550. &dev_attr_retry_rate.attr,
  6551. &dev_attr_rf_kill.attr,
  6552. &dev_attr_rs_window.attr,
  6553. &dev_attr_statistics.attr,
  6554. &dev_attr_status.attr,
  6555. &dev_attr_temperature.attr,
  6556. &dev_attr_tx_power.attr,
  6557. NULL
  6558. };
  6559. static struct attribute_group iwl4965_attribute_group = {
  6560. .name = NULL, /* put in device directory */
  6561. .attrs = iwl4965_sysfs_entries,
  6562. };
  6563. static struct ieee80211_ops iwl4965_hw_ops = {
  6564. .tx = iwl4965_mac_tx,
  6565. .start = iwl4965_mac_start,
  6566. .stop = iwl4965_mac_stop,
  6567. .add_interface = iwl4965_mac_add_interface,
  6568. .remove_interface = iwl4965_mac_remove_interface,
  6569. .config = iwl4965_mac_config,
  6570. .config_interface = iwl4965_mac_config_interface,
  6571. .configure_filter = iwl4965_configure_filter,
  6572. .set_key = iwl4965_mac_set_key,
  6573. .update_tkip_key = iwl4965_mac_update_tkip_key,
  6574. .get_stats = iwl4965_mac_get_stats,
  6575. .get_tx_stats = iwl4965_mac_get_tx_stats,
  6576. .conf_tx = iwl4965_mac_conf_tx,
  6577. .get_tsf = iwl4965_mac_get_tsf,
  6578. .reset_tsf = iwl4965_mac_reset_tsf,
  6579. .beacon_update = iwl4965_mac_beacon_update,
  6580. .bss_info_changed = iwl4965_bss_info_changed,
  6581. #ifdef CONFIG_IWL4965_HT
  6582. .conf_ht = iwl4965_mac_conf_ht,
  6583. .ampdu_action = iwl4965_mac_ampdu_action,
  6584. #endif /* CONFIG_IWL4965_HT */
  6585. .hw_scan = iwl4965_mac_hw_scan
  6586. };
  6587. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  6588. {
  6589. int err = 0;
  6590. struct iwl_priv *priv;
  6591. struct ieee80211_hw *hw;
  6592. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  6593. DECLARE_MAC_BUF(mac);
  6594. /************************
  6595. * 1. Allocating HW data
  6596. ************************/
  6597. /* Disabling hardware scan means that mac80211 will perform scans
  6598. * "the hard way", rather than using device's scan. */
  6599. if (cfg->mod_params->disable_hw_scan) {
  6600. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6601. iwl4965_hw_ops.hw_scan = NULL;
  6602. }
  6603. hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
  6604. if (!hw) {
  6605. err = -ENOMEM;
  6606. goto out;
  6607. }
  6608. priv = hw->priv;
  6609. /* At this point both hw and priv are allocated. */
  6610. SET_IEEE80211_DEV(hw, &pdev->dev);
  6611. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6612. priv->cfg = cfg;
  6613. priv->pci_dev = pdev;
  6614. #ifdef CONFIG_IWLWIFI_DEBUG
  6615. iwl_debug_level = priv->cfg->mod_params->debug;
  6616. atomic_set(&priv->restrict_refcnt, 0);
  6617. #endif
  6618. /**************************
  6619. * 2. Initializing PCI bus
  6620. **************************/
  6621. if (pci_enable_device(pdev)) {
  6622. err = -ENODEV;
  6623. goto out_ieee80211_free_hw;
  6624. }
  6625. pci_set_master(pdev);
  6626. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6627. if (!err)
  6628. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6629. if (err) {
  6630. printk(KERN_WARNING DRV_NAME
  6631. ": No suitable DMA available.\n");
  6632. goto out_pci_disable_device;
  6633. }
  6634. err = pci_request_regions(pdev, DRV_NAME);
  6635. if (err)
  6636. goto out_pci_disable_device;
  6637. pci_set_drvdata(pdev, priv);
  6638. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6639. * PCI Tx retries from interfering with C3 CPU state */
  6640. pci_write_config_byte(pdev, 0x41, 0x00);
  6641. /***********************
  6642. * 3. Read REV register
  6643. ***********************/
  6644. priv->hw_base = pci_iomap(pdev, 0, 0);
  6645. if (!priv->hw_base) {
  6646. err = -ENODEV;
  6647. goto out_pci_release_regions;
  6648. }
  6649. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  6650. (unsigned long long) pci_resource_len(pdev, 0));
  6651. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  6652. printk(KERN_INFO DRV_NAME
  6653. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  6654. /*****************
  6655. * 4. Read EEPROM
  6656. *****************/
  6657. /* nic init */
  6658. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  6659. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  6660. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  6661. err = iwl_poll_bit(priv, CSR_GP_CNTRL,
  6662. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  6663. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  6664. if (err < 0) {
  6665. IWL_DEBUG_INFO("Failed to init the card\n");
  6666. goto out_iounmap;
  6667. }
  6668. /* Read the EEPROM */
  6669. err = iwl_eeprom_init(priv);
  6670. if (err) {
  6671. IWL_ERROR("Unable to init EEPROM\n");
  6672. goto out_iounmap;
  6673. }
  6674. /* MAC Address location in EEPROM same for 3945/4965 */
  6675. iwl_eeprom_get_mac(priv, priv->mac_addr);
  6676. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  6677. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  6678. /************************
  6679. * 5. Setup HW constants
  6680. ************************/
  6681. /* Device-specific setup */
  6682. if (iwl4965_hw_set_hw_setting(priv)) {
  6683. IWL_ERROR("failed to set hw settings\n");
  6684. goto out_iounmap;
  6685. }
  6686. /*******************
  6687. * 6. Setup hw/priv
  6688. *******************/
  6689. err = iwl_setup(priv);
  6690. if (err)
  6691. goto out_unset_hw_settings;
  6692. /* At this point both hw and priv are initialized. */
  6693. /**********************************
  6694. * 7. Initialize module parameters
  6695. **********************************/
  6696. /* Disable radio (SW RF KILL) via parameter when loading driver */
  6697. if (priv->cfg->mod_params->disable) {
  6698. set_bit(STATUS_RF_KILL_SW, &priv->status);
  6699. IWL_DEBUG_INFO("Radio disabled.\n");
  6700. }
  6701. if (priv->cfg->mod_params->enable_qos)
  6702. priv->qos_data.qos_enable = 1;
  6703. /********************
  6704. * 8. Setup services
  6705. ********************/
  6706. iwl4965_disable_interrupts(priv);
  6707. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6708. if (err) {
  6709. IWL_ERROR("failed to create sysfs device attributes\n");
  6710. goto out_unset_hw_settings;
  6711. }
  6712. err = iwl_dbgfs_register(priv, DRV_NAME);
  6713. if (err) {
  6714. IWL_ERROR("failed to create debugfs files\n");
  6715. goto out_remove_sysfs;
  6716. }
  6717. iwl4965_setup_deferred_work(priv);
  6718. iwl4965_setup_rx_handlers(priv);
  6719. /********************
  6720. * 9. Conclude
  6721. ********************/
  6722. pci_save_state(pdev);
  6723. pci_disable_device(pdev);
  6724. return 0;
  6725. out_remove_sysfs:
  6726. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6727. out_unset_hw_settings:
  6728. iwl4965_unset_hw_setting(priv);
  6729. out_iounmap:
  6730. pci_iounmap(pdev, priv->hw_base);
  6731. out_pci_release_regions:
  6732. pci_release_regions(pdev);
  6733. pci_set_drvdata(pdev, NULL);
  6734. out_pci_disable_device:
  6735. pci_disable_device(pdev);
  6736. out_ieee80211_free_hw:
  6737. ieee80211_free_hw(priv->hw);
  6738. out:
  6739. return err;
  6740. }
  6741. static void iwl4965_pci_remove(struct pci_dev *pdev)
  6742. {
  6743. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6744. struct list_head *p, *q;
  6745. int i;
  6746. if (!priv)
  6747. return;
  6748. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  6749. set_bit(STATUS_EXIT_PENDING, &priv->status);
  6750. iwl4965_down(priv);
  6751. /* Free MAC hash list for ADHOC */
  6752. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  6753. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  6754. list_del(p);
  6755. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  6756. }
  6757. }
  6758. iwl_dbgfs_unregister(priv);
  6759. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6760. iwl4965_dealloc_ucode_pci(priv);
  6761. if (priv->rxq.bd)
  6762. iwl4965_rx_queue_free(priv, &priv->rxq);
  6763. iwl4965_hw_txq_ctx_free(priv);
  6764. iwl4965_unset_hw_setting(priv);
  6765. iwlcore_clear_stations_table(priv);
  6766. if (priv->mac80211_registered) {
  6767. ieee80211_unregister_hw(priv->hw);
  6768. iwl4965_rate_control_unregister(priv->hw);
  6769. }
  6770. /*netif_stop_queue(dev); */
  6771. flush_workqueue(priv->workqueue);
  6772. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  6773. * priv->workqueue... so we can't take down the workqueue
  6774. * until now... */
  6775. destroy_workqueue(priv->workqueue);
  6776. priv->workqueue = NULL;
  6777. pci_iounmap(pdev, priv->hw_base);
  6778. pci_release_regions(pdev);
  6779. pci_disable_device(pdev);
  6780. pci_set_drvdata(pdev, NULL);
  6781. iwl_free_channel_map(priv);
  6782. iwl4965_free_geos(priv);
  6783. if (priv->ibss_beacon)
  6784. dev_kfree_skb(priv->ibss_beacon);
  6785. ieee80211_free_hw(priv->hw);
  6786. }
  6787. #ifdef CONFIG_PM
  6788. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  6789. {
  6790. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6791. if (priv->is_open) {
  6792. set_bit(STATUS_IN_SUSPEND, &priv->status);
  6793. iwl4965_mac_stop(priv->hw);
  6794. priv->is_open = 1;
  6795. }
  6796. pci_set_power_state(pdev, PCI_D3hot);
  6797. return 0;
  6798. }
  6799. static int iwl4965_pci_resume(struct pci_dev *pdev)
  6800. {
  6801. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6802. pci_set_power_state(pdev, PCI_D0);
  6803. if (priv->is_open)
  6804. iwl4965_mac_start(priv->hw);
  6805. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  6806. return 0;
  6807. }
  6808. #endif /* CONFIG_PM */
  6809. /*****************************************************************************
  6810. *
  6811. * driver and module entry point
  6812. *
  6813. *****************************************************************************/
  6814. static struct pci_driver iwl4965_driver = {
  6815. .name = DRV_NAME,
  6816. .id_table = iwl4965_hw_card_ids,
  6817. .probe = iwl4965_pci_probe,
  6818. .remove = __devexit_p(iwl4965_pci_remove),
  6819. #ifdef CONFIG_PM
  6820. .suspend = iwl4965_pci_suspend,
  6821. .resume = iwl4965_pci_resume,
  6822. #endif
  6823. };
  6824. static int __init iwl4965_init(void)
  6825. {
  6826. int ret;
  6827. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  6828. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  6829. ret = pci_register_driver(&iwl4965_driver);
  6830. if (ret) {
  6831. IWL_ERROR("Unable to initialize PCI module\n");
  6832. return ret;
  6833. }
  6834. #ifdef CONFIG_IWLWIFI_DEBUG
  6835. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6836. if (ret) {
  6837. IWL_ERROR("Unable to create driver sysfs file\n");
  6838. pci_unregister_driver(&iwl4965_driver);
  6839. return ret;
  6840. }
  6841. #endif
  6842. return ret;
  6843. }
  6844. static void __exit iwl4965_exit(void)
  6845. {
  6846. #ifdef CONFIG_IWLWIFI_DEBUG
  6847. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6848. #endif
  6849. pci_unregister_driver(&iwl4965_driver);
  6850. }
  6851. module_exit(iwl4965_exit);
  6852. module_init(iwl4965_init);