mpt2sas_base.c 100 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2008 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/version.h>
  43. #include <linux/kernel.h>
  44. #include <linux/module.h>
  45. #include <linux/errno.h>
  46. #include <linux/init.h>
  47. #include <linux/slab.h>
  48. #include <linux/types.h>
  49. #include <linux/pci.h>
  50. #include <linux/kdev_t.h>
  51. #include <linux/blkdev.h>
  52. #include <linux/delay.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/sort.h>
  56. #include <linux/io.h>
  57. #include "mpt2sas_base.h"
  58. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  59. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  60. #define MPT2SAS_MAX_REQUEST_QUEUE 500 /* maximum controller queue depth */
  61. static int max_queue_depth = -1;
  62. module_param(max_queue_depth, int, 0);
  63. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  64. static int max_sgl_entries = -1;
  65. module_param(max_sgl_entries, int, 0);
  66. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  67. static int msix_disable = -1;
  68. module_param(msix_disable, int, 0);
  69. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  70. /**
  71. * _base_fault_reset_work - workq handling ioc fault conditions
  72. * @work: input argument, used to derive ioc
  73. * Context: sleep.
  74. *
  75. * Return nothing.
  76. */
  77. static void
  78. _base_fault_reset_work(struct work_struct *work)
  79. {
  80. struct MPT2SAS_ADAPTER *ioc =
  81. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  82. unsigned long flags;
  83. u32 doorbell;
  84. int rc;
  85. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  86. if (ioc->shost_recovery)
  87. goto rearm_timer;
  88. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  89. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  90. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  91. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  92. FORCE_BIG_HAMMER);
  93. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  94. __func__, (rc == 0) ? "success" : "failed");
  95. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  96. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  97. mpt2sas_base_fault_info(ioc, doorbell &
  98. MPI2_DOORBELL_DATA_MASK);
  99. }
  100. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  101. rearm_timer:
  102. if (ioc->fault_reset_work_q)
  103. queue_delayed_work(ioc->fault_reset_work_q,
  104. &ioc->fault_reset_work,
  105. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  106. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  107. }
  108. /**
  109. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  110. * @ioc: pointer to scsi command object
  111. * Context: sleep.
  112. *
  113. * Return nothing.
  114. */
  115. void
  116. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  117. {
  118. unsigned long flags;
  119. if (ioc->fault_reset_work_q)
  120. return;
  121. /* initialize fault polling */
  122. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  123. snprintf(ioc->fault_reset_work_q_name,
  124. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  125. ioc->fault_reset_work_q =
  126. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  127. if (!ioc->fault_reset_work_q) {
  128. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  129. ioc->name, __func__, __LINE__);
  130. return;
  131. }
  132. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  133. if (ioc->fault_reset_work_q)
  134. queue_delayed_work(ioc->fault_reset_work_q,
  135. &ioc->fault_reset_work,
  136. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  137. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  138. }
  139. /**
  140. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  141. * @ioc: pointer to scsi command object
  142. * Context: sleep.
  143. *
  144. * Return nothing.
  145. */
  146. void
  147. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  148. {
  149. unsigned long flags;
  150. struct workqueue_struct *wq;
  151. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  152. wq = ioc->fault_reset_work_q;
  153. ioc->fault_reset_work_q = NULL;
  154. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  155. if (wq) {
  156. if (!cancel_delayed_work(&ioc->fault_reset_work))
  157. flush_workqueue(wq);
  158. destroy_workqueue(wq);
  159. }
  160. }
  161. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  162. /**
  163. * _base_sas_ioc_info - verbose translation of the ioc status
  164. * @ioc: pointer to scsi command object
  165. * @mpi_reply: reply mf payload returned from firmware
  166. * @request_hdr: request mf
  167. *
  168. * Return nothing.
  169. */
  170. static void
  171. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  172. MPI2RequestHeader_t *request_hdr)
  173. {
  174. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  175. MPI2_IOCSTATUS_MASK;
  176. char *desc = NULL;
  177. u16 frame_sz;
  178. char *func_str = NULL;
  179. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  180. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  181. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  182. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  183. return;
  184. switch (ioc_status) {
  185. /****************************************************************************
  186. * Common IOCStatus values for all replies
  187. ****************************************************************************/
  188. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  189. desc = "invalid function";
  190. break;
  191. case MPI2_IOCSTATUS_BUSY:
  192. desc = "busy";
  193. break;
  194. case MPI2_IOCSTATUS_INVALID_SGL:
  195. desc = "invalid sgl";
  196. break;
  197. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  198. desc = "internal error";
  199. break;
  200. case MPI2_IOCSTATUS_INVALID_VPID:
  201. desc = "invalid vpid";
  202. break;
  203. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  204. desc = "insufficient resources";
  205. break;
  206. case MPI2_IOCSTATUS_INVALID_FIELD:
  207. desc = "invalid field";
  208. break;
  209. case MPI2_IOCSTATUS_INVALID_STATE:
  210. desc = "invalid state";
  211. break;
  212. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  213. desc = "op state not supported";
  214. break;
  215. /****************************************************************************
  216. * Config IOCStatus values
  217. ****************************************************************************/
  218. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  219. desc = "config invalid action";
  220. break;
  221. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  222. desc = "config invalid type";
  223. break;
  224. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  225. desc = "config invalid page";
  226. break;
  227. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  228. desc = "config invalid data";
  229. break;
  230. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  231. desc = "config no defaults";
  232. break;
  233. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  234. desc = "config cant commit";
  235. break;
  236. /****************************************************************************
  237. * SCSI IO Reply
  238. ****************************************************************************/
  239. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  240. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  241. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  242. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  243. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  244. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  245. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  246. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  247. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  248. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  249. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  250. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  251. break;
  252. /****************************************************************************
  253. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  254. ****************************************************************************/
  255. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  256. desc = "eedp guard error";
  257. break;
  258. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  259. desc = "eedp ref tag error";
  260. break;
  261. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  262. desc = "eedp app tag error";
  263. break;
  264. /****************************************************************************
  265. * SCSI Target values
  266. ****************************************************************************/
  267. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  268. desc = "target invalid io index";
  269. break;
  270. case MPI2_IOCSTATUS_TARGET_ABORTED:
  271. desc = "target aborted";
  272. break;
  273. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  274. desc = "target no conn retryable";
  275. break;
  276. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  277. desc = "target no connection";
  278. break;
  279. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  280. desc = "target xfer count mismatch";
  281. break;
  282. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  283. desc = "target data offset error";
  284. break;
  285. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  286. desc = "target too much write data";
  287. break;
  288. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  289. desc = "target iu too short";
  290. break;
  291. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  292. desc = "target ack nak timeout";
  293. break;
  294. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  295. desc = "target nak received";
  296. break;
  297. /****************************************************************************
  298. * Serial Attached SCSI values
  299. ****************************************************************************/
  300. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  301. desc = "smp request failed";
  302. break;
  303. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  304. desc = "smp data overrun";
  305. break;
  306. /****************************************************************************
  307. * Diagnostic Buffer Post / Diagnostic Release values
  308. ****************************************************************************/
  309. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  310. desc = "diagnostic released";
  311. break;
  312. default:
  313. break;
  314. }
  315. if (!desc)
  316. return;
  317. switch (request_hdr->Function) {
  318. case MPI2_FUNCTION_CONFIG:
  319. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  320. func_str = "config_page";
  321. break;
  322. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  323. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  324. func_str = "task_mgmt";
  325. break;
  326. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  327. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  328. func_str = "sas_iounit_ctl";
  329. break;
  330. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  331. frame_sz = sizeof(Mpi2SepRequest_t);
  332. func_str = "enclosure";
  333. break;
  334. case MPI2_FUNCTION_IOC_INIT:
  335. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  336. func_str = "ioc_init";
  337. break;
  338. case MPI2_FUNCTION_PORT_ENABLE:
  339. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  340. func_str = "port_enable";
  341. break;
  342. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  343. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  344. func_str = "smp_passthru";
  345. break;
  346. default:
  347. frame_sz = 32;
  348. func_str = "unknown";
  349. break;
  350. }
  351. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  352. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  353. _debug_dump_mf(request_hdr, frame_sz/4);
  354. }
  355. /**
  356. * _base_display_event_data - verbose translation of firmware asyn events
  357. * @ioc: pointer to scsi command object
  358. * @mpi_reply: reply mf payload returned from firmware
  359. *
  360. * Return nothing.
  361. */
  362. static void
  363. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  364. Mpi2EventNotificationReply_t *mpi_reply)
  365. {
  366. char *desc = NULL;
  367. u16 event;
  368. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  369. return;
  370. event = le16_to_cpu(mpi_reply->Event);
  371. switch (event) {
  372. case MPI2_EVENT_LOG_DATA:
  373. desc = "Log Data";
  374. break;
  375. case MPI2_EVENT_STATE_CHANGE:
  376. desc = "Status Change";
  377. break;
  378. case MPI2_EVENT_HARD_RESET_RECEIVED:
  379. desc = "Hard Reset Received";
  380. break;
  381. case MPI2_EVENT_EVENT_CHANGE:
  382. desc = "Event Change";
  383. break;
  384. case MPI2_EVENT_TASK_SET_FULL:
  385. desc = "Task Set Full";
  386. break;
  387. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  388. desc = "Device Status Change";
  389. break;
  390. case MPI2_EVENT_IR_OPERATION_STATUS:
  391. desc = "IR Operation Status";
  392. break;
  393. case MPI2_EVENT_SAS_DISCOVERY:
  394. desc = "Discovery";
  395. break;
  396. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  397. desc = "SAS Broadcast Primitive";
  398. break;
  399. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  400. desc = "SAS Init Device Status Change";
  401. break;
  402. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  403. desc = "SAS Init Table Overflow";
  404. break;
  405. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  406. desc = "SAS Topology Change List";
  407. break;
  408. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  409. desc = "SAS Enclosure Device Status Change";
  410. break;
  411. case MPI2_EVENT_IR_VOLUME:
  412. desc = "IR Volume";
  413. break;
  414. case MPI2_EVENT_IR_PHYSICAL_DISK:
  415. desc = "IR Physical Disk";
  416. break;
  417. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  418. desc = "IR Configuration Change List";
  419. break;
  420. case MPI2_EVENT_LOG_ENTRY_ADDED:
  421. desc = "Log Entry Added";
  422. break;
  423. }
  424. if (!desc)
  425. return;
  426. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  427. }
  428. #endif
  429. /**
  430. * _base_sas_log_info - verbose translation of firmware log info
  431. * @ioc: pointer to scsi command object
  432. * @log_info: log info
  433. *
  434. * Return nothing.
  435. */
  436. static void
  437. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  438. {
  439. union loginfo_type {
  440. u32 loginfo;
  441. struct {
  442. u32 subcode:16;
  443. u32 code:8;
  444. u32 originator:4;
  445. u32 bus_type:4;
  446. } dw;
  447. };
  448. union loginfo_type sas_loginfo;
  449. char *originator_str = NULL;
  450. sas_loginfo.loginfo = log_info;
  451. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  452. return;
  453. /* each nexus loss loginfo */
  454. if (log_info == 0x31170000)
  455. return;
  456. /* eat the loginfos associated with task aborts */
  457. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  458. 0x31140000 || log_info == 0x31130000))
  459. return;
  460. switch (sas_loginfo.dw.originator) {
  461. case 0:
  462. originator_str = "IOP";
  463. break;
  464. case 1:
  465. originator_str = "PL";
  466. break;
  467. case 2:
  468. originator_str = "IR";
  469. break;
  470. }
  471. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  472. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  473. originator_str, sas_loginfo.dw.code,
  474. sas_loginfo.dw.subcode);
  475. }
  476. /**
  477. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  478. * @ioc: pointer to scsi command object
  479. * @fault_code: fault code
  480. *
  481. * Return nothing.
  482. */
  483. void
  484. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  485. {
  486. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  487. ioc->name, fault_code);
  488. }
  489. /**
  490. * _base_display_reply_info -
  491. * @ioc: pointer to scsi command object
  492. * @smid: system request message index
  493. * @VF_ID: virtual function id
  494. * @reply: reply message frame(lower 32bit addr)
  495. *
  496. * Return nothing.
  497. */
  498. static void
  499. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID,
  500. u32 reply)
  501. {
  502. MPI2DefaultReply_t *mpi_reply;
  503. u16 ioc_status;
  504. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  505. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  506. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  507. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  508. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  509. _base_sas_ioc_info(ioc , mpi_reply,
  510. mpt2sas_base_get_msg_frame(ioc, smid));
  511. }
  512. #endif
  513. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  514. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  515. }
  516. /**
  517. * mpt2sas_base_done - base internal command completion routine
  518. * @ioc: pointer to scsi command object
  519. * @smid: system request message index
  520. * @VF_ID: virtual function id
  521. * @reply: reply message frame(lower 32bit addr)
  522. *
  523. * Return nothing.
  524. */
  525. void
  526. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply)
  527. {
  528. MPI2DefaultReply_t *mpi_reply;
  529. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  530. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  531. return;
  532. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  533. return;
  534. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  535. if (mpi_reply) {
  536. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  537. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  538. }
  539. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  540. complete(&ioc->base_cmds.done);
  541. }
  542. /**
  543. * _base_async_event - main callback handler for firmware asyn events
  544. * @ioc: pointer to scsi command object
  545. * @VF_ID: virtual function id
  546. * @reply: reply message frame(lower 32bit addr)
  547. *
  548. * Return nothing.
  549. */
  550. static void
  551. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply)
  552. {
  553. Mpi2EventNotificationReply_t *mpi_reply;
  554. Mpi2EventAckRequest_t *ack_request;
  555. u16 smid;
  556. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  557. if (!mpi_reply)
  558. return;
  559. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  560. return;
  561. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  562. _base_display_event_data(ioc, mpi_reply);
  563. #endif
  564. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  565. goto out;
  566. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  567. if (!smid) {
  568. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  569. ioc->name, __func__);
  570. goto out;
  571. }
  572. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  573. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  574. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  575. ack_request->Event = mpi_reply->Event;
  576. ack_request->EventContext = mpi_reply->EventContext;
  577. ack_request->VF_ID = VF_ID;
  578. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  579. out:
  580. /* scsih callback handler */
  581. mpt2sas_scsih_event_callback(ioc, VF_ID, reply);
  582. /* ctl callback handler */
  583. mpt2sas_ctl_event_callback(ioc, VF_ID, reply);
  584. }
  585. /**
  586. * _base_mask_interrupts - disable interrupts
  587. * @ioc: pointer to scsi command object
  588. *
  589. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  590. *
  591. * Return nothing.
  592. */
  593. static void
  594. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  595. {
  596. u32 him_register;
  597. ioc->mask_interrupts = 1;
  598. him_register = readl(&ioc->chip->HostInterruptMask);
  599. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  600. writel(him_register, &ioc->chip->HostInterruptMask);
  601. readl(&ioc->chip->HostInterruptMask);
  602. }
  603. /**
  604. * _base_unmask_interrupts - enable interrupts
  605. * @ioc: pointer to scsi command object
  606. *
  607. * Enabling only Reply Interrupts
  608. *
  609. * Return nothing.
  610. */
  611. static void
  612. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  613. {
  614. u32 him_register;
  615. writel(0, &ioc->chip->HostInterruptStatus);
  616. him_register = readl(&ioc->chip->HostInterruptMask);
  617. him_register &= ~MPI2_HIM_RIM;
  618. writel(him_register, &ioc->chip->HostInterruptMask);
  619. ioc->mask_interrupts = 0;
  620. }
  621. /**
  622. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  623. * @irq: irq number (not used)
  624. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  625. * @r: pt_regs pointer (not used)
  626. *
  627. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  628. */
  629. static irqreturn_t
  630. _base_interrupt(int irq, void *bus_id)
  631. {
  632. union reply_descriptor {
  633. u64 word;
  634. struct {
  635. u32 low;
  636. u32 high;
  637. } u;
  638. };
  639. union reply_descriptor rd;
  640. u32 post_index, post_index_next, completed_cmds;
  641. u8 request_desript_type;
  642. u16 smid;
  643. u8 cb_idx;
  644. u32 reply;
  645. u8 VF_ID;
  646. int i;
  647. struct MPT2SAS_ADAPTER *ioc = bus_id;
  648. if (ioc->mask_interrupts)
  649. return IRQ_NONE;
  650. post_index = ioc->reply_post_host_index;
  651. request_desript_type = ioc->reply_post_free[post_index].
  652. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  653. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  654. return IRQ_NONE;
  655. completed_cmds = 0;
  656. do {
  657. rd.word = ioc->reply_post_free[post_index].Words;
  658. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  659. goto out;
  660. reply = 0;
  661. cb_idx = 0xFF;
  662. smid = le16_to_cpu(ioc->reply_post_free[post_index].
  663. Default.DescriptorTypeDependent1);
  664. VF_ID = ioc->reply_post_free[post_index].
  665. Default.VF_ID;
  666. if (request_desript_type ==
  667. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  668. reply = le32_to_cpu(ioc->reply_post_free[post_index].
  669. AddressReply.ReplyFrameAddress);
  670. } else if (request_desript_type ==
  671. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  672. goto next;
  673. else if (request_desript_type ==
  674. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  675. goto next;
  676. if (smid)
  677. cb_idx = ioc->scsi_lookup[smid - 1].cb_idx;
  678. if (smid && cb_idx != 0xFF) {
  679. mpt_callbacks[cb_idx](ioc, smid, VF_ID, reply);
  680. if (reply)
  681. _base_display_reply_info(ioc, smid, VF_ID,
  682. reply);
  683. mpt2sas_base_free_smid(ioc, smid);
  684. }
  685. if (!smid)
  686. _base_async_event(ioc, VF_ID, reply);
  687. /* reply free queue handling */
  688. if (reply) {
  689. ioc->reply_free_host_index =
  690. (ioc->reply_free_host_index ==
  691. (ioc->reply_free_queue_depth - 1)) ?
  692. 0 : ioc->reply_free_host_index + 1;
  693. ioc->reply_free[ioc->reply_free_host_index] =
  694. cpu_to_le32(reply);
  695. writel(ioc->reply_free_host_index,
  696. &ioc->chip->ReplyFreeHostIndex);
  697. wmb();
  698. }
  699. next:
  700. post_index_next = (post_index == (ioc->reply_post_queue_depth -
  701. 1)) ? 0 : post_index + 1;
  702. request_desript_type =
  703. ioc->reply_post_free[post_index_next].Default.ReplyFlags
  704. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  705. completed_cmds++;
  706. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  707. goto out;
  708. post_index = post_index_next;
  709. } while (1);
  710. out:
  711. if (!completed_cmds)
  712. return IRQ_NONE;
  713. /* reply post descriptor handling */
  714. post_index_next = ioc->reply_post_host_index;
  715. for (i = 0 ; i < completed_cmds; i++) {
  716. post_index = post_index_next;
  717. /* poison the reply post descriptor */
  718. ioc->reply_post_free[post_index_next].Words = ULLONG_MAX;
  719. post_index_next = (post_index ==
  720. (ioc->reply_post_queue_depth - 1))
  721. ? 0 : post_index + 1;
  722. }
  723. ioc->reply_post_host_index = post_index_next;
  724. writel(post_index_next, &ioc->chip->ReplyPostHostIndex);
  725. wmb();
  726. return IRQ_HANDLED;
  727. }
  728. /**
  729. * mpt2sas_base_release_callback_handler - clear interupt callback handler
  730. * @cb_idx: callback index
  731. *
  732. * Return nothing.
  733. */
  734. void
  735. mpt2sas_base_release_callback_handler(u8 cb_idx)
  736. {
  737. mpt_callbacks[cb_idx] = NULL;
  738. }
  739. /**
  740. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  741. * @cb_func: callback function
  742. *
  743. * Returns cb_func.
  744. */
  745. u8
  746. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  747. {
  748. u8 cb_idx;
  749. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  750. if (mpt_callbacks[cb_idx] == NULL)
  751. break;
  752. mpt_callbacks[cb_idx] = cb_func;
  753. return cb_idx;
  754. }
  755. /**
  756. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  757. *
  758. * Return nothing.
  759. */
  760. void
  761. mpt2sas_base_initialize_callback_handler(void)
  762. {
  763. u8 cb_idx;
  764. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  765. mpt2sas_base_release_callback_handler(cb_idx);
  766. }
  767. /**
  768. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  769. * @ioc: per adapter object
  770. * @paddr: virtual address for SGE
  771. *
  772. * Create a zero length scatter gather entry to insure the IOCs hardware has
  773. * something to use if the target device goes brain dead and tries
  774. * to send data even when none is asked for.
  775. *
  776. * Return nothing.
  777. */
  778. void
  779. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  780. {
  781. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  782. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  783. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  784. MPI2_SGE_FLAGS_SHIFT);
  785. ioc->base_add_sg_single(paddr, flags_length, -1);
  786. }
  787. /**
  788. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  789. * @paddr: virtual address for SGE
  790. * @flags_length: SGE flags and data transfer length
  791. * @dma_addr: Physical address
  792. *
  793. * Return nothing.
  794. */
  795. static void
  796. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  797. {
  798. Mpi2SGESimple32_t *sgel = paddr;
  799. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  800. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  801. sgel->FlagsLength = cpu_to_le32(flags_length);
  802. sgel->Address = cpu_to_le32(dma_addr);
  803. }
  804. /**
  805. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  806. * @paddr: virtual address for SGE
  807. * @flags_length: SGE flags and data transfer length
  808. * @dma_addr: Physical address
  809. *
  810. * Return nothing.
  811. */
  812. static void
  813. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  814. {
  815. Mpi2SGESimple64_t *sgel = paddr;
  816. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  817. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  818. sgel->FlagsLength = cpu_to_le32(flags_length);
  819. sgel->Address = cpu_to_le64(dma_addr);
  820. }
  821. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  822. /**
  823. * _base_config_dma_addressing - set dma addressing
  824. * @ioc: per adapter object
  825. * @pdev: PCI device struct
  826. *
  827. * Returns 0 for success, non-zero for failure.
  828. */
  829. static int
  830. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  831. {
  832. struct sysinfo s;
  833. char *desc = NULL;
  834. if (sizeof(dma_addr_t) > 4) {
  835. const uint64_t required_mask =
  836. dma_get_required_mask(&pdev->dev);
  837. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  838. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  839. DMA_BIT_MASK(64))) {
  840. ioc->base_add_sg_single = &_base_add_sg_single_64;
  841. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  842. desc = "64";
  843. goto out;
  844. }
  845. }
  846. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  847. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  848. ioc->base_add_sg_single = &_base_add_sg_single_32;
  849. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  850. desc = "32";
  851. } else
  852. return -ENODEV;
  853. out:
  854. si_meminfo(&s);
  855. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  856. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  857. return 0;
  858. }
  859. /**
  860. * _base_save_msix_table - backup msix vector table
  861. * @ioc: per adapter object
  862. *
  863. * This address an errata where diag reset clears out the table
  864. */
  865. static void
  866. _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
  867. {
  868. int i;
  869. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  870. return;
  871. for (i = 0; i < ioc->msix_vector_count; i++)
  872. ioc->msix_table_backup[i] = ioc->msix_table[i];
  873. }
  874. /**
  875. * _base_restore_msix_table - this restores the msix vector table
  876. * @ioc: per adapter object
  877. *
  878. */
  879. static void
  880. _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
  881. {
  882. int i;
  883. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  884. return;
  885. for (i = 0; i < ioc->msix_vector_count; i++)
  886. ioc->msix_table[i] = ioc->msix_table_backup[i];
  887. }
  888. /**
  889. * _base_check_enable_msix - checks MSIX capabable.
  890. * @ioc: per adapter object
  891. *
  892. * Check to see if card is capable of MSIX, and set number
  893. * of avaliable msix vectors
  894. */
  895. static int
  896. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  897. {
  898. int base;
  899. u16 message_control;
  900. u32 msix_table_offset;
  901. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  902. if (!base) {
  903. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  904. "supported\n", ioc->name));
  905. return -EINVAL;
  906. }
  907. /* get msix vector count */
  908. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  909. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  910. /* get msix table */
  911. pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
  912. msix_table_offset &= 0xFFFFFFF8;
  913. ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
  914. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  915. "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
  916. ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
  917. return 0;
  918. }
  919. /**
  920. * _base_disable_msix - disables msix
  921. * @ioc: per adapter object
  922. *
  923. */
  924. static void
  925. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  926. {
  927. if (ioc->msix_enable) {
  928. pci_disable_msix(ioc->pdev);
  929. kfree(ioc->msix_table_backup);
  930. ioc->msix_table_backup = NULL;
  931. ioc->msix_enable = 0;
  932. }
  933. }
  934. /**
  935. * _base_enable_msix - enables msix, failback to io_apic
  936. * @ioc: per adapter object
  937. *
  938. */
  939. static int
  940. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  941. {
  942. struct msix_entry entries;
  943. int r;
  944. u8 try_msix = 0;
  945. if (msix_disable == -1 || msix_disable == 0)
  946. try_msix = 1;
  947. if (!try_msix)
  948. goto try_ioapic;
  949. if (_base_check_enable_msix(ioc) != 0)
  950. goto try_ioapic;
  951. ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
  952. sizeof(u32), GFP_KERNEL);
  953. if (!ioc->msix_table_backup) {
  954. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  955. "msix_table_backup failed!!!\n", ioc->name));
  956. goto try_ioapic;
  957. }
  958. memset(&entries, 0, sizeof(struct msix_entry));
  959. r = pci_enable_msix(ioc->pdev, &entries, 1);
  960. if (r) {
  961. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  962. "failed (r=%d) !!!\n", ioc->name, r));
  963. goto try_ioapic;
  964. }
  965. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  966. ioc->name, ioc);
  967. if (r) {
  968. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  969. "interrupt %d !!!\n", ioc->name, entries.vector));
  970. pci_disable_msix(ioc->pdev);
  971. goto try_ioapic;
  972. }
  973. ioc->pci_irq = entries.vector;
  974. ioc->msix_enable = 1;
  975. return 0;
  976. /* failback to io_apic interrupt routing */
  977. try_ioapic:
  978. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  979. ioc->name, ioc);
  980. if (r) {
  981. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  982. ioc->name, ioc->pdev->irq);
  983. r = -EBUSY;
  984. goto out_fail;
  985. }
  986. ioc->pci_irq = ioc->pdev->irq;
  987. return 0;
  988. out_fail:
  989. return r;
  990. }
  991. /**
  992. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  993. * @ioc: per adapter object
  994. *
  995. * Returns 0 for success, non-zero for failure.
  996. */
  997. int
  998. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  999. {
  1000. struct pci_dev *pdev = ioc->pdev;
  1001. u32 memap_sz;
  1002. u32 pio_sz;
  1003. int i, r = 0;
  1004. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
  1005. ioc->name, __func__));
  1006. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1007. if (pci_enable_device_mem(pdev)) {
  1008. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1009. "failed\n", ioc->name);
  1010. return -ENODEV;
  1011. }
  1012. if (pci_request_selected_regions(pdev, ioc->bars,
  1013. MPT2SAS_DRIVER_NAME)) {
  1014. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1015. "failed\n", ioc->name);
  1016. r = -ENODEV;
  1017. goto out_fail;
  1018. }
  1019. pci_set_master(pdev);
  1020. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1021. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1022. ioc->name, pci_name(pdev));
  1023. r = -ENODEV;
  1024. goto out_fail;
  1025. }
  1026. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1027. if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) {
  1028. if (pio_sz)
  1029. continue;
  1030. ioc->pio_chip = pci_resource_start(pdev, i);
  1031. pio_sz = pci_resource_len(pdev, i);
  1032. } else {
  1033. if (memap_sz)
  1034. continue;
  1035. ioc->chip_phys = pci_resource_start(pdev, i);
  1036. memap_sz = pci_resource_len(pdev, i);
  1037. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1038. if (ioc->chip == NULL) {
  1039. printk(MPT2SAS_ERR_FMT "unable to map adapter "
  1040. "memory!\n", ioc->name);
  1041. r = -EINVAL;
  1042. goto out_fail;
  1043. }
  1044. }
  1045. }
  1046. _base_mask_interrupts(ioc);
  1047. r = _base_enable_msix(ioc);
  1048. if (r)
  1049. goto out_fail;
  1050. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1051. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1052. "IO-APIC enabled"), ioc->pci_irq);
  1053. printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n",
  1054. ioc->name, ioc->chip_phys, ioc->chip, memap_sz);
  1055. printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n",
  1056. ioc->name, ioc->pio_chip, pio_sz);
  1057. return 0;
  1058. out_fail:
  1059. if (ioc->chip_phys)
  1060. iounmap(ioc->chip);
  1061. ioc->chip_phys = 0;
  1062. ioc->pci_irq = -1;
  1063. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1064. pci_disable_device(pdev);
  1065. return r;
  1066. }
  1067. /**
  1068. * mpt2sas_base_get_msg_frame_dma - obtain request mf pointer phys addr
  1069. * @ioc: per adapter object
  1070. * @smid: system request message index(smid zero is invalid)
  1071. *
  1072. * Returns phys pointer to message frame.
  1073. */
  1074. dma_addr_t
  1075. mpt2sas_base_get_msg_frame_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1076. {
  1077. return ioc->request_dma + (smid * ioc->request_sz);
  1078. }
  1079. /**
  1080. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1081. * @ioc: per adapter object
  1082. * @smid: system request message index(smid zero is invalid)
  1083. *
  1084. * Returns virt pointer to message frame.
  1085. */
  1086. void *
  1087. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1088. {
  1089. return (void *)(ioc->request + (smid * ioc->request_sz));
  1090. }
  1091. /**
  1092. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1093. * @ioc: per adapter object
  1094. * @smid: system request message index
  1095. *
  1096. * Returns virt pointer to sense buffer.
  1097. */
  1098. void *
  1099. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1100. {
  1101. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1102. }
  1103. /**
  1104. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1105. * @ioc: per adapter object
  1106. * @smid: system request message index
  1107. *
  1108. * Returns phys pointer to sense buffer.
  1109. */
  1110. dma_addr_t
  1111. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1112. {
  1113. return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE);
  1114. }
  1115. /**
  1116. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1117. * @ioc: per adapter object
  1118. * @phys_addr: lower 32 physical addr of the reply
  1119. *
  1120. * Converts 32bit lower physical addr into a virt address.
  1121. */
  1122. void *
  1123. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1124. {
  1125. if (!phys_addr)
  1126. return NULL;
  1127. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1128. }
  1129. /**
  1130. * mpt2sas_base_get_smid - obtain a free smid
  1131. * @ioc: per adapter object
  1132. * @cb_idx: callback index
  1133. *
  1134. * Returns smid (zero is invalid)
  1135. */
  1136. u16
  1137. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1138. {
  1139. unsigned long flags;
  1140. struct request_tracker *request;
  1141. u16 smid;
  1142. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1143. if (list_empty(&ioc->free_list)) {
  1144. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1145. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1146. ioc->name, __func__);
  1147. return 0;
  1148. }
  1149. request = list_entry(ioc->free_list.next,
  1150. struct request_tracker, tracker_list);
  1151. request->cb_idx = cb_idx;
  1152. smid = request->smid;
  1153. list_del(&request->tracker_list);
  1154. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1155. return smid;
  1156. }
  1157. /**
  1158. * mpt2sas_base_free_smid - put smid back on free_list
  1159. * @ioc: per adapter object
  1160. * @smid: system request message index
  1161. *
  1162. * Return nothing.
  1163. */
  1164. void
  1165. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1166. {
  1167. unsigned long flags;
  1168. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1169. ioc->scsi_lookup[smid - 1].cb_idx = 0xFF;
  1170. list_add_tail(&ioc->scsi_lookup[smid - 1].tracker_list,
  1171. &ioc->free_list);
  1172. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1173. /*
  1174. * See _wait_for_commands_to_complete() call with regards to this code.
  1175. */
  1176. if (ioc->shost_recovery && ioc->pending_io_count) {
  1177. if (ioc->pending_io_count == 1)
  1178. wake_up(&ioc->reset_wq);
  1179. ioc->pending_io_count--;
  1180. }
  1181. }
  1182. /**
  1183. * _base_writeq - 64 bit write to MMIO
  1184. * @ioc: per adapter object
  1185. * @b: data payload
  1186. * @addr: address in MMIO space
  1187. * @writeq_lock: spin lock
  1188. *
  1189. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1190. * care of 32 bit environment where its not quarenteed to send the entire word
  1191. * in one transfer.
  1192. */
  1193. #ifndef writeq
  1194. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1195. spinlock_t *writeq_lock)
  1196. {
  1197. unsigned long flags;
  1198. __u64 data_out = cpu_to_le64(b);
  1199. spin_lock_irqsave(writeq_lock, flags);
  1200. writel((u32)(data_out), addr);
  1201. writel((u32)(data_out >> 32), (addr + 4));
  1202. spin_unlock_irqrestore(writeq_lock, flags);
  1203. }
  1204. #else
  1205. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1206. spinlock_t *writeq_lock)
  1207. {
  1208. writeq(cpu_to_le64(b), addr);
  1209. }
  1210. #endif
  1211. /**
  1212. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1213. * @ioc: per adapter object
  1214. * @smid: system request message index
  1215. * @vf_id: virtual function id
  1216. * @handle: device handle
  1217. *
  1218. * Return nothing.
  1219. */
  1220. void
  1221. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id,
  1222. u16 handle)
  1223. {
  1224. Mpi2RequestDescriptorUnion_t descriptor;
  1225. u64 *request = (u64 *)&descriptor;
  1226. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1227. descriptor.SCSIIO.VF_ID = vf_id;
  1228. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1229. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1230. descriptor.SCSIIO.LMID = 0;
  1231. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1232. &ioc->scsi_lookup_lock);
  1233. }
  1234. /**
  1235. * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
  1236. * @ioc: per adapter object
  1237. * @smid: system request message index
  1238. * @vf_id: virtual function id
  1239. *
  1240. * Return nothing.
  1241. */
  1242. void
  1243. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1244. u8 vf_id)
  1245. {
  1246. Mpi2RequestDescriptorUnion_t descriptor;
  1247. u64 *request = (u64 *)&descriptor;
  1248. descriptor.HighPriority.RequestFlags =
  1249. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1250. descriptor.HighPriority.VF_ID = vf_id;
  1251. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1252. descriptor.HighPriority.LMID = 0;
  1253. descriptor.HighPriority.Reserved1 = 0;
  1254. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1255. &ioc->scsi_lookup_lock);
  1256. }
  1257. /**
  1258. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1259. * @ioc: per adapter object
  1260. * @smid: system request message index
  1261. * @vf_id: virtual function id
  1262. *
  1263. * Return nothing.
  1264. */
  1265. void
  1266. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id)
  1267. {
  1268. Mpi2RequestDescriptorUnion_t descriptor;
  1269. u64 *request = (u64 *)&descriptor;
  1270. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1271. descriptor.Default.VF_ID = vf_id;
  1272. descriptor.Default.SMID = cpu_to_le16(smid);
  1273. descriptor.Default.LMID = 0;
  1274. descriptor.Default.DescriptorTypeDependent = 0;
  1275. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1276. &ioc->scsi_lookup_lock);
  1277. }
  1278. /**
  1279. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1280. * @ioc: per adapter object
  1281. * @smid: system request message index
  1282. * @vf_id: virtual function id
  1283. * @io_index: value used to track the IO
  1284. *
  1285. * Return nothing.
  1286. */
  1287. void
  1288. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1289. u8 vf_id, u16 io_index)
  1290. {
  1291. Mpi2RequestDescriptorUnion_t descriptor;
  1292. u64 *request = (u64 *)&descriptor;
  1293. descriptor.SCSITarget.RequestFlags =
  1294. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1295. descriptor.SCSITarget.VF_ID = vf_id;
  1296. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1297. descriptor.SCSITarget.LMID = 0;
  1298. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1299. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1300. &ioc->scsi_lookup_lock);
  1301. }
  1302. /**
  1303. * _base_display_dell_branding - Disply branding string
  1304. * @ioc: per adapter object
  1305. *
  1306. * Return nothing.
  1307. */
  1308. static void
  1309. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1310. {
  1311. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1312. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1313. return;
  1314. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1315. switch (ioc->pdev->subsystem_device) {
  1316. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1317. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1318. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1319. break;
  1320. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1321. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1322. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1323. break;
  1324. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1325. strncpy(dell_branding,
  1326. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1327. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1328. break;
  1329. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1330. strncpy(dell_branding,
  1331. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1332. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1333. break;
  1334. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1335. strncpy(dell_branding,
  1336. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1337. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1338. break;
  1339. case MPT2SAS_DELL_PERC_H200_SSDID:
  1340. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1341. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1342. break;
  1343. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1344. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1345. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1346. break;
  1347. default:
  1348. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1349. break;
  1350. }
  1351. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1352. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1353. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1354. ioc->pdev->subsystem_device);
  1355. }
  1356. /**
  1357. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1358. * @ioc: per adapter object
  1359. *
  1360. * Return nothing.
  1361. */
  1362. static void
  1363. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1364. {
  1365. int i = 0;
  1366. char desc[16];
  1367. u8 revision;
  1368. u32 iounit_pg1_flags;
  1369. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1370. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1371. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1372. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1373. ioc->name, desc,
  1374. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1375. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1376. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1377. ioc->facts.FWVersion.Word & 0x000000FF,
  1378. revision,
  1379. (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
  1380. (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
  1381. (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
  1382. ioc->bios_pg3.BiosVersion & 0x000000FF);
  1383. _base_display_dell_branding(ioc);
  1384. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1385. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1386. printk("Initiator");
  1387. i++;
  1388. }
  1389. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1390. printk("%sTarget", i ? "," : "");
  1391. i++;
  1392. }
  1393. i = 0;
  1394. printk("), ");
  1395. printk("Capabilities=(");
  1396. if (ioc->facts.IOCCapabilities &
  1397. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1398. printk("Raid");
  1399. i++;
  1400. }
  1401. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1402. printk("%sTLR", i ? "," : "");
  1403. i++;
  1404. }
  1405. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1406. printk("%sMulticast", i ? "," : "");
  1407. i++;
  1408. }
  1409. if (ioc->facts.IOCCapabilities &
  1410. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1411. printk("%sBIDI Target", i ? "," : "");
  1412. i++;
  1413. }
  1414. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1415. printk("%sEEDP", i ? "," : "");
  1416. i++;
  1417. }
  1418. if (ioc->facts.IOCCapabilities &
  1419. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1420. printk("%sSnapshot Buffer", i ? "," : "");
  1421. i++;
  1422. }
  1423. if (ioc->facts.IOCCapabilities &
  1424. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1425. printk("%sDiag Trace Buffer", i ? "," : "");
  1426. i++;
  1427. }
  1428. if (ioc->facts.IOCCapabilities &
  1429. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1430. printk("%sTask Set Full", i ? "," : "");
  1431. i++;
  1432. }
  1433. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1434. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1435. printk("%sNCQ", i ? "," : "");
  1436. i++;
  1437. }
  1438. printk(")\n");
  1439. }
  1440. /**
  1441. * _base_static_config_pages - static start of day config pages
  1442. * @ioc: per adapter object
  1443. *
  1444. * Return nothing.
  1445. */
  1446. static void
  1447. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1448. {
  1449. Mpi2ConfigReply_t mpi_reply;
  1450. u32 iounit_pg1_flags;
  1451. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1452. if (ioc->ir_firmware)
  1453. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  1454. &ioc->manu_pg10);
  1455. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1456. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1457. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1458. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1459. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1460. _base_display_ioc_capabilities(ioc);
  1461. /*
  1462. * Enable task_set_full handling in iounit_pg1 when the
  1463. * facts capabilities indicate that its supported.
  1464. */
  1465. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1466. if ((ioc->facts.IOCCapabilities &
  1467. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1468. iounit_pg1_flags &=
  1469. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1470. else
  1471. iounit_pg1_flags |=
  1472. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1473. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1474. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, ioc->iounit_pg1);
  1475. }
  1476. /**
  1477. * _base_release_memory_pools - release memory
  1478. * @ioc: per adapter object
  1479. *
  1480. * Free memory allocated from _base_allocate_memory_pools.
  1481. *
  1482. * Return nothing.
  1483. */
  1484. static void
  1485. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1486. {
  1487. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1488. __func__));
  1489. if (ioc->request) {
  1490. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1491. ioc->request, ioc->request_dma);
  1492. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1493. ": free\n", ioc->name, ioc->request));
  1494. ioc->request = NULL;
  1495. }
  1496. if (ioc->sense) {
  1497. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1498. if (ioc->sense_dma_pool)
  1499. pci_pool_destroy(ioc->sense_dma_pool);
  1500. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1501. ": free\n", ioc->name, ioc->sense));
  1502. ioc->sense = NULL;
  1503. }
  1504. if (ioc->reply) {
  1505. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1506. if (ioc->reply_dma_pool)
  1507. pci_pool_destroy(ioc->reply_dma_pool);
  1508. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1509. ": free\n", ioc->name, ioc->reply));
  1510. ioc->reply = NULL;
  1511. }
  1512. if (ioc->reply_free) {
  1513. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1514. ioc->reply_free_dma);
  1515. if (ioc->reply_free_dma_pool)
  1516. pci_pool_destroy(ioc->reply_free_dma_pool);
  1517. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1518. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1519. ioc->reply_free = NULL;
  1520. }
  1521. if (ioc->reply_post_free) {
  1522. pci_pool_free(ioc->reply_post_free_dma_pool,
  1523. ioc->reply_post_free, ioc->reply_post_free_dma);
  1524. if (ioc->reply_post_free_dma_pool)
  1525. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1526. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1527. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1528. ioc->reply_post_free));
  1529. ioc->reply_post_free = NULL;
  1530. }
  1531. if (ioc->config_page) {
  1532. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1533. "config_page(0x%p): free\n", ioc->name,
  1534. ioc->config_page));
  1535. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1536. ioc->config_page, ioc->config_page_dma);
  1537. }
  1538. kfree(ioc->scsi_lookup);
  1539. }
  1540. /**
  1541. * _base_allocate_memory_pools - allocate start of day memory pools
  1542. * @ioc: per adapter object
  1543. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1544. *
  1545. * Returns 0 success, anything else error
  1546. */
  1547. static int
  1548. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1549. {
  1550. Mpi2IOCFactsReply_t *facts;
  1551. u32 queue_size, queue_diff;
  1552. u16 max_sge_elements;
  1553. u16 num_of_reply_frames;
  1554. u16 chains_needed_per_io;
  1555. u32 sz, total_sz;
  1556. u16 i;
  1557. u32 retry_sz;
  1558. u16 max_request_credit;
  1559. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1560. __func__));
  1561. retry_sz = 0;
  1562. facts = &ioc->facts;
  1563. /* command line tunables for max sgl entries */
  1564. if (max_sgl_entries != -1) {
  1565. ioc->shost->sg_tablesize = (max_sgl_entries <
  1566. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1567. MPT2SAS_SG_DEPTH;
  1568. } else {
  1569. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1570. }
  1571. /* command line tunables for max controller queue depth */
  1572. if (max_queue_depth != -1) {
  1573. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1574. ? max_queue_depth : facts->RequestCredit;
  1575. } else {
  1576. max_request_credit = (facts->RequestCredit >
  1577. MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
  1578. facts->RequestCredit;
  1579. }
  1580. ioc->request_depth = max_request_credit;
  1581. /* request frame size */
  1582. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1583. /* reply frame size */
  1584. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1585. retry_allocation:
  1586. total_sz = 0;
  1587. /* calculate number of sg elements left over in the 1st frame */
  1588. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1589. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1590. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1591. /* now do the same for a chain buffer */
  1592. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1593. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1594. ioc->chain_offset_value_for_main_message =
  1595. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1596. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1597. /*
  1598. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1599. */
  1600. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1601. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1602. + 1;
  1603. if (chains_needed_per_io > facts->MaxChainDepth) {
  1604. chains_needed_per_io = facts->MaxChainDepth;
  1605. ioc->shost->sg_tablesize = min_t(u16,
  1606. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1607. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1608. }
  1609. ioc->chains_needed_per_io = chains_needed_per_io;
  1610. /* reply free queue sizing - taking into account for events */
  1611. num_of_reply_frames = ioc->request_depth + 32;
  1612. /* number of replies frames can't be a multiple of 16 */
  1613. /* decrease number of reply frames by 1 */
  1614. if (!(num_of_reply_frames % 16))
  1615. num_of_reply_frames--;
  1616. /* calculate number of reply free queue entries
  1617. * (must be multiple of 16)
  1618. */
  1619. /* (we know reply_free_queue_depth is not a multiple of 16) */
  1620. queue_size = num_of_reply_frames;
  1621. queue_size += 16 - (queue_size % 16);
  1622. ioc->reply_free_queue_depth = queue_size;
  1623. /* reply descriptor post queue sizing */
  1624. /* this size should be the number of request frames + number of reply
  1625. * frames
  1626. */
  1627. queue_size = ioc->request_depth + num_of_reply_frames + 1;
  1628. /* round up to 16 byte boundary */
  1629. if (queue_size % 16)
  1630. queue_size += 16 - (queue_size % 16);
  1631. /* check against IOC maximum reply post queue depth */
  1632. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  1633. queue_diff = queue_size -
  1634. facts->MaxReplyDescriptorPostQueueDepth;
  1635. /* round queue_diff up to multiple of 16 */
  1636. if (queue_diff % 16)
  1637. queue_diff += 16 - (queue_diff % 16);
  1638. /* adjust request_depth, reply_free_queue_depth,
  1639. * and queue_size
  1640. */
  1641. ioc->request_depth -= queue_diff;
  1642. ioc->reply_free_queue_depth -= queue_diff;
  1643. queue_size -= queue_diff;
  1644. }
  1645. ioc->reply_post_queue_depth = queue_size;
  1646. /* max scsi host queue depth */
  1647. ioc->shost->can_queue = ioc->request_depth - INTERNAL_CMDS_COUNT;
  1648. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host queue: depth"
  1649. "(%d)\n", ioc->name, ioc->shost->can_queue));
  1650. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  1651. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  1652. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  1653. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  1654. ioc->chains_needed_per_io));
  1655. /* contiguous pool for request and chains, 16 byte align, one extra "
  1656. * "frame for smid=0
  1657. */
  1658. ioc->chain_depth = ioc->chains_needed_per_io * ioc->request_depth;
  1659. sz = ((ioc->request_depth + 1 + ioc->chain_depth) * ioc->request_sz);
  1660. ioc->request_dma_sz = sz;
  1661. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  1662. if (!ioc->request) {
  1663. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1664. "failed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1665. "total(%d kB)\n", ioc->name, ioc->request_depth,
  1666. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1667. if (ioc->request_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  1668. goto out;
  1669. retry_sz += 64;
  1670. ioc->request_depth = max_request_credit - retry_sz;
  1671. goto retry_allocation;
  1672. }
  1673. if (retry_sz)
  1674. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1675. "succeed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1676. "total(%d kb)\n", ioc->name, ioc->request_depth,
  1677. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1678. ioc->chain = ioc->request + ((ioc->request_depth + 1) *
  1679. ioc->request_sz);
  1680. ioc->chain_dma = ioc->request_dma + ((ioc->request_depth + 1) *
  1681. ioc->request_sz);
  1682. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  1683. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  1684. ioc->request, ioc->request_depth, ioc->request_sz,
  1685. ((ioc->request_depth + 1) * ioc->request_sz)/1024));
  1686. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
  1687. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
  1688. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  1689. ioc->request_sz))/1024));
  1690. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  1691. ioc->name, (unsigned long long) ioc->request_dma));
  1692. total_sz += sz;
  1693. ioc->scsi_lookup = kcalloc(ioc->request_depth,
  1694. sizeof(struct request_tracker), GFP_KERNEL);
  1695. if (!ioc->scsi_lookup) {
  1696. printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n",
  1697. ioc->name);
  1698. goto out;
  1699. }
  1700. /* initialize some bits */
  1701. for (i = 0; i < ioc->request_depth; i++)
  1702. ioc->scsi_lookup[i].smid = i + 1;
  1703. /* sense buffers, 4 byte align */
  1704. sz = ioc->request_depth * SCSI_SENSE_BUFFERSIZE;
  1705. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  1706. 0);
  1707. if (!ioc->sense_dma_pool) {
  1708. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  1709. ioc->name);
  1710. goto out;
  1711. }
  1712. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  1713. &ioc->sense_dma);
  1714. if (!ioc->sense) {
  1715. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  1716. ioc->name);
  1717. goto out;
  1718. }
  1719. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1720. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  1721. "(%d kB)\n", ioc->name, ioc->sense, ioc->request_depth,
  1722. SCSI_SENSE_BUFFERSIZE, sz/1024));
  1723. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  1724. ioc->name, (unsigned long long)ioc->sense_dma));
  1725. total_sz += sz;
  1726. /* reply pool, 4 byte align */
  1727. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  1728. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  1729. 0);
  1730. if (!ioc->reply_dma_pool) {
  1731. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  1732. ioc->name);
  1733. goto out;
  1734. }
  1735. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  1736. &ioc->reply_dma);
  1737. if (!ioc->reply) {
  1738. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  1739. ioc->name);
  1740. goto out;
  1741. }
  1742. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  1743. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  1744. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  1745. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  1746. ioc->name, (unsigned long long)ioc->reply_dma));
  1747. total_sz += sz;
  1748. /* reply free queue, 16 byte align */
  1749. sz = ioc->reply_free_queue_depth * 4;
  1750. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  1751. ioc->pdev, sz, 16, 0);
  1752. if (!ioc->reply_free_dma_pool) {
  1753. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  1754. "failed\n", ioc->name);
  1755. goto out;
  1756. }
  1757. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  1758. &ioc->reply_free_dma);
  1759. if (!ioc->reply_free) {
  1760. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  1761. "failed\n", ioc->name);
  1762. goto out;
  1763. }
  1764. memset(ioc->reply_free, 0, sz);
  1765. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  1766. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  1767. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  1768. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  1769. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  1770. total_sz += sz;
  1771. /* reply post queue, 16 byte align */
  1772. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  1773. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  1774. ioc->pdev, sz, 16, 0);
  1775. if (!ioc->reply_post_free_dma_pool) {
  1776. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  1777. "failed\n", ioc->name);
  1778. goto out;
  1779. }
  1780. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  1781. GFP_KERNEL, &ioc->reply_post_free_dma);
  1782. if (!ioc->reply_post_free) {
  1783. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  1784. "failed\n", ioc->name);
  1785. goto out;
  1786. }
  1787. memset(ioc->reply_post_free, 0, sz);
  1788. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  1789. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  1790. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  1791. sz/1024));
  1792. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  1793. "(0x%llx)\n", ioc->name, (unsigned long long)
  1794. ioc->reply_post_free_dma));
  1795. total_sz += sz;
  1796. ioc->config_page_sz = 512;
  1797. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  1798. ioc->config_page_sz, &ioc->config_page_dma);
  1799. if (!ioc->config_page) {
  1800. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  1801. "failed\n", ioc->name);
  1802. goto out;
  1803. }
  1804. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  1805. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  1806. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  1807. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  1808. total_sz += ioc->config_page_sz;
  1809. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  1810. ioc->name, total_sz/1024);
  1811. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  1812. "Max Controller Queue Depth(%d)\n",
  1813. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  1814. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  1815. ioc->name, ioc->shost->sg_tablesize);
  1816. return 0;
  1817. out:
  1818. _base_release_memory_pools(ioc);
  1819. return -ENOMEM;
  1820. }
  1821. /**
  1822. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  1823. * @ioc: Pointer to MPT_ADAPTER structure
  1824. * @cooked: Request raw or cooked IOC state
  1825. *
  1826. * Returns all IOC Doorbell register bits if cooked==0, else just the
  1827. * Doorbell bits in MPI_IOC_STATE_MASK.
  1828. */
  1829. u32
  1830. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  1831. {
  1832. u32 s, sc;
  1833. s = readl(&ioc->chip->Doorbell);
  1834. sc = s & MPI2_IOC_STATE_MASK;
  1835. return cooked ? sc : s;
  1836. }
  1837. /**
  1838. * _base_wait_on_iocstate - waiting on a particular ioc state
  1839. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  1840. * @timeout: timeout in second
  1841. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1842. *
  1843. * Returns 0 for success, non-zero for failure.
  1844. */
  1845. static int
  1846. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  1847. int sleep_flag)
  1848. {
  1849. u32 count, cntdn;
  1850. u32 current_state;
  1851. count = 0;
  1852. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1853. do {
  1854. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  1855. if (current_state == ioc_state)
  1856. return 0;
  1857. if (count && current_state == MPI2_IOC_STATE_FAULT)
  1858. break;
  1859. if (sleep_flag == CAN_SLEEP)
  1860. msleep(1);
  1861. else
  1862. udelay(500);
  1863. count++;
  1864. } while (--cntdn);
  1865. return current_state;
  1866. }
  1867. /**
  1868. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  1869. * a write to the doorbell)
  1870. * @ioc: per adapter object
  1871. * @timeout: timeout in second
  1872. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1873. *
  1874. * Returns 0 for success, non-zero for failure.
  1875. *
  1876. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  1877. */
  1878. static int
  1879. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1880. int sleep_flag)
  1881. {
  1882. u32 cntdn, count;
  1883. u32 int_status;
  1884. count = 0;
  1885. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1886. do {
  1887. int_status = readl(&ioc->chip->HostInterruptStatus);
  1888. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  1889. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1890. "successfull count(%d), timeout(%d)\n", ioc->name,
  1891. __func__, count, timeout));
  1892. return 0;
  1893. }
  1894. if (sleep_flag == CAN_SLEEP)
  1895. msleep(1);
  1896. else
  1897. udelay(500);
  1898. count++;
  1899. } while (--cntdn);
  1900. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1901. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  1902. return -EFAULT;
  1903. }
  1904. /**
  1905. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  1906. * @ioc: per adapter object
  1907. * @timeout: timeout in second
  1908. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1909. *
  1910. * Returns 0 for success, non-zero for failure.
  1911. *
  1912. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  1913. * doorbell.
  1914. */
  1915. static int
  1916. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1917. int sleep_flag)
  1918. {
  1919. u32 cntdn, count;
  1920. u32 int_status;
  1921. u32 doorbell;
  1922. count = 0;
  1923. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1924. do {
  1925. int_status = readl(&ioc->chip->HostInterruptStatus);
  1926. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  1927. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1928. "successfull count(%d), timeout(%d)\n", ioc->name,
  1929. __func__, count, timeout));
  1930. return 0;
  1931. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  1932. doorbell = readl(&ioc->chip->Doorbell);
  1933. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  1934. MPI2_IOC_STATE_FAULT) {
  1935. mpt2sas_base_fault_info(ioc , doorbell);
  1936. return -EFAULT;
  1937. }
  1938. } else if (int_status == 0xFFFFFFFF)
  1939. goto out;
  1940. if (sleep_flag == CAN_SLEEP)
  1941. msleep(1);
  1942. else
  1943. udelay(500);
  1944. count++;
  1945. } while (--cntdn);
  1946. out:
  1947. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1948. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  1949. return -EFAULT;
  1950. }
  1951. /**
  1952. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  1953. * @ioc: per adapter object
  1954. * @timeout: timeout in second
  1955. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1956. *
  1957. * Returns 0 for success, non-zero for failure.
  1958. *
  1959. */
  1960. static int
  1961. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1962. int sleep_flag)
  1963. {
  1964. u32 cntdn, count;
  1965. u32 doorbell_reg;
  1966. count = 0;
  1967. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1968. do {
  1969. doorbell_reg = readl(&ioc->chip->Doorbell);
  1970. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  1971. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1972. "successfull count(%d), timeout(%d)\n", ioc->name,
  1973. __func__, count, timeout));
  1974. return 0;
  1975. }
  1976. if (sleep_flag == CAN_SLEEP)
  1977. msleep(1);
  1978. else
  1979. udelay(500);
  1980. count++;
  1981. } while (--cntdn);
  1982. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1983. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  1984. return -EFAULT;
  1985. }
  1986. /**
  1987. * _base_send_ioc_reset - send doorbell reset
  1988. * @ioc: per adapter object
  1989. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  1990. * @timeout: timeout in second
  1991. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1992. *
  1993. * Returns 0 for success, non-zero for failure.
  1994. */
  1995. static int
  1996. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  1997. int sleep_flag)
  1998. {
  1999. u32 ioc_state;
  2000. int r = 0;
  2001. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2002. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2003. ioc->name, __func__);
  2004. return -EFAULT;
  2005. }
  2006. if (!(ioc->facts.IOCCapabilities &
  2007. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2008. return -EFAULT;
  2009. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2010. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2011. &ioc->chip->Doorbell);
  2012. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2013. r = -EFAULT;
  2014. goto out;
  2015. }
  2016. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2017. timeout, sleep_flag);
  2018. if (ioc_state) {
  2019. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2020. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2021. r = -EFAULT;
  2022. goto out;
  2023. }
  2024. out:
  2025. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2026. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2027. return r;
  2028. }
  2029. /**
  2030. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2031. * @ioc: per adapter object
  2032. * @request_bytes: request length
  2033. * @request: pointer having request payload
  2034. * @reply_bytes: reply length
  2035. * @reply: pointer to reply payload
  2036. * @timeout: timeout in second
  2037. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2038. *
  2039. * Returns 0 for success, non-zero for failure.
  2040. */
  2041. static int
  2042. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2043. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2044. {
  2045. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2046. int i;
  2047. u8 failed;
  2048. u16 dummy;
  2049. u32 *mfp;
  2050. /* make sure doorbell is not in use */
  2051. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2052. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2053. " (line=%d)\n", ioc->name, __LINE__);
  2054. return -EFAULT;
  2055. }
  2056. /* clear pending doorbell interrupts from previous state changes */
  2057. if (readl(&ioc->chip->HostInterruptStatus) &
  2058. MPI2_HIS_IOC2SYS_DB_STATUS)
  2059. writel(0, &ioc->chip->HostInterruptStatus);
  2060. /* send message to ioc */
  2061. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2062. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2063. &ioc->chip->Doorbell);
  2064. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2065. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2066. "int failed (line=%d)\n", ioc->name, __LINE__);
  2067. return -EFAULT;
  2068. }
  2069. writel(0, &ioc->chip->HostInterruptStatus);
  2070. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2071. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2072. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2073. return -EFAULT;
  2074. }
  2075. /* send message 32-bits at a time */
  2076. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2077. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2078. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2079. failed = 1;
  2080. }
  2081. if (failed) {
  2082. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2083. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2084. return -EFAULT;
  2085. }
  2086. /* now wait for the reply */
  2087. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2088. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2089. "int failed (line=%d)\n", ioc->name, __LINE__);
  2090. return -EFAULT;
  2091. }
  2092. /* read the first two 16-bits, it gives the total length of the reply */
  2093. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2094. & MPI2_DOORBELL_DATA_MASK);
  2095. writel(0, &ioc->chip->HostInterruptStatus);
  2096. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2097. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2098. "int failed (line=%d)\n", ioc->name, __LINE__);
  2099. return -EFAULT;
  2100. }
  2101. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2102. & MPI2_DOORBELL_DATA_MASK);
  2103. writel(0, &ioc->chip->HostInterruptStatus);
  2104. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2105. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2106. printk(MPT2SAS_ERR_FMT "doorbell "
  2107. "handshake int failed (line=%d)\n", ioc->name,
  2108. __LINE__);
  2109. return -EFAULT;
  2110. }
  2111. if (i >= reply_bytes/2) /* overflow case */
  2112. dummy = readl(&ioc->chip->Doorbell);
  2113. else
  2114. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2115. & MPI2_DOORBELL_DATA_MASK);
  2116. writel(0, &ioc->chip->HostInterruptStatus);
  2117. }
  2118. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2119. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2120. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2121. " (line=%d)\n", ioc->name, __LINE__));
  2122. }
  2123. writel(0, &ioc->chip->HostInterruptStatus);
  2124. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2125. mfp = (u32 *)reply;
  2126. printk(KERN_DEBUG "\toffset:data\n");
  2127. for (i = 0; i < reply_bytes/4; i++)
  2128. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2129. le32_to_cpu(mfp[i]));
  2130. }
  2131. return 0;
  2132. }
  2133. /**
  2134. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2135. * @ioc: per adapter object
  2136. * @mpi_reply: the reply payload from FW
  2137. * @mpi_request: the request payload sent to FW
  2138. *
  2139. * The SAS IO Unit Control Request message allows the host to perform low-level
  2140. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2141. * to obtain the IOC assigned device handles for a device if it has other
  2142. * identifying information about the device, in addition allows the host to
  2143. * remove IOC resources associated with the device.
  2144. *
  2145. * Returns 0 for success, non-zero for failure.
  2146. */
  2147. int
  2148. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2149. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2150. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2151. {
  2152. u16 smid;
  2153. u32 ioc_state;
  2154. unsigned long timeleft;
  2155. u8 issue_reset;
  2156. int rc;
  2157. void *request;
  2158. u16 wait_state_count;
  2159. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2160. __func__));
  2161. mutex_lock(&ioc->base_cmds.mutex);
  2162. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2163. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2164. ioc->name, __func__);
  2165. rc = -EAGAIN;
  2166. goto out;
  2167. }
  2168. wait_state_count = 0;
  2169. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2170. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2171. if (wait_state_count++ == 10) {
  2172. printk(MPT2SAS_ERR_FMT
  2173. "%s: failed due to ioc not operational\n",
  2174. ioc->name, __func__);
  2175. rc = -EFAULT;
  2176. goto out;
  2177. }
  2178. ssleep(1);
  2179. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2180. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2181. "operational state(count=%d)\n", ioc->name,
  2182. __func__, wait_state_count);
  2183. }
  2184. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2185. if (!smid) {
  2186. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2187. ioc->name, __func__);
  2188. rc = -EAGAIN;
  2189. goto out;
  2190. }
  2191. rc = 0;
  2192. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2193. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2194. ioc->base_cmds.smid = smid;
  2195. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2196. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2197. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2198. ioc->ioc_link_reset_in_progress = 1;
  2199. mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
  2200. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2201. msecs_to_jiffies(10000));
  2202. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2203. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2204. ioc->ioc_link_reset_in_progress)
  2205. ioc->ioc_link_reset_in_progress = 0;
  2206. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2207. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2208. ioc->name, __func__);
  2209. _debug_dump_mf(mpi_request,
  2210. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2211. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2212. issue_reset = 1;
  2213. goto issue_host_reset;
  2214. }
  2215. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2216. memcpy(mpi_reply, ioc->base_cmds.reply,
  2217. sizeof(Mpi2SasIoUnitControlReply_t));
  2218. else
  2219. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2220. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2221. goto out;
  2222. issue_host_reset:
  2223. if (issue_reset)
  2224. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2225. FORCE_BIG_HAMMER);
  2226. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2227. rc = -EFAULT;
  2228. out:
  2229. mutex_unlock(&ioc->base_cmds.mutex);
  2230. return rc;
  2231. }
  2232. /**
  2233. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2234. * @ioc: per adapter object
  2235. * @mpi_reply: the reply payload from FW
  2236. * @mpi_request: the request payload sent to FW
  2237. *
  2238. * The SCSI Enclosure Processor request message causes the IOC to
  2239. * communicate with SES devices to control LED status signals.
  2240. *
  2241. * Returns 0 for success, non-zero for failure.
  2242. */
  2243. int
  2244. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2245. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2246. {
  2247. u16 smid;
  2248. u32 ioc_state;
  2249. unsigned long timeleft;
  2250. u8 issue_reset;
  2251. int rc;
  2252. void *request;
  2253. u16 wait_state_count;
  2254. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2255. __func__));
  2256. mutex_lock(&ioc->base_cmds.mutex);
  2257. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2258. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2259. ioc->name, __func__);
  2260. rc = -EAGAIN;
  2261. goto out;
  2262. }
  2263. wait_state_count = 0;
  2264. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2265. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2266. if (wait_state_count++ == 10) {
  2267. printk(MPT2SAS_ERR_FMT
  2268. "%s: failed due to ioc not operational\n",
  2269. ioc->name, __func__);
  2270. rc = -EFAULT;
  2271. goto out;
  2272. }
  2273. ssleep(1);
  2274. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2275. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2276. "operational state(count=%d)\n", ioc->name,
  2277. __func__, wait_state_count);
  2278. }
  2279. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2280. if (!smid) {
  2281. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2282. ioc->name, __func__);
  2283. rc = -EAGAIN;
  2284. goto out;
  2285. }
  2286. rc = 0;
  2287. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2288. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2289. ioc->base_cmds.smid = smid;
  2290. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2291. mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
  2292. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2293. msecs_to_jiffies(10000));
  2294. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2295. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2296. ioc->name, __func__);
  2297. _debug_dump_mf(mpi_request,
  2298. sizeof(Mpi2SepRequest_t)/4);
  2299. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2300. issue_reset = 1;
  2301. goto issue_host_reset;
  2302. }
  2303. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2304. memcpy(mpi_reply, ioc->base_cmds.reply,
  2305. sizeof(Mpi2SepReply_t));
  2306. else
  2307. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2308. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2309. goto out;
  2310. issue_host_reset:
  2311. if (issue_reset)
  2312. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2313. FORCE_BIG_HAMMER);
  2314. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2315. rc = -EFAULT;
  2316. out:
  2317. mutex_unlock(&ioc->base_cmds.mutex);
  2318. return rc;
  2319. }
  2320. /**
  2321. * _base_get_port_facts - obtain port facts reply and save in ioc
  2322. * @ioc: per adapter object
  2323. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2324. *
  2325. * Returns 0 for success, non-zero for failure.
  2326. */
  2327. static int
  2328. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2329. {
  2330. Mpi2PortFactsRequest_t mpi_request;
  2331. Mpi2PortFactsReply_t mpi_reply, *pfacts;
  2332. int mpi_reply_sz, mpi_request_sz, r;
  2333. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2334. __func__));
  2335. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2336. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2337. memset(&mpi_request, 0, mpi_request_sz);
  2338. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2339. mpi_request.PortNumber = port;
  2340. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2341. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2342. if (r != 0) {
  2343. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2344. ioc->name, __func__, r);
  2345. return r;
  2346. }
  2347. pfacts = &ioc->pfacts[port];
  2348. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2349. pfacts->PortNumber = mpi_reply.PortNumber;
  2350. pfacts->VP_ID = mpi_reply.VP_ID;
  2351. pfacts->VF_ID = mpi_reply.VF_ID;
  2352. pfacts->MaxPostedCmdBuffers =
  2353. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2354. return 0;
  2355. }
  2356. /**
  2357. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2358. * @ioc: per adapter object
  2359. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2360. *
  2361. * Returns 0 for success, non-zero for failure.
  2362. */
  2363. static int
  2364. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2365. {
  2366. Mpi2IOCFactsRequest_t mpi_request;
  2367. Mpi2IOCFactsReply_t mpi_reply, *facts;
  2368. int mpi_reply_sz, mpi_request_sz, r;
  2369. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2370. __func__));
  2371. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2372. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2373. memset(&mpi_request, 0, mpi_request_sz);
  2374. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2375. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2376. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2377. if (r != 0) {
  2378. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2379. ioc->name, __func__, r);
  2380. return r;
  2381. }
  2382. facts = &ioc->facts;
  2383. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2384. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2385. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2386. facts->VP_ID = mpi_reply.VP_ID;
  2387. facts->VF_ID = mpi_reply.VF_ID;
  2388. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2389. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2390. facts->WhoInit = mpi_reply.WhoInit;
  2391. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2392. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2393. facts->MaxReplyDescriptorPostQueueDepth =
  2394. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2395. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2396. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2397. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2398. ioc->ir_firmware = 1;
  2399. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2400. facts->IOCRequestFrameSize =
  2401. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2402. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2403. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2404. ioc->shost->max_id = -1;
  2405. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2406. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2407. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2408. facts->HighPriorityCredit =
  2409. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2410. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2411. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2412. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2413. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2414. facts->MaxChainDepth));
  2415. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2416. "reply frame size(%d)\n", ioc->name,
  2417. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2418. return 0;
  2419. }
  2420. /**
  2421. * _base_send_ioc_init - send ioc_init to firmware
  2422. * @ioc: per adapter object
  2423. * @VF_ID: virtual function id
  2424. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2425. *
  2426. * Returns 0 for success, non-zero for failure.
  2427. */
  2428. static int
  2429. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2430. {
  2431. Mpi2IOCInitRequest_t mpi_request;
  2432. Mpi2IOCInitReply_t mpi_reply;
  2433. int r;
  2434. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2435. __func__));
  2436. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2437. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2438. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2439. mpi_request.VF_ID = VF_ID;
  2440. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2441. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2442. /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
  2443. * removed and made reserved. For those with older firmware will need
  2444. * this fix. It was decided that the Reply and Request frame sizes are
  2445. * the same.
  2446. */
  2447. if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
  2448. mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
  2449. /* mpi_request.SystemReplyFrameSize =
  2450. * cpu_to_le16(ioc->reply_sz);
  2451. */
  2452. }
  2453. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2454. mpi_request.ReplyDescriptorPostQueueDepth =
  2455. cpu_to_le16(ioc->reply_post_queue_depth);
  2456. mpi_request.ReplyFreeQueueDepth =
  2457. cpu_to_le16(ioc->reply_free_queue_depth);
  2458. #if BITS_PER_LONG > 32
  2459. mpi_request.SenseBufferAddressHigh =
  2460. cpu_to_le32(ioc->sense_dma >> 32);
  2461. mpi_request.SystemReplyAddressHigh =
  2462. cpu_to_le32(ioc->reply_dma >> 32);
  2463. mpi_request.SystemRequestFrameBaseAddress =
  2464. cpu_to_le64(ioc->request_dma);
  2465. mpi_request.ReplyFreeQueueAddress =
  2466. cpu_to_le64(ioc->reply_free_dma);
  2467. mpi_request.ReplyDescriptorPostQueueAddress =
  2468. cpu_to_le64(ioc->reply_post_free_dma);
  2469. #else
  2470. mpi_request.SystemRequestFrameBaseAddress =
  2471. cpu_to_le32(ioc->request_dma);
  2472. mpi_request.ReplyFreeQueueAddress =
  2473. cpu_to_le32(ioc->reply_free_dma);
  2474. mpi_request.ReplyDescriptorPostQueueAddress =
  2475. cpu_to_le32(ioc->reply_post_free_dma);
  2476. #endif
  2477. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2478. u32 *mfp;
  2479. int i;
  2480. mfp = (u32 *)&mpi_request;
  2481. printk(KERN_DEBUG "\toffset:data\n");
  2482. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2483. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2484. le32_to_cpu(mfp[i]));
  2485. }
  2486. r = _base_handshake_req_reply_wait(ioc,
  2487. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2488. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2489. sleep_flag);
  2490. if (r != 0) {
  2491. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2492. ioc->name, __func__, r);
  2493. return r;
  2494. }
  2495. if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS ||
  2496. mpi_reply.IOCLogInfo) {
  2497. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2498. r = -EIO;
  2499. }
  2500. return 0;
  2501. }
  2502. /**
  2503. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2504. * @ioc: per adapter object
  2505. * @VF_ID: virtual function id
  2506. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2507. *
  2508. * Returns 0 for success, non-zero for failure.
  2509. */
  2510. static int
  2511. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2512. {
  2513. Mpi2PortEnableRequest_t *mpi_request;
  2514. u32 ioc_state;
  2515. unsigned long timeleft;
  2516. int r = 0;
  2517. u16 smid;
  2518. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2519. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2520. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2521. ioc->name, __func__);
  2522. return -EAGAIN;
  2523. }
  2524. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2525. if (!smid) {
  2526. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2527. ioc->name, __func__);
  2528. return -EAGAIN;
  2529. }
  2530. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2531. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2532. ioc->base_cmds.smid = smid;
  2533. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2534. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2535. mpi_request->VF_ID = VF_ID;
  2536. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  2537. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2538. 300*HZ);
  2539. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2540. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2541. ioc->name, __func__);
  2542. _debug_dump_mf(mpi_request,
  2543. sizeof(Mpi2PortEnableRequest_t)/4);
  2544. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2545. r = -EFAULT;
  2546. else
  2547. r = -ETIME;
  2548. goto out;
  2549. } else
  2550. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2551. ioc->name, __func__));
  2552. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  2553. 60, sleep_flag);
  2554. if (ioc_state) {
  2555. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  2556. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2557. r = -EFAULT;
  2558. }
  2559. out:
  2560. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2561. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  2562. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2563. return r;
  2564. }
  2565. /**
  2566. * _base_unmask_events - turn on notification for this event
  2567. * @ioc: per adapter object
  2568. * @event: firmware event
  2569. *
  2570. * The mask is stored in ioc->event_masks.
  2571. */
  2572. static void
  2573. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  2574. {
  2575. u32 desired_event;
  2576. if (event >= 128)
  2577. return;
  2578. desired_event = (1 << (event % 32));
  2579. if (event < 32)
  2580. ioc->event_masks[0] &= ~desired_event;
  2581. else if (event < 64)
  2582. ioc->event_masks[1] &= ~desired_event;
  2583. else if (event < 96)
  2584. ioc->event_masks[2] &= ~desired_event;
  2585. else if (event < 128)
  2586. ioc->event_masks[3] &= ~desired_event;
  2587. }
  2588. /**
  2589. * _base_event_notification - send event notification
  2590. * @ioc: per adapter object
  2591. * @VF_ID: virtual function id
  2592. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2593. *
  2594. * Returns 0 for success, non-zero for failure.
  2595. */
  2596. static int
  2597. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2598. {
  2599. Mpi2EventNotificationRequest_t *mpi_request;
  2600. unsigned long timeleft;
  2601. u16 smid;
  2602. int r = 0;
  2603. int i;
  2604. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2605. __func__));
  2606. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2607. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2608. ioc->name, __func__);
  2609. return -EAGAIN;
  2610. }
  2611. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2612. if (!smid) {
  2613. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2614. ioc->name, __func__);
  2615. return -EAGAIN;
  2616. }
  2617. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2618. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2619. ioc->base_cmds.smid = smid;
  2620. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  2621. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  2622. mpi_request->VF_ID = VF_ID;
  2623. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2624. mpi_request->EventMasks[i] =
  2625. le32_to_cpu(ioc->event_masks[i]);
  2626. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  2627. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  2628. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2629. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2630. ioc->name, __func__);
  2631. _debug_dump_mf(mpi_request,
  2632. sizeof(Mpi2EventNotificationRequest_t)/4);
  2633. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2634. r = -EFAULT;
  2635. else
  2636. r = -ETIME;
  2637. } else
  2638. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2639. ioc->name, __func__));
  2640. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2641. return r;
  2642. }
  2643. /**
  2644. * mpt2sas_base_validate_event_type - validating event types
  2645. * @ioc: per adapter object
  2646. * @event: firmware event
  2647. *
  2648. * This will turn on firmware event notification when application
  2649. * ask for that event. We don't mask events that are already enabled.
  2650. */
  2651. void
  2652. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  2653. {
  2654. int i, j;
  2655. u32 event_mask, desired_event;
  2656. u8 send_update_to_fw;
  2657. for (i = 0, send_update_to_fw = 0; i <
  2658. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  2659. event_mask = ~event_type[i];
  2660. desired_event = 1;
  2661. for (j = 0; j < 32; j++) {
  2662. if (!(event_mask & desired_event) &&
  2663. (ioc->event_masks[i] & desired_event)) {
  2664. ioc->event_masks[i] &= ~desired_event;
  2665. send_update_to_fw = 1;
  2666. }
  2667. desired_event = (desired_event << 1);
  2668. }
  2669. }
  2670. if (!send_update_to_fw)
  2671. return;
  2672. mutex_lock(&ioc->base_cmds.mutex);
  2673. _base_event_notification(ioc, 0, CAN_SLEEP);
  2674. mutex_unlock(&ioc->base_cmds.mutex);
  2675. }
  2676. /**
  2677. * _base_diag_reset - the "big hammer" start of day reset
  2678. * @ioc: per adapter object
  2679. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2680. *
  2681. * Returns 0 for success, non-zero for failure.
  2682. */
  2683. static int
  2684. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2685. {
  2686. u32 host_diagnostic;
  2687. u32 ioc_state;
  2688. u32 count;
  2689. u32 hcb_size;
  2690. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  2691. _base_save_msix_table(ioc);
  2692. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
  2693. ioc->name));
  2694. writel(0, &ioc->chip->HostInterruptStatus);
  2695. count = 0;
  2696. do {
  2697. /* Write magic sequence to WriteSequence register
  2698. * Loop until in diagnostic mode
  2699. */
  2700. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
  2701. "sequence\n", ioc->name));
  2702. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2703. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  2704. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  2705. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  2706. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2707. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2708. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2709. /* wait 100 msec */
  2710. if (sleep_flag == CAN_SLEEP)
  2711. msleep(100);
  2712. else
  2713. mdelay(100);
  2714. if (count++ > 20)
  2715. goto out;
  2716. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2717. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
  2718. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  2719. ioc->name, count, host_diagnostic));
  2720. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  2721. hcb_size = readl(&ioc->chip->HCBSize);
  2722. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
  2723. ioc->name));
  2724. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  2725. &ioc->chip->HostDiagnostic);
  2726. /* don't access any registers for 50 milliseconds */
  2727. msleep(50);
  2728. /* 300 second max wait */
  2729. for (count = 0; count < 3000000 ; count++) {
  2730. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2731. if (host_diagnostic == 0xFFFFFFFF)
  2732. goto out;
  2733. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  2734. break;
  2735. /* wait 100 msec */
  2736. if (sleep_flag == CAN_SLEEP)
  2737. msleep(1);
  2738. else
  2739. mdelay(1);
  2740. }
  2741. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  2742. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
  2743. "assuming the HCB Address points to good F/W\n",
  2744. ioc->name));
  2745. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  2746. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  2747. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  2748. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
  2749. "re-enable the HCDW\n", ioc->name));
  2750. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  2751. &ioc->chip->HCBSize);
  2752. }
  2753. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
  2754. ioc->name));
  2755. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  2756. &ioc->chip->HostDiagnostic);
  2757. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
  2758. "diagnostic register\n", ioc->name));
  2759. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2760. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
  2761. "READY state\n", ioc->name));
  2762. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  2763. sleep_flag);
  2764. if (ioc_state) {
  2765. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2766. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2767. goto out;
  2768. }
  2769. _base_restore_msix_table(ioc);
  2770. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  2771. return 0;
  2772. out:
  2773. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  2774. return -EFAULT;
  2775. }
  2776. /**
  2777. * _base_make_ioc_ready - put controller in READY state
  2778. * @ioc: per adapter object
  2779. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2780. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  2781. *
  2782. * Returns 0 for success, non-zero for failure.
  2783. */
  2784. static int
  2785. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  2786. enum reset_type type)
  2787. {
  2788. u32 ioc_state;
  2789. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2790. __func__));
  2791. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  2792. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
  2793. ioc->name, __func__, ioc_state));
  2794. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  2795. return 0;
  2796. if (ioc_state & MPI2_DOORBELL_USED) {
  2797. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
  2798. "active!\n", ioc->name));
  2799. goto issue_diag_reset;
  2800. }
  2801. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  2802. mpt2sas_base_fault_info(ioc, ioc_state &
  2803. MPI2_DOORBELL_DATA_MASK);
  2804. goto issue_diag_reset;
  2805. }
  2806. if (type == FORCE_BIG_HAMMER)
  2807. goto issue_diag_reset;
  2808. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  2809. if (!(_base_send_ioc_reset(ioc,
  2810. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
  2811. return 0;
  2812. issue_diag_reset:
  2813. return _base_diag_reset(ioc, CAN_SLEEP);
  2814. }
  2815. /**
  2816. * _base_make_ioc_operational - put controller in OPERATIONAL state
  2817. * @ioc: per adapter object
  2818. * @VF_ID: virtual function id
  2819. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2820. *
  2821. * Returns 0 for success, non-zero for failure.
  2822. */
  2823. static int
  2824. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
  2825. int sleep_flag)
  2826. {
  2827. int r, i;
  2828. unsigned long flags;
  2829. u32 reply_address;
  2830. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2831. __func__));
  2832. /* initialize the scsi lookup free list */
  2833. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  2834. INIT_LIST_HEAD(&ioc->free_list);
  2835. for (i = 0; i < ioc->request_depth; i++) {
  2836. ioc->scsi_lookup[i].cb_idx = 0xFF;
  2837. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  2838. &ioc->free_list);
  2839. }
  2840. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  2841. /* initialize Reply Free Queue */
  2842. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  2843. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  2844. ioc->reply_sz)
  2845. ioc->reply_free[i] = cpu_to_le32(reply_address);
  2846. /* initialize Reply Post Free Queue */
  2847. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  2848. ioc->reply_post_free[i].Words = ULLONG_MAX;
  2849. r = _base_send_ioc_init(ioc, VF_ID, sleep_flag);
  2850. if (r)
  2851. return r;
  2852. /* initialize the index's */
  2853. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  2854. ioc->reply_post_host_index = 0;
  2855. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  2856. writel(0, &ioc->chip->ReplyPostHostIndex);
  2857. _base_unmask_interrupts(ioc);
  2858. r = _base_event_notification(ioc, VF_ID, sleep_flag);
  2859. if (r)
  2860. return r;
  2861. if (sleep_flag == CAN_SLEEP)
  2862. _base_static_config_pages(ioc);
  2863. r = _base_send_port_enable(ioc, VF_ID, sleep_flag);
  2864. if (r)
  2865. return r;
  2866. return r;
  2867. }
  2868. /**
  2869. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  2870. * @ioc: per adapter object
  2871. *
  2872. * Return nothing.
  2873. */
  2874. void
  2875. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  2876. {
  2877. struct pci_dev *pdev = ioc->pdev;
  2878. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2879. __func__));
  2880. _base_mask_interrupts(ioc);
  2881. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  2882. if (ioc->pci_irq) {
  2883. synchronize_irq(pdev->irq);
  2884. free_irq(ioc->pci_irq, ioc);
  2885. }
  2886. _base_disable_msix(ioc);
  2887. if (ioc->chip_phys)
  2888. iounmap(ioc->chip);
  2889. ioc->pci_irq = -1;
  2890. ioc->chip_phys = 0;
  2891. pci_release_selected_regions(ioc->pdev, ioc->bars);
  2892. pci_disable_device(pdev);
  2893. return;
  2894. }
  2895. /**
  2896. * mpt2sas_base_attach - attach controller instance
  2897. * @ioc: per adapter object
  2898. *
  2899. * Returns 0 for success, non-zero for failure.
  2900. */
  2901. int
  2902. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  2903. {
  2904. int r, i;
  2905. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2906. __func__));
  2907. r = mpt2sas_base_map_resources(ioc);
  2908. if (r)
  2909. return r;
  2910. pci_set_drvdata(ioc->pdev, ioc->shost);
  2911. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  2912. if (r)
  2913. goto out_free_resources;
  2914. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  2915. if (r)
  2916. goto out_free_resources;
  2917. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  2918. if (r)
  2919. goto out_free_resources;
  2920. init_waitqueue_head(&ioc->reset_wq);
  2921. /* base internal command bits */
  2922. mutex_init(&ioc->base_cmds.mutex);
  2923. init_completion(&ioc->base_cmds.done);
  2924. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2925. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2926. /* transport internal command bits */
  2927. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2928. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  2929. mutex_init(&ioc->transport_cmds.mutex);
  2930. init_completion(&ioc->transport_cmds.done);
  2931. /* task management internal command bits */
  2932. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2933. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  2934. mutex_init(&ioc->tm_cmds.mutex);
  2935. init_completion(&ioc->tm_cmds.done);
  2936. /* config page internal command bits */
  2937. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2938. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  2939. mutex_init(&ioc->config_cmds.mutex);
  2940. init_completion(&ioc->config_cmds.done);
  2941. /* ctl module internal command bits */
  2942. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2943. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  2944. mutex_init(&ioc->ctl_cmds.mutex);
  2945. init_completion(&ioc->ctl_cmds.done);
  2946. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2947. ioc->event_masks[i] = -1;
  2948. /* here we enable the events we care about */
  2949. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  2950. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  2951. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  2952. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  2953. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  2954. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  2955. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  2956. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  2957. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  2958. _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
  2959. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  2960. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  2961. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  2962. if (!ioc->pfacts)
  2963. goto out_free_resources;
  2964. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  2965. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  2966. if (r)
  2967. goto out_free_resources;
  2968. }
  2969. r = _base_make_ioc_operational(ioc, 0, CAN_SLEEP);
  2970. if (r)
  2971. goto out_free_resources;
  2972. mpt2sas_base_start_watchdog(ioc);
  2973. return 0;
  2974. out_free_resources:
  2975. ioc->remove_host = 1;
  2976. mpt2sas_base_free_resources(ioc);
  2977. _base_release_memory_pools(ioc);
  2978. pci_set_drvdata(ioc->pdev, NULL);
  2979. kfree(ioc->tm_cmds.reply);
  2980. kfree(ioc->transport_cmds.reply);
  2981. kfree(ioc->config_cmds.reply);
  2982. kfree(ioc->base_cmds.reply);
  2983. kfree(ioc->ctl_cmds.reply);
  2984. kfree(ioc->pfacts);
  2985. ioc->ctl_cmds.reply = NULL;
  2986. ioc->base_cmds.reply = NULL;
  2987. ioc->tm_cmds.reply = NULL;
  2988. ioc->transport_cmds.reply = NULL;
  2989. ioc->config_cmds.reply = NULL;
  2990. ioc->pfacts = NULL;
  2991. return r;
  2992. }
  2993. /**
  2994. * mpt2sas_base_detach - remove controller instance
  2995. * @ioc: per adapter object
  2996. *
  2997. * Return nothing.
  2998. */
  2999. void
  3000. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3001. {
  3002. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3003. __func__));
  3004. mpt2sas_base_stop_watchdog(ioc);
  3005. mpt2sas_base_free_resources(ioc);
  3006. _base_release_memory_pools(ioc);
  3007. pci_set_drvdata(ioc->pdev, NULL);
  3008. kfree(ioc->pfacts);
  3009. kfree(ioc->ctl_cmds.reply);
  3010. kfree(ioc->base_cmds.reply);
  3011. kfree(ioc->tm_cmds.reply);
  3012. kfree(ioc->transport_cmds.reply);
  3013. kfree(ioc->config_cmds.reply);
  3014. }
  3015. /**
  3016. * _base_reset_handler - reset callback handler (for base)
  3017. * @ioc: per adapter object
  3018. * @reset_phase: phase
  3019. *
  3020. * The handler for doing any required cleanup or initialization.
  3021. *
  3022. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3023. * MPT2_IOC_DONE_RESET
  3024. *
  3025. * Return nothing.
  3026. */
  3027. static void
  3028. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3029. {
  3030. switch (reset_phase) {
  3031. case MPT2_IOC_PRE_RESET:
  3032. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3033. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3034. break;
  3035. case MPT2_IOC_AFTER_RESET:
  3036. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3037. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3038. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3039. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3040. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3041. complete(&ioc->transport_cmds.done);
  3042. }
  3043. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3044. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3045. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3046. complete(&ioc->base_cmds.done);
  3047. }
  3048. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3049. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3050. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3051. complete(&ioc->config_cmds.done);
  3052. }
  3053. break;
  3054. case MPT2_IOC_DONE_RESET:
  3055. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3056. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3057. break;
  3058. }
  3059. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3060. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3061. }
  3062. /**
  3063. * _wait_for_commands_to_complete - reset controller
  3064. * @ioc: Pointer to MPT_ADAPTER structure
  3065. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3066. *
  3067. * This function waiting(3s) for all pending commands to complete
  3068. * prior to putting controller in reset.
  3069. */
  3070. static void
  3071. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3072. {
  3073. u32 ioc_state;
  3074. unsigned long flags;
  3075. u16 i;
  3076. ioc->pending_io_count = 0;
  3077. if (sleep_flag != CAN_SLEEP)
  3078. return;
  3079. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3080. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3081. return;
  3082. /* pending command count */
  3083. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3084. for (i = 0; i < ioc->request_depth; i++)
  3085. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3086. ioc->pending_io_count++;
  3087. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3088. if (!ioc->pending_io_count)
  3089. return;
  3090. /* wait for pending commands to complete */
  3091. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
  3092. }
  3093. /**
  3094. * mpt2sas_base_hard_reset_handler - reset controller
  3095. * @ioc: Pointer to MPT_ADAPTER structure
  3096. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3097. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3098. *
  3099. * Returns 0 for success, non-zero for failure.
  3100. */
  3101. int
  3102. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3103. enum reset_type type)
  3104. {
  3105. int r, i;
  3106. unsigned long flags;
  3107. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
  3108. __func__));
  3109. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3110. if (ioc->shost_recovery) {
  3111. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3112. printk(MPT2SAS_ERR_FMT "%s: busy\n",
  3113. ioc->name, __func__);
  3114. return -EBUSY;
  3115. }
  3116. ioc->shost_recovery = 1;
  3117. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3118. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3119. _wait_for_commands_to_complete(ioc, sleep_flag);
  3120. _base_mask_interrupts(ioc);
  3121. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3122. if (r)
  3123. goto out;
  3124. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3125. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++)
  3126. r = _base_make_ioc_operational(ioc, ioc->pfacts[i].VF_ID,
  3127. sleep_flag);
  3128. if (!r)
  3129. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3130. out:
  3131. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
  3132. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3133. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3134. ioc->shost_recovery = 0;
  3135. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3136. if (!r)
  3137. _base_reset_handler(ioc, MPT2_IOC_RUNNING);
  3138. return r;
  3139. }