wmi.c 62 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/skbuff.h>
  18. #include "core.h"
  19. #include "htc.h"
  20. #include "debug.h"
  21. #include "wmi.h"
  22. #include "mac.h"
  23. void ath10k_wmi_flush_tx(struct ath10k *ar)
  24. {
  25. int ret;
  26. lockdep_assert_held(&ar->conf_mutex);
  27. if (ar->state == ATH10K_STATE_WEDGED) {
  28. ath10k_warn("wmi flush skipped - device is wedged anyway\n");
  29. return;
  30. }
  31. ret = wait_event_timeout(ar->wmi.wq,
  32. atomic_read(&ar->wmi.pending_tx_count) == 0,
  33. 5*HZ);
  34. if (atomic_read(&ar->wmi.pending_tx_count) == 0)
  35. return;
  36. if (ret == 0)
  37. ret = -ETIMEDOUT;
  38. if (ret < 0)
  39. ath10k_warn("wmi flush failed (%d)\n", ret);
  40. }
  41. int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
  42. {
  43. int ret;
  44. ret = wait_for_completion_timeout(&ar->wmi.service_ready,
  45. WMI_SERVICE_READY_TIMEOUT_HZ);
  46. return ret;
  47. }
  48. int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
  49. {
  50. int ret;
  51. ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
  52. WMI_UNIFIED_READY_TIMEOUT_HZ);
  53. return ret;
  54. }
  55. static struct sk_buff *ath10k_wmi_alloc_skb(u32 len)
  56. {
  57. struct sk_buff *skb;
  58. u32 round_len = roundup(len, 4);
  59. skb = ath10k_htc_alloc_skb(WMI_SKB_HEADROOM + round_len);
  60. if (!skb)
  61. return NULL;
  62. skb_reserve(skb, WMI_SKB_HEADROOM);
  63. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  64. ath10k_warn("Unaligned WMI skb\n");
  65. skb_put(skb, round_len);
  66. memset(skb->data, 0, round_len);
  67. return skb;
  68. }
  69. static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  70. {
  71. dev_kfree_skb(skb);
  72. if (atomic_sub_return(1, &ar->wmi.pending_tx_count) == 0)
  73. wake_up(&ar->wmi.wq);
  74. }
  75. static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
  76. enum wmi_cmd_id cmd_id)
  77. {
  78. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
  79. struct wmi_cmd_hdr *cmd_hdr;
  80. int ret;
  81. u32 cmd = 0;
  82. if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  83. return -ENOMEM;
  84. cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
  85. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  86. cmd_hdr->cmd_id = __cpu_to_le32(cmd);
  87. memset(skb_cb, 0, sizeof(*skb_cb));
  88. ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
  89. trace_ath10k_wmi_cmd(cmd_id, skb->data, skb->len, ret);
  90. if (ret)
  91. goto err_pull;
  92. return 0;
  93. err_pull:
  94. skb_pull(skb, sizeof(struct wmi_cmd_hdr));
  95. return ret;
  96. }
  97. static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
  98. {
  99. struct wmi_bcn_tx_arg arg = {0};
  100. int ret;
  101. lockdep_assert_held(&arvif->ar->data_lock);
  102. if (arvif->beacon == NULL)
  103. return;
  104. arg.vdev_id = arvif->vdev_id;
  105. arg.tx_rate = 0;
  106. arg.tx_power = 0;
  107. arg.bcn = arvif->beacon->data;
  108. arg.bcn_len = arvif->beacon->len;
  109. ret = ath10k_wmi_beacon_send_nowait(arvif->ar, &arg);
  110. if (ret)
  111. return;
  112. dev_kfree_skb_any(arvif->beacon);
  113. arvif->beacon = NULL;
  114. }
  115. static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
  116. struct ieee80211_vif *vif)
  117. {
  118. struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
  119. ath10k_wmi_tx_beacon_nowait(arvif);
  120. }
  121. static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
  122. {
  123. spin_lock_bh(&ar->data_lock);
  124. ieee80211_iterate_active_interfaces_atomic(ar->hw,
  125. IEEE80211_IFACE_ITER_NORMAL,
  126. ath10k_wmi_tx_beacons_iter,
  127. NULL);
  128. spin_unlock_bh(&ar->data_lock);
  129. }
  130. static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
  131. {
  132. /* try to send pending beacons first. they take priority */
  133. ath10k_wmi_tx_beacons_nowait(ar);
  134. wake_up(&ar->wmi.tx_credits_wq);
  135. }
  136. static int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb,
  137. enum wmi_cmd_id cmd_id)
  138. {
  139. int ret = -EINVAL;
  140. wait_event_timeout(ar->wmi.tx_credits_wq, ({
  141. /* try to send pending beacons first. they take priority */
  142. ath10k_wmi_tx_beacons_nowait(ar);
  143. ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
  144. (ret != -EAGAIN);
  145. }), 3*HZ);
  146. if (ret)
  147. dev_kfree_skb_any(skb);
  148. return ret;
  149. }
  150. static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
  151. {
  152. struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data;
  153. enum wmi_scan_event_type event_type;
  154. enum wmi_scan_completion_reason reason;
  155. u32 freq;
  156. u32 req_id;
  157. u32 scan_id;
  158. u32 vdev_id;
  159. event_type = __le32_to_cpu(event->event_type);
  160. reason = __le32_to_cpu(event->reason);
  161. freq = __le32_to_cpu(event->channel_freq);
  162. req_id = __le32_to_cpu(event->scan_req_id);
  163. scan_id = __le32_to_cpu(event->scan_id);
  164. vdev_id = __le32_to_cpu(event->vdev_id);
  165. ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENTID\n");
  166. ath10k_dbg(ATH10K_DBG_WMI,
  167. "scan event type %d reason %d freq %d req_id %d "
  168. "scan_id %d vdev_id %d\n",
  169. event_type, reason, freq, req_id, scan_id, vdev_id);
  170. spin_lock_bh(&ar->data_lock);
  171. switch (event_type) {
  172. case WMI_SCAN_EVENT_STARTED:
  173. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_STARTED\n");
  174. if (ar->scan.in_progress && ar->scan.is_roc)
  175. ieee80211_ready_on_channel(ar->hw);
  176. complete(&ar->scan.started);
  177. break;
  178. case WMI_SCAN_EVENT_COMPLETED:
  179. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_COMPLETED\n");
  180. switch (reason) {
  181. case WMI_SCAN_REASON_COMPLETED:
  182. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_COMPLETED\n");
  183. break;
  184. case WMI_SCAN_REASON_CANCELLED:
  185. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_CANCELED\n");
  186. break;
  187. case WMI_SCAN_REASON_PREEMPTED:
  188. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_PREEMPTED\n");
  189. break;
  190. case WMI_SCAN_REASON_TIMEDOUT:
  191. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_TIMEDOUT\n");
  192. break;
  193. default:
  194. break;
  195. }
  196. ar->scan_channel = NULL;
  197. if (!ar->scan.in_progress) {
  198. ath10k_warn("no scan requested, ignoring\n");
  199. break;
  200. }
  201. if (ar->scan.is_roc) {
  202. ath10k_offchan_tx_purge(ar);
  203. if (!ar->scan.aborting)
  204. ieee80211_remain_on_channel_expired(ar->hw);
  205. } else {
  206. ieee80211_scan_completed(ar->hw, ar->scan.aborting);
  207. }
  208. del_timer(&ar->scan.timeout);
  209. complete_all(&ar->scan.completed);
  210. ar->scan.in_progress = false;
  211. break;
  212. case WMI_SCAN_EVENT_BSS_CHANNEL:
  213. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_BSS_CHANNEL\n");
  214. ar->scan_channel = NULL;
  215. break;
  216. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  217. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_FOREIGN_CHANNEL\n");
  218. ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
  219. if (ar->scan.in_progress && ar->scan.is_roc &&
  220. ar->scan.roc_freq == freq) {
  221. complete(&ar->scan.on_channel);
  222. }
  223. break;
  224. case WMI_SCAN_EVENT_DEQUEUED:
  225. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_DEQUEUED\n");
  226. break;
  227. case WMI_SCAN_EVENT_PREEMPTED:
  228. ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_PREEMPTED\n");
  229. break;
  230. case WMI_SCAN_EVENT_START_FAILED:
  231. ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_START_FAILED\n");
  232. break;
  233. default:
  234. break;
  235. }
  236. spin_unlock_bh(&ar->data_lock);
  237. return 0;
  238. }
  239. static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
  240. {
  241. enum ieee80211_band band;
  242. switch (phy_mode) {
  243. case MODE_11A:
  244. case MODE_11NA_HT20:
  245. case MODE_11NA_HT40:
  246. case MODE_11AC_VHT20:
  247. case MODE_11AC_VHT40:
  248. case MODE_11AC_VHT80:
  249. band = IEEE80211_BAND_5GHZ;
  250. break;
  251. case MODE_11G:
  252. case MODE_11B:
  253. case MODE_11GONLY:
  254. case MODE_11NG_HT20:
  255. case MODE_11NG_HT40:
  256. case MODE_11AC_VHT20_2G:
  257. case MODE_11AC_VHT40_2G:
  258. case MODE_11AC_VHT80_2G:
  259. default:
  260. band = IEEE80211_BAND_2GHZ;
  261. }
  262. return band;
  263. }
  264. static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
  265. {
  266. u8 rate_idx = 0;
  267. /* rate in Kbps */
  268. switch (rate) {
  269. case 1000:
  270. rate_idx = 0;
  271. break;
  272. case 2000:
  273. rate_idx = 1;
  274. break;
  275. case 5500:
  276. rate_idx = 2;
  277. break;
  278. case 11000:
  279. rate_idx = 3;
  280. break;
  281. case 6000:
  282. rate_idx = 4;
  283. break;
  284. case 9000:
  285. rate_idx = 5;
  286. break;
  287. case 12000:
  288. rate_idx = 6;
  289. break;
  290. case 18000:
  291. rate_idx = 7;
  292. break;
  293. case 24000:
  294. rate_idx = 8;
  295. break;
  296. case 36000:
  297. rate_idx = 9;
  298. break;
  299. case 48000:
  300. rate_idx = 10;
  301. break;
  302. case 54000:
  303. rate_idx = 11;
  304. break;
  305. default:
  306. break;
  307. }
  308. if (band == IEEE80211_BAND_5GHZ) {
  309. if (rate_idx > 3)
  310. /* Omit CCK rates */
  311. rate_idx -= 4;
  312. else
  313. rate_idx = 0;
  314. }
  315. return rate_idx;
  316. }
  317. static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
  318. {
  319. struct wmi_mgmt_rx_event_v1 *ev_v1;
  320. struct wmi_mgmt_rx_event_v2 *ev_v2;
  321. struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
  322. struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  323. struct ieee80211_hdr *hdr;
  324. u32 rx_status;
  325. u32 channel;
  326. u32 phy_mode;
  327. u32 snr;
  328. u32 rate;
  329. u32 buf_len;
  330. u16 fc;
  331. int pull_len;
  332. if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
  333. ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
  334. ev_hdr = &ev_v2->hdr.v1;
  335. pull_len = sizeof(*ev_v2);
  336. } else {
  337. ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
  338. ev_hdr = &ev_v1->hdr;
  339. pull_len = sizeof(*ev_v1);
  340. }
  341. channel = __le32_to_cpu(ev_hdr->channel);
  342. buf_len = __le32_to_cpu(ev_hdr->buf_len);
  343. rx_status = __le32_to_cpu(ev_hdr->status);
  344. snr = __le32_to_cpu(ev_hdr->snr);
  345. phy_mode = __le32_to_cpu(ev_hdr->phy_mode);
  346. rate = __le32_to_cpu(ev_hdr->rate);
  347. memset(status, 0, sizeof(*status));
  348. ath10k_dbg(ATH10K_DBG_MGMT,
  349. "event mgmt rx status %08x\n", rx_status);
  350. if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
  351. dev_kfree_skb(skb);
  352. return 0;
  353. }
  354. if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
  355. dev_kfree_skb(skb);
  356. return 0;
  357. }
  358. if (rx_status & WMI_RX_STATUS_ERR_CRC)
  359. status->flag |= RX_FLAG_FAILED_FCS_CRC;
  360. if (rx_status & WMI_RX_STATUS_ERR_MIC)
  361. status->flag |= RX_FLAG_MMIC_ERROR;
  362. status->band = phy_mode_to_band(phy_mode);
  363. status->freq = ieee80211_channel_to_frequency(channel, status->band);
  364. status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
  365. status->rate_idx = get_rate_idx(rate, status->band);
  366. skb_pull(skb, pull_len);
  367. hdr = (struct ieee80211_hdr *)skb->data;
  368. fc = le16_to_cpu(hdr->frame_control);
  369. if (fc & IEEE80211_FCTL_PROTECTED) {
  370. status->flag |= RX_FLAG_DECRYPTED | RX_FLAG_IV_STRIPPED |
  371. RX_FLAG_MMIC_STRIPPED;
  372. hdr->frame_control = __cpu_to_le16(fc &
  373. ~IEEE80211_FCTL_PROTECTED);
  374. }
  375. ath10k_dbg(ATH10K_DBG_MGMT,
  376. "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
  377. skb, skb->len,
  378. fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
  379. ath10k_dbg(ATH10K_DBG_MGMT,
  380. "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
  381. status->freq, status->band, status->signal,
  382. status->rate_idx);
  383. /*
  384. * packets from HTC come aligned to 4byte boundaries
  385. * because they can originally come in along with a trailer
  386. */
  387. skb_trim(skb, buf_len);
  388. ieee80211_rx(ar->hw, skb);
  389. return 0;
  390. }
  391. static int freq_to_idx(struct ath10k *ar, int freq)
  392. {
  393. struct ieee80211_supported_band *sband;
  394. int band, ch, idx = 0;
  395. for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
  396. sband = ar->hw->wiphy->bands[band];
  397. if (!sband)
  398. continue;
  399. for (ch = 0; ch < sband->n_channels; ch++, idx++)
  400. if (sband->channels[ch].center_freq == freq)
  401. goto exit;
  402. }
  403. exit:
  404. return idx;
  405. }
  406. static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
  407. {
  408. struct wmi_chan_info_event *ev;
  409. struct survey_info *survey;
  410. u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
  411. int idx;
  412. ev = (struct wmi_chan_info_event *)skb->data;
  413. err_code = __le32_to_cpu(ev->err_code);
  414. freq = __le32_to_cpu(ev->freq);
  415. cmd_flags = __le32_to_cpu(ev->cmd_flags);
  416. noise_floor = __le32_to_cpu(ev->noise_floor);
  417. rx_clear_count = __le32_to_cpu(ev->rx_clear_count);
  418. cycle_count = __le32_to_cpu(ev->cycle_count);
  419. ath10k_dbg(ATH10K_DBG_WMI,
  420. "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
  421. err_code, freq, cmd_flags, noise_floor, rx_clear_count,
  422. cycle_count);
  423. spin_lock_bh(&ar->data_lock);
  424. if (!ar->scan.in_progress) {
  425. ath10k_warn("chan info event without a scan request?\n");
  426. goto exit;
  427. }
  428. idx = freq_to_idx(ar, freq);
  429. if (idx >= ARRAY_SIZE(ar->survey)) {
  430. ath10k_warn("chan info: invalid frequency %d (idx %d out of bounds)\n",
  431. freq, idx);
  432. goto exit;
  433. }
  434. if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
  435. /* During scanning chan info is reported twice for each
  436. * visited channel. The reported cycle count is global
  437. * and per-channel cycle count must be calculated */
  438. cycle_count -= ar->survey_last_cycle_count;
  439. rx_clear_count -= ar->survey_last_rx_clear_count;
  440. survey = &ar->survey[idx];
  441. survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count);
  442. survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
  443. survey->noise = noise_floor;
  444. survey->filled = SURVEY_INFO_CHANNEL_TIME |
  445. SURVEY_INFO_CHANNEL_TIME_RX |
  446. SURVEY_INFO_NOISE_DBM;
  447. }
  448. ar->survey_last_rx_clear_count = rx_clear_count;
  449. ar->survey_last_cycle_count = cycle_count;
  450. exit:
  451. spin_unlock_bh(&ar->data_lock);
  452. }
  453. static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
  454. {
  455. ath10k_dbg(ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
  456. }
  457. static void ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
  458. {
  459. ath10k_dbg(ATH10K_DBG_WMI, "WMI_DEBUG_MESG_EVENTID\n");
  460. }
  461. static void ath10k_wmi_event_update_stats(struct ath10k *ar,
  462. struct sk_buff *skb)
  463. {
  464. struct wmi_stats_event *ev = (struct wmi_stats_event *)skb->data;
  465. ath10k_dbg(ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
  466. ath10k_debug_read_target_stats(ar, ev);
  467. }
  468. static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar,
  469. struct sk_buff *skb)
  470. {
  471. struct wmi_vdev_start_response_event *ev;
  472. ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
  473. ev = (struct wmi_vdev_start_response_event *)skb->data;
  474. if (WARN_ON(__le32_to_cpu(ev->status)))
  475. return;
  476. complete(&ar->vdev_setup_done);
  477. }
  478. static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar,
  479. struct sk_buff *skb)
  480. {
  481. ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
  482. complete(&ar->vdev_setup_done);
  483. }
  484. static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar,
  485. struct sk_buff *skb)
  486. {
  487. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PEER_STA_KICKOUT_EVENTID\n");
  488. }
  489. /*
  490. * FIXME
  491. *
  492. * We don't report to mac80211 sleep state of connected
  493. * stations. Due to this mac80211 can't fill in TIM IE
  494. * correctly.
  495. *
  496. * I know of no way of getting nullfunc frames that contain
  497. * sleep transition from connected stations - these do not
  498. * seem to be sent from the target to the host. There also
  499. * doesn't seem to be a dedicated event for that. So the
  500. * only way left to do this would be to read tim_bitmap
  501. * during SWBA.
  502. *
  503. * We could probably try using tim_bitmap from SWBA to tell
  504. * mac80211 which stations are asleep and which are not. The
  505. * problem here is calling mac80211 functions so many times
  506. * could take too long and make us miss the time to submit
  507. * the beacon to the target.
  508. *
  509. * So as a workaround we try to extend the TIM IE if there
  510. * is unicast buffered for stations with aid > 7 and fill it
  511. * in ourselves.
  512. */
  513. static void ath10k_wmi_update_tim(struct ath10k *ar,
  514. struct ath10k_vif *arvif,
  515. struct sk_buff *bcn,
  516. struct wmi_bcn_info *bcn_info)
  517. {
  518. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
  519. struct ieee80211_tim_ie *tim;
  520. u8 *ies, *ie;
  521. u8 ie_len, pvm_len;
  522. /* if next SWBA has no tim_changed the tim_bitmap is garbage.
  523. * we must copy the bitmap upon change and reuse it later */
  524. if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) {
  525. int i;
  526. BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
  527. sizeof(bcn_info->tim_info.tim_bitmap));
  528. for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
  529. __le32 t = bcn_info->tim_info.tim_bitmap[i / 4];
  530. u32 v = __le32_to_cpu(t);
  531. arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
  532. }
  533. /* FW reports either length 0 or 16
  534. * so we calculate this on our own */
  535. arvif->u.ap.tim_len = 0;
  536. for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
  537. if (arvif->u.ap.tim_bitmap[i])
  538. arvif->u.ap.tim_len = i;
  539. arvif->u.ap.tim_len++;
  540. }
  541. ies = bcn->data;
  542. ies += ieee80211_hdrlen(hdr->frame_control);
  543. ies += 12; /* fixed parameters */
  544. ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
  545. (u8 *)skb_tail_pointer(bcn) - ies);
  546. if (!ie) {
  547. if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
  548. ath10k_warn("no tim ie found;\n");
  549. return;
  550. }
  551. tim = (void *)ie + 2;
  552. ie_len = ie[1];
  553. pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
  554. if (pvm_len < arvif->u.ap.tim_len) {
  555. int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
  556. int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
  557. void *next_ie = ie + 2 + ie_len;
  558. if (skb_put(bcn, expand_size)) {
  559. memmove(next_ie + expand_size, next_ie, move_size);
  560. ie[1] += expand_size;
  561. ie_len += expand_size;
  562. pvm_len += expand_size;
  563. } else {
  564. ath10k_warn("tim expansion failed\n");
  565. }
  566. }
  567. if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
  568. ath10k_warn("tim pvm length is too great (%d)\n", pvm_len);
  569. return;
  570. }
  571. tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast);
  572. memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
  573. ath10k_dbg(ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
  574. tim->dtim_count, tim->dtim_period,
  575. tim->bitmap_ctrl, pvm_len);
  576. }
  577. static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
  578. struct wmi_p2p_noa_info *noa)
  579. {
  580. struct ieee80211_p2p_noa_attr *noa_attr;
  581. u8 ctwindow_oppps = noa->ctwindow_oppps;
  582. u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
  583. bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
  584. __le16 *noa_attr_len;
  585. u16 attr_len;
  586. u8 noa_descriptors = noa->num_descriptors;
  587. int i;
  588. /* P2P IE */
  589. data[0] = WLAN_EID_VENDOR_SPECIFIC;
  590. data[1] = len - 2;
  591. data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
  592. data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
  593. data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
  594. data[5] = WLAN_OUI_TYPE_WFA_P2P;
  595. /* NOA ATTR */
  596. data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
  597. noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
  598. noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
  599. noa_attr->index = noa->index;
  600. noa_attr->oppps_ctwindow = ctwindow;
  601. if (oppps)
  602. noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
  603. for (i = 0; i < noa_descriptors; i++) {
  604. noa_attr->desc[i].count =
  605. __le32_to_cpu(noa->descriptors[i].type_count);
  606. noa_attr->desc[i].duration = noa->descriptors[i].duration;
  607. noa_attr->desc[i].interval = noa->descriptors[i].interval;
  608. noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
  609. }
  610. attr_len = 2; /* index + oppps_ctwindow */
  611. attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
  612. *noa_attr_len = __cpu_to_le16(attr_len);
  613. }
  614. static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa)
  615. {
  616. u32 len = 0;
  617. u8 noa_descriptors = noa->num_descriptors;
  618. u8 opp_ps_info = noa->ctwindow_oppps;
  619. bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
  620. if (!noa_descriptors && !opps_enabled)
  621. return len;
  622. len += 1 + 1 + 4; /* EID + len + OUI */
  623. len += 1 + 2; /* noa attr + attr len */
  624. len += 1 + 1; /* index + oppps_ctwindow */
  625. len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
  626. return len;
  627. }
  628. static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
  629. struct sk_buff *bcn,
  630. struct wmi_bcn_info *bcn_info)
  631. {
  632. struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info;
  633. u8 *new_data, *old_data = arvif->u.ap.noa_data;
  634. u32 new_len;
  635. if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
  636. return;
  637. ath10k_dbg(ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
  638. if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
  639. new_len = ath10k_p2p_calc_noa_ie_len(noa);
  640. if (!new_len)
  641. goto cleanup;
  642. new_data = kmalloc(new_len, GFP_ATOMIC);
  643. if (!new_data)
  644. goto cleanup;
  645. ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
  646. spin_lock_bh(&ar->data_lock);
  647. arvif->u.ap.noa_data = new_data;
  648. arvif->u.ap.noa_len = new_len;
  649. spin_unlock_bh(&ar->data_lock);
  650. kfree(old_data);
  651. }
  652. if (arvif->u.ap.noa_data)
  653. if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
  654. memcpy(skb_put(bcn, arvif->u.ap.noa_len),
  655. arvif->u.ap.noa_data,
  656. arvif->u.ap.noa_len);
  657. return;
  658. cleanup:
  659. spin_lock_bh(&ar->data_lock);
  660. arvif->u.ap.noa_data = NULL;
  661. arvif->u.ap.noa_len = 0;
  662. spin_unlock_bh(&ar->data_lock);
  663. kfree(old_data);
  664. }
  665. static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
  666. {
  667. struct wmi_host_swba_event *ev;
  668. u32 map;
  669. int i = -1;
  670. struct wmi_bcn_info *bcn_info;
  671. struct ath10k_vif *arvif;
  672. struct sk_buff *bcn;
  673. int vdev_id = 0;
  674. ath10k_dbg(ATH10K_DBG_MGMT, "WMI_HOST_SWBA_EVENTID\n");
  675. ev = (struct wmi_host_swba_event *)skb->data;
  676. map = __le32_to_cpu(ev->vdev_map);
  677. ath10k_dbg(ATH10K_DBG_MGMT, "host swba:\n"
  678. "-vdev map 0x%x\n",
  679. ev->vdev_map);
  680. for (; map; map >>= 1, vdev_id++) {
  681. if (!(map & 0x1))
  682. continue;
  683. i++;
  684. if (i >= WMI_MAX_AP_VDEV) {
  685. ath10k_warn("swba has corrupted vdev map\n");
  686. break;
  687. }
  688. bcn_info = &ev->bcn_info[i];
  689. ath10k_dbg(ATH10K_DBG_MGMT,
  690. "-bcn_info[%d]:\n"
  691. "--tim_len %d\n"
  692. "--tim_mcast %d\n"
  693. "--tim_changed %d\n"
  694. "--tim_num_ps_pending %d\n"
  695. "--tim_bitmap 0x%08x%08x%08x%08x\n",
  696. i,
  697. __le32_to_cpu(bcn_info->tim_info.tim_len),
  698. __le32_to_cpu(bcn_info->tim_info.tim_mcast),
  699. __le32_to_cpu(bcn_info->tim_info.tim_changed),
  700. __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending),
  701. __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]),
  702. __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]),
  703. __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]),
  704. __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0]));
  705. arvif = ath10k_get_arvif(ar, vdev_id);
  706. if (arvif == NULL) {
  707. ath10k_warn("no vif for vdev_id %d found\n", vdev_id);
  708. continue;
  709. }
  710. bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
  711. if (!bcn) {
  712. ath10k_warn("could not get mac80211 beacon\n");
  713. continue;
  714. }
  715. ath10k_tx_h_seq_no(bcn);
  716. ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info);
  717. ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info);
  718. spin_lock_bh(&ar->data_lock);
  719. if (arvif->beacon) {
  720. ath10k_warn("SWBA overrun on vdev %d\n",
  721. arvif->vdev_id);
  722. dev_kfree_skb_any(arvif->beacon);
  723. }
  724. arvif->beacon = bcn;
  725. ath10k_wmi_tx_beacon_nowait(arvif);
  726. spin_unlock_bh(&ar->data_lock);
  727. }
  728. }
  729. static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar,
  730. struct sk_buff *skb)
  731. {
  732. ath10k_dbg(ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
  733. }
  734. static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
  735. {
  736. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PHYERR_EVENTID\n");
  737. }
  738. static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
  739. {
  740. ath10k_dbg(ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
  741. }
  742. static void ath10k_wmi_event_profile_match(struct ath10k *ar,
  743. struct sk_buff *skb)
  744. {
  745. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
  746. }
  747. static void ath10k_wmi_event_debug_print(struct ath10k *ar,
  748. struct sk_buff *skb)
  749. {
  750. ath10k_dbg(ATH10K_DBG_WMI, "WMI_DEBUG_PRINT_EVENTID\n");
  751. }
  752. static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
  753. {
  754. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
  755. }
  756. static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar,
  757. struct sk_buff *skb)
  758. {
  759. ath10k_dbg(ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
  760. }
  761. static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
  762. struct sk_buff *skb)
  763. {
  764. ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
  765. }
  766. static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
  767. struct sk_buff *skb)
  768. {
  769. ath10k_dbg(ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
  770. }
  771. static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar,
  772. struct sk_buff *skb)
  773. {
  774. ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
  775. }
  776. static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar,
  777. struct sk_buff *skb)
  778. {
  779. ath10k_dbg(ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
  780. }
  781. static void ath10k_wmi_event_dcs_interference(struct ath10k *ar,
  782. struct sk_buff *skb)
  783. {
  784. ath10k_dbg(ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
  785. }
  786. static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar,
  787. struct sk_buff *skb)
  788. {
  789. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
  790. }
  791. static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar,
  792. struct sk_buff *skb)
  793. {
  794. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
  795. }
  796. static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
  797. struct sk_buff *skb)
  798. {
  799. ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
  800. }
  801. static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar,
  802. struct sk_buff *skb)
  803. {
  804. ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
  805. }
  806. static void ath10k_wmi_event_delba_complete(struct ath10k *ar,
  807. struct sk_buff *skb)
  808. {
  809. ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
  810. }
  811. static void ath10k_wmi_event_addba_complete(struct ath10k *ar,
  812. struct sk_buff *skb)
  813. {
  814. ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
  815. }
  816. static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
  817. struct sk_buff *skb)
  818. {
  819. ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
  820. }
  821. static void ath10k_wmi_service_ready_event_rx(struct ath10k *ar,
  822. struct sk_buff *skb)
  823. {
  824. struct wmi_service_ready_event *ev = (void *)skb->data;
  825. if (skb->len < sizeof(*ev)) {
  826. ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
  827. skb->len, sizeof(*ev));
  828. return;
  829. }
  830. ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
  831. ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
  832. ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
  833. ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
  834. ar->fw_version_major =
  835. (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
  836. ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
  837. ar->fw_version_release =
  838. (__le32_to_cpu(ev->sw_version_1) & 0xffff0000) >> 16;
  839. ar->fw_version_build = (__le32_to_cpu(ev->sw_version_1) & 0x0000ffff);
  840. ar->phy_capability = __le32_to_cpu(ev->phy_capability);
  841. ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
  842. if (ar->fw_version_build > 636)
  843. set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
  844. if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
  845. ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
  846. ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
  847. ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
  848. }
  849. ar->ath_common.regulatory.current_rd =
  850. __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
  851. ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
  852. sizeof(ev->wmi_service_bitmap));
  853. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  854. snprintf(ar->hw->wiphy->fw_version,
  855. sizeof(ar->hw->wiphy->fw_version),
  856. "%u.%u.%u.%u",
  857. ar->fw_version_major,
  858. ar->fw_version_minor,
  859. ar->fw_version_release,
  860. ar->fw_version_build);
  861. }
  862. /* FIXME: it probably should be better to support this */
  863. if (__le32_to_cpu(ev->num_mem_reqs) > 0) {
  864. ath10k_warn("target requested %d memory chunks; ignoring\n",
  865. __le32_to_cpu(ev->num_mem_reqs));
  866. }
  867. ath10k_dbg(ATH10K_DBG_WMI,
  868. "wmi event service ready sw_ver 0x%08x sw_ver1 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
  869. __le32_to_cpu(ev->sw_version),
  870. __le32_to_cpu(ev->sw_version_1),
  871. __le32_to_cpu(ev->abi_version),
  872. __le32_to_cpu(ev->phy_capability),
  873. __le32_to_cpu(ev->ht_cap_info),
  874. __le32_to_cpu(ev->vht_cap_info),
  875. __le32_to_cpu(ev->vht_supp_mcs),
  876. __le32_to_cpu(ev->sys_cap_info),
  877. __le32_to_cpu(ev->num_mem_reqs),
  878. __le32_to_cpu(ev->num_rf_chains));
  879. complete(&ar->wmi.service_ready);
  880. }
  881. static int ath10k_wmi_ready_event_rx(struct ath10k *ar, struct sk_buff *skb)
  882. {
  883. struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data;
  884. if (WARN_ON(skb->len < sizeof(*ev)))
  885. return -EINVAL;
  886. memcpy(ar->mac_addr, ev->mac_addr.addr, ETH_ALEN);
  887. ath10k_dbg(ATH10K_DBG_WMI,
  888. "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
  889. __le32_to_cpu(ev->sw_version),
  890. __le32_to_cpu(ev->abi_version),
  891. ev->mac_addr.addr,
  892. __le32_to_cpu(ev->status));
  893. complete(&ar->wmi.unified_ready);
  894. return 0;
  895. }
  896. static void ath10k_wmi_event_process(struct ath10k *ar, struct sk_buff *skb)
  897. {
  898. struct wmi_cmd_hdr *cmd_hdr;
  899. enum wmi_event_id id;
  900. u16 len;
  901. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  902. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  903. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  904. return;
  905. len = skb->len;
  906. trace_ath10k_wmi_event(id, skb->data, skb->len);
  907. switch (id) {
  908. case WMI_MGMT_RX_EVENTID:
  909. ath10k_wmi_event_mgmt_rx(ar, skb);
  910. /* mgmt_rx() owns the skb now! */
  911. return;
  912. case WMI_SCAN_EVENTID:
  913. ath10k_wmi_event_scan(ar, skb);
  914. break;
  915. case WMI_CHAN_INFO_EVENTID:
  916. ath10k_wmi_event_chan_info(ar, skb);
  917. break;
  918. case WMI_ECHO_EVENTID:
  919. ath10k_wmi_event_echo(ar, skb);
  920. break;
  921. case WMI_DEBUG_MESG_EVENTID:
  922. ath10k_wmi_event_debug_mesg(ar, skb);
  923. break;
  924. case WMI_UPDATE_STATS_EVENTID:
  925. ath10k_wmi_event_update_stats(ar, skb);
  926. break;
  927. case WMI_VDEV_START_RESP_EVENTID:
  928. ath10k_wmi_event_vdev_start_resp(ar, skb);
  929. break;
  930. case WMI_VDEV_STOPPED_EVENTID:
  931. ath10k_wmi_event_vdev_stopped(ar, skb);
  932. break;
  933. case WMI_PEER_STA_KICKOUT_EVENTID:
  934. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  935. break;
  936. case WMI_HOST_SWBA_EVENTID:
  937. ath10k_wmi_event_host_swba(ar, skb);
  938. break;
  939. case WMI_TBTTOFFSET_UPDATE_EVENTID:
  940. ath10k_wmi_event_tbttoffset_update(ar, skb);
  941. break;
  942. case WMI_PHYERR_EVENTID:
  943. ath10k_wmi_event_phyerr(ar, skb);
  944. break;
  945. case WMI_ROAM_EVENTID:
  946. ath10k_wmi_event_roam(ar, skb);
  947. break;
  948. case WMI_PROFILE_MATCH:
  949. ath10k_wmi_event_profile_match(ar, skb);
  950. break;
  951. case WMI_DEBUG_PRINT_EVENTID:
  952. ath10k_wmi_event_debug_print(ar, skb);
  953. break;
  954. case WMI_PDEV_QVIT_EVENTID:
  955. ath10k_wmi_event_pdev_qvit(ar, skb);
  956. break;
  957. case WMI_WLAN_PROFILE_DATA_EVENTID:
  958. ath10k_wmi_event_wlan_profile_data(ar, skb);
  959. break;
  960. case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
  961. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  962. break;
  963. case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
  964. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  965. break;
  966. case WMI_RTT_ERROR_REPORT_EVENTID:
  967. ath10k_wmi_event_rtt_error_report(ar, skb);
  968. break;
  969. case WMI_WOW_WAKEUP_HOST_EVENTID:
  970. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  971. break;
  972. case WMI_DCS_INTERFERENCE_EVENTID:
  973. ath10k_wmi_event_dcs_interference(ar, skb);
  974. break;
  975. case WMI_PDEV_TPC_CONFIG_EVENTID:
  976. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  977. break;
  978. case WMI_PDEV_FTM_INTG_EVENTID:
  979. ath10k_wmi_event_pdev_ftm_intg(ar, skb);
  980. break;
  981. case WMI_GTK_OFFLOAD_STATUS_EVENTID:
  982. ath10k_wmi_event_gtk_offload_status(ar, skb);
  983. break;
  984. case WMI_GTK_REKEY_FAIL_EVENTID:
  985. ath10k_wmi_event_gtk_rekey_fail(ar, skb);
  986. break;
  987. case WMI_TX_DELBA_COMPLETE_EVENTID:
  988. ath10k_wmi_event_delba_complete(ar, skb);
  989. break;
  990. case WMI_TX_ADDBA_COMPLETE_EVENTID:
  991. ath10k_wmi_event_addba_complete(ar, skb);
  992. break;
  993. case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
  994. ath10k_wmi_event_vdev_install_key_complete(ar, skb);
  995. break;
  996. case WMI_SERVICE_READY_EVENTID:
  997. ath10k_wmi_service_ready_event_rx(ar, skb);
  998. break;
  999. case WMI_READY_EVENTID:
  1000. ath10k_wmi_ready_event_rx(ar, skb);
  1001. break;
  1002. default:
  1003. ath10k_warn("Unknown eventid: %d\n", id);
  1004. break;
  1005. }
  1006. dev_kfree_skb(skb);
  1007. }
  1008. static void ath10k_wmi_event_work(struct work_struct *work)
  1009. {
  1010. struct ath10k *ar = container_of(work, struct ath10k,
  1011. wmi.wmi_event_work);
  1012. struct sk_buff *skb;
  1013. for (;;) {
  1014. skb = skb_dequeue(&ar->wmi.wmi_event_list);
  1015. if (!skb)
  1016. break;
  1017. ath10k_wmi_event_process(ar, skb);
  1018. }
  1019. }
  1020. static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
  1021. {
  1022. struct wmi_cmd_hdr *cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  1023. enum wmi_event_id event_id;
  1024. event_id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  1025. /* some events require to be handled ASAP
  1026. * thus can't be defered to a worker thread */
  1027. switch (event_id) {
  1028. case WMI_MGMT_RX_EVENTID:
  1029. case WMI_HOST_SWBA_EVENTID:
  1030. ath10k_wmi_event_process(ar, skb);
  1031. return;
  1032. default:
  1033. break;
  1034. }
  1035. skb_queue_tail(&ar->wmi.wmi_event_list, skb);
  1036. queue_work(ar->workqueue, &ar->wmi.wmi_event_work);
  1037. }
  1038. /* WMI Initialization functions */
  1039. int ath10k_wmi_attach(struct ath10k *ar)
  1040. {
  1041. init_completion(&ar->wmi.service_ready);
  1042. init_completion(&ar->wmi.unified_ready);
  1043. init_waitqueue_head(&ar->wmi.wq);
  1044. init_waitqueue_head(&ar->wmi.tx_credits_wq);
  1045. skb_queue_head_init(&ar->wmi.wmi_event_list);
  1046. INIT_WORK(&ar->wmi.wmi_event_work, ath10k_wmi_event_work);
  1047. return 0;
  1048. }
  1049. void ath10k_wmi_detach(struct ath10k *ar)
  1050. {
  1051. /* HTC should've drained the packets already */
  1052. if (WARN_ON(atomic_read(&ar->wmi.pending_tx_count) > 0))
  1053. ath10k_warn("there are still pending packets\n");
  1054. cancel_work_sync(&ar->wmi.wmi_event_work);
  1055. skb_queue_purge(&ar->wmi.wmi_event_list);
  1056. }
  1057. int ath10k_wmi_connect_htc_service(struct ath10k *ar)
  1058. {
  1059. int status;
  1060. struct ath10k_htc_svc_conn_req conn_req;
  1061. struct ath10k_htc_svc_conn_resp conn_resp;
  1062. memset(&conn_req, 0, sizeof(conn_req));
  1063. memset(&conn_resp, 0, sizeof(conn_resp));
  1064. /* these fields are the same for all service endpoints */
  1065. conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
  1066. conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
  1067. conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
  1068. /* connect to control service */
  1069. conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
  1070. status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
  1071. if (status) {
  1072. ath10k_warn("failed to connect to WMI CONTROL service status: %d\n",
  1073. status);
  1074. return status;
  1075. }
  1076. ar->wmi.eid = conn_resp.eid;
  1077. return 0;
  1078. }
  1079. int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g,
  1080. u16 rd5g, u16 ctl2g, u16 ctl5g)
  1081. {
  1082. struct wmi_pdev_set_regdomain_cmd *cmd;
  1083. struct sk_buff *skb;
  1084. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1085. if (!skb)
  1086. return -ENOMEM;
  1087. cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
  1088. cmd->reg_domain = __cpu_to_le32(rd);
  1089. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  1090. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  1091. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  1092. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  1093. ath10k_dbg(ATH10K_DBG_WMI,
  1094. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
  1095. rd, rd2g, rd5g, ctl2g, ctl5g);
  1096. return ath10k_wmi_cmd_send(ar, skb, WMI_PDEV_SET_REGDOMAIN_CMDID);
  1097. }
  1098. int ath10k_wmi_pdev_set_channel(struct ath10k *ar,
  1099. const struct wmi_channel_arg *arg)
  1100. {
  1101. struct wmi_set_channel_cmd *cmd;
  1102. struct sk_buff *skb;
  1103. if (arg->passive)
  1104. return -EINVAL;
  1105. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1106. if (!skb)
  1107. return -ENOMEM;
  1108. cmd = (struct wmi_set_channel_cmd *)skb->data;
  1109. cmd->chan.mhz = __cpu_to_le32(arg->freq);
  1110. cmd->chan.band_center_freq1 = __cpu_to_le32(arg->freq);
  1111. cmd->chan.mode = arg->mode;
  1112. cmd->chan.min_power = arg->min_power;
  1113. cmd->chan.max_power = arg->max_power;
  1114. cmd->chan.reg_power = arg->max_reg_power;
  1115. cmd->chan.reg_classid = arg->reg_class_id;
  1116. cmd->chan.antenna_max = arg->max_antenna_gain;
  1117. ath10k_dbg(ATH10K_DBG_WMI,
  1118. "wmi set channel mode %d freq %d\n",
  1119. arg->mode, arg->freq);
  1120. return ath10k_wmi_cmd_send(ar, skb, WMI_PDEV_SET_CHANNEL_CMDID);
  1121. }
  1122. int ath10k_wmi_pdev_suspend_target(struct ath10k *ar)
  1123. {
  1124. struct wmi_pdev_suspend_cmd *cmd;
  1125. struct sk_buff *skb;
  1126. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1127. if (!skb)
  1128. return -ENOMEM;
  1129. cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
  1130. cmd->suspend_opt = WMI_PDEV_SUSPEND;
  1131. return ath10k_wmi_cmd_send(ar, skb, WMI_PDEV_SUSPEND_CMDID);
  1132. }
  1133. int ath10k_wmi_pdev_resume_target(struct ath10k *ar)
  1134. {
  1135. struct sk_buff *skb;
  1136. skb = ath10k_wmi_alloc_skb(0);
  1137. if (skb == NULL)
  1138. return -ENOMEM;
  1139. return ath10k_wmi_cmd_send(ar, skb, WMI_PDEV_RESUME_CMDID);
  1140. }
  1141. int ath10k_wmi_pdev_set_param(struct ath10k *ar, enum wmi_pdev_param id,
  1142. u32 value)
  1143. {
  1144. struct wmi_pdev_set_param_cmd *cmd;
  1145. struct sk_buff *skb;
  1146. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1147. if (!skb)
  1148. return -ENOMEM;
  1149. cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
  1150. cmd->param_id = __cpu_to_le32(id);
  1151. cmd->param_value = __cpu_to_le32(value);
  1152. ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
  1153. id, value);
  1154. return ath10k_wmi_cmd_send(ar, skb, WMI_PDEV_SET_PARAM_CMDID);
  1155. }
  1156. int ath10k_wmi_cmd_init(struct ath10k *ar)
  1157. {
  1158. struct wmi_init_cmd *cmd;
  1159. struct sk_buff *buf;
  1160. struct wmi_resource_config config = {};
  1161. u32 val;
  1162. config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
  1163. config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS + TARGET_NUM_VDEVS);
  1164. config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
  1165. config.num_offload_reorder_bufs =
  1166. __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
  1167. config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
  1168. config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
  1169. config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
  1170. config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
  1171. config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
  1172. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  1173. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  1174. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  1175. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
  1176. config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
  1177. config.scan_max_pending_reqs =
  1178. __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
  1179. config.bmiss_offload_max_vdev =
  1180. __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
  1181. config.roam_offload_max_vdev =
  1182. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
  1183. config.roam_offload_max_ap_profiles =
  1184. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
  1185. config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
  1186. config.num_mcast_table_elems =
  1187. __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
  1188. config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
  1189. config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
  1190. config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
  1191. config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
  1192. config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
  1193. val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  1194. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  1195. config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
  1196. config.gtk_offload_max_vdev =
  1197. __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
  1198. config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
  1199. config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
  1200. buf = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1201. if (!buf)
  1202. return -ENOMEM;
  1203. cmd = (struct wmi_init_cmd *)buf->data;
  1204. cmd->num_host_mem_chunks = 0;
  1205. memcpy(&cmd->resource_config, &config, sizeof(config));
  1206. ath10k_dbg(ATH10K_DBG_WMI, "wmi init\n");
  1207. return ath10k_wmi_cmd_send(ar, buf, WMI_INIT_CMDID);
  1208. }
  1209. static int ath10k_wmi_start_scan_calc_len(const struct wmi_start_scan_arg *arg)
  1210. {
  1211. int len;
  1212. len = sizeof(struct wmi_start_scan_cmd);
  1213. if (arg->ie_len) {
  1214. if (!arg->ie)
  1215. return -EINVAL;
  1216. if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
  1217. return -EINVAL;
  1218. len += sizeof(struct wmi_ie_data);
  1219. len += roundup(arg->ie_len, 4);
  1220. }
  1221. if (arg->n_channels) {
  1222. if (!arg->channels)
  1223. return -EINVAL;
  1224. if (arg->n_channels > ARRAY_SIZE(arg->channels))
  1225. return -EINVAL;
  1226. len += sizeof(struct wmi_chan_list);
  1227. len += sizeof(__le32) * arg->n_channels;
  1228. }
  1229. if (arg->n_ssids) {
  1230. if (!arg->ssids)
  1231. return -EINVAL;
  1232. if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
  1233. return -EINVAL;
  1234. len += sizeof(struct wmi_ssid_list);
  1235. len += sizeof(struct wmi_ssid) * arg->n_ssids;
  1236. }
  1237. if (arg->n_bssids) {
  1238. if (!arg->bssids)
  1239. return -EINVAL;
  1240. if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
  1241. return -EINVAL;
  1242. len += sizeof(struct wmi_bssid_list);
  1243. len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  1244. }
  1245. return len;
  1246. }
  1247. int ath10k_wmi_start_scan(struct ath10k *ar,
  1248. const struct wmi_start_scan_arg *arg)
  1249. {
  1250. struct wmi_start_scan_cmd *cmd;
  1251. struct sk_buff *skb;
  1252. struct wmi_ie_data *ie;
  1253. struct wmi_chan_list *channels;
  1254. struct wmi_ssid_list *ssids;
  1255. struct wmi_bssid_list *bssids;
  1256. u32 scan_id;
  1257. u32 scan_req_id;
  1258. int off;
  1259. int len = 0;
  1260. int i;
  1261. len = ath10k_wmi_start_scan_calc_len(arg);
  1262. if (len < 0)
  1263. return len; /* len contains error code here */
  1264. skb = ath10k_wmi_alloc_skb(len);
  1265. if (!skb)
  1266. return -ENOMEM;
  1267. scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
  1268. scan_id |= arg->scan_id;
  1269. scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  1270. scan_req_id |= arg->scan_req_id;
  1271. cmd = (struct wmi_start_scan_cmd *)skb->data;
  1272. cmd->scan_id = __cpu_to_le32(scan_id);
  1273. cmd->scan_req_id = __cpu_to_le32(scan_req_id);
  1274. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  1275. cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
  1276. cmd->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
  1277. cmd->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
  1278. cmd->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
  1279. cmd->min_rest_time = __cpu_to_le32(arg->min_rest_time);
  1280. cmd->max_rest_time = __cpu_to_le32(arg->max_rest_time);
  1281. cmd->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
  1282. cmd->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
  1283. cmd->idle_time = __cpu_to_le32(arg->idle_time);
  1284. cmd->max_scan_time = __cpu_to_le32(arg->max_scan_time);
  1285. cmd->probe_delay = __cpu_to_le32(arg->probe_delay);
  1286. cmd->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
  1287. /* TLV list starts after fields included in the struct */
  1288. off = sizeof(*cmd);
  1289. if (arg->n_channels) {
  1290. channels = (void *)skb->data + off;
  1291. channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
  1292. channels->num_chan = __cpu_to_le32(arg->n_channels);
  1293. for (i = 0; i < arg->n_channels; i++)
  1294. channels->channel_list[i] =
  1295. __cpu_to_le32(arg->channels[i]);
  1296. off += sizeof(*channels);
  1297. off += sizeof(__le32) * arg->n_channels;
  1298. }
  1299. if (arg->n_ssids) {
  1300. ssids = (void *)skb->data + off;
  1301. ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
  1302. ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
  1303. for (i = 0; i < arg->n_ssids; i++) {
  1304. ssids->ssids[i].ssid_len =
  1305. __cpu_to_le32(arg->ssids[i].len);
  1306. memcpy(&ssids->ssids[i].ssid,
  1307. arg->ssids[i].ssid,
  1308. arg->ssids[i].len);
  1309. }
  1310. off += sizeof(*ssids);
  1311. off += sizeof(struct wmi_ssid) * arg->n_ssids;
  1312. }
  1313. if (arg->n_bssids) {
  1314. bssids = (void *)skb->data + off;
  1315. bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
  1316. bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
  1317. for (i = 0; i < arg->n_bssids; i++)
  1318. memcpy(&bssids->bssid_list[i],
  1319. arg->bssids[i].bssid,
  1320. ETH_ALEN);
  1321. off += sizeof(*bssids);
  1322. off += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  1323. }
  1324. if (arg->ie_len) {
  1325. ie = (void *)skb->data + off;
  1326. ie->tag = __cpu_to_le32(WMI_IE_TAG);
  1327. ie->ie_len = __cpu_to_le32(arg->ie_len);
  1328. memcpy(ie->ie_data, arg->ie, arg->ie_len);
  1329. off += sizeof(*ie);
  1330. off += roundup(arg->ie_len, 4);
  1331. }
  1332. if (off != skb->len) {
  1333. dev_kfree_skb(skb);
  1334. return -EINVAL;
  1335. }
  1336. ath10k_dbg(ATH10K_DBG_WMI, "wmi start scan\n");
  1337. return ath10k_wmi_cmd_send(ar, skb, WMI_START_SCAN_CMDID);
  1338. }
  1339. void ath10k_wmi_start_scan_init(struct ath10k *ar,
  1340. struct wmi_start_scan_arg *arg)
  1341. {
  1342. /* setup commonly used values */
  1343. arg->scan_req_id = 1;
  1344. arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
  1345. arg->dwell_time_active = 50;
  1346. arg->dwell_time_passive = 150;
  1347. arg->min_rest_time = 50;
  1348. arg->max_rest_time = 500;
  1349. arg->repeat_probe_time = 0;
  1350. arg->probe_spacing_time = 0;
  1351. arg->idle_time = 0;
  1352. arg->max_scan_time = 5000;
  1353. arg->probe_delay = 5;
  1354. arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
  1355. | WMI_SCAN_EVENT_COMPLETED
  1356. | WMI_SCAN_EVENT_BSS_CHANNEL
  1357. | WMI_SCAN_EVENT_FOREIGN_CHANNEL
  1358. | WMI_SCAN_EVENT_DEQUEUED;
  1359. arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
  1360. arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
  1361. arg->n_bssids = 1;
  1362. arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
  1363. }
  1364. int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg)
  1365. {
  1366. struct wmi_stop_scan_cmd *cmd;
  1367. struct sk_buff *skb;
  1368. u32 scan_id;
  1369. u32 req_id;
  1370. if (arg->req_id > 0xFFF)
  1371. return -EINVAL;
  1372. if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
  1373. return -EINVAL;
  1374. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1375. if (!skb)
  1376. return -ENOMEM;
  1377. scan_id = arg->u.scan_id;
  1378. scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
  1379. req_id = arg->req_id;
  1380. req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  1381. cmd = (struct wmi_stop_scan_cmd *)skb->data;
  1382. cmd->req_type = __cpu_to_le32(arg->req_type);
  1383. cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
  1384. cmd->scan_id = __cpu_to_le32(scan_id);
  1385. cmd->scan_req_id = __cpu_to_le32(req_id);
  1386. ath10k_dbg(ATH10K_DBG_WMI,
  1387. "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
  1388. arg->req_id, arg->req_type, arg->u.scan_id);
  1389. return ath10k_wmi_cmd_send(ar, skb, WMI_STOP_SCAN_CMDID);
  1390. }
  1391. int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id,
  1392. enum wmi_vdev_type type,
  1393. enum wmi_vdev_subtype subtype,
  1394. const u8 macaddr[ETH_ALEN])
  1395. {
  1396. struct wmi_vdev_create_cmd *cmd;
  1397. struct sk_buff *skb;
  1398. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1399. if (!skb)
  1400. return -ENOMEM;
  1401. cmd = (struct wmi_vdev_create_cmd *)skb->data;
  1402. cmd->vdev_id = __cpu_to_le32(vdev_id);
  1403. cmd->vdev_type = __cpu_to_le32(type);
  1404. cmd->vdev_subtype = __cpu_to_le32(subtype);
  1405. memcpy(cmd->vdev_macaddr.addr, macaddr, ETH_ALEN);
  1406. ath10k_dbg(ATH10K_DBG_WMI,
  1407. "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
  1408. vdev_id, type, subtype, macaddr);
  1409. return ath10k_wmi_cmd_send(ar, skb, WMI_VDEV_CREATE_CMDID);
  1410. }
  1411. int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id)
  1412. {
  1413. struct wmi_vdev_delete_cmd *cmd;
  1414. struct sk_buff *skb;
  1415. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1416. if (!skb)
  1417. return -ENOMEM;
  1418. cmd = (struct wmi_vdev_delete_cmd *)skb->data;
  1419. cmd->vdev_id = __cpu_to_le32(vdev_id);
  1420. ath10k_dbg(ATH10K_DBG_WMI,
  1421. "WMI vdev delete id %d\n", vdev_id);
  1422. return ath10k_wmi_cmd_send(ar, skb, WMI_VDEV_DELETE_CMDID);
  1423. }
  1424. static int ath10k_wmi_vdev_start_restart(struct ath10k *ar,
  1425. const struct wmi_vdev_start_request_arg *arg,
  1426. enum wmi_cmd_id cmd_id)
  1427. {
  1428. struct wmi_vdev_start_request_cmd *cmd;
  1429. struct sk_buff *skb;
  1430. const char *cmdname;
  1431. u32 flags = 0;
  1432. if (cmd_id != WMI_VDEV_START_REQUEST_CMDID &&
  1433. cmd_id != WMI_VDEV_RESTART_REQUEST_CMDID)
  1434. return -EINVAL;
  1435. if (WARN_ON(arg->ssid && arg->ssid_len == 0))
  1436. return -EINVAL;
  1437. if (WARN_ON(arg->hidden_ssid && !arg->ssid))
  1438. return -EINVAL;
  1439. if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
  1440. return -EINVAL;
  1441. if (cmd_id == WMI_VDEV_START_REQUEST_CMDID)
  1442. cmdname = "start";
  1443. else if (cmd_id == WMI_VDEV_RESTART_REQUEST_CMDID)
  1444. cmdname = "restart";
  1445. else
  1446. return -EINVAL; /* should not happen, we already check cmd_id */
  1447. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1448. if (!skb)
  1449. return -ENOMEM;
  1450. if (arg->hidden_ssid)
  1451. flags |= WMI_VDEV_START_HIDDEN_SSID;
  1452. if (arg->pmf_enabled)
  1453. flags |= WMI_VDEV_START_PMF_ENABLED;
  1454. cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
  1455. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  1456. cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
  1457. cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
  1458. cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
  1459. cmd->flags = __cpu_to_le32(flags);
  1460. cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
  1461. cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
  1462. if (arg->ssid) {
  1463. cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
  1464. memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
  1465. }
  1466. cmd->chan.mhz = __cpu_to_le32(arg->channel.freq);
  1467. cmd->chan.band_center_freq1 =
  1468. __cpu_to_le32(arg->channel.band_center_freq1);
  1469. cmd->chan.mode = arg->channel.mode;
  1470. cmd->chan.min_power = arg->channel.min_power;
  1471. cmd->chan.max_power = arg->channel.max_power;
  1472. cmd->chan.reg_power = arg->channel.max_reg_power;
  1473. cmd->chan.reg_classid = arg->channel.reg_class_id;
  1474. cmd->chan.antenna_max = arg->channel.max_antenna_gain;
  1475. ath10k_dbg(ATH10K_DBG_WMI,
  1476. "wmi vdev %s id 0x%x freq %d, mode %d, ch_flags: 0x%0X,"
  1477. "max_power: %d\n", cmdname, arg->vdev_id, arg->channel.freq,
  1478. arg->channel.mode, flags, arg->channel.max_power);
  1479. return ath10k_wmi_cmd_send(ar, skb, cmd_id);
  1480. }
  1481. int ath10k_wmi_vdev_start(struct ath10k *ar,
  1482. const struct wmi_vdev_start_request_arg *arg)
  1483. {
  1484. return ath10k_wmi_vdev_start_restart(ar, arg,
  1485. WMI_VDEV_START_REQUEST_CMDID);
  1486. }
  1487. int ath10k_wmi_vdev_restart(struct ath10k *ar,
  1488. const struct wmi_vdev_start_request_arg *arg)
  1489. {
  1490. return ath10k_wmi_vdev_start_restart(ar, arg,
  1491. WMI_VDEV_RESTART_REQUEST_CMDID);
  1492. }
  1493. int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id)
  1494. {
  1495. struct wmi_vdev_stop_cmd *cmd;
  1496. struct sk_buff *skb;
  1497. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1498. if (!skb)
  1499. return -ENOMEM;
  1500. cmd = (struct wmi_vdev_stop_cmd *)skb->data;
  1501. cmd->vdev_id = __cpu_to_le32(vdev_id);
  1502. ath10k_dbg(ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
  1503. return ath10k_wmi_cmd_send(ar, skb, WMI_VDEV_STOP_CMDID);
  1504. }
  1505. int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
  1506. {
  1507. struct wmi_vdev_up_cmd *cmd;
  1508. struct sk_buff *skb;
  1509. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1510. if (!skb)
  1511. return -ENOMEM;
  1512. cmd = (struct wmi_vdev_up_cmd *)skb->data;
  1513. cmd->vdev_id = __cpu_to_le32(vdev_id);
  1514. cmd->vdev_assoc_id = __cpu_to_le32(aid);
  1515. memcpy(&cmd->vdev_bssid.addr, bssid, 6);
  1516. ath10k_dbg(ATH10K_DBG_WMI,
  1517. "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
  1518. vdev_id, aid, bssid);
  1519. return ath10k_wmi_cmd_send(ar, skb, WMI_VDEV_UP_CMDID);
  1520. }
  1521. int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id)
  1522. {
  1523. struct wmi_vdev_down_cmd *cmd;
  1524. struct sk_buff *skb;
  1525. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1526. if (!skb)
  1527. return -ENOMEM;
  1528. cmd = (struct wmi_vdev_down_cmd *)skb->data;
  1529. cmd->vdev_id = __cpu_to_le32(vdev_id);
  1530. ath10k_dbg(ATH10K_DBG_WMI,
  1531. "wmi mgmt vdev down id 0x%x\n", vdev_id);
  1532. return ath10k_wmi_cmd_send(ar, skb, WMI_VDEV_DOWN_CMDID);
  1533. }
  1534. int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id,
  1535. enum wmi_vdev_param param_id, u32 param_value)
  1536. {
  1537. struct wmi_vdev_set_param_cmd *cmd;
  1538. struct sk_buff *skb;
  1539. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1540. if (!skb)
  1541. return -ENOMEM;
  1542. cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
  1543. cmd->vdev_id = __cpu_to_le32(vdev_id);
  1544. cmd->param_id = __cpu_to_le32(param_id);
  1545. cmd->param_value = __cpu_to_le32(param_value);
  1546. ath10k_dbg(ATH10K_DBG_WMI,
  1547. "wmi vdev id 0x%x set param %d value %d\n",
  1548. vdev_id, param_id, param_value);
  1549. return ath10k_wmi_cmd_send(ar, skb, WMI_VDEV_SET_PARAM_CMDID);
  1550. }
  1551. int ath10k_wmi_vdev_install_key(struct ath10k *ar,
  1552. const struct wmi_vdev_install_key_arg *arg)
  1553. {
  1554. struct wmi_vdev_install_key_cmd *cmd;
  1555. struct sk_buff *skb;
  1556. if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
  1557. return -EINVAL;
  1558. if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
  1559. return -EINVAL;
  1560. skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->key_len);
  1561. if (!skb)
  1562. return -ENOMEM;
  1563. cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
  1564. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  1565. cmd->key_idx = __cpu_to_le32(arg->key_idx);
  1566. cmd->key_flags = __cpu_to_le32(arg->key_flags);
  1567. cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
  1568. cmd->key_len = __cpu_to_le32(arg->key_len);
  1569. cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
  1570. cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
  1571. if (arg->macaddr)
  1572. memcpy(cmd->peer_macaddr.addr, arg->macaddr, ETH_ALEN);
  1573. if (arg->key_data)
  1574. memcpy(cmd->key_data, arg->key_data, arg->key_len);
  1575. ath10k_dbg(ATH10K_DBG_WMI,
  1576. "wmi vdev install key idx %d cipher %d len %d\n",
  1577. arg->key_idx, arg->key_cipher, arg->key_len);
  1578. return ath10k_wmi_cmd_send(ar, skb, WMI_VDEV_INSTALL_KEY_CMDID);
  1579. }
  1580. int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id,
  1581. const u8 peer_addr[ETH_ALEN])
  1582. {
  1583. struct wmi_peer_create_cmd *cmd;
  1584. struct sk_buff *skb;
  1585. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1586. if (!skb)
  1587. return -ENOMEM;
  1588. cmd = (struct wmi_peer_create_cmd *)skb->data;
  1589. cmd->vdev_id = __cpu_to_le32(vdev_id);
  1590. memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
  1591. ath10k_dbg(ATH10K_DBG_WMI,
  1592. "wmi peer create vdev_id %d peer_addr %pM\n",
  1593. vdev_id, peer_addr);
  1594. return ath10k_wmi_cmd_send(ar, skb, WMI_PEER_CREATE_CMDID);
  1595. }
  1596. int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id,
  1597. const u8 peer_addr[ETH_ALEN])
  1598. {
  1599. struct wmi_peer_delete_cmd *cmd;
  1600. struct sk_buff *skb;
  1601. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1602. if (!skb)
  1603. return -ENOMEM;
  1604. cmd = (struct wmi_peer_delete_cmd *)skb->data;
  1605. cmd->vdev_id = __cpu_to_le32(vdev_id);
  1606. memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
  1607. ath10k_dbg(ATH10K_DBG_WMI,
  1608. "wmi peer delete vdev_id %d peer_addr %pM\n",
  1609. vdev_id, peer_addr);
  1610. return ath10k_wmi_cmd_send(ar, skb, WMI_PEER_DELETE_CMDID);
  1611. }
  1612. int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id,
  1613. const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
  1614. {
  1615. struct wmi_peer_flush_tids_cmd *cmd;
  1616. struct sk_buff *skb;
  1617. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1618. if (!skb)
  1619. return -ENOMEM;
  1620. cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
  1621. cmd->vdev_id = __cpu_to_le32(vdev_id);
  1622. cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
  1623. memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
  1624. ath10k_dbg(ATH10K_DBG_WMI,
  1625. "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
  1626. vdev_id, peer_addr, tid_bitmap);
  1627. return ath10k_wmi_cmd_send(ar, skb, WMI_PEER_FLUSH_TIDS_CMDID);
  1628. }
  1629. int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id,
  1630. const u8 *peer_addr, enum wmi_peer_param param_id,
  1631. u32 param_value)
  1632. {
  1633. struct wmi_peer_set_param_cmd *cmd;
  1634. struct sk_buff *skb;
  1635. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1636. if (!skb)
  1637. return -ENOMEM;
  1638. cmd = (struct wmi_peer_set_param_cmd *)skb->data;
  1639. cmd->vdev_id = __cpu_to_le32(vdev_id);
  1640. cmd->param_id = __cpu_to_le32(param_id);
  1641. cmd->param_value = __cpu_to_le32(param_value);
  1642. memcpy(&cmd->peer_macaddr.addr, peer_addr, 6);
  1643. ath10k_dbg(ATH10K_DBG_WMI,
  1644. "wmi vdev %d peer 0x%pM set param %d value %d\n",
  1645. vdev_id, peer_addr, param_id, param_value);
  1646. return ath10k_wmi_cmd_send(ar, skb, WMI_PEER_SET_PARAM_CMDID);
  1647. }
  1648. int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id,
  1649. enum wmi_sta_ps_mode psmode)
  1650. {
  1651. struct wmi_sta_powersave_mode_cmd *cmd;
  1652. struct sk_buff *skb;
  1653. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1654. if (!skb)
  1655. return -ENOMEM;
  1656. cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
  1657. cmd->vdev_id = __cpu_to_le32(vdev_id);
  1658. cmd->sta_ps_mode = __cpu_to_le32(psmode);
  1659. ath10k_dbg(ATH10K_DBG_WMI,
  1660. "wmi set powersave id 0x%x mode %d\n",
  1661. vdev_id, psmode);
  1662. return ath10k_wmi_cmd_send(ar, skb, WMI_STA_POWERSAVE_MODE_CMDID);
  1663. }
  1664. int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id,
  1665. enum wmi_sta_powersave_param param_id,
  1666. u32 value)
  1667. {
  1668. struct wmi_sta_powersave_param_cmd *cmd;
  1669. struct sk_buff *skb;
  1670. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1671. if (!skb)
  1672. return -ENOMEM;
  1673. cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
  1674. cmd->vdev_id = __cpu_to_le32(vdev_id);
  1675. cmd->param_id = __cpu_to_le32(param_id);
  1676. cmd->param_value = __cpu_to_le32(value);
  1677. ath10k_dbg(ATH10K_DBG_WMI,
  1678. "wmi sta ps param vdev_id 0x%x param %d value %d\n",
  1679. vdev_id, param_id, value);
  1680. return ath10k_wmi_cmd_send(ar, skb, WMI_STA_POWERSAVE_PARAM_CMDID);
  1681. }
  1682. int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  1683. enum wmi_ap_ps_peer_param param_id, u32 value)
  1684. {
  1685. struct wmi_ap_ps_peer_cmd *cmd;
  1686. struct sk_buff *skb;
  1687. if (!mac)
  1688. return -EINVAL;
  1689. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1690. if (!skb)
  1691. return -ENOMEM;
  1692. cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
  1693. cmd->vdev_id = __cpu_to_le32(vdev_id);
  1694. cmd->param_id = __cpu_to_le32(param_id);
  1695. cmd->param_value = __cpu_to_le32(value);
  1696. memcpy(&cmd->peer_macaddr, mac, ETH_ALEN);
  1697. ath10k_dbg(ATH10K_DBG_WMI,
  1698. "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
  1699. vdev_id, param_id, value, mac);
  1700. return ath10k_wmi_cmd_send(ar, skb, WMI_AP_PS_PEER_PARAM_CMDID);
  1701. }
  1702. int ath10k_wmi_scan_chan_list(struct ath10k *ar,
  1703. const struct wmi_scan_chan_list_arg *arg)
  1704. {
  1705. struct wmi_scan_chan_list_cmd *cmd;
  1706. struct sk_buff *skb;
  1707. struct wmi_channel_arg *ch;
  1708. struct wmi_channel *ci;
  1709. int len;
  1710. int i;
  1711. len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
  1712. skb = ath10k_wmi_alloc_skb(len);
  1713. if (!skb)
  1714. return -EINVAL;
  1715. cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
  1716. cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
  1717. for (i = 0; i < arg->n_channels; i++) {
  1718. u32 flags = 0;
  1719. ch = &arg->channels[i];
  1720. ci = &cmd->chan_info[i];
  1721. if (ch->passive)
  1722. flags |= WMI_CHAN_FLAG_PASSIVE;
  1723. if (ch->allow_ibss)
  1724. flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
  1725. if (ch->allow_ht)
  1726. flags |= WMI_CHAN_FLAG_ALLOW_HT;
  1727. if (ch->allow_vht)
  1728. flags |= WMI_CHAN_FLAG_ALLOW_VHT;
  1729. if (ch->ht40plus)
  1730. flags |= WMI_CHAN_FLAG_HT40_PLUS;
  1731. ci->mhz = __cpu_to_le32(ch->freq);
  1732. ci->band_center_freq1 = __cpu_to_le32(ch->freq);
  1733. ci->band_center_freq2 = 0;
  1734. ci->min_power = ch->min_power;
  1735. ci->max_power = ch->max_power;
  1736. ci->reg_power = ch->max_reg_power;
  1737. ci->antenna_max = ch->max_antenna_gain;
  1738. ci->antenna_max = 0;
  1739. /* mode & flags share storage */
  1740. ci->mode = ch->mode;
  1741. ci->flags |= __cpu_to_le32(flags);
  1742. }
  1743. return ath10k_wmi_cmd_send(ar, skb, WMI_SCAN_CHAN_LIST_CMDID);
  1744. }
  1745. int ath10k_wmi_peer_assoc(struct ath10k *ar,
  1746. const struct wmi_peer_assoc_complete_arg *arg)
  1747. {
  1748. struct wmi_peer_assoc_complete_cmd *cmd;
  1749. struct sk_buff *skb;
  1750. if (arg->peer_mpdu_density > 16)
  1751. return -EINVAL;
  1752. if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
  1753. return -EINVAL;
  1754. if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
  1755. return -EINVAL;
  1756. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1757. if (!skb)
  1758. return -ENOMEM;
  1759. cmd = (struct wmi_peer_assoc_complete_cmd *)skb->data;
  1760. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  1761. cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
  1762. cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
  1763. cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
  1764. cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
  1765. cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
  1766. cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
  1767. cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
  1768. cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
  1769. cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
  1770. cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
  1771. cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
  1772. cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
  1773. memcpy(cmd->peer_macaddr.addr, arg->addr, ETH_ALEN);
  1774. cmd->peer_legacy_rates.num_rates =
  1775. __cpu_to_le32(arg->peer_legacy_rates.num_rates);
  1776. memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
  1777. arg->peer_legacy_rates.num_rates);
  1778. cmd->peer_ht_rates.num_rates =
  1779. __cpu_to_le32(arg->peer_ht_rates.num_rates);
  1780. memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
  1781. arg->peer_ht_rates.num_rates);
  1782. cmd->peer_vht_rates.rx_max_rate =
  1783. __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
  1784. cmd->peer_vht_rates.rx_mcs_set =
  1785. __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
  1786. cmd->peer_vht_rates.tx_max_rate =
  1787. __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
  1788. cmd->peer_vht_rates.tx_mcs_set =
  1789. __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
  1790. ath10k_dbg(ATH10K_DBG_WMI,
  1791. "wmi peer assoc vdev %d addr %pM\n",
  1792. arg->vdev_id, arg->addr);
  1793. return ath10k_wmi_cmd_send(ar, skb, WMI_PEER_ASSOC_CMDID);
  1794. }
  1795. int ath10k_wmi_beacon_send_nowait(struct ath10k *ar,
  1796. const struct wmi_bcn_tx_arg *arg)
  1797. {
  1798. struct wmi_bcn_tx_cmd *cmd;
  1799. struct sk_buff *skb;
  1800. skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->bcn_len);
  1801. if (!skb)
  1802. return -ENOMEM;
  1803. cmd = (struct wmi_bcn_tx_cmd *)skb->data;
  1804. cmd->hdr.vdev_id = __cpu_to_le32(arg->vdev_id);
  1805. cmd->hdr.tx_rate = __cpu_to_le32(arg->tx_rate);
  1806. cmd->hdr.tx_power = __cpu_to_le32(arg->tx_power);
  1807. cmd->hdr.bcn_len = __cpu_to_le32(arg->bcn_len);
  1808. memcpy(cmd->bcn, arg->bcn, arg->bcn_len);
  1809. return ath10k_wmi_cmd_send_nowait(ar, skb, WMI_BCN_TX_CMDID);
  1810. }
  1811. static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params,
  1812. const struct wmi_wmm_params_arg *arg)
  1813. {
  1814. params->cwmin = __cpu_to_le32(arg->cwmin);
  1815. params->cwmax = __cpu_to_le32(arg->cwmax);
  1816. params->aifs = __cpu_to_le32(arg->aifs);
  1817. params->txop = __cpu_to_le32(arg->txop);
  1818. params->acm = __cpu_to_le32(arg->acm);
  1819. params->no_ack = __cpu_to_le32(arg->no_ack);
  1820. }
  1821. int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar,
  1822. const struct wmi_pdev_set_wmm_params_arg *arg)
  1823. {
  1824. struct wmi_pdev_set_wmm_params *cmd;
  1825. struct sk_buff *skb;
  1826. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1827. if (!skb)
  1828. return -ENOMEM;
  1829. cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
  1830. ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be);
  1831. ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
  1832. ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
  1833. ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
  1834. ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
  1835. return ath10k_wmi_cmd_send(ar, skb, WMI_PDEV_SET_WMM_PARAMS_CMDID);
  1836. }
  1837. int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id)
  1838. {
  1839. struct wmi_request_stats_cmd *cmd;
  1840. struct sk_buff *skb;
  1841. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1842. if (!skb)
  1843. return -ENOMEM;
  1844. cmd = (struct wmi_request_stats_cmd *)skb->data;
  1845. cmd->stats_id = __cpu_to_le32(stats_id);
  1846. ath10k_dbg(ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id);
  1847. return ath10k_wmi_cmd_send(ar, skb, WMI_REQUEST_STATS_CMDID);
  1848. }
  1849. int ath10k_wmi_force_fw_hang(struct ath10k *ar,
  1850. enum wmi_force_fw_hang_type type, u32 delay_ms)
  1851. {
  1852. struct wmi_force_fw_hang_cmd *cmd;
  1853. struct sk_buff *skb;
  1854. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1855. if (!skb)
  1856. return -ENOMEM;
  1857. cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
  1858. cmd->type = __cpu_to_le32(type);
  1859. cmd->delay_ms = __cpu_to_le32(delay_ms);
  1860. ath10k_dbg(ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
  1861. type, delay_ms);
  1862. return ath10k_wmi_cmd_send(ar, skb, WMI_FORCE_FW_HANG_CMDID);
  1863. }