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- /* Copyright (c) 2010 Code Aurora Forum. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
- #ifndef __ASM_ARCH_MSM_IRQS_8X60_H
- #define __ASM_ARCH_MSM_IRQS_8X60_H
- /* MSM ACPU Interrupt Numbers */
- /* 0-15: STI/SGI (software triggered/generated interrupts)
- * 16-31: PPI (private peripheral interrupts)
- * 32+: SPI (shared peripheral interrupts)
- */
- #define NR_GPIO_IRQS 173
- #define NR_MSM_IRQS 256
- #define NR_BOARD_IRQS 0
- #endif
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