radeon_gem.c 16 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include <drm/drmP.h>
  29. #include <drm/radeon_drm.h>
  30. #include "radeon.h"
  31. int radeon_gem_object_init(struct drm_gem_object *obj)
  32. {
  33. BUG();
  34. return 0;
  35. }
  36. void radeon_gem_object_free(struct drm_gem_object *gobj)
  37. {
  38. struct radeon_bo *robj = gem_to_radeon_bo(gobj);
  39. if (robj) {
  40. if (robj->gem_base.import_attach)
  41. drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
  42. radeon_bo_unref(&robj);
  43. }
  44. }
  45. int radeon_gem_object_create(struct radeon_device *rdev, int size,
  46. int alignment, int initial_domain,
  47. bool discardable, bool kernel,
  48. struct drm_gem_object **obj)
  49. {
  50. struct radeon_bo *robj;
  51. unsigned long max_size;
  52. int r;
  53. *obj = NULL;
  54. /* At least align on page size */
  55. if (alignment < PAGE_SIZE) {
  56. alignment = PAGE_SIZE;
  57. }
  58. /* maximun bo size is the minimun btw visible vram and gtt size */
  59. max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
  60. if (size > max_size) {
  61. printk(KERN_WARNING "%s:%d alloc size %dMb bigger than %ldMb limit\n",
  62. __func__, __LINE__, size >> 20, max_size >> 20);
  63. return -ENOMEM;
  64. }
  65. retry:
  66. r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj);
  67. if (r) {
  68. if (r != -ERESTARTSYS) {
  69. if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
  70. initial_domain |= RADEON_GEM_DOMAIN_GTT;
  71. goto retry;
  72. }
  73. DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
  74. size, initial_domain, alignment, r);
  75. }
  76. return r;
  77. }
  78. *obj = &robj->gem_base;
  79. robj->pid = task_pid_nr(current);
  80. mutex_lock(&rdev->gem.mutex);
  81. list_add_tail(&robj->list, &rdev->gem.objects);
  82. mutex_unlock(&rdev->gem.mutex);
  83. return 0;
  84. }
  85. int radeon_gem_set_domain(struct drm_gem_object *gobj,
  86. uint32_t rdomain, uint32_t wdomain)
  87. {
  88. struct radeon_bo *robj;
  89. uint32_t domain;
  90. int r;
  91. /* FIXME: reeimplement */
  92. robj = gem_to_radeon_bo(gobj);
  93. /* work out where to validate the buffer to */
  94. domain = wdomain;
  95. if (!domain) {
  96. domain = rdomain;
  97. }
  98. if (!domain) {
  99. /* Do nothings */
  100. printk(KERN_WARNING "Set domain without domain !\n");
  101. return 0;
  102. }
  103. if (domain == RADEON_GEM_DOMAIN_CPU) {
  104. /* Asking for cpu access wait for object idle */
  105. r = radeon_bo_wait(robj, NULL, false);
  106. if (r) {
  107. printk(KERN_ERR "Failed to wait for object !\n");
  108. return r;
  109. }
  110. }
  111. return 0;
  112. }
  113. int radeon_gem_init(struct radeon_device *rdev)
  114. {
  115. INIT_LIST_HEAD(&rdev->gem.objects);
  116. return 0;
  117. }
  118. void radeon_gem_fini(struct radeon_device *rdev)
  119. {
  120. radeon_bo_force_delete(rdev);
  121. }
  122. /*
  123. * Call from drm_gem_handle_create which appear in both new and open ioctl
  124. * case.
  125. */
  126. int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
  127. {
  128. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  129. struct radeon_device *rdev = rbo->rdev;
  130. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  131. struct radeon_vm *vm = &fpriv->vm;
  132. struct radeon_bo_va *bo_va;
  133. int r;
  134. if (rdev->family < CHIP_CAYMAN) {
  135. return 0;
  136. }
  137. r = radeon_bo_reserve(rbo, false);
  138. if (r) {
  139. return r;
  140. }
  141. bo_va = radeon_vm_bo_find(vm, rbo);
  142. if (!bo_va) {
  143. bo_va = radeon_vm_bo_add(rdev, vm, rbo);
  144. } else {
  145. ++bo_va->ref_count;
  146. }
  147. radeon_bo_unreserve(rbo);
  148. return 0;
  149. }
  150. void radeon_gem_object_close(struct drm_gem_object *obj,
  151. struct drm_file *file_priv)
  152. {
  153. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  154. struct radeon_device *rdev = rbo->rdev;
  155. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  156. struct radeon_vm *vm = &fpriv->vm;
  157. struct radeon_bo_va *bo_va;
  158. int r;
  159. if (rdev->family < CHIP_CAYMAN) {
  160. return;
  161. }
  162. r = radeon_bo_reserve(rbo, true);
  163. if (r) {
  164. dev_err(rdev->dev, "leaking bo va because "
  165. "we fail to reserve bo (%d)\n", r);
  166. return;
  167. }
  168. bo_va = radeon_vm_bo_find(vm, rbo);
  169. if (bo_va) {
  170. if (--bo_va->ref_count == 0) {
  171. radeon_vm_bo_rmv(rdev, bo_va);
  172. }
  173. }
  174. radeon_bo_unreserve(rbo);
  175. }
  176. static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
  177. {
  178. if (r == -EDEADLK) {
  179. r = radeon_gpu_reset(rdev);
  180. if (!r)
  181. r = -EAGAIN;
  182. }
  183. return r;
  184. }
  185. /*
  186. * GEM ioctls.
  187. */
  188. int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
  189. struct drm_file *filp)
  190. {
  191. struct radeon_device *rdev = dev->dev_private;
  192. struct drm_radeon_gem_info *args = data;
  193. struct ttm_mem_type_manager *man;
  194. unsigned i;
  195. man = &rdev->mman.bdev.man[TTM_PL_VRAM];
  196. args->vram_size = rdev->mc.real_vram_size;
  197. args->vram_visible = (u64)man->size << PAGE_SHIFT;
  198. if (rdev->stollen_vga_memory)
  199. args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
  200. args->vram_visible -= radeon_fbdev_total_size(rdev);
  201. args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
  202. for(i = 0; i < RADEON_NUM_RINGS; ++i)
  203. args->gart_size -= rdev->ring[i].ring_size;
  204. return 0;
  205. }
  206. int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
  207. struct drm_file *filp)
  208. {
  209. /* TODO: implement */
  210. DRM_ERROR("unimplemented %s\n", __func__);
  211. return -ENOSYS;
  212. }
  213. int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
  214. struct drm_file *filp)
  215. {
  216. /* TODO: implement */
  217. DRM_ERROR("unimplemented %s\n", __func__);
  218. return -ENOSYS;
  219. }
  220. int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
  221. struct drm_file *filp)
  222. {
  223. struct radeon_device *rdev = dev->dev_private;
  224. struct drm_radeon_gem_create *args = data;
  225. struct drm_gem_object *gobj;
  226. uint32_t handle;
  227. int r;
  228. down_read(&rdev->exclusive_lock);
  229. /* create a gem object to contain this object in */
  230. args->size = roundup(args->size, PAGE_SIZE);
  231. r = radeon_gem_object_create(rdev, args->size, args->alignment,
  232. args->initial_domain, false,
  233. false, &gobj);
  234. if (r) {
  235. up_read(&rdev->exclusive_lock);
  236. r = radeon_gem_handle_lockup(rdev, r);
  237. return r;
  238. }
  239. r = drm_gem_handle_create(filp, gobj, &handle);
  240. /* drop reference from allocate - handle holds it now */
  241. drm_gem_object_unreference_unlocked(gobj);
  242. if (r) {
  243. up_read(&rdev->exclusive_lock);
  244. r = radeon_gem_handle_lockup(rdev, r);
  245. return r;
  246. }
  247. args->handle = handle;
  248. up_read(&rdev->exclusive_lock);
  249. return 0;
  250. }
  251. int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
  252. struct drm_file *filp)
  253. {
  254. /* transition the BO to a domain -
  255. * just validate the BO into a certain domain */
  256. struct radeon_device *rdev = dev->dev_private;
  257. struct drm_radeon_gem_set_domain *args = data;
  258. struct drm_gem_object *gobj;
  259. struct radeon_bo *robj;
  260. int r;
  261. /* for now if someone requests domain CPU -
  262. * just make sure the buffer is finished with */
  263. down_read(&rdev->exclusive_lock);
  264. /* just do a BO wait for now */
  265. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  266. if (gobj == NULL) {
  267. up_read(&rdev->exclusive_lock);
  268. return -ENOENT;
  269. }
  270. robj = gem_to_radeon_bo(gobj);
  271. r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
  272. drm_gem_object_unreference_unlocked(gobj);
  273. up_read(&rdev->exclusive_lock);
  274. r = radeon_gem_handle_lockup(robj->rdev, r);
  275. return r;
  276. }
  277. int radeon_mode_dumb_mmap(struct drm_file *filp,
  278. struct drm_device *dev,
  279. uint32_t handle, uint64_t *offset_p)
  280. {
  281. struct drm_gem_object *gobj;
  282. struct radeon_bo *robj;
  283. gobj = drm_gem_object_lookup(dev, filp, handle);
  284. if (gobj == NULL) {
  285. return -ENOENT;
  286. }
  287. robj = gem_to_radeon_bo(gobj);
  288. *offset_p = radeon_bo_mmap_offset(robj);
  289. drm_gem_object_unreference_unlocked(gobj);
  290. return 0;
  291. }
  292. int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
  293. struct drm_file *filp)
  294. {
  295. struct drm_radeon_gem_mmap *args = data;
  296. return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
  297. }
  298. int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
  299. struct drm_file *filp)
  300. {
  301. struct radeon_device *rdev = dev->dev_private;
  302. struct drm_radeon_gem_busy *args = data;
  303. struct drm_gem_object *gobj;
  304. struct radeon_bo *robj;
  305. int r;
  306. uint32_t cur_placement = 0;
  307. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  308. if (gobj == NULL) {
  309. return -ENOENT;
  310. }
  311. robj = gem_to_radeon_bo(gobj);
  312. r = radeon_bo_wait(robj, &cur_placement, true);
  313. switch (cur_placement) {
  314. case TTM_PL_VRAM:
  315. args->domain = RADEON_GEM_DOMAIN_VRAM;
  316. break;
  317. case TTM_PL_TT:
  318. args->domain = RADEON_GEM_DOMAIN_GTT;
  319. break;
  320. case TTM_PL_SYSTEM:
  321. args->domain = RADEON_GEM_DOMAIN_CPU;
  322. default:
  323. break;
  324. }
  325. drm_gem_object_unreference_unlocked(gobj);
  326. r = radeon_gem_handle_lockup(rdev, r);
  327. return r;
  328. }
  329. int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
  330. struct drm_file *filp)
  331. {
  332. struct radeon_device *rdev = dev->dev_private;
  333. struct drm_radeon_gem_wait_idle *args = data;
  334. struct drm_gem_object *gobj;
  335. struct radeon_bo *robj;
  336. int r;
  337. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  338. if (gobj == NULL) {
  339. return -ENOENT;
  340. }
  341. robj = gem_to_radeon_bo(gobj);
  342. r = radeon_bo_wait(robj, NULL, false);
  343. /* callback hw specific functions if any */
  344. if (rdev->asic->ioctl_wait_idle)
  345. robj->rdev->asic->ioctl_wait_idle(rdev, robj);
  346. drm_gem_object_unreference_unlocked(gobj);
  347. r = radeon_gem_handle_lockup(rdev, r);
  348. return r;
  349. }
  350. int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
  351. struct drm_file *filp)
  352. {
  353. struct drm_radeon_gem_set_tiling *args = data;
  354. struct drm_gem_object *gobj;
  355. struct radeon_bo *robj;
  356. int r = 0;
  357. DRM_DEBUG("%d \n", args->handle);
  358. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  359. if (gobj == NULL)
  360. return -ENOENT;
  361. robj = gem_to_radeon_bo(gobj);
  362. r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
  363. drm_gem_object_unreference_unlocked(gobj);
  364. return r;
  365. }
  366. int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
  367. struct drm_file *filp)
  368. {
  369. struct drm_radeon_gem_get_tiling *args = data;
  370. struct drm_gem_object *gobj;
  371. struct radeon_bo *rbo;
  372. int r = 0;
  373. DRM_DEBUG("\n");
  374. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  375. if (gobj == NULL)
  376. return -ENOENT;
  377. rbo = gem_to_radeon_bo(gobj);
  378. r = radeon_bo_reserve(rbo, false);
  379. if (unlikely(r != 0))
  380. goto out;
  381. radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
  382. radeon_bo_unreserve(rbo);
  383. out:
  384. drm_gem_object_unreference_unlocked(gobj);
  385. return r;
  386. }
  387. int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
  388. struct drm_file *filp)
  389. {
  390. struct drm_radeon_gem_va *args = data;
  391. struct drm_gem_object *gobj;
  392. struct radeon_device *rdev = dev->dev_private;
  393. struct radeon_fpriv *fpriv = filp->driver_priv;
  394. struct radeon_bo *rbo;
  395. struct radeon_bo_va *bo_va;
  396. u32 invalid_flags;
  397. int r = 0;
  398. if (!rdev->vm_manager.enabled) {
  399. args->operation = RADEON_VA_RESULT_ERROR;
  400. return -ENOTTY;
  401. }
  402. /* !! DONT REMOVE !!
  403. * We don't support vm_id yet, to be sure we don't have have broken
  404. * userspace, reject anyone trying to use non 0 value thus moving
  405. * forward we can use those fields without breaking existant userspace
  406. */
  407. if (args->vm_id) {
  408. args->operation = RADEON_VA_RESULT_ERROR;
  409. return -EINVAL;
  410. }
  411. if (args->offset < RADEON_VA_RESERVED_SIZE) {
  412. dev_err(&dev->pdev->dev,
  413. "offset 0x%lX is in reserved area 0x%X\n",
  414. (unsigned long)args->offset,
  415. RADEON_VA_RESERVED_SIZE);
  416. args->operation = RADEON_VA_RESULT_ERROR;
  417. return -EINVAL;
  418. }
  419. /* don't remove, we need to enforce userspace to set the snooped flag
  420. * otherwise we will endup with broken userspace and we won't be able
  421. * to enable this feature without adding new interface
  422. */
  423. invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
  424. if ((args->flags & invalid_flags)) {
  425. dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
  426. args->flags, invalid_flags);
  427. args->operation = RADEON_VA_RESULT_ERROR;
  428. return -EINVAL;
  429. }
  430. if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
  431. dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n");
  432. args->operation = RADEON_VA_RESULT_ERROR;
  433. return -EINVAL;
  434. }
  435. switch (args->operation) {
  436. case RADEON_VA_MAP:
  437. case RADEON_VA_UNMAP:
  438. break;
  439. default:
  440. dev_err(&dev->pdev->dev, "unsupported operation %d\n",
  441. args->operation);
  442. args->operation = RADEON_VA_RESULT_ERROR;
  443. return -EINVAL;
  444. }
  445. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  446. if (gobj == NULL) {
  447. args->operation = RADEON_VA_RESULT_ERROR;
  448. return -ENOENT;
  449. }
  450. rbo = gem_to_radeon_bo(gobj);
  451. r = radeon_bo_reserve(rbo, false);
  452. if (r) {
  453. args->operation = RADEON_VA_RESULT_ERROR;
  454. drm_gem_object_unreference_unlocked(gobj);
  455. return r;
  456. }
  457. bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
  458. if (!bo_va) {
  459. args->operation = RADEON_VA_RESULT_ERROR;
  460. drm_gem_object_unreference_unlocked(gobj);
  461. return -ENOENT;
  462. }
  463. switch (args->operation) {
  464. case RADEON_VA_MAP:
  465. if (bo_va->soffset) {
  466. args->operation = RADEON_VA_RESULT_VA_EXIST;
  467. args->offset = bo_va->soffset;
  468. goto out;
  469. }
  470. r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
  471. break;
  472. case RADEON_VA_UNMAP:
  473. r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
  474. break;
  475. default:
  476. break;
  477. }
  478. args->operation = RADEON_VA_RESULT_OK;
  479. if (r) {
  480. args->operation = RADEON_VA_RESULT_ERROR;
  481. }
  482. out:
  483. radeon_bo_unreserve(rbo);
  484. drm_gem_object_unreference_unlocked(gobj);
  485. return r;
  486. }
  487. int radeon_mode_dumb_create(struct drm_file *file_priv,
  488. struct drm_device *dev,
  489. struct drm_mode_create_dumb *args)
  490. {
  491. struct radeon_device *rdev = dev->dev_private;
  492. struct drm_gem_object *gobj;
  493. uint32_t handle;
  494. int r;
  495. args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
  496. args->size = args->pitch * args->height;
  497. args->size = ALIGN(args->size, PAGE_SIZE);
  498. r = radeon_gem_object_create(rdev, args->size, 0,
  499. RADEON_GEM_DOMAIN_VRAM,
  500. false, ttm_bo_type_device,
  501. &gobj);
  502. if (r)
  503. return -ENOMEM;
  504. r = drm_gem_handle_create(file_priv, gobj, &handle);
  505. /* drop reference from allocate - handle holds it now */
  506. drm_gem_object_unreference_unlocked(gobj);
  507. if (r) {
  508. return r;
  509. }
  510. args->handle = handle;
  511. return 0;
  512. }
  513. int radeon_mode_dumb_destroy(struct drm_file *file_priv,
  514. struct drm_device *dev,
  515. uint32_t handle)
  516. {
  517. return drm_gem_handle_delete(file_priv, handle);
  518. }
  519. #if defined(CONFIG_DEBUG_FS)
  520. static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
  521. {
  522. struct drm_info_node *node = (struct drm_info_node *)m->private;
  523. struct drm_device *dev = node->minor->dev;
  524. struct radeon_device *rdev = dev->dev_private;
  525. struct radeon_bo *rbo;
  526. unsigned i = 0;
  527. mutex_lock(&rdev->gem.mutex);
  528. list_for_each_entry(rbo, &rdev->gem.objects, list) {
  529. unsigned domain;
  530. const char *placement;
  531. domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
  532. switch (domain) {
  533. case RADEON_GEM_DOMAIN_VRAM:
  534. placement = "VRAM";
  535. break;
  536. case RADEON_GEM_DOMAIN_GTT:
  537. placement = " GTT";
  538. break;
  539. case RADEON_GEM_DOMAIN_CPU:
  540. default:
  541. placement = " CPU";
  542. break;
  543. }
  544. seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
  545. i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
  546. placement, (unsigned long)rbo->pid);
  547. i++;
  548. }
  549. mutex_unlock(&rdev->gem.mutex);
  550. return 0;
  551. }
  552. static struct drm_info_list radeon_debugfs_gem_list[] = {
  553. {"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
  554. };
  555. #endif
  556. int radeon_gem_debugfs_init(struct radeon_device *rdev)
  557. {
  558. #if defined(CONFIG_DEBUG_FS)
  559. return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);
  560. #endif
  561. return 0;
  562. }