nouveau_drm.c 20 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <core/device.h>
  28. #include <core/client.h>
  29. #include <core/gpuobj.h>
  30. #include <core/class.h>
  31. #include <engine/device.h>
  32. #include <engine/disp.h>
  33. #include <engine/fifo.h>
  34. #include <subdev/vm.h>
  35. #include "nouveau_drm.h"
  36. #include "nouveau_dma.h"
  37. #include "nouveau_ttm.h"
  38. #include "nouveau_gem.h"
  39. #include "nouveau_agp.h"
  40. #include "nouveau_vga.h"
  41. #include "nouveau_pm.h"
  42. #include "nouveau_acpi.h"
  43. #include "nouveau_bios.h"
  44. #include "nouveau_ioctl.h"
  45. #include "nouveau_abi16.h"
  46. #include "nouveau_fbcon.h"
  47. #include "nouveau_fence.h"
  48. #include "nouveau_debugfs.h"
  49. MODULE_PARM_DESC(config, "option string to pass to driver core");
  50. static char *nouveau_config;
  51. module_param_named(config, nouveau_config, charp, 0400);
  52. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  53. static char *nouveau_debug;
  54. module_param_named(debug, nouveau_debug, charp, 0400);
  55. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  56. static int nouveau_noaccel = 0;
  57. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  58. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  59. "0 = disabled, 1 = enabled, 2 = headless)");
  60. int nouveau_modeset = -1;
  61. module_param_named(modeset, nouveau_modeset, int, 0400);
  62. static struct drm_driver driver;
  63. static int
  64. nouveau_drm_vblank_handler(struct nouveau_eventh *event, int head)
  65. {
  66. struct nouveau_drm *drm =
  67. container_of(event, struct nouveau_drm, vblank[head]);
  68. drm_handle_vblank(drm->dev, head);
  69. return NVKM_EVENT_KEEP;
  70. }
  71. static int
  72. nouveau_drm_vblank_enable(struct drm_device *dev, int head)
  73. {
  74. struct nouveau_drm *drm = nouveau_drm(dev);
  75. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  76. if (WARN_ON_ONCE(head > ARRAY_SIZE(drm->vblank)))
  77. return -EIO;
  78. WARN_ON_ONCE(drm->vblank[head].func);
  79. drm->vblank[head].func = nouveau_drm_vblank_handler;
  80. nouveau_event_get(pdisp->vblank, head, &drm->vblank[head]);
  81. return 0;
  82. }
  83. static void
  84. nouveau_drm_vblank_disable(struct drm_device *dev, int head)
  85. {
  86. struct nouveau_drm *drm = nouveau_drm(dev);
  87. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  88. if (drm->vblank[head].func)
  89. nouveau_event_put(pdisp->vblank, head, &drm->vblank[head]);
  90. else
  91. WARN_ON_ONCE(1);
  92. drm->vblank[head].func = NULL;
  93. }
  94. static u64
  95. nouveau_name(struct pci_dev *pdev)
  96. {
  97. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  98. name |= pdev->bus->number << 16;
  99. name |= PCI_SLOT(pdev->devfn) << 8;
  100. return name | PCI_FUNC(pdev->devfn);
  101. }
  102. static int
  103. nouveau_cli_create(struct pci_dev *pdev, const char *name,
  104. int size, void **pcli)
  105. {
  106. struct nouveau_cli *cli;
  107. int ret;
  108. *pcli = NULL;
  109. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  110. nouveau_debug, size, pcli);
  111. cli = *pcli;
  112. if (ret) {
  113. if (cli)
  114. nouveau_client_destroy(&cli->base);
  115. *pcli = NULL;
  116. return ret;
  117. }
  118. mutex_init(&cli->mutex);
  119. return 0;
  120. }
  121. static void
  122. nouveau_cli_destroy(struct nouveau_cli *cli)
  123. {
  124. struct nouveau_object *client = nv_object(cli);
  125. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  126. nouveau_client_fini(&cli->base, false);
  127. atomic_set(&client->refcount, 1);
  128. nouveau_object_ref(NULL, &client);
  129. }
  130. static void
  131. nouveau_accel_fini(struct nouveau_drm *drm)
  132. {
  133. nouveau_gpuobj_ref(NULL, &drm->notify);
  134. nouveau_channel_del(&drm->channel);
  135. nouveau_channel_del(&drm->cechan);
  136. if (drm->fence)
  137. nouveau_fence(drm)->dtor(drm);
  138. }
  139. static void
  140. nouveau_accel_init(struct nouveau_drm *drm)
  141. {
  142. struct nouveau_device *device = nv_device(drm->device);
  143. struct nouveau_object *object;
  144. u32 arg0, arg1;
  145. int ret;
  146. if (nouveau_noaccel || !nouveau_fifo(device) /*XXX*/)
  147. return;
  148. /* initialise synchronisation routines */
  149. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  150. else if (device->chipset < 0x17) ret = nv10_fence_create(drm);
  151. else if (device->card_type < NV_50) ret = nv17_fence_create(drm);
  152. else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
  153. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  154. else ret = nvc0_fence_create(drm);
  155. if (ret) {
  156. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  157. nouveau_accel_fini(drm);
  158. return;
  159. }
  160. if (device->card_type >= NV_E0) {
  161. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  162. NVDRM_CHAN + 1,
  163. NVE0_CHANNEL_IND_ENGINE_CE0 |
  164. NVE0_CHANNEL_IND_ENGINE_CE1, 0,
  165. &drm->cechan);
  166. if (ret)
  167. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  168. arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
  169. arg1 = 1;
  170. } else
  171. if (device->chipset >= 0xa3 &&
  172. device->chipset != 0xaa &&
  173. device->chipset != 0xac) {
  174. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  175. NVDRM_CHAN + 1, NvDmaFB, NvDmaTT,
  176. &drm->cechan);
  177. if (ret)
  178. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  179. arg0 = NvDmaFB;
  180. arg1 = NvDmaTT;
  181. } else {
  182. arg0 = NvDmaFB;
  183. arg1 = NvDmaTT;
  184. }
  185. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  186. arg0, arg1, &drm->channel);
  187. if (ret) {
  188. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  189. nouveau_accel_fini(drm);
  190. return;
  191. }
  192. if (device->card_type < NV_C0) {
  193. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  194. &drm->notify);
  195. if (ret) {
  196. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  197. nouveau_accel_fini(drm);
  198. return;
  199. }
  200. ret = nouveau_object_new(nv_object(drm),
  201. drm->channel->handle, NvNotify0,
  202. 0x003d, &(struct nv_dma_class) {
  203. .flags = NV_DMA_TARGET_VRAM |
  204. NV_DMA_ACCESS_RDWR,
  205. .start = drm->notify->addr,
  206. .limit = drm->notify->addr + 31
  207. }, sizeof(struct nv_dma_class),
  208. &object);
  209. if (ret) {
  210. nouveau_accel_fini(drm);
  211. return;
  212. }
  213. }
  214. nouveau_bo_move_init(drm);
  215. }
  216. static int nouveau_drm_probe(struct pci_dev *pdev,
  217. const struct pci_device_id *pent)
  218. {
  219. struct nouveau_device *device;
  220. struct apertures_struct *aper;
  221. bool boot = false;
  222. int ret;
  223. /* remove conflicting drivers (vesafb, efifb etc) */
  224. aper = alloc_apertures(3);
  225. if (!aper)
  226. return -ENOMEM;
  227. aper->ranges[0].base = pci_resource_start(pdev, 1);
  228. aper->ranges[0].size = pci_resource_len(pdev, 1);
  229. aper->count = 1;
  230. if (pci_resource_len(pdev, 2)) {
  231. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  232. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  233. aper->count++;
  234. }
  235. if (pci_resource_len(pdev, 3)) {
  236. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  237. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  238. aper->count++;
  239. }
  240. #ifdef CONFIG_X86
  241. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  242. #endif
  243. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  244. kfree(aper);
  245. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  246. nouveau_config, nouveau_debug, &device);
  247. if (ret)
  248. return ret;
  249. pci_set_master(pdev);
  250. ret = drm_get_pci_dev(pdev, pent, &driver);
  251. if (ret) {
  252. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  253. return ret;
  254. }
  255. return 0;
  256. }
  257. static int
  258. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  259. {
  260. struct pci_dev *pdev = dev->pdev;
  261. struct nouveau_device *device;
  262. struct nouveau_drm *drm;
  263. int ret;
  264. ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
  265. if (ret)
  266. return ret;
  267. dev->dev_private = drm;
  268. drm->dev = dev;
  269. INIT_LIST_HEAD(&drm->clients);
  270. spin_lock_init(&drm->tile.lock);
  271. /* make sure AGP controller is in a consistent state before we
  272. * (possibly) execute vbios init tables (see nouveau_agp.h)
  273. */
  274. if (drm_pci_device_is_agp(dev) && dev->agp) {
  275. /* dummy device object, doesn't init anything, but allows
  276. * agp code access to registers
  277. */
  278. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  279. NVDRM_DEVICE, 0x0080,
  280. &(struct nv_device_class) {
  281. .device = ~0,
  282. .disable =
  283. ~(NV_DEVICE_DISABLE_MMIO |
  284. NV_DEVICE_DISABLE_IDENTIFY),
  285. .debug0 = ~0,
  286. }, sizeof(struct nv_device_class),
  287. &drm->device);
  288. if (ret)
  289. goto fail_device;
  290. nouveau_agp_reset(drm);
  291. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  292. }
  293. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  294. 0x0080, &(struct nv_device_class) {
  295. .device = ~0,
  296. .disable = 0,
  297. .debug0 = 0,
  298. }, sizeof(struct nv_device_class),
  299. &drm->device);
  300. if (ret)
  301. goto fail_device;
  302. /* workaround an odd issue on nvc1 by disabling the device's
  303. * nosnoop capability. hopefully won't cause issues until a
  304. * better fix is found - assuming there is one...
  305. */
  306. device = nv_device(drm->device);
  307. if (nv_device(drm->device)->chipset == 0xc1)
  308. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  309. nouveau_vga_init(drm);
  310. nouveau_agp_init(drm);
  311. if (device->card_type >= NV_50) {
  312. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  313. 0x1000, &drm->client.base.vm);
  314. if (ret)
  315. goto fail_device;
  316. }
  317. ret = nouveau_ttm_init(drm);
  318. if (ret)
  319. goto fail_ttm;
  320. ret = nouveau_bios_init(dev);
  321. if (ret)
  322. goto fail_bios;
  323. ret = nouveau_display_create(dev);
  324. if (ret)
  325. goto fail_dispctor;
  326. if (dev->mode_config.num_crtc) {
  327. ret = nouveau_display_init(dev);
  328. if (ret)
  329. goto fail_dispinit;
  330. }
  331. nouveau_pm_init(dev);
  332. nouveau_accel_init(drm);
  333. nouveau_fbcon_init(dev);
  334. return 0;
  335. fail_dispinit:
  336. nouveau_display_destroy(dev);
  337. fail_dispctor:
  338. nouveau_bios_takedown(dev);
  339. fail_bios:
  340. nouveau_ttm_fini(drm);
  341. fail_ttm:
  342. nouveau_agp_fini(drm);
  343. nouveau_vga_fini(drm);
  344. fail_device:
  345. nouveau_cli_destroy(&drm->client);
  346. return ret;
  347. }
  348. static int
  349. nouveau_drm_unload(struct drm_device *dev)
  350. {
  351. struct nouveau_drm *drm = nouveau_drm(dev);
  352. nouveau_fbcon_fini(dev);
  353. nouveau_accel_fini(drm);
  354. nouveau_pm_fini(dev);
  355. if (dev->mode_config.num_crtc)
  356. nouveau_display_fini(dev);
  357. nouveau_display_destroy(dev);
  358. nouveau_bios_takedown(dev);
  359. nouveau_ttm_fini(drm);
  360. nouveau_agp_fini(drm);
  361. nouveau_vga_fini(drm);
  362. nouveau_cli_destroy(&drm->client);
  363. return 0;
  364. }
  365. static void
  366. nouveau_drm_remove(struct pci_dev *pdev)
  367. {
  368. struct drm_device *dev = pci_get_drvdata(pdev);
  369. struct nouveau_drm *drm = nouveau_drm(dev);
  370. struct nouveau_object *device;
  371. device = drm->client.base.device;
  372. drm_put_dev(dev);
  373. nouveau_object_ref(NULL, &device);
  374. nouveau_object_debug();
  375. }
  376. static int
  377. nouveau_do_suspend(struct drm_device *dev)
  378. {
  379. struct nouveau_drm *drm = nouveau_drm(dev);
  380. struct nouveau_cli *cli;
  381. int ret;
  382. if (dev->mode_config.num_crtc) {
  383. NV_INFO(drm, "suspending fbcon...\n");
  384. nouveau_fbcon_set_suspend(dev, 1);
  385. NV_INFO(drm, "suspending display...\n");
  386. ret = nouveau_display_suspend(dev);
  387. if (ret)
  388. return ret;
  389. }
  390. NV_INFO(drm, "evicting buffers...\n");
  391. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  392. NV_INFO(drm, "waiting for kernel channels to go idle...\n");
  393. if (drm->cechan) {
  394. ret = nouveau_channel_idle(drm->cechan);
  395. if (ret)
  396. return ret;
  397. }
  398. if (drm->channel) {
  399. ret = nouveau_channel_idle(drm->channel);
  400. if (ret)
  401. return ret;
  402. }
  403. NV_INFO(drm, "suspending client object trees...\n");
  404. if (drm->fence && nouveau_fence(drm)->suspend) {
  405. if (!nouveau_fence(drm)->suspend(drm))
  406. return -ENOMEM;
  407. }
  408. list_for_each_entry(cli, &drm->clients, head) {
  409. ret = nouveau_client_fini(&cli->base, true);
  410. if (ret)
  411. goto fail_client;
  412. }
  413. NV_INFO(drm, "suspending kernel object tree...\n");
  414. ret = nouveau_client_fini(&drm->client.base, true);
  415. if (ret)
  416. goto fail_client;
  417. nouveau_agp_fini(drm);
  418. return 0;
  419. fail_client:
  420. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  421. nouveau_client_init(&cli->base);
  422. }
  423. if (dev->mode_config.num_crtc) {
  424. NV_INFO(drm, "resuming display...\n");
  425. nouveau_display_resume(dev);
  426. }
  427. return ret;
  428. }
  429. int nouveau_pmops_suspend(struct device *dev)
  430. {
  431. struct pci_dev *pdev = to_pci_dev(dev);
  432. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  433. int ret;
  434. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  435. return 0;
  436. ret = nouveau_do_suspend(drm_dev);
  437. if (ret)
  438. return ret;
  439. pci_save_state(pdev);
  440. pci_disable_device(pdev);
  441. pci_set_power_state(pdev, PCI_D3hot);
  442. return 0;
  443. }
  444. static int
  445. nouveau_do_resume(struct drm_device *dev)
  446. {
  447. struct nouveau_drm *drm = nouveau_drm(dev);
  448. struct nouveau_cli *cli;
  449. NV_INFO(drm, "re-enabling device...\n");
  450. nouveau_agp_reset(drm);
  451. NV_INFO(drm, "resuming kernel object tree...\n");
  452. nouveau_client_init(&drm->client.base);
  453. nouveau_agp_init(drm);
  454. NV_INFO(drm, "resuming client object trees...\n");
  455. if (drm->fence && nouveau_fence(drm)->resume)
  456. nouveau_fence(drm)->resume(drm);
  457. list_for_each_entry(cli, &drm->clients, head) {
  458. nouveau_client_init(&cli->base);
  459. }
  460. nouveau_run_vbios_init(dev);
  461. nouveau_pm_resume(dev);
  462. if (dev->mode_config.num_crtc) {
  463. NV_INFO(drm, "resuming display...\n");
  464. nouveau_display_resume(dev);
  465. }
  466. return 0;
  467. }
  468. int nouveau_pmops_resume(struct device *dev)
  469. {
  470. struct pci_dev *pdev = to_pci_dev(dev);
  471. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  472. int ret;
  473. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  474. return 0;
  475. pci_set_power_state(pdev, PCI_D0);
  476. pci_restore_state(pdev);
  477. ret = pci_enable_device(pdev);
  478. if (ret)
  479. return ret;
  480. pci_set_master(pdev);
  481. return nouveau_do_resume(drm_dev);
  482. }
  483. static int nouveau_pmops_freeze(struct device *dev)
  484. {
  485. struct pci_dev *pdev = to_pci_dev(dev);
  486. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  487. return nouveau_do_suspend(drm_dev);
  488. }
  489. static int nouveau_pmops_thaw(struct device *dev)
  490. {
  491. struct pci_dev *pdev = to_pci_dev(dev);
  492. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  493. return nouveau_do_resume(drm_dev);
  494. }
  495. static int
  496. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  497. {
  498. struct pci_dev *pdev = dev->pdev;
  499. struct nouveau_drm *drm = nouveau_drm(dev);
  500. struct nouveau_cli *cli;
  501. char name[32], tmpname[TASK_COMM_LEN];
  502. int ret;
  503. get_task_comm(tmpname, current);
  504. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  505. ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
  506. if (ret)
  507. return ret;
  508. if (nv_device(drm->device)->card_type >= NV_50) {
  509. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  510. 0x1000, &cli->base.vm);
  511. if (ret) {
  512. nouveau_cli_destroy(cli);
  513. return ret;
  514. }
  515. }
  516. fpriv->driver_priv = cli;
  517. mutex_lock(&drm->client.mutex);
  518. list_add(&cli->head, &drm->clients);
  519. mutex_unlock(&drm->client.mutex);
  520. return 0;
  521. }
  522. static void
  523. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  524. {
  525. struct nouveau_cli *cli = nouveau_cli(fpriv);
  526. struct nouveau_drm *drm = nouveau_drm(dev);
  527. if (cli->abi16)
  528. nouveau_abi16_fini(cli->abi16);
  529. mutex_lock(&drm->client.mutex);
  530. list_del(&cli->head);
  531. mutex_unlock(&drm->client.mutex);
  532. }
  533. static void
  534. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  535. {
  536. struct nouveau_cli *cli = nouveau_cli(fpriv);
  537. nouveau_cli_destroy(cli);
  538. }
  539. static struct drm_ioctl_desc
  540. nouveau_ioctls[] = {
  541. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
  542. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  543. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
  544. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
  545. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  546. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  547. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
  548. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
  549. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
  550. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
  551. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
  552. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
  553. };
  554. static const struct file_operations
  555. nouveau_driver_fops = {
  556. .owner = THIS_MODULE,
  557. .open = drm_open,
  558. .release = drm_release,
  559. .unlocked_ioctl = drm_ioctl,
  560. .mmap = nouveau_ttm_mmap,
  561. .poll = drm_poll,
  562. .fasync = drm_fasync,
  563. .read = drm_read,
  564. #if defined(CONFIG_COMPAT)
  565. .compat_ioctl = nouveau_compat_ioctl,
  566. #endif
  567. .llseek = noop_llseek,
  568. };
  569. static struct drm_driver
  570. driver = {
  571. .driver_features =
  572. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  573. DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME,
  574. .load = nouveau_drm_load,
  575. .unload = nouveau_drm_unload,
  576. .open = nouveau_drm_open,
  577. .preclose = nouveau_drm_preclose,
  578. .postclose = nouveau_drm_postclose,
  579. .lastclose = nouveau_vga_lastclose,
  580. #if defined(CONFIG_DEBUG_FS)
  581. .debugfs_init = nouveau_debugfs_init,
  582. .debugfs_cleanup = nouveau_debugfs_takedown,
  583. #endif
  584. .get_vblank_counter = drm_vblank_count,
  585. .enable_vblank = nouveau_drm_vblank_enable,
  586. .disable_vblank = nouveau_drm_vblank_disable,
  587. .ioctls = nouveau_ioctls,
  588. .fops = &nouveau_driver_fops,
  589. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  590. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  591. .gem_prime_export = drm_gem_prime_export,
  592. .gem_prime_import = drm_gem_prime_import,
  593. .gem_prime_pin = nouveau_gem_prime_pin,
  594. .gem_prime_unpin = nouveau_gem_prime_unpin,
  595. .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
  596. .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
  597. .gem_prime_vmap = nouveau_gem_prime_vmap,
  598. .gem_prime_vunmap = nouveau_gem_prime_vunmap,
  599. .gem_init_object = nouveau_gem_object_new,
  600. .gem_free_object = nouveau_gem_object_del,
  601. .gem_open_object = nouveau_gem_object_open,
  602. .gem_close_object = nouveau_gem_object_close,
  603. .dumb_create = nouveau_display_dumb_create,
  604. .dumb_map_offset = nouveau_display_dumb_map_offset,
  605. .dumb_destroy = nouveau_display_dumb_destroy,
  606. .name = DRIVER_NAME,
  607. .desc = DRIVER_DESC,
  608. #ifdef GIT_REVISION
  609. .date = GIT_REVISION,
  610. #else
  611. .date = DRIVER_DATE,
  612. #endif
  613. .major = DRIVER_MAJOR,
  614. .minor = DRIVER_MINOR,
  615. .patchlevel = DRIVER_PATCHLEVEL,
  616. };
  617. static struct pci_device_id
  618. nouveau_drm_pci_table[] = {
  619. {
  620. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  621. .class = PCI_BASE_CLASS_DISPLAY << 16,
  622. .class_mask = 0xff << 16,
  623. },
  624. {
  625. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  626. .class = PCI_BASE_CLASS_DISPLAY << 16,
  627. .class_mask = 0xff << 16,
  628. },
  629. {}
  630. };
  631. static const struct dev_pm_ops nouveau_pm_ops = {
  632. .suspend = nouveau_pmops_suspend,
  633. .resume = nouveau_pmops_resume,
  634. .freeze = nouveau_pmops_freeze,
  635. .thaw = nouveau_pmops_thaw,
  636. .poweroff = nouveau_pmops_freeze,
  637. .restore = nouveau_pmops_resume,
  638. };
  639. static struct pci_driver
  640. nouveau_drm_pci_driver = {
  641. .name = "nouveau",
  642. .id_table = nouveau_drm_pci_table,
  643. .probe = nouveau_drm_probe,
  644. .remove = nouveau_drm_remove,
  645. .driver.pm = &nouveau_pm_ops,
  646. };
  647. static int __init
  648. nouveau_drm_init(void)
  649. {
  650. driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
  651. if (nouveau_modeset == -1) {
  652. #ifdef CONFIG_VGA_CONSOLE
  653. if (vgacon_text_force())
  654. nouveau_modeset = 0;
  655. #endif
  656. }
  657. if (!nouveau_modeset)
  658. return 0;
  659. nouveau_register_dsm_handler();
  660. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  661. }
  662. static void __exit
  663. nouveau_drm_exit(void)
  664. {
  665. if (!nouveau_modeset)
  666. return;
  667. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  668. nouveau_unregister_dsm_handler();
  669. }
  670. module_init(nouveau_drm_init);
  671. module_exit(nouveau_drm_exit);
  672. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  673. MODULE_AUTHOR(DRIVER_AUTHOR);
  674. MODULE_DESCRIPTION(DRIVER_DESC);
  675. MODULE_LICENSE("GPL and additional rights");