intel_lvds.c 32 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. };
  45. struct intel_lvds_encoder {
  46. struct intel_encoder base;
  47. bool is_dual_link;
  48. u32 reg;
  49. struct intel_lvds_connector *attached_connector;
  50. };
  51. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds_encoder, base.base);
  54. }
  55. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  56. {
  57. return container_of(connector, struct intel_lvds_connector, base.base);
  58. }
  59. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  60. enum pipe *pipe)
  61. {
  62. struct drm_device *dev = encoder->base.dev;
  63. struct drm_i915_private *dev_priv = dev->dev_private;
  64. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  65. u32 tmp;
  66. tmp = I915_READ(lvds_encoder->reg);
  67. if (!(tmp & LVDS_PORT_EN))
  68. return false;
  69. if (HAS_PCH_CPT(dev))
  70. *pipe = PORT_TO_PIPE_CPT(tmp);
  71. else
  72. *pipe = PORT_TO_PIPE(tmp);
  73. return true;
  74. }
  75. static void intel_lvds_get_config(struct intel_encoder *encoder,
  76. struct intel_crtc_config *pipe_config)
  77. {
  78. struct drm_device *dev = encoder->base.dev;
  79. struct drm_i915_private *dev_priv = dev->dev_private;
  80. u32 lvds_reg, tmp, flags = 0;
  81. if (HAS_PCH_SPLIT(dev))
  82. lvds_reg = PCH_LVDS;
  83. else
  84. lvds_reg = LVDS;
  85. tmp = I915_READ(lvds_reg);
  86. if (tmp & LVDS_HSYNC_POLARITY)
  87. flags |= DRM_MODE_FLAG_NHSYNC;
  88. else
  89. flags |= DRM_MODE_FLAG_PHSYNC;
  90. if (tmp & LVDS_VSYNC_POLARITY)
  91. flags |= DRM_MODE_FLAG_NVSYNC;
  92. else
  93. flags |= DRM_MODE_FLAG_PVSYNC;
  94. pipe_config->adjusted_mode.flags |= flags;
  95. /* gen2/3 store dither state in pfit control, needs to match */
  96. if (INTEL_INFO(dev)->gen < 4) {
  97. tmp = I915_READ(PFIT_CONTROL);
  98. pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
  99. }
  100. }
  101. /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  102. * This is an exception to the general rule that mode_set doesn't turn
  103. * things on.
  104. */
  105. static void intel_pre_enable_lvds(struct intel_encoder *encoder)
  106. {
  107. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  108. struct drm_device *dev = encoder->base.dev;
  109. struct drm_i915_private *dev_priv = dev->dev_private;
  110. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  111. struct drm_display_mode *fixed_mode =
  112. lvds_encoder->attached_connector->base.panel.fixed_mode;
  113. int pipe = crtc->pipe;
  114. u32 temp;
  115. if (HAS_PCH_SPLIT(dev)) {
  116. assert_fdi_rx_pll_disabled(dev_priv, pipe);
  117. assert_shared_dpll_disabled(dev_priv,
  118. intel_crtc_to_shared_dpll(crtc));
  119. } else {
  120. assert_pll_disabled(dev_priv, pipe);
  121. }
  122. temp = I915_READ(lvds_encoder->reg);
  123. temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  124. if (HAS_PCH_CPT(dev)) {
  125. temp &= ~PORT_TRANS_SEL_MASK;
  126. temp |= PORT_TRANS_SEL_CPT(pipe);
  127. } else {
  128. if (pipe == 1) {
  129. temp |= LVDS_PIPEB_SELECT;
  130. } else {
  131. temp &= ~LVDS_PIPEB_SELECT;
  132. }
  133. }
  134. /* set the corresponsding LVDS_BORDER bit */
  135. temp &= ~LVDS_BORDER_ENABLE;
  136. temp |= crtc->config.gmch_pfit.lvds_border_bits;
  137. /* Set the B0-B3 data pairs corresponding to whether we're going to
  138. * set the DPLLs for dual-channel mode or not.
  139. */
  140. if (lvds_encoder->is_dual_link)
  141. temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  142. else
  143. temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  144. /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  145. * appropriately here, but we need to look more thoroughly into how
  146. * panels behave in the two modes.
  147. */
  148. /* Set the dithering flag on LVDS as needed, note that there is no
  149. * special lvds dither control bit on pch-split platforms, dithering is
  150. * only controlled through the PIPECONF reg. */
  151. if (INTEL_INFO(dev)->gen == 4) {
  152. /* Bspec wording suggests that LVDS port dithering only exists
  153. * for 18bpp panels. */
  154. if (crtc->config.dither && crtc->config.pipe_bpp == 18)
  155. temp |= LVDS_ENABLE_DITHER;
  156. else
  157. temp &= ~LVDS_ENABLE_DITHER;
  158. }
  159. temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  160. if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
  161. temp |= LVDS_HSYNC_POLARITY;
  162. if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
  163. temp |= LVDS_VSYNC_POLARITY;
  164. I915_WRITE(lvds_encoder->reg, temp);
  165. }
  166. /**
  167. * Sets the power state for the panel.
  168. */
  169. static void intel_enable_lvds(struct intel_encoder *encoder)
  170. {
  171. struct drm_device *dev = encoder->base.dev;
  172. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  173. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  174. struct drm_i915_private *dev_priv = dev->dev_private;
  175. u32 ctl_reg, stat_reg;
  176. if (HAS_PCH_SPLIT(dev)) {
  177. ctl_reg = PCH_PP_CONTROL;
  178. stat_reg = PCH_PP_STATUS;
  179. } else {
  180. ctl_reg = PP_CONTROL;
  181. stat_reg = PP_STATUS;
  182. }
  183. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  184. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  185. POSTING_READ(lvds_encoder->reg);
  186. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  187. DRM_ERROR("timed out waiting for panel to power on\n");
  188. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  189. }
  190. static void intel_disable_lvds(struct intel_encoder *encoder)
  191. {
  192. struct drm_device *dev = encoder->base.dev;
  193. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  194. struct drm_i915_private *dev_priv = dev->dev_private;
  195. u32 ctl_reg, stat_reg;
  196. if (HAS_PCH_SPLIT(dev)) {
  197. ctl_reg = PCH_PP_CONTROL;
  198. stat_reg = PCH_PP_STATUS;
  199. } else {
  200. ctl_reg = PP_CONTROL;
  201. stat_reg = PP_STATUS;
  202. }
  203. intel_panel_disable_backlight(dev);
  204. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  205. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  206. DRM_ERROR("timed out waiting for panel to power off\n");
  207. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  208. POSTING_READ(lvds_encoder->reg);
  209. }
  210. static int intel_lvds_mode_valid(struct drm_connector *connector,
  211. struct drm_display_mode *mode)
  212. {
  213. struct intel_connector *intel_connector = to_intel_connector(connector);
  214. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  215. if (mode->hdisplay > fixed_mode->hdisplay)
  216. return MODE_PANEL;
  217. if (mode->vdisplay > fixed_mode->vdisplay)
  218. return MODE_PANEL;
  219. return MODE_OK;
  220. }
  221. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  222. struct intel_crtc_config *pipe_config)
  223. {
  224. struct drm_device *dev = intel_encoder->base.dev;
  225. struct drm_i915_private *dev_priv = dev->dev_private;
  226. struct intel_lvds_encoder *lvds_encoder =
  227. to_lvds_encoder(&intel_encoder->base);
  228. struct intel_connector *intel_connector =
  229. &lvds_encoder->attached_connector->base;
  230. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  231. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  232. unsigned int lvds_bpp;
  233. /* Should never happen!! */
  234. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  235. DRM_ERROR("Can't support LVDS on pipe A\n");
  236. return false;
  237. }
  238. if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
  239. LVDS_A3_POWER_UP)
  240. lvds_bpp = 8*3;
  241. else
  242. lvds_bpp = 6*3;
  243. if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
  244. DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  245. pipe_config->pipe_bpp, lvds_bpp);
  246. pipe_config->pipe_bpp = lvds_bpp;
  247. }
  248. /*
  249. * We have timings from the BIOS for the panel, put them in
  250. * to the adjusted mode. The CRTC will be set up for this mode,
  251. * with the panel scaling set up to source from the H/VDisplay
  252. * of the original mode.
  253. */
  254. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  255. adjusted_mode);
  256. if (HAS_PCH_SPLIT(dev)) {
  257. pipe_config->has_pch_encoder = true;
  258. intel_pch_panel_fitting(intel_crtc, pipe_config,
  259. intel_connector->panel.fitting_mode);
  260. } else {
  261. intel_gmch_panel_fitting(intel_crtc, pipe_config,
  262. intel_connector->panel.fitting_mode);
  263. }
  264. /*
  265. * XXX: It would be nice to support lower refresh rates on the
  266. * panels to reduce power consumption, and perhaps match the
  267. * user's requested refresh rate.
  268. */
  269. return true;
  270. }
  271. static void intel_lvds_mode_set(struct intel_encoder *encoder)
  272. {
  273. /*
  274. * We don't do anything here, the LVDS port is fully set up in the pre
  275. * enable hook - the ordering constraints for enabling the lvds port vs.
  276. * enabling the display pll are too strict.
  277. */
  278. }
  279. /**
  280. * Detect the LVDS connection.
  281. *
  282. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  283. * connected and closed means disconnected. We also send hotplug events as
  284. * needed, using lid status notification from the input layer.
  285. */
  286. static enum drm_connector_status
  287. intel_lvds_detect(struct drm_connector *connector, bool force)
  288. {
  289. struct drm_device *dev = connector->dev;
  290. enum drm_connector_status status;
  291. DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  292. connector->base.id, drm_get_connector_name(connector));
  293. status = intel_panel_detect(dev);
  294. if (status != connector_status_unknown)
  295. return status;
  296. return connector_status_connected;
  297. }
  298. /**
  299. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  300. */
  301. static int intel_lvds_get_modes(struct drm_connector *connector)
  302. {
  303. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  304. struct drm_device *dev = connector->dev;
  305. struct drm_display_mode *mode;
  306. /* use cached edid if we have one */
  307. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  308. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  309. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  310. if (mode == NULL)
  311. return 0;
  312. drm_mode_probed_add(connector, mode);
  313. return 1;
  314. }
  315. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  316. {
  317. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  318. return 1;
  319. }
  320. /* The GPU hangs up on these systems if modeset is performed on LID open */
  321. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  322. {
  323. .callback = intel_no_modeset_on_lid_dmi_callback,
  324. .ident = "Toshiba Tecra A11",
  325. .matches = {
  326. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  327. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  328. },
  329. },
  330. { } /* terminating entry */
  331. };
  332. /*
  333. * Lid events. Note the use of 'modeset':
  334. * - we set it to MODESET_ON_LID_OPEN on lid close,
  335. * and set it to MODESET_DONE on open
  336. * - we use it as a "only once" bit (ie we ignore
  337. * duplicate events where it was already properly set)
  338. * - the suspend/resume paths will set it to
  339. * MODESET_SUSPENDED and ignore the lid open event,
  340. * because they restore the mode ("lid open").
  341. */
  342. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  343. void *unused)
  344. {
  345. struct intel_lvds_connector *lvds_connector =
  346. container_of(nb, struct intel_lvds_connector, lid_notifier);
  347. struct drm_connector *connector = &lvds_connector->base.base;
  348. struct drm_device *dev = connector->dev;
  349. struct drm_i915_private *dev_priv = dev->dev_private;
  350. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  351. return NOTIFY_OK;
  352. mutex_lock(&dev_priv->modeset_restore_lock);
  353. if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  354. goto exit;
  355. /*
  356. * check and update the status of LVDS connector after receiving
  357. * the LID nofication event.
  358. */
  359. connector->status = connector->funcs->detect(connector, false);
  360. /* Don't force modeset on machines where it causes a GPU lockup */
  361. if (dmi_check_system(intel_no_modeset_on_lid))
  362. goto exit;
  363. if (!acpi_lid_open()) {
  364. /* do modeset on next lid open event */
  365. dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  366. goto exit;
  367. }
  368. if (dev_priv->modeset_restore == MODESET_DONE)
  369. goto exit;
  370. drm_modeset_lock_all(dev);
  371. intel_modeset_setup_hw_state(dev, true);
  372. drm_modeset_unlock_all(dev);
  373. dev_priv->modeset_restore = MODESET_DONE;
  374. exit:
  375. mutex_unlock(&dev_priv->modeset_restore_lock);
  376. return NOTIFY_OK;
  377. }
  378. /**
  379. * intel_lvds_destroy - unregister and free LVDS structures
  380. * @connector: connector to free
  381. *
  382. * Unregister the DDC bus for this connector then free the driver private
  383. * structure.
  384. */
  385. static void intel_lvds_destroy(struct drm_connector *connector)
  386. {
  387. struct intel_lvds_connector *lvds_connector =
  388. to_lvds_connector(connector);
  389. if (lvds_connector->lid_notifier.notifier_call)
  390. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  391. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  392. kfree(lvds_connector->base.edid);
  393. intel_panel_fini(&lvds_connector->base.panel);
  394. drm_sysfs_connector_remove(connector);
  395. drm_connector_cleanup(connector);
  396. kfree(connector);
  397. }
  398. static int intel_lvds_set_property(struct drm_connector *connector,
  399. struct drm_property *property,
  400. uint64_t value)
  401. {
  402. struct intel_connector *intel_connector = to_intel_connector(connector);
  403. struct drm_device *dev = connector->dev;
  404. if (property == dev->mode_config.scaling_mode_property) {
  405. struct drm_crtc *crtc;
  406. if (value == DRM_MODE_SCALE_NONE) {
  407. DRM_DEBUG_KMS("no scaling not supported\n");
  408. return -EINVAL;
  409. }
  410. if (intel_connector->panel.fitting_mode == value) {
  411. /* the LVDS scaling property is not changed */
  412. return 0;
  413. }
  414. intel_connector->panel.fitting_mode = value;
  415. crtc = intel_attached_encoder(connector)->base.crtc;
  416. if (crtc && crtc->enabled) {
  417. /*
  418. * If the CRTC is enabled, the display will be changed
  419. * according to the new panel fitting mode.
  420. */
  421. intel_crtc_restore_mode(crtc);
  422. }
  423. }
  424. return 0;
  425. }
  426. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  427. .get_modes = intel_lvds_get_modes,
  428. .mode_valid = intel_lvds_mode_valid,
  429. .best_encoder = intel_best_encoder,
  430. };
  431. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  432. .dpms = intel_connector_dpms,
  433. .detect = intel_lvds_detect,
  434. .fill_modes = drm_helper_probe_single_connector_modes,
  435. .set_property = intel_lvds_set_property,
  436. .destroy = intel_lvds_destroy,
  437. };
  438. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  439. .destroy = intel_encoder_destroy,
  440. };
  441. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  442. {
  443. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  444. return 1;
  445. }
  446. /* These systems claim to have LVDS, but really don't */
  447. static const struct dmi_system_id intel_no_lvds[] = {
  448. {
  449. .callback = intel_no_lvds_dmi_callback,
  450. .ident = "Apple Mac Mini (Core series)",
  451. .matches = {
  452. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  453. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  454. },
  455. },
  456. {
  457. .callback = intel_no_lvds_dmi_callback,
  458. .ident = "Apple Mac Mini (Core 2 series)",
  459. .matches = {
  460. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  461. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  462. },
  463. },
  464. {
  465. .callback = intel_no_lvds_dmi_callback,
  466. .ident = "MSI IM-945GSE-A",
  467. .matches = {
  468. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  469. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  470. },
  471. },
  472. {
  473. .callback = intel_no_lvds_dmi_callback,
  474. .ident = "Dell Studio Hybrid",
  475. .matches = {
  476. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  477. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  478. },
  479. },
  480. {
  481. .callback = intel_no_lvds_dmi_callback,
  482. .ident = "Dell OptiPlex FX170",
  483. .matches = {
  484. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  485. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  486. },
  487. },
  488. {
  489. .callback = intel_no_lvds_dmi_callback,
  490. .ident = "AOpen Mini PC",
  491. .matches = {
  492. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  493. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  494. },
  495. },
  496. {
  497. .callback = intel_no_lvds_dmi_callback,
  498. .ident = "AOpen Mini PC MP915",
  499. .matches = {
  500. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  501. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  502. },
  503. },
  504. {
  505. .callback = intel_no_lvds_dmi_callback,
  506. .ident = "AOpen i915GMm-HFS",
  507. .matches = {
  508. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  509. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  510. },
  511. },
  512. {
  513. .callback = intel_no_lvds_dmi_callback,
  514. .ident = "AOpen i45GMx-I",
  515. .matches = {
  516. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  517. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  518. },
  519. },
  520. {
  521. .callback = intel_no_lvds_dmi_callback,
  522. .ident = "Aopen i945GTt-VFA",
  523. .matches = {
  524. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  525. },
  526. },
  527. {
  528. .callback = intel_no_lvds_dmi_callback,
  529. .ident = "Clientron U800",
  530. .matches = {
  531. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  532. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  533. },
  534. },
  535. {
  536. .callback = intel_no_lvds_dmi_callback,
  537. .ident = "Clientron E830",
  538. .matches = {
  539. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  540. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  541. },
  542. },
  543. {
  544. .callback = intel_no_lvds_dmi_callback,
  545. .ident = "Asus EeeBox PC EB1007",
  546. .matches = {
  547. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  548. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  549. },
  550. },
  551. {
  552. .callback = intel_no_lvds_dmi_callback,
  553. .ident = "Asus AT5NM10T-I",
  554. .matches = {
  555. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  556. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  557. },
  558. },
  559. {
  560. .callback = intel_no_lvds_dmi_callback,
  561. .ident = "Hewlett-Packard HP t5740",
  562. .matches = {
  563. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  564. DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
  565. },
  566. },
  567. {
  568. .callback = intel_no_lvds_dmi_callback,
  569. .ident = "Hewlett-Packard t5745",
  570. .matches = {
  571. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  572. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  573. },
  574. },
  575. {
  576. .callback = intel_no_lvds_dmi_callback,
  577. .ident = "Hewlett-Packard st5747",
  578. .matches = {
  579. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  580. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  581. },
  582. },
  583. {
  584. .callback = intel_no_lvds_dmi_callback,
  585. .ident = "MSI Wind Box DC500",
  586. .matches = {
  587. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  588. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  589. },
  590. },
  591. {
  592. .callback = intel_no_lvds_dmi_callback,
  593. .ident = "Gigabyte GA-D525TUD",
  594. .matches = {
  595. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  596. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  597. },
  598. },
  599. {
  600. .callback = intel_no_lvds_dmi_callback,
  601. .ident = "Supermicro X7SPA-H",
  602. .matches = {
  603. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  604. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  605. },
  606. },
  607. {
  608. .callback = intel_no_lvds_dmi_callback,
  609. .ident = "Fujitsu Esprimo Q900",
  610. .matches = {
  611. DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  612. DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  613. },
  614. },
  615. {
  616. .callback = intel_no_lvds_dmi_callback,
  617. .ident = "Intel D510MO",
  618. .matches = {
  619. DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  620. DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
  621. },
  622. },
  623. {
  624. .callback = intel_no_lvds_dmi_callback,
  625. .ident = "Intel D525MW",
  626. .matches = {
  627. DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  628. DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
  629. },
  630. },
  631. { } /* terminating entry */
  632. };
  633. /**
  634. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  635. * @dev: drm device
  636. * @connector: LVDS connector
  637. *
  638. * Find the reduced downclock for LVDS in EDID.
  639. */
  640. static void intel_find_lvds_downclock(struct drm_device *dev,
  641. struct drm_display_mode *fixed_mode,
  642. struct drm_connector *connector)
  643. {
  644. struct drm_i915_private *dev_priv = dev->dev_private;
  645. struct drm_display_mode *scan;
  646. int temp_downclock;
  647. temp_downclock = fixed_mode->clock;
  648. list_for_each_entry(scan, &connector->probed_modes, head) {
  649. /*
  650. * If one mode has the same resolution with the fixed_panel
  651. * mode while they have the different refresh rate, it means
  652. * that the reduced downclock is found for the LVDS. In such
  653. * case we can set the different FPx0/1 to dynamically select
  654. * between low and high frequency.
  655. */
  656. if (scan->hdisplay == fixed_mode->hdisplay &&
  657. scan->hsync_start == fixed_mode->hsync_start &&
  658. scan->hsync_end == fixed_mode->hsync_end &&
  659. scan->htotal == fixed_mode->htotal &&
  660. scan->vdisplay == fixed_mode->vdisplay &&
  661. scan->vsync_start == fixed_mode->vsync_start &&
  662. scan->vsync_end == fixed_mode->vsync_end &&
  663. scan->vtotal == fixed_mode->vtotal) {
  664. if (scan->clock < temp_downclock) {
  665. /*
  666. * The downclock is already found. But we
  667. * expect to find the lower downclock.
  668. */
  669. temp_downclock = scan->clock;
  670. }
  671. }
  672. }
  673. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  674. /* We found the downclock for LVDS. */
  675. dev_priv->lvds_downclock_avail = 1;
  676. dev_priv->lvds_downclock = temp_downclock;
  677. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  678. "Normal clock %dKhz, downclock %dKhz\n",
  679. fixed_mode->clock, temp_downclock);
  680. }
  681. }
  682. /*
  683. * Enumerate the child dev array parsed from VBT to check whether
  684. * the LVDS is present.
  685. * If it is present, return 1.
  686. * If it is not present, return false.
  687. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  688. */
  689. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  690. u8 *i2c_pin)
  691. {
  692. struct drm_i915_private *dev_priv = dev->dev_private;
  693. int i;
  694. if (!dev_priv->vbt.child_dev_num)
  695. return true;
  696. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  697. struct child_device_config *child = dev_priv->vbt.child_dev + i;
  698. /* If the device type is not LFP, continue.
  699. * We have to check both the new identifiers as well as the
  700. * old for compatibility with some BIOSes.
  701. */
  702. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  703. child->device_type != DEVICE_TYPE_LFP)
  704. continue;
  705. if (intel_gmbus_is_port_valid(child->i2c_pin))
  706. *i2c_pin = child->i2c_pin;
  707. /* However, we cannot trust the BIOS writers to populate
  708. * the VBT correctly. Since LVDS requires additional
  709. * information from AIM blocks, a non-zero addin offset is
  710. * a good indicator that the LVDS is actually present.
  711. */
  712. if (child->addin_offset)
  713. return true;
  714. /* But even then some BIOS writers perform some black magic
  715. * and instantiate the device without reference to any
  716. * additional data. Trust that if the VBT was written into
  717. * the OpRegion then they have validated the LVDS's existence.
  718. */
  719. if (dev_priv->opregion.vbt)
  720. return true;
  721. }
  722. return false;
  723. }
  724. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  725. {
  726. DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  727. return 1;
  728. }
  729. static const struct dmi_system_id intel_dual_link_lvds[] = {
  730. {
  731. .callback = intel_dual_link_lvds_callback,
  732. .ident = "Apple MacBook Pro (Core i5/i7 Series)",
  733. .matches = {
  734. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  735. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  736. },
  737. },
  738. { } /* terminating entry */
  739. };
  740. bool intel_is_dual_link_lvds(struct drm_device *dev)
  741. {
  742. struct intel_encoder *encoder;
  743. struct intel_lvds_encoder *lvds_encoder;
  744. list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  745. base.head) {
  746. if (encoder->type == INTEL_OUTPUT_LVDS) {
  747. lvds_encoder = to_lvds_encoder(&encoder->base);
  748. return lvds_encoder->is_dual_link;
  749. }
  750. }
  751. return false;
  752. }
  753. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  754. {
  755. struct drm_device *dev = lvds_encoder->base.base.dev;
  756. unsigned int val;
  757. struct drm_i915_private *dev_priv = dev->dev_private;
  758. /* use the module option value if specified */
  759. if (i915_lvds_channel_mode > 0)
  760. return i915_lvds_channel_mode == 2;
  761. if (dmi_check_system(intel_dual_link_lvds))
  762. return true;
  763. /* BIOS should set the proper LVDS register value at boot, but
  764. * in reality, it doesn't set the value when the lid is closed;
  765. * we need to check "the value to be set" in VBT when LVDS
  766. * register is uninitialized.
  767. */
  768. val = I915_READ(lvds_encoder->reg);
  769. if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  770. val = dev_priv->vbt.bios_lvds_val;
  771. return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  772. }
  773. static bool intel_lvds_supported(struct drm_device *dev)
  774. {
  775. /* With the introduction of the PCH we gained a dedicated
  776. * LVDS presence pin, use it. */
  777. if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  778. return true;
  779. /* Otherwise LVDS was only attached to mobile products,
  780. * except for the inglorious 830gm */
  781. if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  782. return true;
  783. return false;
  784. }
  785. /**
  786. * intel_lvds_init - setup LVDS connectors on this device
  787. * @dev: drm device
  788. *
  789. * Create the connector, register the LVDS DDC bus, and try to figure out what
  790. * modes we can display on the LVDS panel (if present).
  791. */
  792. void intel_lvds_init(struct drm_device *dev)
  793. {
  794. struct drm_i915_private *dev_priv = dev->dev_private;
  795. struct intel_lvds_encoder *lvds_encoder;
  796. struct intel_encoder *intel_encoder;
  797. struct intel_lvds_connector *lvds_connector;
  798. struct intel_connector *intel_connector;
  799. struct drm_connector *connector;
  800. struct drm_encoder *encoder;
  801. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  802. struct drm_display_mode *fixed_mode = NULL;
  803. struct edid *edid;
  804. struct drm_crtc *crtc;
  805. u32 lvds;
  806. int pipe;
  807. u8 pin;
  808. if (!intel_lvds_supported(dev))
  809. return;
  810. /* Skip init on machines we know falsely report LVDS */
  811. if (dmi_check_system(intel_no_lvds))
  812. return;
  813. pin = GMBUS_PORT_PANEL;
  814. if (!lvds_is_present_in_vbt(dev, &pin)) {
  815. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  816. return;
  817. }
  818. if (HAS_PCH_SPLIT(dev)) {
  819. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  820. return;
  821. if (dev_priv->vbt.edp_support) {
  822. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  823. return;
  824. }
  825. }
  826. lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  827. if (!lvds_encoder)
  828. return;
  829. lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  830. if (!lvds_connector) {
  831. kfree(lvds_encoder);
  832. return;
  833. }
  834. lvds_encoder->attached_connector = lvds_connector;
  835. intel_encoder = &lvds_encoder->base;
  836. encoder = &intel_encoder->base;
  837. intel_connector = &lvds_connector->base;
  838. connector = &intel_connector->base;
  839. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  840. DRM_MODE_CONNECTOR_LVDS);
  841. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  842. DRM_MODE_ENCODER_LVDS);
  843. intel_encoder->enable = intel_enable_lvds;
  844. intel_encoder->pre_enable = intel_pre_enable_lvds;
  845. intel_encoder->compute_config = intel_lvds_compute_config;
  846. intel_encoder->mode_set = intel_lvds_mode_set;
  847. intel_encoder->disable = intel_disable_lvds;
  848. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  849. intel_encoder->get_config = intel_lvds_get_config;
  850. intel_connector->get_hw_state = intel_connector_get_hw_state;
  851. intel_connector_attach_encoder(intel_connector, intel_encoder);
  852. intel_encoder->type = INTEL_OUTPUT_LVDS;
  853. intel_encoder->cloneable = false;
  854. if (HAS_PCH_SPLIT(dev))
  855. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  856. else if (IS_GEN4(dev))
  857. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  858. else
  859. intel_encoder->crtc_mask = (1 << 1);
  860. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  861. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  862. connector->interlace_allowed = false;
  863. connector->doublescan_allowed = false;
  864. if (HAS_PCH_SPLIT(dev)) {
  865. lvds_encoder->reg = PCH_LVDS;
  866. } else {
  867. lvds_encoder->reg = LVDS;
  868. }
  869. /* create the scaling mode property */
  870. drm_mode_create_scaling_mode_property(dev);
  871. drm_object_attach_property(&connector->base,
  872. dev->mode_config.scaling_mode_property,
  873. DRM_MODE_SCALE_ASPECT);
  874. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  875. /*
  876. * LVDS discovery:
  877. * 1) check for EDID on DDC
  878. * 2) check for VBT data
  879. * 3) check to see if LVDS is already on
  880. * if none of the above, no panel
  881. * 4) make sure lid is open
  882. * if closed, act like it's not there for now
  883. */
  884. /*
  885. * Attempt to get the fixed panel mode from DDC. Assume that the
  886. * preferred mode is the right one.
  887. */
  888. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  889. if (edid) {
  890. if (drm_add_edid_modes(connector, edid)) {
  891. drm_mode_connector_update_edid_property(connector,
  892. edid);
  893. } else {
  894. kfree(edid);
  895. edid = ERR_PTR(-EINVAL);
  896. }
  897. } else {
  898. edid = ERR_PTR(-ENOENT);
  899. }
  900. lvds_connector->base.edid = edid;
  901. if (IS_ERR_OR_NULL(edid)) {
  902. /* Didn't get an EDID, so
  903. * Set wide sync ranges so we get all modes
  904. * handed to valid_mode for checking
  905. */
  906. connector->display_info.min_vfreq = 0;
  907. connector->display_info.max_vfreq = 200;
  908. connector->display_info.min_hfreq = 0;
  909. connector->display_info.max_hfreq = 200;
  910. }
  911. list_for_each_entry(scan, &connector->probed_modes, head) {
  912. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  913. DRM_DEBUG_KMS("using preferred mode from EDID: ");
  914. drm_mode_debug_printmodeline(scan);
  915. fixed_mode = drm_mode_duplicate(dev, scan);
  916. if (fixed_mode) {
  917. intel_find_lvds_downclock(dev, fixed_mode,
  918. connector);
  919. goto out;
  920. }
  921. }
  922. }
  923. /* Failed to get EDID, what about VBT? */
  924. if (dev_priv->vbt.lfp_lvds_vbt_mode) {
  925. DRM_DEBUG_KMS("using mode from VBT: ");
  926. drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
  927. fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
  928. if (fixed_mode) {
  929. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  930. goto out;
  931. }
  932. }
  933. /*
  934. * If we didn't get EDID, try checking if the panel is already turned
  935. * on. If so, assume that whatever is currently programmed is the
  936. * correct mode.
  937. */
  938. /* Ironlake: FIXME if still fail, not try pipe mode now */
  939. if (HAS_PCH_SPLIT(dev))
  940. goto failed;
  941. lvds = I915_READ(LVDS);
  942. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  943. crtc = intel_get_crtc_for_pipe(dev, pipe);
  944. if (crtc && (lvds & LVDS_PORT_EN)) {
  945. fixed_mode = intel_crtc_mode_get(dev, crtc);
  946. if (fixed_mode) {
  947. DRM_DEBUG_KMS("using current (BIOS) mode: ");
  948. drm_mode_debug_printmodeline(fixed_mode);
  949. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  950. goto out;
  951. }
  952. }
  953. /* If we still don't have a mode after all that, give up. */
  954. if (!fixed_mode)
  955. goto failed;
  956. out:
  957. lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  958. DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  959. lvds_encoder->is_dual_link ? "dual" : "single");
  960. /*
  961. * Unlock registers and just
  962. * leave them unlocked
  963. */
  964. if (HAS_PCH_SPLIT(dev)) {
  965. I915_WRITE(PCH_PP_CONTROL,
  966. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  967. } else {
  968. I915_WRITE(PP_CONTROL,
  969. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  970. }
  971. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  972. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  973. DRM_DEBUG_KMS("lid notifier registration failed\n");
  974. lvds_connector->lid_notifier.notifier_call = NULL;
  975. }
  976. drm_sysfs_connector_add(connector);
  977. intel_panel_init(&intel_connector->panel, fixed_mode);
  978. intel_panel_setup_backlight(connector);
  979. return;
  980. failed:
  981. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  982. drm_connector_cleanup(connector);
  983. drm_encoder_cleanup(encoder);
  984. if (fixed_mode)
  985. drm_mode_destroy(dev, fixed_mode);
  986. kfree(lvds_encoder);
  987. kfree(lvds_connector);
  988. return;
  989. }