intel_dvo.c 16 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. */
  27. #include <linux/i2c.h>
  28. #include <linux/slab.h>
  29. #include <drm/drmP.h>
  30. #include <drm/drm_crtc.h>
  31. #include "intel_drv.h"
  32. #include <drm/i915_drm.h>
  33. #include "i915_drv.h"
  34. #include "dvo.h"
  35. #define SIL164_ADDR 0x38
  36. #define CH7xxx_ADDR 0x76
  37. #define TFP410_ADDR 0x38
  38. #define NS2501_ADDR 0x38
  39. static const struct intel_dvo_device intel_dvo_devices[] = {
  40. {
  41. .type = INTEL_DVO_CHIP_TMDS,
  42. .name = "sil164",
  43. .dvo_reg = DVOC,
  44. .slave_addr = SIL164_ADDR,
  45. .dev_ops = &sil164_ops,
  46. },
  47. {
  48. .type = INTEL_DVO_CHIP_TMDS,
  49. .name = "ch7xxx",
  50. .dvo_reg = DVOC,
  51. .slave_addr = CH7xxx_ADDR,
  52. .dev_ops = &ch7xxx_ops,
  53. },
  54. {
  55. .type = INTEL_DVO_CHIP_TMDS,
  56. .name = "ch7xxx",
  57. .dvo_reg = DVOC,
  58. .slave_addr = 0x75, /* For some ch7010 */
  59. .dev_ops = &ch7xxx_ops,
  60. },
  61. {
  62. .type = INTEL_DVO_CHIP_LVDS,
  63. .name = "ivch",
  64. .dvo_reg = DVOA,
  65. .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
  66. .dev_ops = &ivch_ops,
  67. },
  68. {
  69. .type = INTEL_DVO_CHIP_TMDS,
  70. .name = "tfp410",
  71. .dvo_reg = DVOC,
  72. .slave_addr = TFP410_ADDR,
  73. .dev_ops = &tfp410_ops,
  74. },
  75. {
  76. .type = INTEL_DVO_CHIP_LVDS,
  77. .name = "ch7017",
  78. .dvo_reg = DVOC,
  79. .slave_addr = 0x75,
  80. .gpio = GMBUS_PORT_DPB,
  81. .dev_ops = &ch7017_ops,
  82. },
  83. {
  84. .type = INTEL_DVO_CHIP_TMDS,
  85. .name = "ns2501",
  86. .dvo_reg = DVOC,
  87. .slave_addr = NS2501_ADDR,
  88. .dev_ops = &ns2501_ops,
  89. }
  90. };
  91. struct intel_dvo {
  92. struct intel_encoder base;
  93. struct intel_dvo_device dev;
  94. struct drm_display_mode *panel_fixed_mode;
  95. bool panel_wants_dither;
  96. };
  97. static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
  98. {
  99. return container_of(encoder, struct intel_dvo, base);
  100. }
  101. static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
  102. {
  103. return enc_to_dvo(intel_attached_encoder(connector));
  104. }
  105. static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
  106. {
  107. struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
  108. return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
  109. }
  110. static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
  111. enum pipe *pipe)
  112. {
  113. struct drm_device *dev = encoder->base.dev;
  114. struct drm_i915_private *dev_priv = dev->dev_private;
  115. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  116. u32 tmp;
  117. tmp = I915_READ(intel_dvo->dev.dvo_reg);
  118. if (!(tmp & DVO_ENABLE))
  119. return false;
  120. *pipe = PORT_TO_PIPE(tmp);
  121. return true;
  122. }
  123. static void intel_dvo_get_config(struct intel_encoder *encoder,
  124. struct intel_crtc_config *pipe_config)
  125. {
  126. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  127. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  128. u32 tmp, flags = 0;
  129. tmp = I915_READ(intel_dvo->dev.dvo_reg);
  130. if (tmp & DVO_HSYNC_ACTIVE_HIGH)
  131. flags |= DRM_MODE_FLAG_PHSYNC;
  132. else
  133. flags |= DRM_MODE_FLAG_NHSYNC;
  134. if (tmp & DVO_VSYNC_ACTIVE_HIGH)
  135. flags |= DRM_MODE_FLAG_PVSYNC;
  136. else
  137. flags |= DRM_MODE_FLAG_NVSYNC;
  138. pipe_config->adjusted_mode.flags |= flags;
  139. }
  140. static void intel_disable_dvo(struct intel_encoder *encoder)
  141. {
  142. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  143. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  144. u32 dvo_reg = intel_dvo->dev.dvo_reg;
  145. u32 temp = I915_READ(dvo_reg);
  146. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
  147. I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
  148. I915_READ(dvo_reg);
  149. }
  150. static void intel_enable_dvo(struct intel_encoder *encoder)
  151. {
  152. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  153. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  154. u32 dvo_reg = intel_dvo->dev.dvo_reg;
  155. u32 temp = I915_READ(dvo_reg);
  156. I915_WRITE(dvo_reg, temp | DVO_ENABLE);
  157. I915_READ(dvo_reg);
  158. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
  159. }
  160. /* Special dpms function to support cloning between dvo/sdvo/crt. */
  161. static void intel_dvo_dpms(struct drm_connector *connector, int mode)
  162. {
  163. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  164. struct drm_crtc *crtc;
  165. /* dvo supports only 2 dpms states. */
  166. if (mode != DRM_MODE_DPMS_ON)
  167. mode = DRM_MODE_DPMS_OFF;
  168. if (mode == connector->dpms)
  169. return;
  170. connector->dpms = mode;
  171. /* Only need to change hw state when actually enabled */
  172. crtc = intel_dvo->base.base.crtc;
  173. if (!crtc) {
  174. intel_dvo->base.connectors_active = false;
  175. return;
  176. }
  177. /* We call connector dpms manually below in case pipe dpms doesn't
  178. * change due to cloning. */
  179. if (mode == DRM_MODE_DPMS_ON) {
  180. intel_dvo->base.connectors_active = true;
  181. intel_crtc_update_dpms(crtc);
  182. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
  183. } else {
  184. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
  185. intel_dvo->base.connectors_active = false;
  186. intel_crtc_update_dpms(crtc);
  187. }
  188. intel_modeset_check_state(connector->dev);
  189. }
  190. static int intel_dvo_mode_valid(struct drm_connector *connector,
  191. struct drm_display_mode *mode)
  192. {
  193. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  194. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  195. return MODE_NO_DBLESCAN;
  196. /* XXX: Validate clock range */
  197. if (intel_dvo->panel_fixed_mode) {
  198. if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
  199. return MODE_PANEL;
  200. if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
  201. return MODE_PANEL;
  202. }
  203. return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
  204. }
  205. static bool intel_dvo_compute_config(struct intel_encoder *encoder,
  206. struct intel_crtc_config *pipe_config)
  207. {
  208. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  209. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  210. /* If we have timings from the BIOS for the panel, put them in
  211. * to the adjusted mode. The CRTC will be set up for this mode,
  212. * with the panel scaling set up to source from the H/VDisplay
  213. * of the original mode.
  214. */
  215. if (intel_dvo->panel_fixed_mode != NULL) {
  216. #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
  217. C(hdisplay);
  218. C(hsync_start);
  219. C(hsync_end);
  220. C(htotal);
  221. C(vdisplay);
  222. C(vsync_start);
  223. C(vsync_end);
  224. C(vtotal);
  225. C(clock);
  226. #undef C
  227. }
  228. if (intel_dvo->dev.dev_ops->mode_fixup)
  229. return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev,
  230. &pipe_config->requested_mode,
  231. adjusted_mode);
  232. return true;
  233. }
  234. static void intel_dvo_mode_set(struct intel_encoder *encoder)
  235. {
  236. struct drm_device *dev = encoder->base.dev;
  237. struct drm_i915_private *dev_priv = dev->dev_private;
  238. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  239. struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
  240. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  241. int pipe = crtc->pipe;
  242. u32 dvo_val;
  243. u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
  244. switch (dvo_reg) {
  245. case DVOA:
  246. default:
  247. dvo_srcdim_reg = DVOA_SRCDIM;
  248. break;
  249. case DVOB:
  250. dvo_srcdim_reg = DVOB_SRCDIM;
  251. break;
  252. case DVOC:
  253. dvo_srcdim_reg = DVOC_SRCDIM;
  254. break;
  255. }
  256. intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
  257. &crtc->config.requested_mode,
  258. adjusted_mode);
  259. /* Save the data order, since I don't know what it should be set to. */
  260. dvo_val = I915_READ(dvo_reg) &
  261. (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
  262. dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
  263. DVO_BLANK_ACTIVE_HIGH;
  264. if (pipe == 1)
  265. dvo_val |= DVO_PIPE_B_SELECT;
  266. dvo_val |= DVO_PIPE_STALL;
  267. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  268. dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
  269. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  270. dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
  271. /*I915_WRITE(DVOB_SRCDIM,
  272. (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
  273. (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
  274. I915_WRITE(dvo_srcdim_reg,
  275. (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
  276. (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
  277. /*I915_WRITE(DVOB, dvo_val);*/
  278. I915_WRITE(dvo_reg, dvo_val);
  279. }
  280. /**
  281. * Detect the output connection on our DVO device.
  282. *
  283. * Unimplemented.
  284. */
  285. static enum drm_connector_status
  286. intel_dvo_detect(struct drm_connector *connector, bool force)
  287. {
  288. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  289. DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  290. connector->base.id, drm_get_connector_name(connector));
  291. return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
  292. }
  293. static int intel_dvo_get_modes(struct drm_connector *connector)
  294. {
  295. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  296. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  297. /* We should probably have an i2c driver get_modes function for those
  298. * devices which will have a fixed set of modes determined by the chip
  299. * (TV-out, for example), but for now with just TMDS and LVDS,
  300. * that's not the case.
  301. */
  302. intel_ddc_get_modes(connector,
  303. intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
  304. if (!list_empty(&connector->probed_modes))
  305. return 1;
  306. if (intel_dvo->panel_fixed_mode != NULL) {
  307. struct drm_display_mode *mode;
  308. mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
  309. if (mode) {
  310. drm_mode_probed_add(connector, mode);
  311. return 1;
  312. }
  313. }
  314. return 0;
  315. }
  316. static void intel_dvo_destroy(struct drm_connector *connector)
  317. {
  318. drm_sysfs_connector_remove(connector);
  319. drm_connector_cleanup(connector);
  320. kfree(connector);
  321. }
  322. static const struct drm_connector_funcs intel_dvo_connector_funcs = {
  323. .dpms = intel_dvo_dpms,
  324. .detect = intel_dvo_detect,
  325. .destroy = intel_dvo_destroy,
  326. .fill_modes = drm_helper_probe_single_connector_modes,
  327. };
  328. static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
  329. .mode_valid = intel_dvo_mode_valid,
  330. .get_modes = intel_dvo_get_modes,
  331. .best_encoder = intel_best_encoder,
  332. };
  333. static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
  334. {
  335. struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
  336. if (intel_dvo->dev.dev_ops->destroy)
  337. intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
  338. kfree(intel_dvo->panel_fixed_mode);
  339. intel_encoder_destroy(encoder);
  340. }
  341. static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
  342. .destroy = intel_dvo_enc_destroy,
  343. };
  344. /**
  345. * Attempts to get a fixed panel timing for LVDS (currently only the i830).
  346. *
  347. * Other chips with DVO LVDS will need to extend this to deal with the LVDS
  348. * chip being on DVOB/C and having multiple pipes.
  349. */
  350. static struct drm_display_mode *
  351. intel_dvo_get_current_mode(struct drm_connector *connector)
  352. {
  353. struct drm_device *dev = connector->dev;
  354. struct drm_i915_private *dev_priv = dev->dev_private;
  355. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  356. uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
  357. struct drm_display_mode *mode = NULL;
  358. /* If the DVO port is active, that'll be the LVDS, so we can pull out
  359. * its timings to get how the BIOS set up the panel.
  360. */
  361. if (dvo_val & DVO_ENABLE) {
  362. struct drm_crtc *crtc;
  363. int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
  364. crtc = intel_get_crtc_for_pipe(dev, pipe);
  365. if (crtc) {
  366. mode = intel_crtc_mode_get(dev, crtc);
  367. if (mode) {
  368. mode->type |= DRM_MODE_TYPE_PREFERRED;
  369. if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
  370. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  371. if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
  372. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  373. }
  374. }
  375. }
  376. return mode;
  377. }
  378. void intel_dvo_init(struct drm_device *dev)
  379. {
  380. struct drm_i915_private *dev_priv = dev->dev_private;
  381. struct intel_encoder *intel_encoder;
  382. struct intel_dvo *intel_dvo;
  383. struct intel_connector *intel_connector;
  384. int i;
  385. int encoder_type = DRM_MODE_ENCODER_NONE;
  386. intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
  387. if (!intel_dvo)
  388. return;
  389. intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  390. if (!intel_connector) {
  391. kfree(intel_dvo);
  392. return;
  393. }
  394. intel_encoder = &intel_dvo->base;
  395. drm_encoder_init(dev, &intel_encoder->base,
  396. &intel_dvo_enc_funcs, encoder_type);
  397. intel_encoder->disable = intel_disable_dvo;
  398. intel_encoder->enable = intel_enable_dvo;
  399. intel_encoder->get_hw_state = intel_dvo_get_hw_state;
  400. intel_encoder->get_config = intel_dvo_get_config;
  401. intel_encoder->compute_config = intel_dvo_compute_config;
  402. intel_encoder->mode_set = intel_dvo_mode_set;
  403. intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
  404. /* Now, try to find a controller */
  405. for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
  406. struct drm_connector *connector = &intel_connector->base;
  407. const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
  408. struct i2c_adapter *i2c;
  409. int gpio;
  410. bool dvoinit;
  411. /* Allow the I2C driver info to specify the GPIO to be used in
  412. * special cases, but otherwise default to what's defined
  413. * in the spec.
  414. */
  415. if (intel_gmbus_is_port_valid(dvo->gpio))
  416. gpio = dvo->gpio;
  417. else if (dvo->type == INTEL_DVO_CHIP_LVDS)
  418. gpio = GMBUS_PORT_SSC;
  419. else
  420. gpio = GMBUS_PORT_DPB;
  421. /* Set up the I2C bus necessary for the chip we're probing.
  422. * It appears that everything is on GPIOE except for panels
  423. * on i830 laptops, which are on GPIOB (DVOA).
  424. */
  425. i2c = intel_gmbus_get_adapter(dev_priv, gpio);
  426. intel_dvo->dev = *dvo;
  427. /* GMBUS NAK handling seems to be unstable, hence let the
  428. * transmitter detection run in bit banging mode for now.
  429. */
  430. intel_gmbus_force_bit(i2c, true);
  431. dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
  432. intel_gmbus_force_bit(i2c, false);
  433. if (!dvoinit)
  434. continue;
  435. intel_encoder->type = INTEL_OUTPUT_DVO;
  436. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  437. switch (dvo->type) {
  438. case INTEL_DVO_CHIP_TMDS:
  439. intel_encoder->cloneable = true;
  440. drm_connector_init(dev, connector,
  441. &intel_dvo_connector_funcs,
  442. DRM_MODE_CONNECTOR_DVII);
  443. encoder_type = DRM_MODE_ENCODER_TMDS;
  444. break;
  445. case INTEL_DVO_CHIP_LVDS:
  446. intel_encoder->cloneable = false;
  447. drm_connector_init(dev, connector,
  448. &intel_dvo_connector_funcs,
  449. DRM_MODE_CONNECTOR_LVDS);
  450. encoder_type = DRM_MODE_ENCODER_LVDS;
  451. break;
  452. }
  453. drm_connector_helper_add(connector,
  454. &intel_dvo_connector_helper_funcs);
  455. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  456. connector->interlace_allowed = false;
  457. connector->doublescan_allowed = false;
  458. intel_connector_attach_encoder(intel_connector, intel_encoder);
  459. if (dvo->type == INTEL_DVO_CHIP_LVDS) {
  460. /* For our LVDS chipsets, we should hopefully be able
  461. * to dig the fixed panel mode out of the BIOS data.
  462. * However, it's in a different format from the BIOS
  463. * data on chipsets with integrated LVDS (stored in AIM
  464. * headers, likely), so for now, just get the current
  465. * mode being output through DVO.
  466. */
  467. intel_dvo->panel_fixed_mode =
  468. intel_dvo_get_current_mode(connector);
  469. intel_dvo->panel_wants_dither = true;
  470. }
  471. drm_sysfs_connector_add(connector);
  472. return;
  473. }
  474. drm_encoder_cleanup(&intel_encoder->base);
  475. kfree(intel_dvo);
  476. kfree(intel_connector);
  477. }