iwl-rx.c 17 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/etherdevice.h>
  30. #include <net/mac80211.h>
  31. #include <asm/unaligned.h>
  32. #include "iwl-eeprom.h"
  33. #include "iwl-dev.h"
  34. #include "iwl-core.h"
  35. #include "iwl-sta.h"
  36. #include "iwl-io.h"
  37. #include "iwl-calib.h"
  38. #include "iwl-helpers.h"
  39. /************************** RX-FUNCTIONS ****************************/
  40. /*
  41. * Rx theory of operation
  42. *
  43. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  44. * each of which point to Receive Buffers to be filled by the NIC. These get
  45. * used not only for Rx frames, but for any command response or notification
  46. * from the NIC. The driver and NIC manage the Rx buffers by means
  47. * of indexes into the circular buffer.
  48. *
  49. * Rx Queue Indexes
  50. * The host/firmware share two index registers for managing the Rx buffers.
  51. *
  52. * The READ index maps to the first position that the firmware may be writing
  53. * to -- the driver can read up to (but not including) this position and get
  54. * good data.
  55. * The READ index is managed by the firmware once the card is enabled.
  56. *
  57. * The WRITE index maps to the last position the driver has read from -- the
  58. * position preceding WRITE is the last slot the firmware can place a packet.
  59. *
  60. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  61. * WRITE = READ.
  62. *
  63. * During initialization, the host sets up the READ queue position to the first
  64. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  65. *
  66. * When the firmware places a packet in a buffer, it will advance the READ index
  67. * and fire the RX interrupt. The driver can then query the READ index and
  68. * process as many packets as possible, moving the WRITE index forward as it
  69. * resets the Rx queue buffers with new memory.
  70. *
  71. * The management in the driver is as follows:
  72. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  73. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  74. * to replenish the iwl->rxq->rx_free.
  75. * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  76. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  77. * 'processed' and 'read' driver indexes as well)
  78. * + A received packet is processed and handed to the kernel network stack,
  79. * detached from the iwl->rxq. The driver 'processed' index is updated.
  80. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  81. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  82. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  83. * were enough free buffers and RX_STALLED is set it is cleared.
  84. *
  85. *
  86. * Driver sequence:
  87. *
  88. * iwl_rx_queue_alloc() Allocates rx_free
  89. * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
  90. * iwl_rx_queue_restock
  91. * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  92. * queue, updates firmware pointers, and updates
  93. * the WRITE index. If insufficient rx_free buffers
  94. * are available, schedules iwl_rx_replenish
  95. *
  96. * -- enable interrupts --
  97. * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
  98. * READ INDEX, detaching the SKB from the pool.
  99. * Moves the packet buffer from queue to rx_used.
  100. * Calls iwl_rx_queue_restock to refill any empty
  101. * slots.
  102. * ...
  103. *
  104. */
  105. /**
  106. * iwl_rx_queue_space - Return number of free slots available in queue.
  107. */
  108. int iwl_rx_queue_space(const struct iwl_rx_queue *q)
  109. {
  110. int s = q->read - q->write;
  111. if (s <= 0)
  112. s += RX_QUEUE_SIZE;
  113. /* keep some buffer to not confuse full and empty queue */
  114. s -= 2;
  115. if (s < 0)
  116. s = 0;
  117. return s;
  118. }
  119. EXPORT_SYMBOL(iwl_rx_queue_space);
  120. /**
  121. * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  122. */
  123. void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
  124. {
  125. unsigned long flags;
  126. u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
  127. u32 reg;
  128. spin_lock_irqsave(&q->lock, flags);
  129. if (q->need_update == 0)
  130. goto exit_unlock;
  131. /* If power-saving is in use, make sure device is awake */
  132. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  133. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  134. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  135. IWL_DEBUG_INFO(priv, "Rx queue requesting wakeup, GP1 = 0x%x\n",
  136. reg);
  137. iwl_set_bit(priv, CSR_GP_CNTRL,
  138. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  139. goto exit_unlock;
  140. }
  141. q->write_actual = (q->write & ~0x7);
  142. iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
  143. /* Else device is assumed to be awake */
  144. } else {
  145. /* Device expects a multiple of 8 */
  146. q->write_actual = (q->write & ~0x7);
  147. iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
  148. }
  149. q->need_update = 0;
  150. exit_unlock:
  151. spin_unlock_irqrestore(&q->lock, flags);
  152. }
  153. EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
  154. int iwl_rx_queue_alloc(struct iwl_priv *priv)
  155. {
  156. struct iwl_rx_queue *rxq = &priv->rxq;
  157. struct device *dev = &priv->pci_dev->dev;
  158. int i;
  159. spin_lock_init(&rxq->lock);
  160. INIT_LIST_HEAD(&rxq->rx_free);
  161. INIT_LIST_HEAD(&rxq->rx_used);
  162. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  163. rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr,
  164. GFP_KERNEL);
  165. if (!rxq->bd)
  166. goto err_bd;
  167. rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct iwl_rb_status),
  168. &rxq->rb_stts_dma, GFP_KERNEL);
  169. if (!rxq->rb_stts)
  170. goto err_rb;
  171. /* Fill the rx_used queue with _all_ of the Rx buffers */
  172. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  173. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  174. /* Set us so that we have processed and used all buffers, but have
  175. * not restocked the Rx queue with fresh buffers */
  176. rxq->read = rxq->write = 0;
  177. rxq->write_actual = 0;
  178. rxq->free_count = 0;
  179. rxq->need_update = 0;
  180. return 0;
  181. err_rb:
  182. dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  183. rxq->dma_addr);
  184. err_bd:
  185. return -ENOMEM;
  186. }
  187. EXPORT_SYMBOL(iwl_rx_queue_alloc);
  188. void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
  189. struct iwl_rx_mem_buffer *rxb)
  190. {
  191. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  192. struct iwl_missed_beacon_notif *missed_beacon;
  193. missed_beacon = &pkt->u.missed_beacon;
  194. if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) >
  195. priv->missed_beacon_threshold) {
  196. IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
  197. le32_to_cpu(missed_beacon->consecutive_missed_beacons),
  198. le32_to_cpu(missed_beacon->total_missed_becons),
  199. le32_to_cpu(missed_beacon->num_recvd_beacons),
  200. le32_to_cpu(missed_beacon->num_expected_beacons));
  201. if (!test_bit(STATUS_SCANNING, &priv->status))
  202. iwl_init_sensitivity(priv);
  203. }
  204. }
  205. EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
  206. void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
  207. struct iwl_rx_mem_buffer *rxb)
  208. {
  209. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  210. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  211. if (!report->state) {
  212. IWL_DEBUG_11H(priv,
  213. "Spectrum Measure Notification: Start\n");
  214. return;
  215. }
  216. memcpy(&priv->measure_report, report, sizeof(*report));
  217. priv->measurement_status |= MEASUREMENT_READY;
  218. }
  219. EXPORT_SYMBOL(iwl_rx_spectrum_measure_notif);
  220. /* Calculate noise level, based on measurements during network silence just
  221. * before arriving beacon. This measurement can be done only if we know
  222. * exactly when to expect beacons, therefore only when we're associated. */
  223. static void iwl_rx_calc_noise(struct iwl_priv *priv)
  224. {
  225. struct statistics_rx_non_phy *rx_info
  226. = &(priv->statistics.rx.general);
  227. int num_active_rx = 0;
  228. int total_silence = 0;
  229. int bcn_silence_a =
  230. le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
  231. int bcn_silence_b =
  232. le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
  233. int bcn_silence_c =
  234. le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
  235. int last_rx_noise;
  236. if (bcn_silence_a) {
  237. total_silence += bcn_silence_a;
  238. num_active_rx++;
  239. }
  240. if (bcn_silence_b) {
  241. total_silence += bcn_silence_b;
  242. num_active_rx++;
  243. }
  244. if (bcn_silence_c) {
  245. total_silence += bcn_silence_c;
  246. num_active_rx++;
  247. }
  248. /* Average among active antennas */
  249. if (num_active_rx)
  250. last_rx_noise = (total_silence / num_active_rx) - 107;
  251. else
  252. last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  253. IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
  254. bcn_silence_a, bcn_silence_b, bcn_silence_c,
  255. last_rx_noise);
  256. }
  257. #ifdef CONFIG_IWLWIFI_DEBUG
  258. /*
  259. * based on the assumption of all statistics counter are in DWORD
  260. * FIXME: This function is for debugging, do not deal with
  261. * the case of counters roll-over.
  262. */
  263. static void iwl_accumulative_statistics(struct iwl_priv *priv,
  264. __le32 *stats)
  265. {
  266. int i;
  267. __le32 *prev_stats;
  268. u32 *accum_stats;
  269. u32 *delta, *max_delta;
  270. prev_stats = (__le32 *)&priv->statistics;
  271. accum_stats = (u32 *)&priv->accum_statistics;
  272. delta = (u32 *)&priv->delta_statistics;
  273. max_delta = (u32 *)&priv->max_delta;
  274. for (i = sizeof(__le32); i < sizeof(struct iwl_notif_statistics);
  275. i += sizeof(__le32), stats++, prev_stats++, delta++,
  276. max_delta++, accum_stats++) {
  277. if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
  278. *delta = (le32_to_cpu(*stats) -
  279. le32_to_cpu(*prev_stats));
  280. *accum_stats += *delta;
  281. if (*delta > *max_delta)
  282. *max_delta = *delta;
  283. }
  284. }
  285. /* reset accumulative statistics for "no-counter" type statistics */
  286. priv->accum_statistics.general.temperature =
  287. priv->statistics.general.temperature;
  288. priv->accum_statistics.general.temperature_m =
  289. priv->statistics.general.temperature_m;
  290. priv->accum_statistics.general.ttl_timestamp =
  291. priv->statistics.general.ttl_timestamp;
  292. priv->accum_statistics.tx.tx_power.ant_a =
  293. priv->statistics.tx.tx_power.ant_a;
  294. priv->accum_statistics.tx.tx_power.ant_b =
  295. priv->statistics.tx.tx_power.ant_b;
  296. priv->accum_statistics.tx.tx_power.ant_c =
  297. priv->statistics.tx.tx_power.ant_c;
  298. }
  299. #endif
  300. #define REG_RECALIB_PERIOD (60)
  301. /**
  302. * iwl_good_plcp_health - checks for plcp error.
  303. *
  304. * When the plcp error is exceeding the thresholds, reset the radio
  305. * to improve the throughput.
  306. */
  307. bool iwl_good_plcp_health(struct iwl_priv *priv,
  308. struct iwl_rx_packet *pkt)
  309. {
  310. bool rc = true;
  311. int combined_plcp_delta;
  312. unsigned int plcp_msec;
  313. unsigned long plcp_received_jiffies;
  314. /*
  315. * check for plcp_err and trigger radio reset if it exceeds
  316. * the plcp error threshold plcp_delta.
  317. */
  318. plcp_received_jiffies = jiffies;
  319. plcp_msec = jiffies_to_msecs((long) plcp_received_jiffies -
  320. (long) priv->plcp_jiffies);
  321. priv->plcp_jiffies = plcp_received_jiffies;
  322. /*
  323. * check to make sure plcp_msec is not 0 to prevent division
  324. * by zero.
  325. */
  326. if (plcp_msec) {
  327. combined_plcp_delta =
  328. (le32_to_cpu(pkt->u.stats.rx.ofdm.plcp_err) -
  329. le32_to_cpu(priv->statistics.rx.ofdm.plcp_err)) +
  330. (le32_to_cpu(pkt->u.stats.rx.ofdm_ht.plcp_err) -
  331. le32_to_cpu(priv->statistics.rx.ofdm_ht.plcp_err));
  332. if ((combined_plcp_delta > 0) &&
  333. ((combined_plcp_delta * 100) / plcp_msec) >
  334. priv->cfg->plcp_delta_threshold) {
  335. /*
  336. * if plcp_err exceed the threshold,
  337. * the following data is printed in csv format:
  338. * Text: plcp_err exceeded %d,
  339. * Received ofdm.plcp_err,
  340. * Current ofdm.plcp_err,
  341. * Received ofdm_ht.plcp_err,
  342. * Current ofdm_ht.plcp_err,
  343. * combined_plcp_delta,
  344. * plcp_msec
  345. */
  346. IWL_DEBUG_RADIO(priv, "plcp_err exceeded %u, "
  347. "%u, %u, %u, %u, %d, %u mSecs\n",
  348. priv->cfg->plcp_delta_threshold,
  349. le32_to_cpu(pkt->u.stats.rx.ofdm.plcp_err),
  350. le32_to_cpu(priv->statistics.rx.ofdm.plcp_err),
  351. le32_to_cpu(pkt->u.stats.rx.ofdm_ht.plcp_err),
  352. le32_to_cpu(
  353. priv->statistics.rx.ofdm_ht.plcp_err),
  354. combined_plcp_delta, plcp_msec);
  355. rc = false;
  356. }
  357. }
  358. return rc;
  359. }
  360. EXPORT_SYMBOL(iwl_good_plcp_health);
  361. static void iwl_recover_from_statistics(struct iwl_priv *priv,
  362. struct iwl_rx_packet *pkt)
  363. {
  364. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  365. return;
  366. if (iwl_is_associated(priv)) {
  367. if (priv->cfg->ops->lib->check_ack_health) {
  368. if (!priv->cfg->ops->lib->check_ack_health(
  369. priv, pkt)) {
  370. /*
  371. * low ack count detected
  372. * restart Firmware
  373. */
  374. IWL_ERR(priv, "low ack count detected, "
  375. "restart firmware\n");
  376. iwl_force_reset(priv, IWL_FW_RESET);
  377. }
  378. } else if (priv->cfg->ops->lib->check_plcp_health) {
  379. if (!priv->cfg->ops->lib->check_plcp_health(
  380. priv, pkt)) {
  381. /*
  382. * high plcp error detected
  383. * reset Radio
  384. */
  385. iwl_force_reset(priv, IWL_RF_RESET);
  386. }
  387. }
  388. }
  389. }
  390. void iwl_rx_statistics(struct iwl_priv *priv,
  391. struct iwl_rx_mem_buffer *rxb)
  392. {
  393. int change;
  394. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  395. IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
  396. (int)sizeof(priv->statistics),
  397. le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
  398. change = ((priv->statistics.general.temperature !=
  399. pkt->u.stats.general.temperature) ||
  400. ((priv->statistics.flag &
  401. STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
  402. (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)));
  403. #ifdef CONFIG_IWLWIFI_DEBUG
  404. iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats);
  405. #endif
  406. iwl_recover_from_statistics(priv, pkt);
  407. memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
  408. set_bit(STATUS_STATISTICS, &priv->status);
  409. /* Reschedule the statistics timer to occur in
  410. * REG_RECALIB_PERIOD seconds to ensure we get a
  411. * thermal update even if the uCode doesn't give
  412. * us one */
  413. mod_timer(&priv->statistics_periodic, jiffies +
  414. msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
  415. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  416. (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
  417. iwl_rx_calc_noise(priv);
  418. queue_work(priv->workqueue, &priv->run_time_calib_work);
  419. }
  420. if (priv->cfg->ops->lib->temp_ops.temperature && change)
  421. priv->cfg->ops->lib->temp_ops.temperature(priv);
  422. }
  423. EXPORT_SYMBOL(iwl_rx_statistics);
  424. void iwl_reply_statistics(struct iwl_priv *priv,
  425. struct iwl_rx_mem_buffer *rxb)
  426. {
  427. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  428. if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATISTICS_CLEAR_MSK) {
  429. #ifdef CONFIG_IWLWIFI_DEBUG
  430. memset(&priv->accum_statistics, 0,
  431. sizeof(struct iwl_notif_statistics));
  432. memset(&priv->delta_statistics, 0,
  433. sizeof(struct iwl_notif_statistics));
  434. memset(&priv->max_delta, 0,
  435. sizeof(struct iwl_notif_statistics));
  436. #endif
  437. IWL_DEBUG_RX(priv, "Statistics have been cleared\n");
  438. }
  439. iwl_rx_statistics(priv, rxb);
  440. }
  441. EXPORT_SYMBOL(iwl_reply_statistics);
  442. /*
  443. * returns non-zero if packet should be dropped
  444. */
  445. int iwl_set_decrypted_flag(struct iwl_priv *priv,
  446. struct ieee80211_hdr *hdr,
  447. u32 decrypt_res,
  448. struct ieee80211_rx_status *stats)
  449. {
  450. u16 fc = le16_to_cpu(hdr->frame_control);
  451. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  452. return 0;
  453. if (!(fc & IEEE80211_FCTL_PROTECTED))
  454. return 0;
  455. IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
  456. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  457. case RX_RES_STATUS_SEC_TYPE_TKIP:
  458. /* The uCode has got a bad phase 1 Key, pushes the packet.
  459. * Decryption will be done in SW. */
  460. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  461. RX_RES_STATUS_BAD_KEY_TTAK)
  462. break;
  463. case RX_RES_STATUS_SEC_TYPE_WEP:
  464. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  465. RX_RES_STATUS_BAD_ICV_MIC) {
  466. /* bad ICV, the packet is destroyed since the
  467. * decryption is inplace, drop it */
  468. IWL_DEBUG_RX(priv, "Packet destroyed\n");
  469. return -1;
  470. }
  471. case RX_RES_STATUS_SEC_TYPE_CCMP:
  472. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  473. RX_RES_STATUS_DECRYPT_OK) {
  474. IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
  475. stats->flag |= RX_FLAG_DECRYPTED;
  476. }
  477. break;
  478. default:
  479. break;
  480. }
  481. return 0;
  482. }
  483. EXPORT_SYMBOL(iwl_set_decrypted_flag);