stamp.c 77 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/kernel.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/io.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/nand.h>
  14. #include <linux/mtd/partitions.h>
  15. #include <linux/mtd/plat-ram.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/spi/spi.h>
  18. #include <linux/spi/flash.h>
  19. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  20. #include <linux/usb/isp1362.h>
  21. #endif
  22. #include <linux/i2c.h>
  23. #include <linux/i2c/adp5588.h>
  24. #include <linux/etherdevice.h>
  25. #include <linux/ata_platform.h>
  26. #include <linux/irq.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/usb/sl811.h>
  29. #include <linux/spi/mmc_spi.h>
  30. #include <linux/leds.h>
  31. #include <linux/input.h>
  32. #include <asm/dma.h>
  33. #include <asm/bfin5xx_spi.h>
  34. #include <asm/reboot.h>
  35. #include <asm/portmux.h>
  36. #include <asm/dpmc.h>
  37. #include <asm/bfin_sport.h>
  38. #ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
  39. #include <linux/regulator/fixed.h>
  40. #endif
  41. #include <linux/regulator/machine.h>
  42. #include <linux/regulator/consumer.h>
  43. #include <linux/regulator/userspace-consumer.h>
  44. /*
  45. * Name the Board for the /proc/cpuinfo
  46. */
  47. const char bfin_board_name[] = "ADI BF537-STAMP";
  48. /*
  49. * Driver needs to know address, irq and flag pin.
  50. */
  51. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  52. #include <linux/usb/isp1760.h>
  53. static struct resource bfin_isp1760_resources[] = {
  54. [0] = {
  55. .start = 0x203C0000,
  56. .end = 0x203C0000 + 0x000fffff,
  57. .flags = IORESOURCE_MEM,
  58. },
  59. [1] = {
  60. .start = IRQ_PF7,
  61. .end = IRQ_PF7,
  62. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  63. },
  64. };
  65. static struct isp1760_platform_data isp1760_priv = {
  66. .is_isp1761 = 0,
  67. .bus_width_16 = 1,
  68. .port1_otg = 0,
  69. .analog_oc = 0,
  70. .dack_polarity_high = 0,
  71. .dreq_polarity_high = 0,
  72. };
  73. static struct platform_device bfin_isp1760_device = {
  74. .name = "isp1760",
  75. .id = 0,
  76. .dev = {
  77. .platform_data = &isp1760_priv,
  78. },
  79. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  80. .resource = bfin_isp1760_resources,
  81. };
  82. #endif
  83. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  84. #include <linux/gpio_keys.h>
  85. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  86. {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
  87. {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
  88. {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
  89. {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
  90. };
  91. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  92. .buttons = bfin_gpio_keys_table,
  93. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  94. };
  95. static struct platform_device bfin_device_gpiokeys = {
  96. .name = "gpio-keys",
  97. .dev = {
  98. .platform_data = &bfin_gpio_keys_data,
  99. },
  100. };
  101. #endif
  102. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  103. static struct resource bfin_pcmcia_cf_resources[] = {
  104. {
  105. .start = 0x20310000, /* IO PORT */
  106. .end = 0x20312000,
  107. .flags = IORESOURCE_MEM,
  108. }, {
  109. .start = 0x20311000, /* Attribute Memory */
  110. .end = 0x20311FFF,
  111. .flags = IORESOURCE_MEM,
  112. }, {
  113. .start = IRQ_PF4,
  114. .end = IRQ_PF4,
  115. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  116. }, {
  117. .start = 6, /* Card Detect PF6 */
  118. .end = 6,
  119. .flags = IORESOURCE_IRQ,
  120. },
  121. };
  122. static struct platform_device bfin_pcmcia_cf_device = {
  123. .name = "bfin_cf_pcmcia",
  124. .id = -1,
  125. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  126. .resource = bfin_pcmcia_cf_resources,
  127. };
  128. #endif
  129. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  130. static struct platform_device rtc_device = {
  131. .name = "rtc-bfin",
  132. .id = -1,
  133. };
  134. #endif
  135. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  136. #include <linux/smc91x.h>
  137. static struct smc91x_platdata smc91x_info = {
  138. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  139. .leda = RPC_LED_100_10,
  140. .ledb = RPC_LED_TX_RX,
  141. };
  142. static struct resource smc91x_resources[] = {
  143. {
  144. .name = "smc91x-regs",
  145. .start = 0x20300300,
  146. .end = 0x20300300 + 16,
  147. .flags = IORESOURCE_MEM,
  148. }, {
  149. .start = IRQ_PF7,
  150. .end = IRQ_PF7,
  151. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  152. },
  153. };
  154. static struct platform_device smc91x_device = {
  155. .name = "smc91x",
  156. .id = 0,
  157. .num_resources = ARRAY_SIZE(smc91x_resources),
  158. .resource = smc91x_resources,
  159. .dev = {
  160. .platform_data = &smc91x_info,
  161. },
  162. };
  163. #endif
  164. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  165. static struct resource dm9000_resources[] = {
  166. [0] = {
  167. .start = 0x203FB800,
  168. .end = 0x203FB800 + 1,
  169. .flags = IORESOURCE_MEM,
  170. },
  171. [1] = {
  172. .start = 0x203FB804,
  173. .end = 0x203FB804 + 1,
  174. .flags = IORESOURCE_MEM,
  175. },
  176. [2] = {
  177. .start = IRQ_PF9,
  178. .end = IRQ_PF9,
  179. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  180. },
  181. };
  182. static struct platform_device dm9000_device = {
  183. .name = "dm9000",
  184. .id = -1,
  185. .num_resources = ARRAY_SIZE(dm9000_resources),
  186. .resource = dm9000_resources,
  187. };
  188. #endif
  189. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  190. static struct resource sl811_hcd_resources[] = {
  191. {
  192. .start = 0x20340000,
  193. .end = 0x20340000,
  194. .flags = IORESOURCE_MEM,
  195. }, {
  196. .start = 0x20340004,
  197. .end = 0x20340004,
  198. .flags = IORESOURCE_MEM,
  199. }, {
  200. .start = IRQ_PF4,
  201. .end = IRQ_PF4,
  202. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  203. },
  204. };
  205. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  206. void sl811_port_power(struct device *dev, int is_on)
  207. {
  208. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  209. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  210. }
  211. #endif
  212. static struct sl811_platform_data sl811_priv = {
  213. .potpg = 10,
  214. .power = 250, /* == 500mA */
  215. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  216. .port_power = &sl811_port_power,
  217. #endif
  218. };
  219. static struct platform_device sl811_hcd_device = {
  220. .name = "sl811-hcd",
  221. .id = 0,
  222. .dev = {
  223. .platform_data = &sl811_priv,
  224. },
  225. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  226. .resource = sl811_hcd_resources,
  227. };
  228. #endif
  229. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  230. static struct resource isp1362_hcd_resources[] = {
  231. {
  232. .start = 0x20360000,
  233. .end = 0x20360000,
  234. .flags = IORESOURCE_MEM,
  235. }, {
  236. .start = 0x20360004,
  237. .end = 0x20360004,
  238. .flags = IORESOURCE_MEM,
  239. }, {
  240. .start = IRQ_PF3,
  241. .end = IRQ_PF3,
  242. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  243. },
  244. };
  245. static struct isp1362_platform_data isp1362_priv = {
  246. .sel15Kres = 1,
  247. .clknotstop = 0,
  248. .oc_enable = 0,
  249. .int_act_high = 0,
  250. .int_edge_triggered = 0,
  251. .remote_wakeup_connected = 0,
  252. .no_power_switching = 1,
  253. .power_switching_mode = 0,
  254. };
  255. static struct platform_device isp1362_hcd_device = {
  256. .name = "isp1362-hcd",
  257. .id = 0,
  258. .dev = {
  259. .platform_data = &isp1362_priv,
  260. },
  261. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  262. .resource = isp1362_hcd_resources,
  263. };
  264. #endif
  265. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  266. static unsigned short bfin_can_peripherals[] = {
  267. P_CAN0_RX, P_CAN0_TX, 0
  268. };
  269. static struct resource bfin_can_resources[] = {
  270. {
  271. .start = 0xFFC02A00,
  272. .end = 0xFFC02FFF,
  273. .flags = IORESOURCE_MEM,
  274. },
  275. {
  276. .start = IRQ_CAN_RX,
  277. .end = IRQ_CAN_RX,
  278. .flags = IORESOURCE_IRQ,
  279. },
  280. {
  281. .start = IRQ_CAN_TX,
  282. .end = IRQ_CAN_TX,
  283. .flags = IORESOURCE_IRQ,
  284. },
  285. {
  286. .start = IRQ_CAN_ERROR,
  287. .end = IRQ_CAN_ERROR,
  288. .flags = IORESOURCE_IRQ,
  289. },
  290. };
  291. static struct platform_device bfin_can_device = {
  292. .name = "bfin_can",
  293. .num_resources = ARRAY_SIZE(bfin_can_resources),
  294. .resource = bfin_can_resources,
  295. .dev = {
  296. .platform_data = &bfin_can_peripherals, /* Passed to driver */
  297. },
  298. };
  299. #endif
  300. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  301. #include <linux/bfin_mac.h>
  302. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  303. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  304. {
  305. .addr = 1,
  306. .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
  307. },
  308. };
  309. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  310. .phydev_number = 1,
  311. .phydev_data = bfin_phydev_data,
  312. .phy_mode = PHY_INTERFACE_MODE_MII,
  313. .mac_peripherals = bfin_mac_peripherals,
  314. };
  315. static struct platform_device bfin_mii_bus = {
  316. .name = "bfin_mii_bus",
  317. .dev = {
  318. .platform_data = &bfin_mii_bus_data,
  319. }
  320. };
  321. static struct platform_device bfin_mac_device = {
  322. .name = "bfin_mac",
  323. .dev = {
  324. .platform_data = &bfin_mii_bus,
  325. }
  326. };
  327. #endif
  328. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  329. static struct resource net2272_bfin_resources[] = {
  330. {
  331. .start = 0x20300000,
  332. .end = 0x20300000 + 0x100,
  333. .flags = IORESOURCE_MEM,
  334. }, {
  335. .start = IRQ_PF7,
  336. .end = IRQ_PF7,
  337. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  338. },
  339. };
  340. static struct platform_device net2272_bfin_device = {
  341. .name = "net2272",
  342. .id = -1,
  343. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  344. .resource = net2272_bfin_resources,
  345. };
  346. #endif
  347. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  348. #ifdef CONFIG_MTD_PARTITIONS
  349. const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
  350. static struct mtd_partition bfin_plat_nand_partitions[] = {
  351. {
  352. .name = "linux kernel(nand)",
  353. .size = 0x400000,
  354. .offset = 0,
  355. }, {
  356. .name = "file system(nand)",
  357. .size = MTDPART_SIZ_FULL,
  358. .offset = MTDPART_OFS_APPEND,
  359. },
  360. };
  361. #endif
  362. #define BFIN_NAND_PLAT_CLE 2
  363. #define BFIN_NAND_PLAT_ALE 1
  364. static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  365. {
  366. struct nand_chip *this = mtd->priv;
  367. if (cmd == NAND_CMD_NONE)
  368. return;
  369. if (ctrl & NAND_CLE)
  370. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
  371. else
  372. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
  373. }
  374. #define BFIN_NAND_PLAT_READY GPIO_PF3
  375. static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
  376. {
  377. return gpio_get_value(BFIN_NAND_PLAT_READY);
  378. }
  379. static struct platform_nand_data bfin_plat_nand_data = {
  380. .chip = {
  381. .nr_chips = 1,
  382. .chip_delay = 30,
  383. #ifdef CONFIG_MTD_PARTITIONS
  384. .part_probe_types = part_probes,
  385. .partitions = bfin_plat_nand_partitions,
  386. .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
  387. #endif
  388. },
  389. .ctrl = {
  390. .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
  391. .dev_ready = bfin_plat_nand_dev_ready,
  392. },
  393. };
  394. #define MAX(x, y) (x > y ? x : y)
  395. static struct resource bfin_plat_nand_resources = {
  396. .start = 0x20212000,
  397. .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
  398. .flags = IORESOURCE_MEM,
  399. };
  400. static struct platform_device bfin_async_nand_device = {
  401. .name = "gen_nand",
  402. .id = -1,
  403. .num_resources = 1,
  404. .resource = &bfin_plat_nand_resources,
  405. .dev = {
  406. .platform_data = &bfin_plat_nand_data,
  407. },
  408. };
  409. static void bfin_plat_nand_init(void)
  410. {
  411. gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
  412. }
  413. #else
  414. static void bfin_plat_nand_init(void) {}
  415. #endif
  416. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  417. static struct mtd_partition stamp_partitions[] = {
  418. {
  419. .name = "bootloader(nor)",
  420. .size = 0x40000,
  421. .offset = 0,
  422. }, {
  423. .name = "linux kernel(nor)",
  424. .size = 0x180000,
  425. .offset = MTDPART_OFS_APPEND,
  426. }, {
  427. .name = "file system(nor)",
  428. .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
  429. .offset = MTDPART_OFS_APPEND,
  430. }, {
  431. .name = "MAC Address(nor)",
  432. .size = MTDPART_SIZ_FULL,
  433. .offset = 0x3F0000,
  434. .mask_flags = MTD_WRITEABLE,
  435. }
  436. };
  437. static struct physmap_flash_data stamp_flash_data = {
  438. .width = 2,
  439. .parts = stamp_partitions,
  440. .nr_parts = ARRAY_SIZE(stamp_partitions),
  441. #ifdef CONFIG_ROMKERNEL
  442. .probe_type = "map_rom",
  443. #endif
  444. };
  445. static struct resource stamp_flash_resource = {
  446. .start = 0x20000000,
  447. .end = 0x203fffff,
  448. .flags = IORESOURCE_MEM,
  449. };
  450. static struct platform_device stamp_flash_device = {
  451. .name = "physmap-flash",
  452. .id = 0,
  453. .dev = {
  454. .platform_data = &stamp_flash_data,
  455. },
  456. .num_resources = 1,
  457. .resource = &stamp_flash_resource,
  458. };
  459. #endif
  460. #if defined(CONFIG_MTD_M25P80) \
  461. || defined(CONFIG_MTD_M25P80_MODULE)
  462. static struct mtd_partition bfin_spi_flash_partitions[] = {
  463. {
  464. .name = "bootloader(spi)",
  465. .size = 0x00040000,
  466. .offset = 0,
  467. .mask_flags = MTD_CAP_ROM
  468. }, {
  469. .name = "linux kernel(spi)",
  470. .size = 0x180000,
  471. .offset = MTDPART_OFS_APPEND,
  472. }, {
  473. .name = "file system(spi)",
  474. .size = MTDPART_SIZ_FULL,
  475. .offset = MTDPART_OFS_APPEND,
  476. }
  477. };
  478. static struct flash_platform_data bfin_spi_flash_data = {
  479. .name = "m25p80",
  480. .parts = bfin_spi_flash_partitions,
  481. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  482. /* .type = "m25p64", */
  483. };
  484. /* SPI flash chip (m25p64) */
  485. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  486. .enable_dma = 0, /* use dma transfer with this chip*/
  487. .bits_per_word = 8,
  488. };
  489. #endif
  490. #if defined(CONFIG_BFIN_SPI_ADC) \
  491. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  492. /* SPI ADC chip */
  493. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  494. .enable_dma = 1, /* use dma transfer with this chip*/
  495. .bits_per_word = 16,
  496. };
  497. #endif
  498. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  499. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  500. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  501. .enable_dma = 0,
  502. .bits_per_word = 16,
  503. };
  504. #endif
  505. #if defined(CONFIG_SND_BF5XX_SOC_AD193X) \
  506. || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
  507. static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
  508. .enable_dma = 0,
  509. .bits_per_word = 8,
  510. };
  511. #endif
  512. #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) \
  513. || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
  514. static struct bfin5xx_spi_chip adav801_spi_chip_info = {
  515. .enable_dma = 0,
  516. .bits_per_word = 8,
  517. };
  518. #endif
  519. #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
  520. #include <linux/input/ad714x.h>
  521. static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
  522. .enable_dma = 0,
  523. .bits_per_word = 16,
  524. };
  525. static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
  526. {
  527. .start_stage = 0,
  528. .end_stage = 7,
  529. .max_coord = 128,
  530. },
  531. };
  532. static struct ad714x_button_plat ad7147_spi_button_plat[] = {
  533. {
  534. .keycode = BTN_FORWARD,
  535. .l_mask = 0,
  536. .h_mask = 0x600,
  537. },
  538. {
  539. .keycode = BTN_LEFT,
  540. .l_mask = 0,
  541. .h_mask = 0x500,
  542. },
  543. {
  544. .keycode = BTN_MIDDLE,
  545. .l_mask = 0,
  546. .h_mask = 0x800,
  547. },
  548. {
  549. .keycode = BTN_RIGHT,
  550. .l_mask = 0x100,
  551. .h_mask = 0x400,
  552. },
  553. {
  554. .keycode = BTN_BACK,
  555. .l_mask = 0x200,
  556. .h_mask = 0x400,
  557. },
  558. };
  559. static struct ad714x_platform_data ad7147_spi_platform_data = {
  560. .slider_num = 1,
  561. .button_num = 5,
  562. .slider = ad7147_spi_slider_plat,
  563. .button = ad7147_spi_button_plat,
  564. .stage_cfg_reg = {
  565. {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  566. {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  567. {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
  568. {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
  569. {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
  570. {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
  571. {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  572. {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  573. {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
  574. {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
  575. {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
  576. {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
  577. },
  578. .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
  579. };
  580. #endif
  581. #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
  582. #include <linux/input/ad714x.h>
  583. static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
  584. {
  585. .keycode = BTN_1,
  586. .l_mask = 0,
  587. .h_mask = 0x1,
  588. },
  589. {
  590. .keycode = BTN_2,
  591. .l_mask = 0,
  592. .h_mask = 0x2,
  593. },
  594. {
  595. .keycode = BTN_3,
  596. .l_mask = 0,
  597. .h_mask = 0x4,
  598. },
  599. {
  600. .keycode = BTN_4,
  601. .l_mask = 0x0,
  602. .h_mask = 0x8,
  603. },
  604. };
  605. static struct ad714x_platform_data ad7142_i2c_platform_data = {
  606. .button_num = 4,
  607. .button = ad7142_i2c_button_plat,
  608. .stage_cfg_reg = {
  609. /* fixme: figure out right setting for all comoponent according
  610. * to hardware feature of EVAL-AD7142EB board */
  611. {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  612. {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  613. {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  614. {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  615. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  616. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  617. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  618. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  619. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  620. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  621. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  622. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  623. },
  624. .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
  625. };
  626. #endif
  627. #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
  628. static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
  629. .enable_dma = 0,
  630. .bits_per_word = 16,
  631. };
  632. #endif
  633. #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
  634. static unsigned short ad2s120x_platform_data[] = {
  635. /* used as SAMPLE and RDVEL */
  636. GPIO_PF5, GPIO_PF6, 0
  637. };
  638. static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
  639. .enable_dma = 0,
  640. .bits_per_word = 16,
  641. };
  642. #endif
  643. #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
  644. static unsigned short ad2s1210_platform_data[] = {
  645. /* use as SAMPLE, A0, A1 */
  646. GPIO_PF7, GPIO_PF8, GPIO_PF9,
  647. # if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
  648. /* the RES0 and RES1 pins */
  649. GPIO_PF4, GPIO_PF5,
  650. # endif
  651. 0,
  652. };
  653. static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
  654. .enable_dma = 0,
  655. .bits_per_word = 8,
  656. };
  657. #endif
  658. #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
  659. static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
  660. .enable_dma = 0,
  661. .bits_per_word = 16,
  662. };
  663. #endif
  664. #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
  665. static unsigned short ad7816_platform_data[] = {
  666. GPIO_PF4, /* rdwr_pin */
  667. GPIO_PF5, /* convert_pin */
  668. GPIO_PF7, /* busy_pin */
  669. 0,
  670. };
  671. static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
  672. .enable_dma = 0,
  673. .bits_per_word = 8,
  674. };
  675. #endif
  676. #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
  677. static unsigned long adt7310_platform_data[3] = {
  678. /* INT bound temperature alarm event. line 1 */
  679. IRQ_PG4, IRQF_TRIGGER_LOW,
  680. /* CT bound temperature alarm event irq_flags. line 0 */
  681. IRQF_TRIGGER_LOW,
  682. };
  683. static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
  684. .enable_dma = 0,
  685. .bits_per_word = 8,
  686. };
  687. #endif
  688. #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
  689. static unsigned short ad7298_platform_data[] = {
  690. GPIO_PF7, /* busy_pin */
  691. 0,
  692. };
  693. static struct bfin5xx_spi_chip ad7298_spi_chip_info = {
  694. .enable_dma = 0,
  695. .bits_per_word = 16,
  696. };
  697. #endif
  698. #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
  699. static unsigned long adt7316_spi_data[2] = {
  700. IRQF_TRIGGER_LOW, /* interrupt flags */
  701. GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
  702. };
  703. static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
  704. .enable_dma = 0,
  705. .bits_per_word = 8,
  706. };
  707. #endif
  708. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  709. #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
  710. static int bfin_mmc_spi_init(struct device *dev,
  711. irqreturn_t (*detect_int)(int, void *), void *data)
  712. {
  713. return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
  714. IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
  715. }
  716. static void bfin_mmc_spi_exit(struct device *dev, void *data)
  717. {
  718. free_irq(MMC_SPI_CARD_DETECT_INT, data);
  719. }
  720. static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
  721. .init = bfin_mmc_spi_init,
  722. .exit = bfin_mmc_spi_exit,
  723. .detect_delay = 100, /* msecs */
  724. };
  725. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  726. .enable_dma = 0,
  727. .bits_per_word = 8,
  728. .pio_interrupt = 0,
  729. };
  730. #endif
  731. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  732. #include <linux/spi/ad7877.h>
  733. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  734. .enable_dma = 0,
  735. .bits_per_word = 16,
  736. };
  737. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  738. .model = 7877,
  739. .vref_delay_usecs = 50, /* internal, no capacitor */
  740. .x_plate_ohms = 419,
  741. .y_plate_ohms = 486,
  742. .pressure_max = 1000,
  743. .pressure_min = 0,
  744. .stopacq_polarity = 1,
  745. .first_conversion_delay = 3,
  746. .acquisition_time = 1,
  747. .averaging = 1,
  748. .pen_down_acc_interval = 1,
  749. };
  750. #endif
  751. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  752. #include <linux/spi/ad7879.h>
  753. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  754. .model = 7879, /* Model = AD7879 */
  755. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  756. .pressure_max = 10000,
  757. .pressure_min = 0,
  758. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  759. .acquisition_time = 1, /* 4us acquisition time per sample */
  760. .median = 2, /* do 8 measurements */
  761. .averaging = 1, /* take the average of 4 middle samples */
  762. .pen_down_acc_interval = 255, /* 9.4 ms */
  763. .gpio_export = 1, /* Export GPIO to gpiolib */
  764. .gpio_base = -1, /* Dynamic allocation */
  765. };
  766. #endif
  767. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  768. #include <linux/input/adxl34x.h>
  769. static const struct adxl34x_platform_data adxl34x_info = {
  770. .x_axis_offset = 0,
  771. .y_axis_offset = 0,
  772. .z_axis_offset = 0,
  773. .tap_threshold = 0x31,
  774. .tap_duration = 0x10,
  775. .tap_latency = 0x60,
  776. .tap_window = 0xF0,
  777. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  778. .act_axis_control = 0xFF,
  779. .activity_threshold = 5,
  780. .inactivity_threshold = 3,
  781. .inactivity_time = 4,
  782. .free_fall_threshold = 0x7,
  783. .free_fall_time = 0x20,
  784. .data_rate = 0x8,
  785. .data_range = ADXL_FULL_RES,
  786. .ev_type = EV_ABS,
  787. .ev_code_x = ABS_X, /* EV_REL */
  788. .ev_code_y = ABS_Y, /* EV_REL */
  789. .ev_code_z = ABS_Z, /* EV_REL */
  790. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  791. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  792. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  793. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  794. .fifo_mode = ADXL_FIFO_STREAM,
  795. .orientation_enable = ADXL_EN_ORIENTATION_3D,
  796. .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
  797. .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
  798. /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
  799. .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
  800. };
  801. #endif
  802. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  803. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  804. .enable_dma = 0,
  805. .bits_per_word = 16,
  806. };
  807. #endif
  808. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  809. static struct bfin5xx_spi_chip spidev_chip_info = {
  810. .enable_dma = 0,
  811. .bits_per_word = 8,
  812. };
  813. #endif
  814. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  815. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  816. .enable_dma = 0,
  817. .bits_per_word = 8,
  818. };
  819. #endif
  820. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  821. static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
  822. .enable_dma = 1,
  823. .bits_per_word = 8,
  824. };
  825. #endif
  826. #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
  827. static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
  828. .bits_per_word = 16,
  829. };
  830. #include <linux/spi/adf702x.h>
  831. #define TXREG 0x0160A470
  832. static const u32 adf7021_regs[] = {
  833. 0x09608FA0,
  834. 0x00575011,
  835. 0x00A7F092,
  836. 0x2B141563,
  837. 0x81F29E94,
  838. 0x00003155,
  839. 0x050A4F66,
  840. 0x00000007,
  841. 0x00000008,
  842. 0x000231E9,
  843. 0x3296354A,
  844. 0x891A2B3B,
  845. 0x00000D9C,
  846. 0x0000000D,
  847. 0x0000000E,
  848. 0x0000000F,
  849. };
  850. static struct adf702x_platform_data adf7021_platform_data = {
  851. .regs_base = (void *)SPORT1_TCR1,
  852. .dma_ch_rx = CH_SPORT1_RX,
  853. .dma_ch_tx = CH_SPORT1_TX,
  854. .irq_sport_err = IRQ_SPORT1_ERROR,
  855. .gpio_int_rfs = GPIO_PF8,
  856. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
  857. P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
  858. .adf702x_model = MODEL_ADF7021,
  859. .adf702x_regs = adf7021_regs,
  860. .tx_reg = TXREG,
  861. };
  862. static inline void adf702x_mac_init(void)
  863. {
  864. random_ether_addr(adf7021_platform_data.mac_addr);
  865. }
  866. #else
  867. static inline void adf702x_mac_init(void) {}
  868. #endif
  869. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  870. #include <linux/spi/ads7846.h>
  871. static struct bfin5xx_spi_chip ad7873_spi_chip_info = {
  872. .bits_per_word = 8,
  873. };
  874. static int ads7873_get_pendown_state(void)
  875. {
  876. return gpio_get_value(GPIO_PF6);
  877. }
  878. static struct ads7846_platform_data __initdata ad7873_pdata = {
  879. .model = 7873, /* AD7873 */
  880. .x_max = 0xfff,
  881. .y_max = 0xfff,
  882. .x_plate_ohms = 620,
  883. .debounce_max = 1,
  884. .debounce_rep = 0,
  885. .debounce_tol = (~0),
  886. .get_pendown_state = ads7873_get_pendown_state,
  887. };
  888. #endif
  889. #if defined(CONFIG_MTD_DATAFLASH) \
  890. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  891. static struct mtd_partition bfin_spi_dataflash_partitions[] = {
  892. {
  893. .name = "bootloader(spi)",
  894. .size = 0x00040000,
  895. .offset = 0,
  896. .mask_flags = MTD_CAP_ROM
  897. }, {
  898. .name = "linux kernel(spi)",
  899. .size = 0x180000,
  900. .offset = MTDPART_OFS_APPEND,
  901. }, {
  902. .name = "file system(spi)",
  903. .size = MTDPART_SIZ_FULL,
  904. .offset = MTDPART_OFS_APPEND,
  905. }
  906. };
  907. static struct flash_platform_data bfin_spi_dataflash_data = {
  908. .name = "SPI Dataflash",
  909. .parts = bfin_spi_dataflash_partitions,
  910. .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
  911. };
  912. /* DataFlash chip */
  913. static struct bfin5xx_spi_chip data_flash_chip_info = {
  914. .enable_dma = 0, /* use dma transfer with this chip*/
  915. .bits_per_word = 8,
  916. };
  917. #endif
  918. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  919. static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
  920. .enable_dma = 0, /* use dma transfer with this chip*/
  921. .bits_per_word = 8,
  922. };
  923. #endif
  924. #if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
  925. static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
  926. .enable_dma = 0, /* use dma transfer with this chip*/
  927. .bits_per_word = 8,
  928. };
  929. #endif
  930. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  931. #if defined(CONFIG_MTD_M25P80) \
  932. || defined(CONFIG_MTD_M25P80_MODULE)
  933. {
  934. /* the modalias must be the same as spi device driver name */
  935. .modalias = "m25p80", /* Name of spi_driver for this device */
  936. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  937. .bus_num = 0, /* Framework bus number */
  938. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  939. .platform_data = &bfin_spi_flash_data,
  940. .controller_data = &spi_flash_chip_info,
  941. .mode = SPI_MODE_3,
  942. },
  943. #endif
  944. #if defined(CONFIG_MTD_DATAFLASH) \
  945. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  946. { /* DataFlash chip */
  947. .modalias = "mtd_dataflash",
  948. .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
  949. .bus_num = 0, /* Framework bus number */
  950. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  951. .platform_data = &bfin_spi_dataflash_data,
  952. .controller_data = &data_flash_chip_info,
  953. .mode = SPI_MODE_3,
  954. },
  955. #endif
  956. #if defined(CONFIG_BFIN_SPI_ADC) \
  957. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  958. {
  959. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  960. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  961. .bus_num = 0, /* Framework bus number */
  962. .chip_select = 1, /* Framework chip select. */
  963. .platform_data = NULL, /* No spi_driver specific config */
  964. .controller_data = &spi_adc_chip_info,
  965. },
  966. #endif
  967. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  968. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  969. {
  970. .modalias = "ad183x",
  971. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  972. .bus_num = 0,
  973. .chip_select = 4,
  974. .platform_data = "ad1836", /* only includes chip name for the moment */
  975. .controller_data = &ad1836_spi_chip_info,
  976. .mode = SPI_MODE_3,
  977. },
  978. #endif
  979. #if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
  980. {
  981. .modalias = "ad193x",
  982. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  983. .bus_num = 0,
  984. .chip_select = 5,
  985. .controller_data = &ad1938_spi_chip_info,
  986. .mode = SPI_MODE_3,
  987. },
  988. #endif
  989. #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
  990. {
  991. .modalias = "adav80x",
  992. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  993. .bus_num = 0,
  994. .chip_select = 1,
  995. .controller_data = &adav801_spi_chip_info,
  996. .mode = SPI_MODE_3,
  997. },
  998. #endif
  999. #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
  1000. {
  1001. .modalias = "ad714x_captouch",
  1002. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1003. .irq = IRQ_PF4,
  1004. .bus_num = 0,
  1005. .chip_select = 5,
  1006. .mode = SPI_MODE_3,
  1007. .platform_data = &ad7147_spi_platform_data,
  1008. .controller_data = &ad7147_spi_chip_info,
  1009. },
  1010. #endif
  1011. #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
  1012. {
  1013. .modalias = "ad2s90",
  1014. .bus_num = 0,
  1015. .chip_select = 3, /* change it for your board */
  1016. .mode = SPI_MODE_3,
  1017. .platform_data = NULL,
  1018. .controller_data = &ad2s90_spi_chip_info,
  1019. },
  1020. #endif
  1021. #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
  1022. {
  1023. .modalias = "ad2s120x",
  1024. .bus_num = 0,
  1025. .chip_select = 4, /* CS, change it for your board */
  1026. .platform_data = ad2s120x_platform_data,
  1027. .controller_data = &ad2s120x_spi_chip_info,
  1028. },
  1029. #endif
  1030. #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
  1031. {
  1032. .modalias = "ad2s1210",
  1033. .max_speed_hz = 8192000,
  1034. .bus_num = 0,
  1035. .chip_select = 4, /* CS, change it for your board */
  1036. .platform_data = ad2s1210_platform_data,
  1037. .controller_data = &ad2s1210_spi_chip_info,
  1038. },
  1039. #endif
  1040. #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
  1041. {
  1042. .modalias = "ad7314",
  1043. .max_speed_hz = 1000000,
  1044. .bus_num = 0,
  1045. .chip_select = 4, /* CS, change it for your board */
  1046. .controller_data = &ad7314_spi_chip_info,
  1047. .mode = SPI_MODE_1,
  1048. },
  1049. #endif
  1050. #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
  1051. {
  1052. .modalias = "ad7818",
  1053. .max_speed_hz = 1000000,
  1054. .bus_num = 0,
  1055. .chip_select = 4, /* CS, change it for your board */
  1056. .platform_data = ad7816_platform_data,
  1057. .controller_data = &ad7816_spi_chip_info,
  1058. .mode = SPI_MODE_3,
  1059. },
  1060. #endif
  1061. #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
  1062. {
  1063. .modalias = "adt7310",
  1064. .max_speed_hz = 1000000,
  1065. .irq = IRQ_PG5, /* CT alarm event. Line 0 */
  1066. .bus_num = 0,
  1067. .chip_select = 4, /* CS, change it for your board */
  1068. .platform_data = adt7310_platform_data,
  1069. .controller_data = &adt7310_spi_chip_info,
  1070. .mode = SPI_MODE_3,
  1071. },
  1072. #endif
  1073. #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
  1074. {
  1075. .modalias = "ad7298",
  1076. .max_speed_hz = 1000000,
  1077. .bus_num = 0,
  1078. .chip_select = 4, /* CS, change it for your board */
  1079. .platform_data = ad7298_platform_data,
  1080. .controller_data = &ad7298_spi_chip_info,
  1081. .mode = SPI_MODE_3,
  1082. },
  1083. #endif
  1084. #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
  1085. {
  1086. .modalias = "adt7316",
  1087. .max_speed_hz = 1000000,
  1088. .irq = IRQ_PG5, /* interrupt line */
  1089. .bus_num = 0,
  1090. .chip_select = 4, /* CS, change it for your board */
  1091. .platform_data = adt7316_spi_data,
  1092. .controller_data = &adt7316_spi_chip_info,
  1093. .mode = SPI_MODE_3,
  1094. },
  1095. #endif
  1096. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  1097. {
  1098. .modalias = "mmc_spi",
  1099. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1100. .bus_num = 0,
  1101. .chip_select = 4,
  1102. .platform_data = &bfin_mmc_spi_pdata,
  1103. .controller_data = &mmc_spi_chip_info,
  1104. .mode = SPI_MODE_3,
  1105. },
  1106. #endif
  1107. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  1108. {
  1109. .modalias = "ad7877",
  1110. .platform_data = &bfin_ad7877_ts_info,
  1111. .irq = IRQ_PF6,
  1112. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  1113. .bus_num = 0,
  1114. .chip_select = 1,
  1115. .controller_data = &spi_ad7877_chip_info,
  1116. },
  1117. #endif
  1118. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  1119. {
  1120. .modalias = "ad7879",
  1121. .platform_data = &bfin_ad7879_ts_info,
  1122. .irq = IRQ_PF7,
  1123. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1124. .bus_num = 0,
  1125. .chip_select = 1,
  1126. .controller_data = &spi_ad7879_chip_info,
  1127. .mode = SPI_CPHA | SPI_CPOL,
  1128. },
  1129. #endif
  1130. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  1131. {
  1132. .modalias = "spidev",
  1133. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  1134. .bus_num = 0,
  1135. .chip_select = 1,
  1136. .controller_data = &spidev_chip_info,
  1137. },
  1138. #endif
  1139. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1140. {
  1141. .modalias = "bfin-lq035q1-spi",
  1142. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1143. .bus_num = 0,
  1144. .chip_select = 2,
  1145. .controller_data = &lq035q1_spi_chip_info,
  1146. .mode = SPI_CPHA | SPI_CPOL,
  1147. },
  1148. #endif
  1149. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  1150. {
  1151. .modalias = "enc28j60",
  1152. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1153. .irq = IRQ_PF6,
  1154. .bus_num = 0,
  1155. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1156. .controller_data = &enc28j60_spi_chip_info,
  1157. .mode = SPI_MODE_0,
  1158. },
  1159. #endif
  1160. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  1161. {
  1162. .modalias = "adxl34x",
  1163. .platform_data = &adxl34x_info,
  1164. .irq = IRQ_PF6,
  1165. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1166. .bus_num = 0,
  1167. .chip_select = 2,
  1168. .controller_data = &spi_adxl34x_chip_info,
  1169. .mode = SPI_MODE_3,
  1170. },
  1171. #endif
  1172. #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
  1173. {
  1174. .modalias = "adf702x",
  1175. .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
  1176. .bus_num = 0,
  1177. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1178. .controller_data = &adf7021_spi_chip_info,
  1179. .platform_data = &adf7021_platform_data,
  1180. .mode = SPI_MODE_0,
  1181. },
  1182. #endif
  1183. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  1184. {
  1185. .modalias = "ads7846",
  1186. .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
  1187. .bus_num = 0,
  1188. .irq = IRQ_PF6,
  1189. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1190. .controller_data = &ad7873_spi_chip_info,
  1191. .platform_data = &ad7873_pdata,
  1192. .mode = SPI_MODE_0,
  1193. },
  1194. #endif
  1195. #if defined(CONFIG_AD7476) \
  1196. || defined(CONFIG_AD7476_MODULE)
  1197. {
  1198. .modalias = "ad7476", /* Name of spi_driver for this device */
  1199. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  1200. .bus_num = 0, /* Framework bus number */
  1201. .chip_select = 1, /* Framework chip select. */
  1202. .platform_data = NULL, /* No spi_driver specific config */
  1203. .controller_data = &spi_ad7476_chip_info,
  1204. .mode = SPI_MODE_3,
  1205. },
  1206. #endif
  1207. #if defined(CONFIG_ADE7753) \
  1208. || defined(CONFIG_ADE7753_MODULE)
  1209. {
  1210. .modalias = "ade7753",
  1211. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1212. .bus_num = 0,
  1213. .chip_select = 1, /* CS, change it for your board */
  1214. .platform_data = NULL, /* No spi_driver specific config */
  1215. .mode = SPI_MODE_1,
  1216. },
  1217. #endif
  1218. #if defined(CONFIG_ADE7754) \
  1219. || defined(CONFIG_ADE7754_MODULE)
  1220. {
  1221. .modalias = "ade7754",
  1222. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1223. .bus_num = 0,
  1224. .chip_select = 1, /* CS, change it for your board */
  1225. .platform_data = NULL, /* No spi_driver specific config */
  1226. .mode = SPI_MODE_1,
  1227. },
  1228. #endif
  1229. #if defined(CONFIG_ADE7758) \
  1230. || defined(CONFIG_ADE7758_MODULE)
  1231. {
  1232. .modalias = "ade7758",
  1233. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1234. .bus_num = 0,
  1235. .chip_select = 1, /* CS, change it for your board */
  1236. .platform_data = NULL, /* No spi_driver specific config */
  1237. .mode = SPI_MODE_1,
  1238. },
  1239. #endif
  1240. #if defined(CONFIG_ADE7759) \
  1241. || defined(CONFIG_ADE7759_MODULE)
  1242. {
  1243. .modalias = "ade7759",
  1244. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1245. .bus_num = 0,
  1246. .chip_select = 1, /* CS, change it for your board */
  1247. .platform_data = NULL, /* No spi_driver specific config */
  1248. .mode = SPI_MODE_1,
  1249. },
  1250. #endif
  1251. #if defined(CONFIG_ADE7854_SPI) \
  1252. || defined(CONFIG_ADE7854_SPI_MODULE)
  1253. {
  1254. .modalias = "ade7854",
  1255. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1256. .bus_num = 0,
  1257. .chip_select = 1, /* CS, change it for your board */
  1258. .platform_data = NULL, /* No spi_driver specific config */
  1259. .mode = SPI_MODE_3,
  1260. },
  1261. #endif
  1262. #if defined(CONFIG_ADIS16060) \
  1263. || defined(CONFIG_ADIS16060_MODULE)
  1264. {
  1265. .modalias = "adis16060_r",
  1266. .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
  1267. .bus_num = 0,
  1268. .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
  1269. .platform_data = NULL, /* No spi_driver specific config */
  1270. .mode = SPI_MODE_0,
  1271. },
  1272. {
  1273. .modalias = "adis16060_w",
  1274. .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
  1275. .bus_num = 0,
  1276. .chip_select = 2, /* CS for write, change it for your board */
  1277. .platform_data = NULL, /* No spi_driver specific config */
  1278. .mode = SPI_MODE_1,
  1279. },
  1280. #endif
  1281. #if defined(CONFIG_ADIS16130) \
  1282. || defined(CONFIG_ADIS16130_MODULE)
  1283. {
  1284. .modalias = "adis16130",
  1285. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1286. .bus_num = 0,
  1287. .chip_select = 1, /* CS for read, change it for your board */
  1288. .platform_data = NULL, /* No spi_driver specific config */
  1289. .mode = SPI_MODE_3,
  1290. },
  1291. #endif
  1292. #if defined(CONFIG_ADIS16201) \
  1293. || defined(CONFIG_ADIS16201_MODULE)
  1294. {
  1295. .modalias = "adis16201",
  1296. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1297. .bus_num = 0,
  1298. .chip_select = 5, /* CS, change it for your board */
  1299. .platform_data = NULL, /* No spi_driver specific config */
  1300. .mode = SPI_MODE_3,
  1301. .irq = IRQ_PF4,
  1302. },
  1303. #endif
  1304. #if defined(CONFIG_ADIS16203) \
  1305. || defined(CONFIG_ADIS16203_MODULE)
  1306. {
  1307. .modalias = "adis16203",
  1308. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1309. .bus_num = 0,
  1310. .chip_select = 5, /* CS, change it for your board */
  1311. .platform_data = NULL, /* No spi_driver specific config */
  1312. .mode = SPI_MODE_3,
  1313. .irq = IRQ_PF4,
  1314. },
  1315. #endif
  1316. #if defined(CONFIG_ADIS16204) \
  1317. || defined(CONFIG_ADIS16204_MODULE)
  1318. {
  1319. .modalias = "adis16204",
  1320. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1321. .bus_num = 0,
  1322. .chip_select = 5, /* CS, change it for your board */
  1323. .platform_data = NULL, /* No spi_driver specific config */
  1324. .mode = SPI_MODE_3,
  1325. .irq = IRQ_PF4,
  1326. },
  1327. #endif
  1328. #if defined(CONFIG_ADIS16209) \
  1329. || defined(CONFIG_ADIS16209_MODULE)
  1330. {
  1331. .modalias = "adis16209",
  1332. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1333. .bus_num = 0,
  1334. .chip_select = 5, /* CS, change it for your board */
  1335. .platform_data = NULL, /* No spi_driver specific config */
  1336. .mode = SPI_MODE_3,
  1337. .irq = IRQ_PF4,
  1338. },
  1339. #endif
  1340. #if defined(CONFIG_ADIS16220) \
  1341. || defined(CONFIG_ADIS16220_MODULE)
  1342. {
  1343. .modalias = "adis16220",
  1344. .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
  1345. .bus_num = 0,
  1346. .chip_select = 5, /* CS, change it for your board */
  1347. .platform_data = NULL, /* No spi_driver specific config */
  1348. .mode = SPI_MODE_3,
  1349. .irq = IRQ_PF4,
  1350. },
  1351. #endif
  1352. #if defined(CONFIG_ADIS16240) \
  1353. || defined(CONFIG_ADIS16240_MODULE)
  1354. {
  1355. .modalias = "adis16240",
  1356. .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
  1357. .bus_num = 0,
  1358. .chip_select = 5, /* CS, change it for your board */
  1359. .platform_data = NULL, /* No spi_driver specific config */
  1360. .mode = SPI_MODE_3,
  1361. .irq = IRQ_PF4,
  1362. },
  1363. #endif
  1364. #if defined(CONFIG_ADIS16260) \
  1365. || defined(CONFIG_ADIS16260_MODULE)
  1366. {
  1367. .modalias = "adis16260",
  1368. .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
  1369. .bus_num = 0,
  1370. .chip_select = 5, /* CS, change it for your board */
  1371. .platform_data = NULL, /* No spi_driver specific config */
  1372. .mode = SPI_MODE_3,
  1373. .irq = IRQ_PF4,
  1374. },
  1375. #endif
  1376. #if defined(CONFIG_ADIS16261) \
  1377. || defined(CONFIG_ADIS16261_MODULE)
  1378. {
  1379. .modalias = "adis16261",
  1380. .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
  1381. .bus_num = 0,
  1382. .chip_select = 1, /* CS, change it for your board */
  1383. .platform_data = NULL, /* No spi_driver specific config */
  1384. .mode = SPI_MODE_3,
  1385. },
  1386. #endif
  1387. #if defined(CONFIG_ADIS16300) \
  1388. || defined(CONFIG_ADIS16300_MODULE)
  1389. {
  1390. .modalias = "adis16300",
  1391. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1392. .bus_num = 0,
  1393. .chip_select = 5, /* CS, change it for your board */
  1394. .platform_data = NULL, /* No spi_driver specific config */
  1395. .mode = SPI_MODE_3,
  1396. .irq = IRQ_PF4,
  1397. },
  1398. #endif
  1399. #if defined(CONFIG_ADIS16350) \
  1400. || defined(CONFIG_ADIS16350_MODULE)
  1401. {
  1402. .modalias = "adis16364",
  1403. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1404. .bus_num = 0,
  1405. .chip_select = 5, /* CS, change it for your board */
  1406. .platform_data = NULL, /* No spi_driver specific config */
  1407. .mode = SPI_MODE_3,
  1408. .irq = IRQ_PF4,
  1409. },
  1410. #endif
  1411. #if defined(CONFIG_ADIS16400) \
  1412. || defined(CONFIG_ADIS16400_MODULE)
  1413. {
  1414. .modalias = "adis16400",
  1415. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1416. .bus_num = 0,
  1417. .chip_select = 1, /* CS, change it for your board */
  1418. .platform_data = NULL, /* No spi_driver specific config */
  1419. .mode = SPI_MODE_3,
  1420. },
  1421. #endif
  1422. };
  1423. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1424. /* SPI controller data */
  1425. static struct bfin5xx_spi_master bfin_spi0_info = {
  1426. .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
  1427. .enable_dma = 1, /* master has the ability to do dma transfer */
  1428. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  1429. };
  1430. /* SPI (0) */
  1431. static struct resource bfin_spi0_resource[] = {
  1432. [0] = {
  1433. .start = SPI0_REGBASE,
  1434. .end = SPI0_REGBASE + 0xFF,
  1435. .flags = IORESOURCE_MEM,
  1436. },
  1437. [1] = {
  1438. .start = CH_SPI,
  1439. .end = CH_SPI,
  1440. .flags = IORESOURCE_DMA,
  1441. },
  1442. [2] = {
  1443. .start = IRQ_SPI,
  1444. .end = IRQ_SPI,
  1445. .flags = IORESOURCE_IRQ,
  1446. },
  1447. };
  1448. static struct platform_device bfin_spi0_device = {
  1449. .name = "bfin-spi",
  1450. .id = 0, /* Bus number */
  1451. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  1452. .resource = bfin_spi0_resource,
  1453. .dev = {
  1454. .platform_data = &bfin_spi0_info, /* Passed to driver */
  1455. },
  1456. };
  1457. #endif /* spi master and devices */
  1458. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  1459. /* SPORT SPI controller data */
  1460. static struct bfin5xx_spi_master bfin_sport_spi0_info = {
  1461. .num_chipselect = 1, /* master only supports one device */
  1462. .enable_dma = 0, /* master don't support DMA */
  1463. .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
  1464. P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
  1465. };
  1466. static struct resource bfin_sport_spi0_resource[] = {
  1467. [0] = {
  1468. .start = SPORT0_TCR1,
  1469. .end = SPORT0_TCR1 + 0xFF,
  1470. .flags = IORESOURCE_MEM,
  1471. },
  1472. [1] = {
  1473. .start = IRQ_SPORT0_ERROR,
  1474. .end = IRQ_SPORT0_ERROR,
  1475. .flags = IORESOURCE_IRQ,
  1476. },
  1477. };
  1478. static struct platform_device bfin_sport_spi0_device = {
  1479. .name = "bfin-sport-spi",
  1480. .id = 1, /* Bus number */
  1481. .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
  1482. .resource = bfin_sport_spi0_resource,
  1483. .dev = {
  1484. .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
  1485. },
  1486. };
  1487. static struct bfin5xx_spi_master bfin_sport_spi1_info = {
  1488. .num_chipselect = 1, /* master only supports one device */
  1489. .enable_dma = 0, /* master don't support DMA */
  1490. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
  1491. P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
  1492. };
  1493. static struct resource bfin_sport_spi1_resource[] = {
  1494. [0] = {
  1495. .start = SPORT1_TCR1,
  1496. .end = SPORT1_TCR1 + 0xFF,
  1497. .flags = IORESOURCE_MEM,
  1498. },
  1499. [1] = {
  1500. .start = IRQ_SPORT1_ERROR,
  1501. .end = IRQ_SPORT1_ERROR,
  1502. .flags = IORESOURCE_IRQ,
  1503. },
  1504. };
  1505. static struct platform_device bfin_sport_spi1_device = {
  1506. .name = "bfin-sport-spi",
  1507. .id = 2, /* Bus number */
  1508. .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
  1509. .resource = bfin_sport_spi1_resource,
  1510. .dev = {
  1511. .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
  1512. },
  1513. };
  1514. #endif /* sport spi master and devices */
  1515. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  1516. static struct platform_device bfin_fb_device = {
  1517. .name = "bf537-lq035",
  1518. };
  1519. #endif
  1520. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1521. #include <asm/bfin-lq035q1.h>
  1522. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  1523. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  1524. .ppi_mode = USE_RGB565_16_BIT_PPI,
  1525. .use_bl = 0, /* let something else control the LCD Blacklight */
  1526. .gpio_bl = GPIO_PF7,
  1527. };
  1528. static struct resource bfin_lq035q1_resources[] = {
  1529. {
  1530. .start = IRQ_PPI_ERROR,
  1531. .end = IRQ_PPI_ERROR,
  1532. .flags = IORESOURCE_IRQ,
  1533. },
  1534. };
  1535. static struct platform_device bfin_lq035q1_device = {
  1536. .name = "bfin-lq035q1",
  1537. .id = -1,
  1538. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  1539. .resource = bfin_lq035q1_resources,
  1540. .dev = {
  1541. .platform_data = &bfin_lq035q1_data,
  1542. },
  1543. };
  1544. #endif
  1545. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1546. #ifdef CONFIG_SERIAL_BFIN_UART0
  1547. static struct resource bfin_uart0_resources[] = {
  1548. {
  1549. .start = UART0_THR,
  1550. .end = UART0_GCTL+2,
  1551. .flags = IORESOURCE_MEM,
  1552. },
  1553. {
  1554. .start = IRQ_UART0_RX,
  1555. .end = IRQ_UART0_RX+1,
  1556. .flags = IORESOURCE_IRQ,
  1557. },
  1558. {
  1559. .start = IRQ_UART0_ERROR,
  1560. .end = IRQ_UART0_ERROR,
  1561. .flags = IORESOURCE_IRQ,
  1562. },
  1563. {
  1564. .start = CH_UART0_TX,
  1565. .end = CH_UART0_TX,
  1566. .flags = IORESOURCE_DMA,
  1567. },
  1568. {
  1569. .start = CH_UART0_RX,
  1570. .end = CH_UART0_RX,
  1571. .flags = IORESOURCE_DMA,
  1572. },
  1573. #ifdef CONFIG_BFIN_UART0_CTSRTS
  1574. { /* CTS pin */
  1575. .start = GPIO_PG7,
  1576. .end = GPIO_PG7,
  1577. .flags = IORESOURCE_IO,
  1578. },
  1579. { /* RTS pin */
  1580. .start = GPIO_PG6,
  1581. .end = GPIO_PG6,
  1582. .flags = IORESOURCE_IO,
  1583. },
  1584. #endif
  1585. };
  1586. static unsigned short bfin_uart0_peripherals[] = {
  1587. P_UART0_TX, P_UART0_RX, 0
  1588. };
  1589. static struct platform_device bfin_uart0_device = {
  1590. .name = "bfin-uart",
  1591. .id = 0,
  1592. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  1593. .resource = bfin_uart0_resources,
  1594. .dev = {
  1595. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  1596. },
  1597. };
  1598. #endif
  1599. #ifdef CONFIG_SERIAL_BFIN_UART1
  1600. static struct resource bfin_uart1_resources[] = {
  1601. {
  1602. .start = UART1_THR,
  1603. .end = UART1_GCTL+2,
  1604. .flags = IORESOURCE_MEM,
  1605. },
  1606. {
  1607. .start = IRQ_UART1_RX,
  1608. .end = IRQ_UART1_RX+1,
  1609. .flags = IORESOURCE_IRQ,
  1610. },
  1611. {
  1612. .start = IRQ_UART1_ERROR,
  1613. .end = IRQ_UART1_ERROR,
  1614. .flags = IORESOURCE_IRQ,
  1615. },
  1616. {
  1617. .start = CH_UART1_TX,
  1618. .end = CH_UART1_TX,
  1619. .flags = IORESOURCE_DMA,
  1620. },
  1621. {
  1622. .start = CH_UART1_RX,
  1623. .end = CH_UART1_RX,
  1624. .flags = IORESOURCE_DMA,
  1625. },
  1626. };
  1627. static unsigned short bfin_uart1_peripherals[] = {
  1628. P_UART1_TX, P_UART1_RX, 0
  1629. };
  1630. static struct platform_device bfin_uart1_device = {
  1631. .name = "bfin-uart",
  1632. .id = 1,
  1633. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  1634. .resource = bfin_uart1_resources,
  1635. .dev = {
  1636. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  1637. },
  1638. };
  1639. #endif
  1640. #endif
  1641. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1642. #ifdef CONFIG_BFIN_SIR0
  1643. static struct resource bfin_sir0_resources[] = {
  1644. {
  1645. .start = 0xFFC00400,
  1646. .end = 0xFFC004FF,
  1647. .flags = IORESOURCE_MEM,
  1648. },
  1649. {
  1650. .start = IRQ_UART0_RX,
  1651. .end = IRQ_UART0_RX+1,
  1652. .flags = IORESOURCE_IRQ,
  1653. },
  1654. {
  1655. .start = CH_UART0_RX,
  1656. .end = CH_UART0_RX+1,
  1657. .flags = IORESOURCE_DMA,
  1658. },
  1659. };
  1660. static struct platform_device bfin_sir0_device = {
  1661. .name = "bfin_sir",
  1662. .id = 0,
  1663. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  1664. .resource = bfin_sir0_resources,
  1665. };
  1666. #endif
  1667. #ifdef CONFIG_BFIN_SIR1
  1668. static struct resource bfin_sir1_resources[] = {
  1669. {
  1670. .start = 0xFFC02000,
  1671. .end = 0xFFC020FF,
  1672. .flags = IORESOURCE_MEM,
  1673. },
  1674. {
  1675. .start = IRQ_UART1_RX,
  1676. .end = IRQ_UART1_RX+1,
  1677. .flags = IORESOURCE_IRQ,
  1678. },
  1679. {
  1680. .start = CH_UART1_RX,
  1681. .end = CH_UART1_RX+1,
  1682. .flags = IORESOURCE_DMA,
  1683. },
  1684. };
  1685. static struct platform_device bfin_sir1_device = {
  1686. .name = "bfin_sir",
  1687. .id = 1,
  1688. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  1689. .resource = bfin_sir1_resources,
  1690. };
  1691. #endif
  1692. #endif
  1693. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1694. static struct resource bfin_twi0_resource[] = {
  1695. [0] = {
  1696. .start = TWI0_REGBASE,
  1697. .end = TWI0_REGBASE,
  1698. .flags = IORESOURCE_MEM,
  1699. },
  1700. [1] = {
  1701. .start = IRQ_TWI,
  1702. .end = IRQ_TWI,
  1703. .flags = IORESOURCE_IRQ,
  1704. },
  1705. };
  1706. static struct platform_device i2c_bfin_twi_device = {
  1707. .name = "i2c-bfin-twi",
  1708. .id = 0,
  1709. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  1710. .resource = bfin_twi0_resource,
  1711. };
  1712. #endif
  1713. #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
  1714. static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
  1715. [0] = KEY_GRAVE,
  1716. [1] = KEY_1,
  1717. [2] = KEY_2,
  1718. [3] = KEY_3,
  1719. [4] = KEY_4,
  1720. [5] = KEY_5,
  1721. [6] = KEY_6,
  1722. [7] = KEY_7,
  1723. [8] = KEY_8,
  1724. [9] = KEY_9,
  1725. [10] = KEY_0,
  1726. [11] = KEY_MINUS,
  1727. [12] = KEY_EQUAL,
  1728. [13] = KEY_BACKSLASH,
  1729. [15] = KEY_KP0,
  1730. [16] = KEY_Q,
  1731. [17] = KEY_W,
  1732. [18] = KEY_E,
  1733. [19] = KEY_R,
  1734. [20] = KEY_T,
  1735. [21] = KEY_Y,
  1736. [22] = KEY_U,
  1737. [23] = KEY_I,
  1738. [24] = KEY_O,
  1739. [25] = KEY_P,
  1740. [26] = KEY_LEFTBRACE,
  1741. [27] = KEY_RIGHTBRACE,
  1742. [29] = KEY_KP1,
  1743. [30] = KEY_KP2,
  1744. [31] = KEY_KP3,
  1745. [32] = KEY_A,
  1746. [33] = KEY_S,
  1747. [34] = KEY_D,
  1748. [35] = KEY_F,
  1749. [36] = KEY_G,
  1750. [37] = KEY_H,
  1751. [38] = KEY_J,
  1752. [39] = KEY_K,
  1753. [40] = KEY_L,
  1754. [41] = KEY_SEMICOLON,
  1755. [42] = KEY_APOSTROPHE,
  1756. [43] = KEY_BACKSLASH,
  1757. [45] = KEY_KP4,
  1758. [46] = KEY_KP5,
  1759. [47] = KEY_KP6,
  1760. [48] = KEY_102ND,
  1761. [49] = KEY_Z,
  1762. [50] = KEY_X,
  1763. [51] = KEY_C,
  1764. [52] = KEY_V,
  1765. [53] = KEY_B,
  1766. [54] = KEY_N,
  1767. [55] = KEY_M,
  1768. [56] = KEY_COMMA,
  1769. [57] = KEY_DOT,
  1770. [58] = KEY_SLASH,
  1771. [60] = KEY_KPDOT,
  1772. [61] = KEY_KP7,
  1773. [62] = KEY_KP8,
  1774. [63] = KEY_KP9,
  1775. [64] = KEY_SPACE,
  1776. [65] = KEY_BACKSPACE,
  1777. [66] = KEY_TAB,
  1778. [67] = KEY_KPENTER,
  1779. [68] = KEY_ENTER,
  1780. [69] = KEY_ESC,
  1781. [70] = KEY_DELETE,
  1782. [74] = KEY_KPMINUS,
  1783. [76] = KEY_UP,
  1784. [77] = KEY_DOWN,
  1785. [78] = KEY_RIGHT,
  1786. [79] = KEY_LEFT,
  1787. };
  1788. static struct adp5588_kpad_platform_data adp5588_kpad_data = {
  1789. .rows = 8,
  1790. .cols = 10,
  1791. .keymap = adp5588_keymap,
  1792. .keymapsize = ARRAY_SIZE(adp5588_keymap),
  1793. .repeat = 0,
  1794. };
  1795. #endif
  1796. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  1797. #include <linux/mfd/adp5520.h>
  1798. /*
  1799. * ADP5520/5501 Backlight Data
  1800. */
  1801. static struct adp5520_backlight_platform_data adp5520_backlight_data = {
  1802. .fade_in = ADP5520_FADE_T_1200ms,
  1803. .fade_out = ADP5520_FADE_T_1200ms,
  1804. .fade_led_law = ADP5520_BL_LAW_LINEAR,
  1805. .en_ambl_sens = 1,
  1806. .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
  1807. .l1_daylight_max = ADP5520_BL_CUR_mA(15),
  1808. .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
  1809. .l2_office_max = ADP5520_BL_CUR_mA(7),
  1810. .l2_office_dim = ADP5520_BL_CUR_mA(0),
  1811. .l3_dark_max = ADP5520_BL_CUR_mA(3),
  1812. .l3_dark_dim = ADP5520_BL_CUR_mA(0),
  1813. .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
  1814. .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
  1815. .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
  1816. .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
  1817. };
  1818. /*
  1819. * ADP5520/5501 LEDs Data
  1820. */
  1821. static struct led_info adp5520_leds[] = {
  1822. {
  1823. .name = "adp5520-led1",
  1824. .default_trigger = "none",
  1825. .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
  1826. },
  1827. #ifdef ADP5520_EN_ALL_LEDS
  1828. {
  1829. .name = "adp5520-led2",
  1830. .default_trigger = "none",
  1831. .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
  1832. },
  1833. {
  1834. .name = "adp5520-led3",
  1835. .default_trigger = "none",
  1836. .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
  1837. },
  1838. #endif
  1839. };
  1840. static struct adp5520_leds_platform_data adp5520_leds_data = {
  1841. .num_leds = ARRAY_SIZE(adp5520_leds),
  1842. .leds = adp5520_leds,
  1843. .fade_in = ADP5520_FADE_T_600ms,
  1844. .fade_out = ADP5520_FADE_T_600ms,
  1845. .led_on_time = ADP5520_LED_ONT_600ms,
  1846. };
  1847. /*
  1848. * ADP5520 GPIO Data
  1849. */
  1850. static struct adp5520_gpio_platform_data adp5520_gpio_data = {
  1851. .gpio_start = 50,
  1852. .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
  1853. .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
  1854. };
  1855. /*
  1856. * ADP5520 Keypad Data
  1857. */
  1858. static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
  1859. [ADP5520_KEY(0, 0)] = KEY_GRAVE,
  1860. [ADP5520_KEY(0, 1)] = KEY_1,
  1861. [ADP5520_KEY(0, 2)] = KEY_2,
  1862. [ADP5520_KEY(0, 3)] = KEY_3,
  1863. [ADP5520_KEY(1, 0)] = KEY_4,
  1864. [ADP5520_KEY(1, 1)] = KEY_5,
  1865. [ADP5520_KEY(1, 2)] = KEY_6,
  1866. [ADP5520_KEY(1, 3)] = KEY_7,
  1867. [ADP5520_KEY(2, 0)] = KEY_8,
  1868. [ADP5520_KEY(2, 1)] = KEY_9,
  1869. [ADP5520_KEY(2, 2)] = KEY_0,
  1870. [ADP5520_KEY(2, 3)] = KEY_MINUS,
  1871. [ADP5520_KEY(3, 0)] = KEY_EQUAL,
  1872. [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
  1873. [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
  1874. [ADP5520_KEY(3, 3)] = KEY_ENTER,
  1875. };
  1876. static struct adp5520_keys_platform_data adp5520_keys_data = {
  1877. .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
  1878. .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
  1879. .keymap = adp5520_keymap,
  1880. .keymapsize = ARRAY_SIZE(adp5520_keymap),
  1881. .repeat = 0,
  1882. };
  1883. /*
  1884. * ADP5520/5501 Multifunction Device Init Data
  1885. */
  1886. static struct adp5520_platform_data adp5520_pdev_data = {
  1887. .backlight = &adp5520_backlight_data,
  1888. .leds = &adp5520_leds_data,
  1889. .gpio = &adp5520_gpio_data,
  1890. .keys = &adp5520_keys_data,
  1891. };
  1892. #endif
  1893. #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
  1894. static struct adp5588_gpio_platform_data adp5588_gpio_data = {
  1895. .gpio_start = 50,
  1896. .pullup_dis_mask = 0,
  1897. };
  1898. #endif
  1899. #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
  1900. #include <linux/i2c/adp8870.h>
  1901. static struct led_info adp8870_leds[] = {
  1902. {
  1903. .name = "adp8870-led7",
  1904. .default_trigger = "none",
  1905. .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
  1906. },
  1907. };
  1908. static struct adp8870_backlight_platform_data adp8870_pdata = {
  1909. .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
  1910. ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
  1911. .pwm_assign = 0, /* 1 = Enables PWM mode */
  1912. .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
  1913. .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
  1914. .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
  1915. .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
  1916. .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
  1917. .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1918. .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1919. .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1920. .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1921. .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1922. .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1923. .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1924. .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1925. .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1926. .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1927. .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1928. .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1929. .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
  1930. .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
  1931. .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
  1932. .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
  1933. .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1934. .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1935. .leds = adp8870_leds,
  1936. .num_leds = ARRAY_SIZE(adp8870_leds),
  1937. .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
  1938. .led_fade_in = ADP8870_FADE_T_600ms,
  1939. .led_fade_out = ADP8870_FADE_T_600ms,
  1940. .led_on_time = ADP8870_LED_ONT_200ms,
  1941. };
  1942. #endif
  1943. #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
  1944. #include <linux/i2c/adp8860.h>
  1945. static struct led_info adp8860_leds[] = {
  1946. {
  1947. .name = "adp8860-led7",
  1948. .default_trigger = "none",
  1949. .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
  1950. },
  1951. };
  1952. static struct adp8860_backlight_platform_data adp8860_pdata = {
  1953. .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
  1954. ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
  1955. .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
  1956. .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
  1957. .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
  1958. .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
  1959. .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
  1960. .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1961. .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1962. .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1963. .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1964. .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1965. .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1966. .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1967. .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1968. .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1969. .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1970. .leds = adp8860_leds,
  1971. .num_leds = ARRAY_SIZE(adp8860_leds),
  1972. .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
  1973. .led_fade_in = ADP8860_FADE_T_600ms,
  1974. .led_fade_out = ADP8860_FADE_T_600ms,
  1975. .led_on_time = ADP8860_LED_ONT_200ms,
  1976. };
  1977. #endif
  1978. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  1979. static struct regulator_consumer_supply ad5398_consumer = {
  1980. .supply = "current",
  1981. };
  1982. static struct regulator_init_data ad5398_regulator_data = {
  1983. .constraints = {
  1984. .name = "current range",
  1985. .max_uA = 120000,
  1986. .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
  1987. },
  1988. .num_consumer_supplies = 1,
  1989. .consumer_supplies = &ad5398_consumer,
  1990. };
  1991. #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
  1992. defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
  1993. static struct platform_device ad5398_virt_consumer_device = {
  1994. .name = "reg-virt-consumer",
  1995. .id = 0,
  1996. .dev = {
  1997. .platform_data = "current", /* Passed to driver */
  1998. },
  1999. };
  2000. #endif
  2001. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2002. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2003. static struct regulator_bulk_data ad5398_bulk_data = {
  2004. .supply = "current",
  2005. };
  2006. static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
  2007. .name = "ad5398",
  2008. .num_supplies = 1,
  2009. .supplies = &ad5398_bulk_data,
  2010. };
  2011. static struct platform_device ad5398_userspace_consumer_device = {
  2012. .name = "reg-userspace-consumer",
  2013. .id = 0,
  2014. .dev = {
  2015. .platform_data = &ad5398_userspace_comsumer_data,
  2016. },
  2017. };
  2018. #endif
  2019. #endif
  2020. #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
  2021. /* INT bound temperature alarm event. line 1 */
  2022. static unsigned long adt7410_platform_data[2] = {
  2023. IRQ_PG4, IRQF_TRIGGER_LOW,
  2024. };
  2025. #endif
  2026. #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
  2027. /* INT bound temperature alarm event. line 1 */
  2028. static unsigned long adt7316_i2c_data[2] = {
  2029. IRQF_TRIGGER_LOW, /* interrupt flags */
  2030. GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
  2031. };
  2032. #endif
  2033. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  2034. #if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
  2035. {
  2036. I2C_BOARD_INFO("ad1937", 0x04),
  2037. },
  2038. #endif
  2039. #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
  2040. {
  2041. I2C_BOARD_INFO("adav803", 0x10),
  2042. },
  2043. #endif
  2044. #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
  2045. {
  2046. I2C_BOARD_INFO("ad7142_captouch", 0x2C),
  2047. .irq = IRQ_PG5,
  2048. .platform_data = (void *)&ad7142_i2c_platform_data,
  2049. },
  2050. #endif
  2051. #if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
  2052. {
  2053. I2C_BOARD_INFO("ad7150", 0x48),
  2054. .irq = IRQ_PG5, /* fixme: use real interrupt number */
  2055. },
  2056. #endif
  2057. #if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
  2058. {
  2059. I2C_BOARD_INFO("ad7152", 0x48),
  2060. },
  2061. #endif
  2062. #if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
  2063. {
  2064. I2C_BOARD_INFO("ad774x", 0x48),
  2065. },
  2066. #endif
  2067. #if defined(CONFIG_AD7414) || defined(CONFIG_AD7414_MODULE)
  2068. {
  2069. I2C_BOARD_INFO("ad7414", 0x9),
  2070. .irq = IRQ_PG5,
  2071. .irq_flags = IRQF_TRIGGER_LOW,
  2072. },
  2073. #endif
  2074. #if defined(CONFIG_AD7416) || defined(CONFIG_AD7416_MODULE)
  2075. {
  2076. I2C_BOARD_INFO("ad7417", 0xb),
  2077. .irq = IRQ_PG5,
  2078. .irq_flags = IRQF_TRIGGER_LOW,
  2079. .platform_data = (void *)GPIO_PF4,
  2080. },
  2081. #endif
  2082. #if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)
  2083. {
  2084. I2C_BOARD_INFO("ade7854", 0x38),
  2085. },
  2086. #endif
  2087. #if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)
  2088. {
  2089. I2C_BOARD_INFO("adt75", 0x9),
  2090. .irq = IRQ_PG5,
  2091. .irq_flags = IRQF_TRIGGER_LOW,
  2092. },
  2093. #endif
  2094. #if defined(CONFIG_ADT7408) || defined(CONFIG_ADT7408_MODULE)
  2095. {
  2096. I2C_BOARD_INFO("adt7408", 0x18),
  2097. .irq = IRQ_PG5,
  2098. .irq_flags = IRQF_TRIGGER_LOW,
  2099. },
  2100. #endif
  2101. #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
  2102. {
  2103. I2C_BOARD_INFO("adt7410", 0x48),
  2104. /* CT critical temperature event. line 0 */
  2105. .irq = IRQ_PG5,
  2106. .irq_flags = IRQF_TRIGGER_LOW,
  2107. .platform_data = (void *)&adt7410_platform_data,
  2108. },
  2109. #endif
  2110. #if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)
  2111. {
  2112. I2C_BOARD_INFO("ad7291", 0x20),
  2113. .irq = IRQ_PG5,
  2114. .irq_flags = IRQF_TRIGGER_LOW,
  2115. },
  2116. #endif
  2117. #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
  2118. {
  2119. I2C_BOARD_INFO("adt7316", 0x48),
  2120. .irq = IRQ_PG6,
  2121. .platform_data = (void *)&adt7316_i2c_data,
  2122. },
  2123. #endif
  2124. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  2125. {
  2126. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  2127. },
  2128. #endif
  2129. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  2130. {
  2131. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  2132. .irq = IRQ_PG6,
  2133. },
  2134. #endif
  2135. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  2136. {
  2137. I2C_BOARD_INFO("ad7879", 0x2F),
  2138. .irq = IRQ_PG5,
  2139. .platform_data = (void *)&bfin_ad7879_ts_info,
  2140. },
  2141. #endif
  2142. #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
  2143. {
  2144. I2C_BOARD_INFO("adp5588-keys", 0x34),
  2145. .irq = IRQ_PG0,
  2146. .platform_data = (void *)&adp5588_kpad_data,
  2147. },
  2148. #endif
  2149. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  2150. {
  2151. I2C_BOARD_INFO("pmic-adp5520", 0x32),
  2152. .irq = IRQ_PG0,
  2153. .platform_data = (void *)&adp5520_pdev_data,
  2154. },
  2155. #endif
  2156. #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  2157. {
  2158. I2C_BOARD_INFO("adxl34x", 0x53),
  2159. .irq = IRQ_PG3,
  2160. .platform_data = (void *)&adxl34x_info,
  2161. },
  2162. #endif
  2163. #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
  2164. {
  2165. I2C_BOARD_INFO("adp5588-gpio", 0x34),
  2166. .platform_data = (void *)&adp5588_gpio_data,
  2167. },
  2168. #endif
  2169. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  2170. {
  2171. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  2172. },
  2173. #endif
  2174. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  2175. {
  2176. I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),
  2177. },
  2178. #endif
  2179. #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
  2180. {
  2181. I2C_BOARD_INFO("adp8870", 0x2B),
  2182. .platform_data = (void *)&adp8870_pdata,
  2183. },
  2184. #endif
  2185. #if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
  2186. {
  2187. I2C_BOARD_INFO("adau1371", 0x1A),
  2188. },
  2189. #endif
  2190. #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
  2191. {
  2192. I2C_BOARD_INFO("adau1761", 0x38),
  2193. },
  2194. #endif
  2195. #if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
  2196. {
  2197. I2C_BOARD_INFO("adau1361", 0x38),
  2198. },
  2199. #endif
  2200. #if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
  2201. {
  2202. I2C_BOARD_INFO("ad5258", 0x18),
  2203. },
  2204. #endif
  2205. #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
  2206. {
  2207. I2C_BOARD_INFO("ssm2602", 0x1b),
  2208. },
  2209. #endif
  2210. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  2211. {
  2212. I2C_BOARD_INFO("ad5398", 0xC),
  2213. .platform_data = (void *)&ad5398_regulator_data,
  2214. },
  2215. #endif
  2216. #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
  2217. {
  2218. I2C_BOARD_INFO("adp8860", 0x2A),
  2219. .platform_data = (void *)&adp8860_pdata,
  2220. },
  2221. #endif
  2222. #if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
  2223. {
  2224. I2C_BOARD_INFO("adau1373", 0x1A),
  2225. },
  2226. #endif
  2227. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  2228. {
  2229. I2C_BOARD_INFO("ad5252", 0x2e),
  2230. },
  2231. #endif
  2232. };
  2233. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  2234. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2235. static struct resource bfin_sport0_uart_resources[] = {
  2236. {
  2237. .start = SPORT0_TCR1,
  2238. .end = SPORT0_MRCS3+4,
  2239. .flags = IORESOURCE_MEM,
  2240. },
  2241. {
  2242. .start = IRQ_SPORT0_RX,
  2243. .end = IRQ_SPORT0_RX+1,
  2244. .flags = IORESOURCE_IRQ,
  2245. },
  2246. {
  2247. .start = IRQ_SPORT0_ERROR,
  2248. .end = IRQ_SPORT0_ERROR,
  2249. .flags = IORESOURCE_IRQ,
  2250. },
  2251. };
  2252. static unsigned short bfin_sport0_peripherals[] = {
  2253. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  2254. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  2255. };
  2256. static struct platform_device bfin_sport0_uart_device = {
  2257. .name = "bfin-sport-uart",
  2258. .id = 0,
  2259. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  2260. .resource = bfin_sport0_uart_resources,
  2261. .dev = {
  2262. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  2263. },
  2264. };
  2265. #endif
  2266. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2267. static struct resource bfin_sport1_uart_resources[] = {
  2268. {
  2269. .start = SPORT1_TCR1,
  2270. .end = SPORT1_MRCS3+4,
  2271. .flags = IORESOURCE_MEM,
  2272. },
  2273. {
  2274. .start = IRQ_SPORT1_RX,
  2275. .end = IRQ_SPORT1_RX+1,
  2276. .flags = IORESOURCE_IRQ,
  2277. },
  2278. {
  2279. .start = IRQ_SPORT1_ERROR,
  2280. .end = IRQ_SPORT1_ERROR,
  2281. .flags = IORESOURCE_IRQ,
  2282. },
  2283. };
  2284. static unsigned short bfin_sport1_peripherals[] = {
  2285. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  2286. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  2287. };
  2288. static struct platform_device bfin_sport1_uart_device = {
  2289. .name = "bfin-sport-uart",
  2290. .id = 1,
  2291. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  2292. .resource = bfin_sport1_uart_resources,
  2293. .dev = {
  2294. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  2295. },
  2296. };
  2297. #endif
  2298. #endif
  2299. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  2300. #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  2301. /* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
  2302. #ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  2303. #define PATA_INT IRQ_PF5
  2304. static struct pata_platform_info bfin_pata_platform_data = {
  2305. .ioport_shift = 1,
  2306. .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  2307. };
  2308. static struct resource bfin_pata_resources[] = {
  2309. {
  2310. .start = 0x20314020,
  2311. .end = 0x2031403F,
  2312. .flags = IORESOURCE_MEM,
  2313. },
  2314. {
  2315. .start = 0x2031401C,
  2316. .end = 0x2031401F,
  2317. .flags = IORESOURCE_MEM,
  2318. },
  2319. {
  2320. .start = PATA_INT,
  2321. .end = PATA_INT,
  2322. .flags = IORESOURCE_IRQ,
  2323. },
  2324. };
  2325. #elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
  2326. static struct pata_platform_info bfin_pata_platform_data = {
  2327. .ioport_shift = 0,
  2328. };
  2329. /* CompactFlash Storage Card Memory Mapped Addressing
  2330. * /REG = A11 = 1
  2331. */
  2332. static struct resource bfin_pata_resources[] = {
  2333. {
  2334. .start = 0x20211800,
  2335. .end = 0x20211807,
  2336. .flags = IORESOURCE_MEM,
  2337. },
  2338. {
  2339. .start = 0x2021180E, /* Device Ctl */
  2340. .end = 0x2021180E,
  2341. .flags = IORESOURCE_MEM,
  2342. },
  2343. };
  2344. #endif
  2345. static struct platform_device bfin_pata_device = {
  2346. .name = "pata_platform",
  2347. .id = -1,
  2348. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  2349. .resource = bfin_pata_resources,
  2350. .dev = {
  2351. .platform_data = &bfin_pata_platform_data,
  2352. }
  2353. };
  2354. #endif
  2355. static const unsigned int cclk_vlev_datasheet[] =
  2356. {
  2357. VRPAIR(VLEV_085, 250000000),
  2358. VRPAIR(VLEV_090, 376000000),
  2359. VRPAIR(VLEV_095, 426000000),
  2360. VRPAIR(VLEV_100, 426000000),
  2361. VRPAIR(VLEV_105, 476000000),
  2362. VRPAIR(VLEV_110, 476000000),
  2363. VRPAIR(VLEV_115, 476000000),
  2364. VRPAIR(VLEV_120, 500000000),
  2365. VRPAIR(VLEV_125, 533000000),
  2366. VRPAIR(VLEV_130, 600000000),
  2367. };
  2368. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  2369. .tuple_tab = cclk_vlev_datasheet,
  2370. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  2371. .vr_settling_time = 25 /* us */,
  2372. };
  2373. static struct platform_device bfin_dpmc = {
  2374. .name = "bfin dpmc",
  2375. .dev = {
  2376. .platform_data = &bfin_dmpc_vreg_data,
  2377. },
  2378. };
  2379. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
  2380. defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
  2381. defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  2382. #define SPORT_REQ(x) \
  2383. [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
  2384. P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
  2385. static const u16 bfin_snd_pin[][7] = {
  2386. SPORT_REQ(0),
  2387. SPORT_REQ(1),
  2388. };
  2389. static struct bfin_snd_platform_data bfin_snd_data[] = {
  2390. {
  2391. .pin_req = &bfin_snd_pin[0][0],
  2392. },
  2393. {
  2394. .pin_req = &bfin_snd_pin[1][0],
  2395. },
  2396. };
  2397. #define BFIN_SND_RES(x) \
  2398. [x] = { \
  2399. { \
  2400. .start = SPORT##x##_TCR1, \
  2401. .end = SPORT##x##_TCR1, \
  2402. .flags = IORESOURCE_MEM \
  2403. }, \
  2404. { \
  2405. .start = CH_SPORT##x##_RX, \
  2406. .end = CH_SPORT##x##_RX, \
  2407. .flags = IORESOURCE_DMA, \
  2408. }, \
  2409. { \
  2410. .start = CH_SPORT##x##_TX, \
  2411. .end = CH_SPORT##x##_TX, \
  2412. .flags = IORESOURCE_DMA, \
  2413. }, \
  2414. { \
  2415. .start = IRQ_SPORT##x##_ERROR, \
  2416. .end = IRQ_SPORT##x##_ERROR, \
  2417. .flags = IORESOURCE_IRQ, \
  2418. } \
  2419. }
  2420. static struct resource bfin_snd_resources[][4] = {
  2421. BFIN_SND_RES(0),
  2422. BFIN_SND_RES(1),
  2423. };
  2424. static struct platform_device bfin_pcm = {
  2425. .name = "bfin-pcm-audio",
  2426. .id = -1,
  2427. };
  2428. #endif
  2429. #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
  2430. static struct platform_device bfin_ad73311_codec_device = {
  2431. .name = "ad73311",
  2432. .id = -1,
  2433. };
  2434. #endif
  2435. #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
  2436. static struct platform_device bfin_i2s = {
  2437. .name = "bfin-i2s",
  2438. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2439. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  2440. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  2441. .dev = {
  2442. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  2443. },
  2444. };
  2445. #endif
  2446. #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
  2447. static struct platform_device bfin_tdm = {
  2448. .name = "bfin-tdm",
  2449. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2450. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  2451. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  2452. .dev = {
  2453. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  2454. },
  2455. };
  2456. #endif
  2457. #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
  2458. static struct platform_device bfin_ac97 = {
  2459. .name = "bfin-ac97",
  2460. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2461. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  2462. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  2463. .dev = {
  2464. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  2465. },
  2466. };
  2467. #endif
  2468. #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
  2469. #define REGULATOR_ADP122 "adp122"
  2470. #define REGULATOR_ADP122_UV 2500000
  2471. static struct regulator_consumer_supply adp122_consumers = {
  2472. .supply = REGULATOR_ADP122,
  2473. };
  2474. static struct regulator_init_data adp_switch_regulator_data = {
  2475. .constraints = {
  2476. .name = REGULATOR_ADP122,
  2477. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  2478. .min_uV = REGULATOR_ADP122_UV,
  2479. .max_uV = REGULATOR_ADP122_UV,
  2480. .min_uA = 0,
  2481. .max_uA = 300000,
  2482. },
  2483. .num_consumer_supplies = 1, /* only 1 */
  2484. .consumer_supplies = &adp122_consumers,
  2485. };
  2486. static struct fixed_voltage_config adp_switch_pdata = {
  2487. .supply_name = REGULATOR_ADP122,
  2488. .microvolts = REGULATOR_ADP122_UV,
  2489. .gpio = GPIO_PF2,
  2490. .enable_high = 1,
  2491. .enabled_at_boot = 0,
  2492. .init_data = &adp_switch_regulator_data,
  2493. };
  2494. static struct platform_device adp_switch_device = {
  2495. .name = "reg-fixed-voltage",
  2496. .id = 0,
  2497. .dev = {
  2498. .platform_data = &adp_switch_pdata,
  2499. },
  2500. };
  2501. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2502. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2503. static struct regulator_bulk_data adp122_bulk_data = {
  2504. .supply = REGULATOR_ADP122,
  2505. };
  2506. static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
  2507. .name = REGULATOR_ADP122,
  2508. .num_supplies = 1,
  2509. .supplies = &adp122_bulk_data,
  2510. };
  2511. static struct platform_device adp122_userspace_consumer_device = {
  2512. .name = "reg-userspace-consumer",
  2513. .id = 0,
  2514. .dev = {
  2515. .platform_data = &adp122_userspace_comsumer_data,
  2516. },
  2517. };
  2518. #endif
  2519. #endif
  2520. #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
  2521. defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
  2522. static struct resource iio_gpio_trigger_resources[] = {
  2523. [0] = {
  2524. .start = IRQ_PF5,
  2525. .end = IRQ_PF5,
  2526. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  2527. },
  2528. };
  2529. static struct platform_device iio_gpio_trigger = {
  2530. .name = "iio_gpio_trigger",
  2531. .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
  2532. .resource = iio_gpio_trigger_resources,
  2533. };
  2534. #endif
  2535. static struct platform_device *stamp_devices[] __initdata = {
  2536. &bfin_dpmc,
  2537. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  2538. &bfin_pcmcia_cf_device,
  2539. #endif
  2540. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  2541. &rtc_device,
  2542. #endif
  2543. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  2544. &sl811_hcd_device,
  2545. #endif
  2546. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  2547. &isp1362_hcd_device,
  2548. #endif
  2549. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  2550. &bfin_isp1760_device,
  2551. #endif
  2552. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  2553. &smc91x_device,
  2554. #endif
  2555. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  2556. &dm9000_device,
  2557. #endif
  2558. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  2559. &bfin_can_device,
  2560. #endif
  2561. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  2562. &bfin_mii_bus,
  2563. &bfin_mac_device,
  2564. #endif
  2565. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  2566. &net2272_bfin_device,
  2567. #endif
  2568. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  2569. &bfin_spi0_device,
  2570. #endif
  2571. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  2572. &bfin_sport_spi0_device,
  2573. &bfin_sport_spi1_device,
  2574. #endif
  2575. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  2576. &bfin_fb_device,
  2577. #endif
  2578. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  2579. &bfin_lq035q1_device,
  2580. #endif
  2581. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  2582. #ifdef CONFIG_SERIAL_BFIN_UART0
  2583. &bfin_uart0_device,
  2584. #endif
  2585. #ifdef CONFIG_SERIAL_BFIN_UART1
  2586. &bfin_uart1_device,
  2587. #endif
  2588. #endif
  2589. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  2590. #ifdef CONFIG_BFIN_SIR0
  2591. &bfin_sir0_device,
  2592. #endif
  2593. #ifdef CONFIG_BFIN_SIR1
  2594. &bfin_sir1_device,
  2595. #endif
  2596. #endif
  2597. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  2598. &i2c_bfin_twi_device,
  2599. #endif
  2600. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  2601. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2602. &bfin_sport0_uart_device,
  2603. #endif
  2604. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2605. &bfin_sport1_uart_device,
  2606. #endif
  2607. #endif
  2608. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  2609. &bfin_pata_device,
  2610. #endif
  2611. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  2612. &bfin_device_gpiokeys,
  2613. #endif
  2614. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  2615. &bfin_async_nand_device,
  2616. #endif
  2617. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  2618. &stamp_flash_device,
  2619. #endif
  2620. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
  2621. defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
  2622. defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  2623. &bfin_pcm,
  2624. #endif
  2625. #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
  2626. &bfin_ad73311_codec_device,
  2627. #endif
  2628. #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
  2629. &bfin_i2s,
  2630. #endif
  2631. #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
  2632. &bfin_tdm,
  2633. #endif
  2634. #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
  2635. &bfin_ac97,
  2636. #endif
  2637. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  2638. #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
  2639. defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
  2640. &ad5398_virt_consumer_device,
  2641. #endif
  2642. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2643. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2644. &ad5398_userspace_consumer_device,
  2645. #endif
  2646. #endif
  2647. #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
  2648. &adp_switch_device,
  2649. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2650. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2651. &adp122_userspace_consumer_device,
  2652. #endif
  2653. #endif
  2654. #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
  2655. defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
  2656. &iio_gpio_trigger,
  2657. #endif
  2658. };
  2659. static int __init stamp_init(void)
  2660. {
  2661. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  2662. bfin_plat_nand_init();
  2663. adf702x_mac_init();
  2664. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  2665. i2c_register_board_info(0, bfin_i2c_board_info,
  2666. ARRAY_SIZE(bfin_i2c_board_info));
  2667. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  2668. return 0;
  2669. }
  2670. arch_initcall(stamp_init);
  2671. static struct platform_device *stamp_early_devices[] __initdata = {
  2672. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  2673. #ifdef CONFIG_SERIAL_BFIN_UART0
  2674. &bfin_uart0_device,
  2675. #endif
  2676. #ifdef CONFIG_SERIAL_BFIN_UART1
  2677. &bfin_uart1_device,
  2678. #endif
  2679. #endif
  2680. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  2681. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2682. &bfin_sport0_uart_device,
  2683. #endif
  2684. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2685. &bfin_sport1_uart_device,
  2686. #endif
  2687. #endif
  2688. };
  2689. void __init native_machine_early_platform_add_devices(void)
  2690. {
  2691. printk(KERN_INFO "register early platform devices\n");
  2692. early_platform_add_devices(stamp_early_devices,
  2693. ARRAY_SIZE(stamp_early_devices));
  2694. }
  2695. void native_machine_restart(char *cmd)
  2696. {
  2697. /* workaround reboot hang when booting from SPI */
  2698. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  2699. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  2700. }
  2701. /*
  2702. * Currently the MAC address is saved in Flash by U-Boot
  2703. */
  2704. #define FLASH_MAC 0x203f0000
  2705. void bfin_get_ether_addr(char *addr)
  2706. {
  2707. *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
  2708. *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
  2709. }
  2710. EXPORT_SYMBOL(bfin_get_ether_addr);