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sh_dma.h

sh_dma.h 2.3 KB
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  1. /*
    2. 

  2.  * Header for the new SH dmaengine driver
    3. 

  3.  *
    4. 

  4.  * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
    5. 

  5.  *
    6. 

  6.  * This program is free software; you can redistribute it and/or modify
    7. 

  7.  * it under the terms of the GNU General Public License version 2 as
    8. 

  8.  * published by the Free Software Foundation.
    9. 

  9.  */
    10. 

  10. #ifndef SH_DMA_H
    11. 

  11. #define SH_DMA_H
    12. 

  12. 

  13. #include <linux/dmaengine.h>
    14. 

  14. #include <linux/list.h>
    15. 

  15. #include <linux/shdma-base.h>
    16. 

  16. #include <linux/types.h>
    17. 

  17. 

  18. struct device;
    19. 

  19. 

  20. /* Used by slave DMA clients to request DMA to/from a specific peripheral */
    21. 

  21. struct sh_dmae_slave {
    22. 

  22. 	struct shdma_slave		shdma_slave;	/* Set by the platform */
    23. 

  23. };
    24. 

  24. 

  25. /*
    26. 

  26.  * Supplied by platforms to specify, how a DMA channel has to be configured for
    27. 

  27.  * a certain peripheral
    28. 

  28.  */
    29. 

  29. struct sh_dmae_slave_config {
    30. 

  30. 	unsigned int			slave_id;
    31. 

  31. 	dma_addr_t			addr;
    32. 

  32. 	u32				chcr;
    33. 

  33. 	char				mid_rid;
    34. 

  34. };
    35. 

  35. 

  36. struct sh_dmae_channel {
    37. 

  37. 	unsigned int	offset;
    38. 

  38. 	unsigned int	dmars;
    39. 

  39. 	unsigned int	dmars_bit;
    40. 

  40. 	unsigned int	chclr_offset;
    41. 

  41. };
    42. 

  42. 

  43. struct sh_dmae_pdata {
    44. 

  44. 	const struct sh_dmae_slave_config *slave;
    45. 

  45. 	int slave_num;
    46. 

  46. 	const struct sh_dmae_channel *channel;
    47. 

  47. 	int channel_num;
    48. 

  48. 	unsigned int ts_low_shift;
    49. 

  49. 	unsigned int ts_low_mask;
    50. 

  50. 	unsigned int ts_high_shift;
    51. 

  51. 	unsigned int ts_high_mask;
    52. 

  52. 	const unsigned int *ts_shift;
    53. 

  53. 	int ts_shift_num;
    54. 

  54. 	u16 dmaor_init;
    55. 

  55. 	unsigned int chcr_offset;
    56. 

  56. 	u32 chcr_ie_bit;
    57. 

  57. 

  58. 	unsigned int dmaor_is_32bit:1;
    59. 

  59. 	unsigned int needs_tend_set:1;
    60. 

  60. 	unsigned int no_dmars:1;
    61. 

  61. 	unsigned int chclr_present:1;
    62. 

  62. 	unsigned int slave_only:1;
    63. 

  63. };
    64. 

  64. 

  65. /* DMA register */
    66. 

  66. #define SAR	0x00
    67. 

  67. #define DAR	0x04
    68. 

  68. #define TCR	0x08
    69. 

  69. #define CHCR	0x0C
    70. 

  70. #define DMAOR	0x40
    71. 

  71. 

  72. #define TEND	0x18 /* USB-DMAC */
    73. 

  73. 

  74. /* DMAOR definitions */
    75. 

  75. #define DMAOR_AE	0x00000004
    76. 

  76. #define DMAOR_NMIF	0x00000002
    77. 

  77. #define DMAOR_DME	0x00000001
    78. 

  78. 

  79. /* Definitions for the SuperH DMAC */
    80. 

  80. #define REQ_L	0x00000000
    81. 

  81. #define REQ_E	0x00080000
    82. 

  82. #define RACK_H	0x00000000
    83. 

  83. #define RACK_L	0x00040000
    84. 

  84. #define ACK_R	0x00000000
    85. 

  85. #define ACK_W	0x00020000
    86. 

  86. #define ACK_H	0x00000000
    87. 

  87. #define ACK_L	0x00010000
    88. 

  88. #define DM_INC	0x00004000
    89. 

  89. #define DM_DEC	0x00008000
    90. 

  90. #define DM_FIX	0x0000c000
    91. 

  91. #define SM_INC	0x00001000
    92. 

  92. #define SM_DEC	0x00002000
    93. 

  93. #define SM_FIX	0x00003000
    94. 

  94. #define RS_IN	0x00000200
    95. 

  95. #define RS_OUT	0x00000300
    96. 

  96. #define TS_BLK	0x00000040
    97. 

  97. #define TM_BUR	0x00000020
    98. 

  98. #define CHCR_DE	0x00000001
    99. 

  99. #define CHCR_TE	0x00000002
    100. 

  100. #define CHCR_IE	0x00000004
    101. 

  101. 

  102. #endif
    103.