cx88-dvb.c 23 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "nxt200x.h"
  41. #include "cx24123.h"
  42. #include "isl6421.h"
  43. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  44. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  45. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  46. MODULE_LICENSE("GPL");
  47. static unsigned int debug = 0;
  48. module_param(debug, int, 0644);
  49. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  50. #define dprintk(level,fmt, arg...) if (debug >= level) \
  51. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  52. /* ------------------------------------------------------------------ */
  53. static int dvb_buf_setup(struct videobuf_queue *q,
  54. unsigned int *count, unsigned int *size)
  55. {
  56. struct cx8802_dev *dev = q->priv_data;
  57. dev->ts_packet_size = 188 * 4;
  58. dev->ts_packet_count = 32;
  59. *size = dev->ts_packet_size * dev->ts_packet_count;
  60. *count = 32;
  61. return 0;
  62. }
  63. static int dvb_buf_prepare(struct videobuf_queue *q,
  64. struct videobuf_buffer *vb, enum v4l2_field field)
  65. {
  66. struct cx8802_dev *dev = q->priv_data;
  67. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  68. }
  69. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  70. {
  71. struct cx8802_dev *dev = q->priv_data;
  72. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  73. }
  74. static void dvb_buf_release(struct videobuf_queue *q,
  75. struct videobuf_buffer *vb)
  76. {
  77. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  78. }
  79. static struct videobuf_queue_ops dvb_qops = {
  80. .buf_setup = dvb_buf_setup,
  81. .buf_prepare = dvb_buf_prepare,
  82. .buf_queue = dvb_buf_queue,
  83. .buf_release = dvb_buf_release,
  84. };
  85. /* ------------------------------------------------------------------ */
  86. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  87. {
  88. struct cx8802_dev *dev= fe->dvb->priv;
  89. struct cx8802_driver *drv = NULL;
  90. int ret = 0;
  91. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  92. if (drv) {
  93. if (acquire)
  94. ret = drv->request_acquire(drv);
  95. else
  96. ret = drv->request_release(drv);
  97. }
  98. return ret;
  99. }
  100. /* ------------------------------------------------------------------ */
  101. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  102. {
  103. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  104. static u8 reset [] = { RESET, 0x80 };
  105. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  106. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  107. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  108. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  109. mt352_write(fe, clock_config, sizeof(clock_config));
  110. udelay(200);
  111. mt352_write(fe, reset, sizeof(reset));
  112. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  113. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  114. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  115. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  116. return 0;
  117. }
  118. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  119. {
  120. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  121. static u8 reset [] = { RESET, 0x80 };
  122. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  123. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  124. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  125. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  126. mt352_write(fe, clock_config, sizeof(clock_config));
  127. udelay(200);
  128. mt352_write(fe, reset, sizeof(reset));
  129. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  130. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  131. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  132. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  133. return 0;
  134. }
  135. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  136. {
  137. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  138. static u8 reset [] = { 0x50, 0x80 };
  139. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  140. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  141. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  142. static u8 dntv_extra[] = { 0xB5, 0x7A };
  143. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  144. mt352_write(fe, clock_config, sizeof(clock_config));
  145. udelay(2000);
  146. mt352_write(fe, reset, sizeof(reset));
  147. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  148. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  149. udelay(2000);
  150. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  151. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  152. return 0;
  153. }
  154. static struct mt352_config dvico_fusionhdtv = {
  155. .demod_address = 0x0f,
  156. .demod_init = dvico_fusionhdtv_demod_init,
  157. };
  158. static struct mt352_config dntv_live_dvbt_config = {
  159. .demod_address = 0x0f,
  160. .demod_init = dntv_live_dvbt_demod_init,
  161. };
  162. static struct mt352_config dvico_fusionhdtv_dual = {
  163. .demod_address = 0x0f,
  164. .demod_init = dvico_dual_demod_init,
  165. };
  166. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  167. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  168. {
  169. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  170. static u8 reset [] = { 0x50, 0x80 };
  171. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  172. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  173. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  174. static u8 dntv_extra[] = { 0xB5, 0x7A };
  175. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  176. mt352_write(fe, clock_config, sizeof(clock_config));
  177. udelay(2000);
  178. mt352_write(fe, reset, sizeof(reset));
  179. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  180. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  181. udelay(2000);
  182. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  183. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  184. return 0;
  185. }
  186. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  187. {
  188. struct cx8802_dev *dev= fe->dvb->priv;
  189. /* this message is to set up ATC and ALC */
  190. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  191. struct i2c_msg msg =
  192. { .addr = dev->core->pll_addr, .flags = 0,
  193. .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
  194. int err;
  195. if (fe->ops.i2c_gate_ctrl)
  196. fe->ops.i2c_gate_ctrl(fe, 1);
  197. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  198. if (err < 0)
  199. return err;
  200. else
  201. return -EREMOTEIO;
  202. }
  203. return 0;
  204. }
  205. static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
  206. struct dvb_frontend_parameters* params)
  207. {
  208. struct cx8802_dev *dev= fe->dvb->priv;
  209. u8 buf[4];
  210. struct i2c_msg msg =
  211. { .addr = dev->core->pll_addr, .flags = 0,
  212. .buf = buf, .len = 4 };
  213. int err;
  214. /* Switch PLL to DVB mode */
  215. err = philips_fmd1216_pll_init(fe);
  216. if (err)
  217. return err;
  218. /* Tune PLL */
  219. dvb_pll_configure(dev->core->pll_desc, buf,
  220. params->frequency,
  221. params->u.ofdm.bandwidth);
  222. if (fe->ops.i2c_gate_ctrl)
  223. fe->ops.i2c_gate_ctrl(fe, 1);
  224. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  225. printk(KERN_WARNING "cx88-dvb: %s error "
  226. "(addr %02x <- %02x, err = %i)\n",
  227. __FUNCTION__, dev->core->pll_addr, buf[0], err);
  228. if (err < 0)
  229. return err;
  230. else
  231. return -EREMOTEIO;
  232. }
  233. return 0;
  234. }
  235. static struct mt352_config dntv_live_dvbt_pro_config = {
  236. .demod_address = 0x0f,
  237. .no_tuner = 1,
  238. .demod_init = dntv_live_dvbt_pro_demod_init,
  239. };
  240. #endif
  241. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  242. .demod_address = 0x0f,
  243. .no_tuner = 1,
  244. };
  245. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  246. .demod_address = 0x0f,
  247. };
  248. static struct cx22702_config connexant_refboard_config = {
  249. .demod_address = 0x43,
  250. .output_mode = CX22702_SERIAL_OUTPUT,
  251. };
  252. static struct cx22702_config hauppauge_hvr_config = {
  253. .demod_address = 0x63,
  254. .output_mode = CX22702_SERIAL_OUTPUT,
  255. };
  256. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  257. {
  258. struct cx8802_dev *dev= fe->dvb->priv;
  259. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  260. return 0;
  261. }
  262. static struct or51132_config pchdtv_hd3000 = {
  263. .demod_address = 0x15,
  264. .set_ts_params = or51132_set_ts_param,
  265. };
  266. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  267. {
  268. struct cx8802_dev *dev= fe->dvb->priv;
  269. struct cx88_core *core = dev->core;
  270. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  271. if (index == 0)
  272. cx_clear(MO_GP0_IO, 8);
  273. else
  274. cx_set(MO_GP0_IO, 8);
  275. return 0;
  276. }
  277. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  278. {
  279. struct cx8802_dev *dev= fe->dvb->priv;
  280. if (is_punctured)
  281. dev->ts_gen_cntrl |= 0x04;
  282. else
  283. dev->ts_gen_cntrl &= ~0x04;
  284. return 0;
  285. }
  286. static struct lgdt330x_config fusionhdtv_3_gold = {
  287. .demod_address = 0x0e,
  288. .demod_chip = LGDT3302,
  289. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  290. .set_ts_params = lgdt330x_set_ts_param,
  291. };
  292. static struct lgdt330x_config fusionhdtv_5_gold = {
  293. .demod_address = 0x0e,
  294. .demod_chip = LGDT3303,
  295. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  296. .set_ts_params = lgdt330x_set_ts_param,
  297. };
  298. static struct lgdt330x_config pchdtv_hd5500 = {
  299. .demod_address = 0x59,
  300. .demod_chip = LGDT3303,
  301. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  302. .set_ts_params = lgdt330x_set_ts_param,
  303. };
  304. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  305. {
  306. struct cx8802_dev *dev= fe->dvb->priv;
  307. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  308. return 0;
  309. }
  310. static int nxt200x_set_pll_input(u8* buf, int input)
  311. {
  312. if (input)
  313. buf[3] |= 0x08;
  314. else
  315. buf[3] &= ~0x08;
  316. return 0;
  317. }
  318. static struct nxt200x_config ati_hdtvwonder = {
  319. .demod_address = 0x0a,
  320. .set_pll_input = nxt200x_set_pll_input,
  321. .set_ts_params = nxt200x_set_ts_param,
  322. };
  323. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  324. int is_punctured)
  325. {
  326. struct cx8802_dev *dev= fe->dvb->priv;
  327. dev->ts_gen_cntrl = 0x02;
  328. return 0;
  329. }
  330. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  331. fe_sec_voltage_t voltage)
  332. {
  333. struct cx8802_dev *dev= fe->dvb->priv;
  334. struct cx88_core *core = dev->core;
  335. if (voltage == SEC_VOLTAGE_OFF)
  336. cx_write(MO_GP0_IO, 0x000006fb);
  337. else
  338. cx_write(MO_GP0_IO, 0x000006f9);
  339. if (core->prev_set_voltage)
  340. return core->prev_set_voltage(fe, voltage);
  341. return 0;
  342. }
  343. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  344. fe_sec_voltage_t voltage)
  345. {
  346. struct cx8802_dev *dev= fe->dvb->priv;
  347. struct cx88_core *core = dev->core;
  348. if (voltage == SEC_VOLTAGE_OFF) {
  349. dprintk(1,"LNB Voltage OFF\n");
  350. cx_write(MO_GP0_IO, 0x0000efff);
  351. }
  352. if (core->prev_set_voltage)
  353. return core->prev_set_voltage(fe, voltage);
  354. return 0;
  355. }
  356. static struct cx24123_config geniatech_dvbs_config = {
  357. .demod_address = 0x55,
  358. .set_ts_params = cx24123_set_ts_param,
  359. };
  360. static struct cx24123_config hauppauge_novas_config = {
  361. .demod_address = 0x55,
  362. .set_ts_params = cx24123_set_ts_param,
  363. };
  364. static struct cx24123_config kworld_dvbs_100_config = {
  365. .demod_address = 0x15,
  366. .set_ts_params = cx24123_set_ts_param,
  367. .lnb_polarity = 1,
  368. };
  369. static int dvb_register(struct cx8802_dev *dev)
  370. {
  371. /* init struct videobuf_dvb */
  372. dev->dvb.name = dev->core->name;
  373. dev->ts_gen_cntrl = 0x0c;
  374. /* init frontend */
  375. switch (dev->core->board) {
  376. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  377. dev->dvb.frontend = dvb_attach(cx22702_attach,
  378. &connexant_refboard_config,
  379. &dev->core->i2c_adap);
  380. if (dev->dvb.frontend != NULL) {
  381. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  382. &dev->core->i2c_adap,
  383. &dvb_pll_thomson_dtt759x);
  384. }
  385. break;
  386. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  387. case CX88_BOARD_CONEXANT_DVB_T1:
  388. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  389. case CX88_BOARD_WINFAST_DTV1000:
  390. dev->dvb.frontend = dvb_attach(cx22702_attach,
  391. &connexant_refboard_config,
  392. &dev->core->i2c_adap);
  393. if (dev->dvb.frontend != NULL) {
  394. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  395. &dev->core->i2c_adap,
  396. &dvb_pll_thomson_dtt7579);
  397. }
  398. break;
  399. case CX88_BOARD_WINFAST_DTV2000H:
  400. case CX88_BOARD_HAUPPAUGE_HVR1100:
  401. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  402. case CX88_BOARD_HAUPPAUGE_HVR1300:
  403. case CX88_BOARD_HAUPPAUGE_HVR3000:
  404. dev->dvb.frontend = dvb_attach(cx22702_attach,
  405. &hauppauge_hvr_config,
  406. &dev->core->i2c_adap);
  407. if (dev->dvb.frontend != NULL) {
  408. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  409. &dev->core->i2c_adap, &dvb_pll_fmd1216me);
  410. }
  411. break;
  412. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  413. dev->dvb.frontend = dvb_attach(mt352_attach,
  414. &dvico_fusionhdtv,
  415. &dev->core->i2c_adap);
  416. if (dev->dvb.frontend != NULL) {
  417. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  418. NULL, &dvb_pll_thomson_dtt7579);
  419. break;
  420. }
  421. /* ZL10353 replaces MT352 on later cards */
  422. dev->dvb.frontend = dvb_attach(zl10353_attach,
  423. &dvico_fusionhdtv_plus_v1_1,
  424. &dev->core->i2c_adap);
  425. if (dev->dvb.frontend != NULL) {
  426. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  427. NULL, &dvb_pll_thomson_dtt7579);
  428. }
  429. break;
  430. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  431. /* The tin box says DEE1601, but it seems to be DTT7579
  432. * compatible, with a slightly different MT352 AGC gain. */
  433. dev->dvb.frontend = dvb_attach(mt352_attach,
  434. &dvico_fusionhdtv_dual,
  435. &dev->core->i2c_adap);
  436. if (dev->dvb.frontend != NULL) {
  437. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  438. NULL, &dvb_pll_thomson_dtt7579);
  439. break;
  440. }
  441. /* ZL10353 replaces MT352 on later cards */
  442. dev->dvb.frontend = dvb_attach(zl10353_attach,
  443. &dvico_fusionhdtv_plus_v1_1,
  444. &dev->core->i2c_adap);
  445. if (dev->dvb.frontend != NULL) {
  446. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  447. NULL, &dvb_pll_thomson_dtt7579);
  448. }
  449. break;
  450. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  451. dev->dvb.frontend = dvb_attach(mt352_attach,
  452. &dvico_fusionhdtv,
  453. &dev->core->i2c_adap);
  454. if (dev->dvb.frontend != NULL) {
  455. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  456. NULL, &dvb_pll_lg_z201);
  457. }
  458. break;
  459. case CX88_BOARD_KWORLD_DVB_T:
  460. case CX88_BOARD_DNTV_LIVE_DVB_T:
  461. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  462. dev->dvb.frontend = dvb_attach(mt352_attach,
  463. &dntv_live_dvbt_config,
  464. &dev->core->i2c_adap);
  465. if (dev->dvb.frontend != NULL) {
  466. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  467. NULL, &dvb_pll_unknown_1);
  468. }
  469. break;
  470. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  471. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  472. dev->core->pll_addr = 0x61;
  473. dev->core->pll_desc = &dvb_pll_fmd1216me;
  474. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  475. &((struct vp3054_i2c_state *)dev->card_priv)->adap);
  476. if (dev->dvb.frontend != NULL) {
  477. dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
  478. }
  479. #else
  480. printk("%s: built without vp3054 support\n", dev->core->name);
  481. #endif
  482. break;
  483. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  484. dev->dvb.frontend = dvb_attach(zl10353_attach,
  485. &dvico_fusionhdtv_hybrid,
  486. &dev->core->i2c_adap);
  487. if (dev->dvb.frontend != NULL) {
  488. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  489. &dev->core->i2c_adap,
  490. &dvb_pll_thomson_fe6600);
  491. }
  492. break;
  493. case CX88_BOARD_PCHDTV_HD3000:
  494. dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  495. &dev->core->i2c_adap);
  496. if (dev->dvb.frontend != NULL) {
  497. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  498. &dev->core->i2c_adap,
  499. &dvb_pll_thomson_dtt761x);
  500. }
  501. break;
  502. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  503. dev->ts_gen_cntrl = 0x08;
  504. {
  505. /* Do a hardware reset of chip before using it. */
  506. struct cx88_core *core = dev->core;
  507. cx_clear(MO_GP0_IO, 1);
  508. mdelay(100);
  509. cx_set(MO_GP0_IO, 1);
  510. mdelay(200);
  511. /* Select RF connector callback */
  512. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  513. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  514. &fusionhdtv_3_gold,
  515. &dev->core->i2c_adap);
  516. if (dev->dvb.frontend != NULL) {
  517. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  518. &dev->core->i2c_adap,
  519. &dvb_pll_microtune_4042);
  520. }
  521. }
  522. break;
  523. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  524. dev->ts_gen_cntrl = 0x08;
  525. {
  526. /* Do a hardware reset of chip before using it. */
  527. struct cx88_core *core = dev->core;
  528. cx_clear(MO_GP0_IO, 1);
  529. mdelay(100);
  530. cx_set(MO_GP0_IO, 9);
  531. mdelay(200);
  532. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  533. &fusionhdtv_3_gold,
  534. &dev->core->i2c_adap);
  535. if (dev->dvb.frontend != NULL) {
  536. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  537. &dev->core->i2c_adap,
  538. &dvb_pll_thomson_dtt761x);
  539. }
  540. }
  541. break;
  542. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  543. dev->ts_gen_cntrl = 0x08;
  544. {
  545. /* Do a hardware reset of chip before using it. */
  546. struct cx88_core *core = dev->core;
  547. cx_clear(MO_GP0_IO, 1);
  548. mdelay(100);
  549. cx_set(MO_GP0_IO, 1);
  550. mdelay(200);
  551. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  552. &fusionhdtv_5_gold,
  553. &dev->core->i2c_adap);
  554. if (dev->dvb.frontend != NULL) {
  555. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  556. &dev->core->i2c_adap,
  557. &dvb_pll_lg_tdvs_h06xf);
  558. }
  559. }
  560. break;
  561. case CX88_BOARD_PCHDTV_HD5500:
  562. dev->ts_gen_cntrl = 0x08;
  563. {
  564. /* Do a hardware reset of chip before using it. */
  565. struct cx88_core *core = dev->core;
  566. cx_clear(MO_GP0_IO, 1);
  567. mdelay(100);
  568. cx_set(MO_GP0_IO, 1);
  569. mdelay(200);
  570. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  571. &pchdtv_hd5500,
  572. &dev->core->i2c_adap);
  573. if (dev->dvb.frontend != NULL) {
  574. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  575. &dev->core->i2c_adap,
  576. &dvb_pll_lg_tdvs_h06xf);
  577. }
  578. }
  579. break;
  580. case CX88_BOARD_ATI_HDTVWONDER:
  581. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  582. &ati_hdtvwonder,
  583. &dev->core->i2c_adap);
  584. if (dev->dvb.frontend != NULL) {
  585. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  586. NULL, &dvb_pll_tuv1236d);
  587. }
  588. break;
  589. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  590. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  591. dev->dvb.frontend = dvb_attach(cx24123_attach,
  592. &hauppauge_novas_config,
  593. &dev->core->i2c_adap);
  594. if (dev->dvb.frontend) {
  595. dvb_attach(isl6421_attach, dev->dvb.frontend,
  596. &dev->core->i2c_adap, 0x08, 0x00, 0x00);
  597. }
  598. break;
  599. case CX88_BOARD_KWORLD_DVBS_100:
  600. dev->dvb.frontend = dvb_attach(cx24123_attach,
  601. &kworld_dvbs_100_config,
  602. &dev->core->i2c_adap);
  603. if (dev->dvb.frontend) {
  604. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  605. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  606. }
  607. break;
  608. case CX88_BOARD_GENIATECH_DVBS:
  609. dev->dvb.frontend = dvb_attach(cx24123_attach,
  610. &geniatech_dvbs_config,
  611. &dev->core->i2c_adap);
  612. if (dev->dvb.frontend) {
  613. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  614. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  615. }
  616. break;
  617. default:
  618. printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
  619. dev->core->name);
  620. break;
  621. }
  622. if (NULL == dev->dvb.frontend) {
  623. printk("%s: frontend initialization failed\n",dev->core->name);
  624. return -1;
  625. }
  626. if (dev->core->pll_desc) {
  627. dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
  628. dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
  629. }
  630. /* Ensure all frontends negotiate bus access */
  631. dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  632. /* Put the analog decoder in standby to keep it quiet */
  633. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  634. /* register everything */
  635. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  636. }
  637. /* ----------------------------------------------------------- */
  638. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  639. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  640. {
  641. struct cx88_core *core = drv->core;
  642. int err = 0;
  643. dprintk( 1, "%s\n", __FUNCTION__);
  644. switch (core->board) {
  645. case CX88_BOARD_HAUPPAUGE_HVR1300:
  646. /* We arrive here with either the cx23416 or the cx22702
  647. * on the bus. Take the bus from the cx23416 and enable the
  648. * cx22702 demod
  649. */
  650. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  651. cx_clear(MO_GP0_IO, 0x00000004);
  652. udelay(1000);
  653. break;
  654. default:
  655. err = -ENODEV;
  656. }
  657. return err;
  658. }
  659. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  660. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  661. {
  662. struct cx88_core *core = drv->core;
  663. int err = 0;
  664. dprintk( 1, "%s\n", __FUNCTION__);
  665. switch (core->board) {
  666. case CX88_BOARD_HAUPPAUGE_HVR1300:
  667. /* Do Nothing, leave the cx22702 on the bus. */
  668. break;
  669. default:
  670. err = -ENODEV;
  671. }
  672. return err;
  673. }
  674. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  675. {
  676. struct cx88_core *core = drv->core;
  677. struct cx8802_dev *dev = drv->core->dvbdev;
  678. int err;
  679. dprintk( 1, "%s\n", __FUNCTION__);
  680. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  681. core->board,
  682. core->name,
  683. core->pci_bus,
  684. core->pci_slot);
  685. err = -ENODEV;
  686. if (!(cx88_boards[core->board].mpeg & CX88_MPEG_DVB))
  687. goto fail_core;
  688. /* If vp3054 isn't enabled, a stub will just return 0 */
  689. err = vp3054_i2c_probe(dev);
  690. if (0 != err)
  691. goto fail_core;
  692. /* dvb stuff */
  693. printk("%s/2: cx2388x based dvb card\n", core->name);
  694. videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
  695. dev->pci, &dev->slock,
  696. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  697. V4L2_FIELD_TOP,
  698. sizeof(struct cx88_buffer),
  699. dev);
  700. err = dvb_register(dev);
  701. if (err != 0)
  702. printk("%s dvb_register failed err = %d\n", __FUNCTION__, err);
  703. fail_core:
  704. return err;
  705. }
  706. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  707. {
  708. struct cx8802_dev *dev = drv->core->dvbdev;
  709. /* dvb */
  710. videobuf_dvb_unregister(&dev->dvb);
  711. vp3054_i2c_remove(dev);
  712. return 0;
  713. }
  714. static struct cx8802_driver cx8802_dvb_driver = {
  715. .type_id = CX88_MPEG_DVB,
  716. .hw_access = CX8802_DRVCTL_SHARED,
  717. .probe = cx8802_dvb_probe,
  718. .remove = cx8802_dvb_remove,
  719. .advise_acquire = cx8802_dvb_advise_acquire,
  720. .advise_release = cx8802_dvb_advise_release,
  721. };
  722. static int dvb_init(void)
  723. {
  724. printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
  725. (CX88_VERSION_CODE >> 16) & 0xff,
  726. (CX88_VERSION_CODE >> 8) & 0xff,
  727. CX88_VERSION_CODE & 0xff);
  728. #ifdef SNAPSHOT
  729. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  730. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  731. #endif
  732. return cx8802_register_driver(&cx8802_dvb_driver);
  733. }
  734. static void dvb_fini(void)
  735. {
  736. cx8802_unregister_driver(&cx8802_dvb_driver);
  737. }
  738. module_init(dvb_init);
  739. module_exit(dvb_fini);
  740. /*
  741. * Local variables:
  742. * c-basic-offset: 8
  743. * compile-command: "make DVB=1"
  744. * End:
  745. */