omap_hwmod.c 73 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <plat/common.h>
  139. #include <plat/cpu.h>
  140. #include "clockdomain.h"
  141. #include "powerdomain.h"
  142. #include <plat/clock.h>
  143. #include <plat/omap_hwmod.h>
  144. #include <plat/prcm.h>
  145. #include "cm2xxx_3xxx.h"
  146. #include "cminst44xx.h"
  147. #include "prm2xxx_3xxx.h"
  148. #include "prm44xx.h"
  149. #include "prminst44xx.h"
  150. #include "mux.h"
  151. /* Maximum microseconds to wait for OMAP module to softreset */
  152. #define MAX_MODULE_SOFTRESET_WAIT 10000
  153. /* Name of the OMAP hwmod for the MPU */
  154. #define MPU_INITIATOR_NAME "mpu"
  155. /* omap_hwmod_list contains all registered struct omap_hwmods */
  156. static LIST_HEAD(omap_hwmod_list);
  157. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  158. static struct omap_hwmod *mpu_oh;
  159. /* Private functions */
  160. /**
  161. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  162. * @oh: struct omap_hwmod *
  163. *
  164. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  165. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  166. * OCP_SYSCONFIG register or 0 upon success.
  167. */
  168. static int _update_sysc_cache(struct omap_hwmod *oh)
  169. {
  170. if (!oh->class->sysc) {
  171. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  172. return -EINVAL;
  173. }
  174. /* XXX ensure module interface clock is up */
  175. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  176. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  177. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  178. return 0;
  179. }
  180. /**
  181. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  182. * @v: OCP_SYSCONFIG value to write
  183. * @oh: struct omap_hwmod *
  184. *
  185. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  186. * one. No return value.
  187. */
  188. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  189. {
  190. if (!oh->class->sysc) {
  191. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  192. return;
  193. }
  194. /* XXX ensure module interface clock is up */
  195. /* Module might have lost context, always update cache and register */
  196. oh->_sysc_cache = v;
  197. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  198. }
  199. /**
  200. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  201. * @oh: struct omap_hwmod *
  202. * @standbymode: MIDLEMODE field bits
  203. * @v: pointer to register contents to modify
  204. *
  205. * Update the master standby mode bits in @v to be @standbymode for
  206. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  207. * upon error or 0 upon success.
  208. */
  209. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  210. u32 *v)
  211. {
  212. u32 mstandby_mask;
  213. u8 mstandby_shift;
  214. if (!oh->class->sysc ||
  215. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  216. return -EINVAL;
  217. if (!oh->class->sysc->sysc_fields) {
  218. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  219. return -EINVAL;
  220. }
  221. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  222. mstandby_mask = (0x3 << mstandby_shift);
  223. *v &= ~mstandby_mask;
  224. *v |= __ffs(standbymode) << mstandby_shift;
  225. return 0;
  226. }
  227. /**
  228. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  229. * @oh: struct omap_hwmod *
  230. * @idlemode: SIDLEMODE field bits
  231. * @v: pointer to register contents to modify
  232. *
  233. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  234. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  235. * or 0 upon success.
  236. */
  237. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  238. {
  239. u32 sidle_mask;
  240. u8 sidle_shift;
  241. if (!oh->class->sysc ||
  242. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  243. return -EINVAL;
  244. if (!oh->class->sysc->sysc_fields) {
  245. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  246. return -EINVAL;
  247. }
  248. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  249. sidle_mask = (0x3 << sidle_shift);
  250. *v &= ~sidle_mask;
  251. *v |= __ffs(idlemode) << sidle_shift;
  252. return 0;
  253. }
  254. /**
  255. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  256. * @oh: struct omap_hwmod *
  257. * @clockact: CLOCKACTIVITY field bits
  258. * @v: pointer to register contents to modify
  259. *
  260. * Update the clockactivity mode bits in @v to be @clockact for the
  261. * @oh hwmod. Used for additional powersaving on some modules. Does
  262. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  263. * success.
  264. */
  265. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  266. {
  267. u32 clkact_mask;
  268. u8 clkact_shift;
  269. if (!oh->class->sysc ||
  270. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  271. return -EINVAL;
  272. if (!oh->class->sysc->sysc_fields) {
  273. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  274. return -EINVAL;
  275. }
  276. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  277. clkact_mask = (0x3 << clkact_shift);
  278. *v &= ~clkact_mask;
  279. *v |= clockact << clkact_shift;
  280. return 0;
  281. }
  282. /**
  283. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  284. * @oh: struct omap_hwmod *
  285. * @v: pointer to register contents to modify
  286. *
  287. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  288. * error or 0 upon success.
  289. */
  290. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  291. {
  292. u32 softrst_mask;
  293. if (!oh->class->sysc ||
  294. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  295. return -EINVAL;
  296. if (!oh->class->sysc->sysc_fields) {
  297. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  298. return -EINVAL;
  299. }
  300. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  301. *v |= softrst_mask;
  302. return 0;
  303. }
  304. /**
  305. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  306. * @oh: struct omap_hwmod *
  307. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  308. * @v: pointer to register contents to modify
  309. *
  310. * Update the module autoidle bit in @v to be @autoidle for the @oh
  311. * hwmod. The autoidle bit controls whether the module can gate
  312. * internal clocks automatically when it isn't doing anything; the
  313. * exact function of this bit varies on a per-module basis. This
  314. * function does not write to the hardware. Returns -EINVAL upon
  315. * error or 0 upon success.
  316. */
  317. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  318. u32 *v)
  319. {
  320. u32 autoidle_mask;
  321. u8 autoidle_shift;
  322. if (!oh->class->sysc ||
  323. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  324. return -EINVAL;
  325. if (!oh->class->sysc->sysc_fields) {
  326. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  327. return -EINVAL;
  328. }
  329. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  330. autoidle_mask = (0x1 << autoidle_shift);
  331. *v &= ~autoidle_mask;
  332. *v |= autoidle << autoidle_shift;
  333. return 0;
  334. }
  335. /**
  336. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  337. * @oh: struct omap_hwmod *
  338. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  339. *
  340. * Set or clear the I/O pad wakeup flag in the mux entries for the
  341. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  342. * in memory. If the hwmod is currently idled, and the new idle
  343. * values don't match the previous ones, this function will also
  344. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  345. * currently idled, this function won't touch the hardware: the new
  346. * mux settings are written to the SCM PADCTRL registers when the
  347. * hwmod is idled. No return value.
  348. */
  349. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  350. {
  351. struct omap_device_pad *pad;
  352. bool change = false;
  353. u16 prev_idle;
  354. int j;
  355. if (!oh->mux || !oh->mux->enabled)
  356. return;
  357. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  358. pad = oh->mux->pads_dynamic[j];
  359. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  360. continue;
  361. prev_idle = pad->idle;
  362. if (set_wake)
  363. pad->idle |= OMAP_WAKEUP_EN;
  364. else
  365. pad->idle &= ~OMAP_WAKEUP_EN;
  366. if (prev_idle != pad->idle)
  367. change = true;
  368. }
  369. if (change && oh->_state == _HWMOD_STATE_IDLE)
  370. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  371. }
  372. /**
  373. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  374. * @oh: struct omap_hwmod *
  375. *
  376. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  377. * upon error or 0 upon success.
  378. */
  379. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  380. {
  381. if (!oh->class->sysc ||
  382. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  383. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  384. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  385. return -EINVAL;
  386. if (!oh->class->sysc->sysc_fields) {
  387. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  388. return -EINVAL;
  389. }
  390. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  391. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  392. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  393. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  394. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  395. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  396. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  397. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  398. return 0;
  399. }
  400. /**
  401. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  402. * @oh: struct omap_hwmod *
  403. *
  404. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  405. * upon error or 0 upon success.
  406. */
  407. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  408. {
  409. if (!oh->class->sysc ||
  410. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  411. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  412. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  413. return -EINVAL;
  414. if (!oh->class->sysc->sysc_fields) {
  415. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  416. return -EINVAL;
  417. }
  418. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  419. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  420. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  421. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  422. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  423. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  424. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  425. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  426. return 0;
  427. }
  428. /**
  429. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  430. * @oh: struct omap_hwmod *
  431. *
  432. * Prevent the hardware module @oh from entering idle while the
  433. * hardare module initiator @init_oh is active. Useful when a module
  434. * will be accessed by a particular initiator (e.g., if a module will
  435. * be accessed by the IVA, there should be a sleepdep between the IVA
  436. * initiator and the module). Only applies to modules in smart-idle
  437. * mode. If the clockdomain is marked as not needing autodeps, return
  438. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  439. * passes along clkdm_add_sleepdep() value upon success.
  440. */
  441. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  442. {
  443. if (!oh->_clk)
  444. return -EINVAL;
  445. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  446. return 0;
  447. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  448. }
  449. /**
  450. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  451. * @oh: struct omap_hwmod *
  452. *
  453. * Allow the hardware module @oh to enter idle while the hardare
  454. * module initiator @init_oh is active. Useful when a module will not
  455. * be accessed by a particular initiator (e.g., if a module will not
  456. * be accessed by the IVA, there should be no sleepdep between the IVA
  457. * initiator and the module). Only applies to modules in smart-idle
  458. * mode. If the clockdomain is marked as not needing autodeps, return
  459. * 0 without doing anything. Returns -EINVAL upon error or passes
  460. * along clkdm_del_sleepdep() value upon success.
  461. */
  462. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  463. {
  464. if (!oh->_clk)
  465. return -EINVAL;
  466. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  467. return 0;
  468. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  469. }
  470. /**
  471. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  472. * @oh: struct omap_hwmod *
  473. *
  474. * Called from _init_clocks(). Populates the @oh _clk (main
  475. * functional clock pointer) if a main_clk is present. Returns 0 on
  476. * success or -EINVAL on error.
  477. */
  478. static int _init_main_clk(struct omap_hwmod *oh)
  479. {
  480. int ret = 0;
  481. if (!oh->main_clk)
  482. return 0;
  483. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  484. if (!oh->_clk) {
  485. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  486. oh->name, oh->main_clk);
  487. return -EINVAL;
  488. }
  489. if (!oh->_clk->clkdm)
  490. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  491. oh->main_clk, oh->_clk->name);
  492. return ret;
  493. }
  494. /**
  495. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  496. * @oh: struct omap_hwmod *
  497. *
  498. * Called from _init_clocks(). Populates the @oh OCP slave interface
  499. * clock pointers. Returns 0 on success or -EINVAL on error.
  500. */
  501. static int _init_interface_clks(struct omap_hwmod *oh)
  502. {
  503. struct clk *c;
  504. int i;
  505. int ret = 0;
  506. if (oh->slaves_cnt == 0)
  507. return 0;
  508. for (i = 0; i < oh->slaves_cnt; i++) {
  509. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  510. if (!os->clk)
  511. continue;
  512. c = omap_clk_get_by_name(os->clk);
  513. if (!c) {
  514. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  515. oh->name, os->clk);
  516. ret = -EINVAL;
  517. }
  518. os->_clk = c;
  519. }
  520. return ret;
  521. }
  522. /**
  523. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  524. * @oh: struct omap_hwmod *
  525. *
  526. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  527. * clock pointers. Returns 0 on success or -EINVAL on error.
  528. */
  529. static int _init_opt_clks(struct omap_hwmod *oh)
  530. {
  531. struct omap_hwmod_opt_clk *oc;
  532. struct clk *c;
  533. int i;
  534. int ret = 0;
  535. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  536. c = omap_clk_get_by_name(oc->clk);
  537. if (!c) {
  538. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  539. oh->name, oc->clk);
  540. ret = -EINVAL;
  541. }
  542. oc->_clk = c;
  543. }
  544. return ret;
  545. }
  546. /**
  547. * _enable_clocks - enable hwmod main clock and interface clocks
  548. * @oh: struct omap_hwmod *
  549. *
  550. * Enables all clocks necessary for register reads and writes to succeed
  551. * on the hwmod @oh. Returns 0.
  552. */
  553. static int _enable_clocks(struct omap_hwmod *oh)
  554. {
  555. int i;
  556. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  557. if (oh->_clk)
  558. clk_enable(oh->_clk);
  559. if (oh->slaves_cnt > 0) {
  560. for (i = 0; i < oh->slaves_cnt; i++) {
  561. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  562. struct clk *c = os->_clk;
  563. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  564. clk_enable(c);
  565. }
  566. }
  567. /* The opt clocks are controlled by the device driver. */
  568. return 0;
  569. }
  570. /**
  571. * _disable_clocks - disable hwmod main clock and interface clocks
  572. * @oh: struct omap_hwmod *
  573. *
  574. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  575. */
  576. static int _disable_clocks(struct omap_hwmod *oh)
  577. {
  578. int i;
  579. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  580. if (oh->_clk)
  581. clk_disable(oh->_clk);
  582. if (oh->slaves_cnt > 0) {
  583. for (i = 0; i < oh->slaves_cnt; i++) {
  584. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  585. struct clk *c = os->_clk;
  586. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  587. clk_disable(c);
  588. }
  589. }
  590. /* The opt clocks are controlled by the device driver. */
  591. return 0;
  592. }
  593. static void _enable_optional_clocks(struct omap_hwmod *oh)
  594. {
  595. struct omap_hwmod_opt_clk *oc;
  596. int i;
  597. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  598. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  599. if (oc->_clk) {
  600. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  601. oc->_clk->name);
  602. clk_enable(oc->_clk);
  603. }
  604. }
  605. static void _disable_optional_clocks(struct omap_hwmod *oh)
  606. {
  607. struct omap_hwmod_opt_clk *oc;
  608. int i;
  609. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  610. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  611. if (oc->_clk) {
  612. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  613. oc->_clk->name);
  614. clk_disable(oc->_clk);
  615. }
  616. }
  617. /**
  618. * _enable_module - enable CLKCTRL modulemode on OMAP4
  619. * @oh: struct omap_hwmod *
  620. *
  621. * Enables the PRCM module mode related to the hwmod @oh.
  622. * No return value.
  623. */
  624. static void _enable_module(struct omap_hwmod *oh)
  625. {
  626. /* The module mode does not exist prior OMAP4 */
  627. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  628. return;
  629. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  630. return;
  631. pr_debug("omap_hwmod: %s: _enable_module: %d\n",
  632. oh->name, oh->prcm.omap4.modulemode);
  633. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  634. oh->clkdm->prcm_partition,
  635. oh->clkdm->cm_inst,
  636. oh->clkdm->clkdm_offs,
  637. oh->prcm.omap4.clkctrl_offs);
  638. }
  639. /**
  640. * _disable_module - enable CLKCTRL modulemode on OMAP4
  641. * @oh: struct omap_hwmod *
  642. *
  643. * Disable the PRCM module mode related to the hwmod @oh.
  644. * No return value.
  645. */
  646. static void _disable_module(struct omap_hwmod *oh)
  647. {
  648. /* The module mode does not exist prior OMAP4 */
  649. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  650. return;
  651. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  652. return;
  653. pr_debug("omap_hwmod: %s: _disable_module\n", oh->name);
  654. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  655. oh->clkdm->cm_inst,
  656. oh->clkdm->clkdm_offs,
  657. oh->prcm.omap4.clkctrl_offs);
  658. }
  659. /**
  660. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  661. * @oh: struct omap_hwmod *oh
  662. *
  663. * Count and return the number of MPU IRQs associated with the hwmod
  664. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  665. * NULL.
  666. */
  667. static int _count_mpu_irqs(struct omap_hwmod *oh)
  668. {
  669. struct omap_hwmod_irq_info *ohii;
  670. int i = 0;
  671. if (!oh || !oh->mpu_irqs)
  672. return 0;
  673. do {
  674. ohii = &oh->mpu_irqs[i++];
  675. } while (ohii->irq != -1);
  676. return i-1;
  677. }
  678. /**
  679. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  680. * @oh: struct omap_hwmod *oh
  681. *
  682. * Count and return the number of SDMA request lines associated with
  683. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  684. * if @oh is NULL.
  685. */
  686. static int _count_sdma_reqs(struct omap_hwmod *oh)
  687. {
  688. struct omap_hwmod_dma_info *ohdi;
  689. int i = 0;
  690. if (!oh || !oh->sdma_reqs)
  691. return 0;
  692. do {
  693. ohdi = &oh->sdma_reqs[i++];
  694. } while (ohdi->dma_req != -1);
  695. return i-1;
  696. }
  697. /**
  698. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  699. * @oh: struct omap_hwmod *oh
  700. *
  701. * Count and return the number of address space ranges associated with
  702. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  703. * if @oh is NULL.
  704. */
  705. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  706. {
  707. struct omap_hwmod_addr_space *mem;
  708. int i = 0;
  709. if (!os || !os->addr)
  710. return 0;
  711. do {
  712. mem = &os->addr[i++];
  713. } while (mem->pa_start != mem->pa_end);
  714. return i-1;
  715. }
  716. /**
  717. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  718. * @oh: struct omap_hwmod *
  719. *
  720. * Returns the array index of the OCP slave port that the MPU
  721. * addresses the device on, or -EINVAL upon error or not found.
  722. */
  723. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  724. {
  725. int i;
  726. int found = 0;
  727. if (!oh || oh->slaves_cnt == 0)
  728. return -EINVAL;
  729. for (i = 0; i < oh->slaves_cnt; i++) {
  730. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  731. if (os->user & OCP_USER_MPU) {
  732. found = 1;
  733. break;
  734. }
  735. }
  736. if (found)
  737. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  738. oh->name, i);
  739. else
  740. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  741. oh->name);
  742. return (found) ? i : -EINVAL;
  743. }
  744. /**
  745. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  746. * @oh: struct omap_hwmod *
  747. *
  748. * Return the virtual address of the base of the register target of
  749. * device @oh, or NULL on error.
  750. */
  751. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  752. {
  753. struct omap_hwmod_ocp_if *os;
  754. struct omap_hwmod_addr_space *mem;
  755. int i = 0, found = 0;
  756. void __iomem *va_start;
  757. if (!oh || oh->slaves_cnt == 0)
  758. return NULL;
  759. os = oh->slaves[index];
  760. if (!os->addr)
  761. return NULL;
  762. do {
  763. mem = &os->addr[i++];
  764. if (mem->flags & ADDR_TYPE_RT)
  765. found = 1;
  766. } while (!found && mem->pa_start != mem->pa_end);
  767. if (found) {
  768. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  769. if (!va_start) {
  770. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  771. return NULL;
  772. }
  773. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  774. oh->name, va_start);
  775. } else {
  776. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  777. oh->name);
  778. }
  779. return (found) ? va_start : NULL;
  780. }
  781. /**
  782. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  783. * @oh: struct omap_hwmod *
  784. *
  785. * If module is marked as SWSUP_SIDLE, force the module out of slave
  786. * idle; otherwise, configure it for smart-idle. If module is marked
  787. * as SWSUP_MSUSPEND, force the module out of master standby;
  788. * otherwise, configure it for smart-standby. No return value.
  789. */
  790. static void _enable_sysc(struct omap_hwmod *oh)
  791. {
  792. u8 idlemode, sf;
  793. u32 v;
  794. if (!oh->class->sysc)
  795. return;
  796. v = oh->_sysc_cache;
  797. sf = oh->class->sysc->sysc_flags;
  798. if (sf & SYSC_HAS_SIDLEMODE) {
  799. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  800. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  801. _set_slave_idlemode(oh, idlemode, &v);
  802. }
  803. if (sf & SYSC_HAS_MIDLEMODE) {
  804. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  805. idlemode = HWMOD_IDLEMODE_NO;
  806. } else {
  807. if (sf & SYSC_HAS_ENAWAKEUP)
  808. _enable_wakeup(oh, &v);
  809. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  810. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  811. else
  812. idlemode = HWMOD_IDLEMODE_SMART;
  813. }
  814. _set_master_standbymode(oh, idlemode, &v);
  815. }
  816. /*
  817. * XXX The clock framework should handle this, by
  818. * calling into this code. But this must wait until the
  819. * clock structures are tagged with omap_hwmod entries
  820. */
  821. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  822. (sf & SYSC_HAS_CLOCKACTIVITY))
  823. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  824. /* If slave is in SMARTIDLE, also enable wakeup */
  825. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  826. _enable_wakeup(oh, &v);
  827. _write_sysconfig(v, oh);
  828. /*
  829. * Set the autoidle bit only after setting the smartidle bit
  830. * Setting this will not have any impact on the other modules.
  831. */
  832. if (sf & SYSC_HAS_AUTOIDLE) {
  833. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  834. 0 : 1;
  835. _set_module_autoidle(oh, idlemode, &v);
  836. _write_sysconfig(v, oh);
  837. }
  838. }
  839. /**
  840. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  841. * @oh: struct omap_hwmod *
  842. *
  843. * If module is marked as SWSUP_SIDLE, force the module into slave
  844. * idle; otherwise, configure it for smart-idle. If module is marked
  845. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  846. * configure it for smart-standby. No return value.
  847. */
  848. static void _idle_sysc(struct omap_hwmod *oh)
  849. {
  850. u8 idlemode, sf;
  851. u32 v;
  852. if (!oh->class->sysc)
  853. return;
  854. v = oh->_sysc_cache;
  855. sf = oh->class->sysc->sysc_flags;
  856. if (sf & SYSC_HAS_SIDLEMODE) {
  857. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  858. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  859. _set_slave_idlemode(oh, idlemode, &v);
  860. }
  861. if (sf & SYSC_HAS_MIDLEMODE) {
  862. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  863. idlemode = HWMOD_IDLEMODE_FORCE;
  864. } else {
  865. if (sf & SYSC_HAS_ENAWAKEUP)
  866. _enable_wakeup(oh, &v);
  867. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  868. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  869. else
  870. idlemode = HWMOD_IDLEMODE_SMART;
  871. }
  872. _set_master_standbymode(oh, idlemode, &v);
  873. }
  874. /* If slave is in SMARTIDLE, also enable wakeup */
  875. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  876. _enable_wakeup(oh, &v);
  877. _write_sysconfig(v, oh);
  878. }
  879. /**
  880. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  881. * @oh: struct omap_hwmod *
  882. *
  883. * Force the module into slave idle and master suspend. No return
  884. * value.
  885. */
  886. static void _shutdown_sysc(struct omap_hwmod *oh)
  887. {
  888. u32 v;
  889. u8 sf;
  890. if (!oh->class->sysc)
  891. return;
  892. v = oh->_sysc_cache;
  893. sf = oh->class->sysc->sysc_flags;
  894. if (sf & SYSC_HAS_SIDLEMODE)
  895. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  896. if (sf & SYSC_HAS_MIDLEMODE)
  897. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  898. if (sf & SYSC_HAS_AUTOIDLE)
  899. _set_module_autoidle(oh, 1, &v);
  900. _write_sysconfig(v, oh);
  901. }
  902. /**
  903. * _lookup - find an omap_hwmod by name
  904. * @name: find an omap_hwmod by name
  905. *
  906. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  907. */
  908. static struct omap_hwmod *_lookup(const char *name)
  909. {
  910. struct omap_hwmod *oh, *temp_oh;
  911. oh = NULL;
  912. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  913. if (!strcmp(name, temp_oh->name)) {
  914. oh = temp_oh;
  915. break;
  916. }
  917. }
  918. return oh;
  919. }
  920. /**
  921. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  922. * @oh: struct omap_hwmod *
  923. *
  924. * Convert a clockdomain name stored in a struct omap_hwmod into a
  925. * clockdomain pointer, and save it into the struct omap_hwmod.
  926. * return -EINVAL if clkdm_name does not exist or if the lookup failed.
  927. */
  928. static int _init_clkdm(struct omap_hwmod *oh)
  929. {
  930. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  931. return 0;
  932. if (!oh->clkdm_name) {
  933. pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
  934. return -EINVAL;
  935. }
  936. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  937. if (!oh->clkdm) {
  938. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  939. oh->name, oh->clkdm_name);
  940. return -EINVAL;
  941. }
  942. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  943. oh->name, oh->clkdm_name);
  944. return 0;
  945. }
  946. /**
  947. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  948. * well the clockdomain.
  949. * @oh: struct omap_hwmod *
  950. * @data: not used; pass NULL
  951. *
  952. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  953. * Resolves all clock names embedded in the hwmod. Returns 0 on
  954. * success, or a negative error code on failure.
  955. */
  956. static int _init_clocks(struct omap_hwmod *oh, void *data)
  957. {
  958. int ret = 0;
  959. if (oh->_state != _HWMOD_STATE_REGISTERED)
  960. return 0;
  961. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  962. ret |= _init_main_clk(oh);
  963. ret |= _init_interface_clks(oh);
  964. ret |= _init_opt_clks(oh);
  965. ret |= _init_clkdm(oh);
  966. if (!ret)
  967. oh->_state = _HWMOD_STATE_CLKS_INITED;
  968. else
  969. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  970. return ret;
  971. }
  972. /**
  973. * _wait_target_ready - wait for a module to leave slave idle
  974. * @oh: struct omap_hwmod *
  975. *
  976. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  977. * does not have an IDLEST bit or if the module successfully leaves
  978. * slave idle; otherwise, pass along the return value of the
  979. * appropriate *_cm*_wait_module_ready() function.
  980. */
  981. static int _wait_target_ready(struct omap_hwmod *oh)
  982. {
  983. struct omap_hwmod_ocp_if *os;
  984. int ret;
  985. if (!oh)
  986. return -EINVAL;
  987. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  988. return 0;
  989. os = oh->slaves[oh->_mpu_port_index];
  990. if (oh->flags & HWMOD_NO_IDLEST)
  991. return 0;
  992. /* XXX check module SIDLEMODE */
  993. /* XXX check clock enable states */
  994. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  995. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  996. oh->prcm.omap2.idlest_reg_id,
  997. oh->prcm.omap2.idlest_idle_bit);
  998. } else if (cpu_is_omap44xx()) {
  999. if (!oh->clkdm)
  1000. return -EINVAL;
  1001. ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  1002. oh->clkdm->cm_inst,
  1003. oh->clkdm->clkdm_offs,
  1004. oh->prcm.omap4.clkctrl_offs);
  1005. } else {
  1006. BUG();
  1007. };
  1008. return ret;
  1009. }
  1010. /**
  1011. * _wait_target_disable - wait for a module to be disabled
  1012. * @oh: struct omap_hwmod *
  1013. *
  1014. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  1015. * does not have an IDLEST bit or if the module successfully enters
  1016. * slave idle; otherwise, pass along the return value of the
  1017. * appropriate *_cm*_wait_module_idle() function.
  1018. */
  1019. static int _wait_target_disable(struct omap_hwmod *oh)
  1020. {
  1021. /* TODO: For now just handle OMAP4+ */
  1022. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1023. return 0;
  1024. if (!oh)
  1025. return -EINVAL;
  1026. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1027. return 0;
  1028. if (oh->flags & HWMOD_NO_IDLEST)
  1029. return 0;
  1030. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  1031. oh->clkdm->cm_inst,
  1032. oh->clkdm->clkdm_offs,
  1033. oh->prcm.omap4.clkctrl_offs);
  1034. }
  1035. /**
  1036. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1037. * @oh: struct omap_hwmod *
  1038. * @name: name of the reset line in the context of this hwmod
  1039. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1040. *
  1041. * Return the bit position of the reset line that match the
  1042. * input name. Return -ENOENT if not found.
  1043. */
  1044. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1045. struct omap_hwmod_rst_info *ohri)
  1046. {
  1047. int i;
  1048. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1049. const char *rst_line = oh->rst_lines[i].name;
  1050. if (!strcmp(rst_line, name)) {
  1051. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1052. ohri->st_shift = oh->rst_lines[i].st_shift;
  1053. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1054. oh->name, __func__, rst_line, ohri->rst_shift,
  1055. ohri->st_shift);
  1056. return 0;
  1057. }
  1058. }
  1059. return -ENOENT;
  1060. }
  1061. /**
  1062. * _assert_hardreset - assert the HW reset line of submodules
  1063. * contained in the hwmod module.
  1064. * @oh: struct omap_hwmod *
  1065. * @name: name of the reset line to lookup and assert
  1066. *
  1067. * Some IP like dsp, ipu or iva contain processor that require
  1068. * an HW reset line to be assert / deassert in order to enable fully
  1069. * the IP.
  1070. */
  1071. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1072. {
  1073. struct omap_hwmod_rst_info ohri;
  1074. u8 ret;
  1075. if (!oh)
  1076. return -EINVAL;
  1077. ret = _lookup_hardreset(oh, name, &ohri);
  1078. if (IS_ERR_VALUE(ret))
  1079. return ret;
  1080. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1081. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  1082. ohri.rst_shift);
  1083. else if (cpu_is_omap44xx())
  1084. return omap4_prminst_assert_hardreset(ohri.rst_shift,
  1085. oh->clkdm->pwrdm.ptr->prcm_partition,
  1086. oh->clkdm->pwrdm.ptr->prcm_offs,
  1087. oh->prcm.omap4.rstctrl_offs);
  1088. else
  1089. return -EINVAL;
  1090. }
  1091. /**
  1092. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1093. * in the hwmod module.
  1094. * @oh: struct omap_hwmod *
  1095. * @name: name of the reset line to look up and deassert
  1096. *
  1097. * Some IP like dsp, ipu or iva contain processor that require
  1098. * an HW reset line to be assert / deassert in order to enable fully
  1099. * the IP.
  1100. */
  1101. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1102. {
  1103. struct omap_hwmod_rst_info ohri;
  1104. int ret;
  1105. if (!oh)
  1106. return -EINVAL;
  1107. ret = _lookup_hardreset(oh, name, &ohri);
  1108. if (IS_ERR_VALUE(ret))
  1109. return ret;
  1110. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1111. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  1112. ohri.rst_shift,
  1113. ohri.st_shift);
  1114. } else if (cpu_is_omap44xx()) {
  1115. if (ohri.st_shift)
  1116. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  1117. oh->name, name);
  1118. ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
  1119. oh->clkdm->pwrdm.ptr->prcm_partition,
  1120. oh->clkdm->pwrdm.ptr->prcm_offs,
  1121. oh->prcm.omap4.rstctrl_offs);
  1122. } else {
  1123. return -EINVAL;
  1124. }
  1125. if (ret == -EBUSY)
  1126. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1127. return ret;
  1128. }
  1129. /**
  1130. * _read_hardreset - read the HW reset line state of submodules
  1131. * contained in the hwmod module
  1132. * @oh: struct omap_hwmod *
  1133. * @name: name of the reset line to look up and read
  1134. *
  1135. * Return the state of the reset line.
  1136. */
  1137. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1138. {
  1139. struct omap_hwmod_rst_info ohri;
  1140. u8 ret;
  1141. if (!oh)
  1142. return -EINVAL;
  1143. ret = _lookup_hardreset(oh, name, &ohri);
  1144. if (IS_ERR_VALUE(ret))
  1145. return ret;
  1146. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1147. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  1148. ohri.st_shift);
  1149. } else if (cpu_is_omap44xx()) {
  1150. return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
  1151. oh->clkdm->pwrdm.ptr->prcm_partition,
  1152. oh->clkdm->pwrdm.ptr->prcm_offs,
  1153. oh->prcm.omap4.rstctrl_offs);
  1154. } else {
  1155. return -EINVAL;
  1156. }
  1157. }
  1158. /**
  1159. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1160. * @oh: struct omap_hwmod *
  1161. *
  1162. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1163. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  1164. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1165. * the module did not reset in time, or 0 upon success.
  1166. *
  1167. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1168. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1169. * use the SYSCONFIG softreset bit to provide the status.
  1170. *
  1171. * Note that some IP like McBSP do have reset control but don't have
  1172. * reset status.
  1173. */
  1174. static int _ocp_softreset(struct omap_hwmod *oh)
  1175. {
  1176. u32 v;
  1177. int c = 0;
  1178. int ret = 0;
  1179. if (!oh->class->sysc ||
  1180. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1181. return -EINVAL;
  1182. /* clocks must be on for this operation */
  1183. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1184. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1185. "enabled state\n", oh->name);
  1186. return -EINVAL;
  1187. }
  1188. /* For some modules, all optionnal clocks need to be enabled as well */
  1189. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1190. _enable_optional_clocks(oh);
  1191. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1192. v = oh->_sysc_cache;
  1193. ret = _set_softreset(oh, &v);
  1194. if (ret)
  1195. goto dis_opt_clks;
  1196. _write_sysconfig(v, oh);
  1197. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1198. omap_test_timeout((omap_hwmod_read(oh,
  1199. oh->class->sysc->syss_offs)
  1200. & SYSS_RESETDONE_MASK),
  1201. MAX_MODULE_SOFTRESET_WAIT, c);
  1202. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  1203. omap_test_timeout(!(omap_hwmod_read(oh,
  1204. oh->class->sysc->sysc_offs)
  1205. & SYSC_TYPE2_SOFTRESET_MASK),
  1206. MAX_MODULE_SOFTRESET_WAIT, c);
  1207. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1208. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1209. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1210. else
  1211. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1212. /*
  1213. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1214. * _wait_target_ready() or _reset()
  1215. */
  1216. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1217. dis_opt_clks:
  1218. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1219. _disable_optional_clocks(oh);
  1220. return ret;
  1221. }
  1222. /**
  1223. * _reset - reset an omap_hwmod
  1224. * @oh: struct omap_hwmod *
  1225. *
  1226. * Resets an omap_hwmod @oh. The default software reset mechanism for
  1227. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  1228. * bit. However, some hwmods cannot be reset via this method: some
  1229. * are not targets and therefore have no OCP header registers to
  1230. * access; others (like the IVA) have idiosyncratic reset sequences.
  1231. * So for these relatively rare cases, custom reset code can be
  1232. * supplied in the struct omap_hwmod_class .reset function pointer.
  1233. * Passes along the return value from either _reset() or the custom
  1234. * reset function - these must return -EINVAL if the hwmod cannot be
  1235. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1236. * the module did not reset in time, or 0 upon success.
  1237. */
  1238. static int _reset(struct omap_hwmod *oh)
  1239. {
  1240. int ret;
  1241. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1242. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1243. return ret;
  1244. }
  1245. /**
  1246. * _enable - enable an omap_hwmod
  1247. * @oh: struct omap_hwmod *
  1248. *
  1249. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1250. * register target. Returns -EINVAL if the hwmod is in the wrong
  1251. * state or passes along the return value of _wait_target_ready().
  1252. */
  1253. static int _enable(struct omap_hwmod *oh)
  1254. {
  1255. int r;
  1256. int hwsup = 0;
  1257. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1258. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1259. oh->_state != _HWMOD_STATE_IDLE &&
  1260. oh->_state != _HWMOD_STATE_DISABLED) {
  1261. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1262. "from initialized, idle, or disabled state\n", oh->name);
  1263. return -EINVAL;
  1264. }
  1265. /*
  1266. * If an IP contains only one HW reset line, then de-assert it in order
  1267. * to allow the module state transition. Otherwise the PRCM will return
  1268. * Intransition status, and the init will failed.
  1269. */
  1270. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1271. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1272. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1273. /* Mux pins for device runtime if populated */
  1274. if (oh->mux && (!oh->mux->enabled ||
  1275. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1276. oh->mux->pads_dynamic)))
  1277. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1278. _add_initiator_dep(oh, mpu_oh);
  1279. if (oh->clkdm) {
  1280. /*
  1281. * A clockdomain must be in SW_SUP before enabling
  1282. * completely the module. The clockdomain can be set
  1283. * in HW_AUTO only when the module become ready.
  1284. */
  1285. hwsup = clkdm_in_hwsup(oh->clkdm);
  1286. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1287. if (r) {
  1288. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1289. oh->name, oh->clkdm->name, r);
  1290. return r;
  1291. }
  1292. }
  1293. _enable_clocks(oh);
  1294. _enable_module(oh);
  1295. r = _wait_target_ready(oh);
  1296. if (!r) {
  1297. /*
  1298. * Set the clockdomain to HW_AUTO only if the target is ready,
  1299. * assuming that the previous state was HW_AUTO
  1300. */
  1301. if (oh->clkdm && hwsup)
  1302. clkdm_allow_idle(oh->clkdm);
  1303. oh->_state = _HWMOD_STATE_ENABLED;
  1304. /* Access the sysconfig only if the target is ready */
  1305. if (oh->class->sysc) {
  1306. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1307. _update_sysc_cache(oh);
  1308. _enable_sysc(oh);
  1309. }
  1310. } else {
  1311. _disable_clocks(oh);
  1312. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1313. oh->name, r);
  1314. if (oh->clkdm)
  1315. clkdm_hwmod_disable(oh->clkdm, oh);
  1316. }
  1317. return r;
  1318. }
  1319. /**
  1320. * _idle - idle an omap_hwmod
  1321. * @oh: struct omap_hwmod *
  1322. *
  1323. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1324. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1325. * state or returns 0.
  1326. */
  1327. static int _idle(struct omap_hwmod *oh)
  1328. {
  1329. int ret;
  1330. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1331. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1332. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1333. "enabled state\n", oh->name);
  1334. return -EINVAL;
  1335. }
  1336. if (oh->class->sysc)
  1337. _idle_sysc(oh);
  1338. _del_initiator_dep(oh, mpu_oh);
  1339. _disable_module(oh);
  1340. ret = _wait_target_disable(oh);
  1341. if (ret)
  1342. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1343. oh->name);
  1344. /*
  1345. * The module must be in idle mode before disabling any parents
  1346. * clocks. Otherwise, the parent clock might be disabled before
  1347. * the module transition is done, and thus will prevent the
  1348. * transition to complete properly.
  1349. */
  1350. _disable_clocks(oh);
  1351. if (oh->clkdm)
  1352. clkdm_hwmod_disable(oh->clkdm, oh);
  1353. /* Mux pins for device idle if populated */
  1354. if (oh->mux && oh->mux->pads_dynamic)
  1355. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1356. oh->_state = _HWMOD_STATE_IDLE;
  1357. return 0;
  1358. }
  1359. /**
  1360. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1361. * @oh: struct omap_hwmod *
  1362. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1363. *
  1364. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1365. * local copy. Intended to be used by drivers that require
  1366. * direct manipulation of the AUTOIDLE bits.
  1367. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1368. * along the return value from _set_module_autoidle().
  1369. *
  1370. * Any users of this function should be scrutinized carefully.
  1371. */
  1372. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1373. {
  1374. u32 v;
  1375. int retval = 0;
  1376. unsigned long flags;
  1377. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1378. return -EINVAL;
  1379. spin_lock_irqsave(&oh->_lock, flags);
  1380. v = oh->_sysc_cache;
  1381. retval = _set_module_autoidle(oh, autoidle, &v);
  1382. if (!retval)
  1383. _write_sysconfig(v, oh);
  1384. spin_unlock_irqrestore(&oh->_lock, flags);
  1385. return retval;
  1386. }
  1387. /**
  1388. * _shutdown - shutdown an omap_hwmod
  1389. * @oh: struct omap_hwmod *
  1390. *
  1391. * Shut down an omap_hwmod @oh. This should be called when the driver
  1392. * used for the hwmod is removed or unloaded or if the driver is not
  1393. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1394. * state or returns 0.
  1395. */
  1396. static int _shutdown(struct omap_hwmod *oh)
  1397. {
  1398. int ret;
  1399. u8 prev_state;
  1400. if (oh->_state != _HWMOD_STATE_IDLE &&
  1401. oh->_state != _HWMOD_STATE_ENABLED) {
  1402. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1403. "from idle, or enabled state\n", oh->name);
  1404. return -EINVAL;
  1405. }
  1406. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1407. if (oh->class->pre_shutdown) {
  1408. prev_state = oh->_state;
  1409. if (oh->_state == _HWMOD_STATE_IDLE)
  1410. _enable(oh);
  1411. ret = oh->class->pre_shutdown(oh);
  1412. if (ret) {
  1413. if (prev_state == _HWMOD_STATE_IDLE)
  1414. _idle(oh);
  1415. return ret;
  1416. }
  1417. }
  1418. if (oh->class->sysc) {
  1419. if (oh->_state == _HWMOD_STATE_IDLE)
  1420. _enable(oh);
  1421. _shutdown_sysc(oh);
  1422. }
  1423. /* clocks and deps are already disabled in idle */
  1424. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1425. _del_initiator_dep(oh, mpu_oh);
  1426. /* XXX what about the other system initiators here? dma, dsp */
  1427. _disable_module(oh);
  1428. ret = _wait_target_disable(oh);
  1429. if (ret)
  1430. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1431. oh->name);
  1432. _disable_clocks(oh);
  1433. if (oh->clkdm)
  1434. clkdm_hwmod_disable(oh->clkdm, oh);
  1435. }
  1436. /* XXX Should this code also force-disable the optional clocks? */
  1437. /*
  1438. * If an IP contains only one HW reset line, then assert it
  1439. * after disabling the clocks and before shutting down the IP.
  1440. */
  1441. if (oh->rst_lines_cnt == 1)
  1442. _assert_hardreset(oh, oh->rst_lines[0].name);
  1443. /* Mux pins to safe mode or use populated off mode values */
  1444. if (oh->mux)
  1445. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1446. oh->_state = _HWMOD_STATE_DISABLED;
  1447. return 0;
  1448. }
  1449. /**
  1450. * _setup - do initial configuration of omap_hwmod
  1451. * @oh: struct omap_hwmod *
  1452. *
  1453. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1454. * OCP_SYSCONFIG register. Returns 0.
  1455. */
  1456. static int _setup(struct omap_hwmod *oh, void *data)
  1457. {
  1458. int i, r;
  1459. u8 postsetup_state;
  1460. if (oh->_state != _HWMOD_STATE_CLKS_INITED)
  1461. return 0;
  1462. /* Set iclk autoidle mode */
  1463. if (oh->slaves_cnt > 0) {
  1464. for (i = 0; i < oh->slaves_cnt; i++) {
  1465. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1466. struct clk *c = os->_clk;
  1467. if (!c)
  1468. continue;
  1469. if (os->flags & OCPIF_SWSUP_IDLE) {
  1470. /* XXX omap_iclk_deny_idle(c); */
  1471. } else {
  1472. /* XXX omap_iclk_allow_idle(c); */
  1473. clk_enable(c);
  1474. }
  1475. }
  1476. }
  1477. oh->_state = _HWMOD_STATE_INITIALIZED;
  1478. /*
  1479. * In the case of hwmod with hardreset that should not be
  1480. * de-assert at boot time, we have to keep the module
  1481. * initialized, because we cannot enable it properly with the
  1482. * reset asserted. Exit without warning because that behavior is
  1483. * expected.
  1484. */
  1485. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1486. return 0;
  1487. r = _enable(oh);
  1488. if (r) {
  1489. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1490. oh->name, oh->_state);
  1491. return 0;
  1492. }
  1493. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1494. _reset(oh);
  1495. /*
  1496. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1497. * The _enable() function should be split to
  1498. * avoid the rewrite of the OCP_SYSCONFIG register.
  1499. */
  1500. if (oh->class->sysc) {
  1501. _update_sysc_cache(oh);
  1502. _enable_sysc(oh);
  1503. }
  1504. }
  1505. postsetup_state = oh->_postsetup_state;
  1506. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1507. postsetup_state = _HWMOD_STATE_ENABLED;
  1508. /*
  1509. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1510. * it should be set by the core code as a runtime flag during startup
  1511. */
  1512. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1513. (postsetup_state == _HWMOD_STATE_IDLE))
  1514. postsetup_state = _HWMOD_STATE_ENABLED;
  1515. if (postsetup_state == _HWMOD_STATE_IDLE)
  1516. _idle(oh);
  1517. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1518. _shutdown(oh);
  1519. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1520. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1521. oh->name, postsetup_state);
  1522. return 0;
  1523. }
  1524. /**
  1525. * _register - register a struct omap_hwmod
  1526. * @oh: struct omap_hwmod *
  1527. *
  1528. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1529. * already has been registered by the same name; -EINVAL if the
  1530. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1531. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1532. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1533. * success.
  1534. *
  1535. * XXX The data should be copied into bootmem, so the original data
  1536. * should be marked __initdata and freed after init. This would allow
  1537. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1538. * that the copy process would be relatively complex due to the large number
  1539. * of substructures.
  1540. */
  1541. static int __init _register(struct omap_hwmod *oh)
  1542. {
  1543. int ms_id;
  1544. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1545. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1546. return -EINVAL;
  1547. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1548. if (_lookup(oh->name))
  1549. return -EEXIST;
  1550. ms_id = _find_mpu_port_index(oh);
  1551. if (!IS_ERR_VALUE(ms_id))
  1552. oh->_mpu_port_index = ms_id;
  1553. else
  1554. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1555. list_add_tail(&oh->node, &omap_hwmod_list);
  1556. spin_lock_init(&oh->_lock);
  1557. oh->_state = _HWMOD_STATE_REGISTERED;
  1558. /*
  1559. * XXX Rather than doing a strcmp(), this should test a flag
  1560. * set in the hwmod data, inserted by the autogenerator code.
  1561. */
  1562. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1563. mpu_oh = oh;
  1564. return 0;
  1565. }
  1566. /* Public functions */
  1567. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1568. {
  1569. if (oh->flags & HWMOD_16BIT_REG)
  1570. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1571. else
  1572. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1573. }
  1574. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1575. {
  1576. if (oh->flags & HWMOD_16BIT_REG)
  1577. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1578. else
  1579. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1580. }
  1581. /**
  1582. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  1583. * @oh: struct omap_hwmod *
  1584. *
  1585. * This is a public function exposed to drivers. Some drivers may need to do
  1586. * some settings before and after resetting the device. Those drivers after
  1587. * doing the necessary settings could use this function to start a reset by
  1588. * setting the SYSCONFIG.SOFTRESET bit.
  1589. */
  1590. int omap_hwmod_softreset(struct omap_hwmod *oh)
  1591. {
  1592. u32 v;
  1593. int ret;
  1594. if (!oh || !(oh->_sysc_cache))
  1595. return -EINVAL;
  1596. v = oh->_sysc_cache;
  1597. ret = _set_softreset(oh, &v);
  1598. if (ret)
  1599. goto error;
  1600. _write_sysconfig(v, oh);
  1601. error:
  1602. return ret;
  1603. }
  1604. /**
  1605. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1606. * @oh: struct omap_hwmod *
  1607. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1608. *
  1609. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1610. * local copy. Intended to be used by drivers that have some erratum
  1611. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1612. * -EINVAL if @oh is null, or passes along the return value from
  1613. * _set_slave_idlemode().
  1614. *
  1615. * XXX Does this function have any current users? If not, we should
  1616. * remove it; it is better to let the rest of the hwmod code handle this.
  1617. * Any users of this function should be scrutinized carefully.
  1618. */
  1619. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1620. {
  1621. u32 v;
  1622. int retval = 0;
  1623. if (!oh)
  1624. return -EINVAL;
  1625. v = oh->_sysc_cache;
  1626. retval = _set_slave_idlemode(oh, idlemode, &v);
  1627. if (!retval)
  1628. _write_sysconfig(v, oh);
  1629. return retval;
  1630. }
  1631. /**
  1632. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1633. * @name: name of the omap_hwmod to look up
  1634. *
  1635. * Given a @name of an omap_hwmod, return a pointer to the registered
  1636. * struct omap_hwmod *, or NULL upon error.
  1637. */
  1638. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1639. {
  1640. struct omap_hwmod *oh;
  1641. if (!name)
  1642. return NULL;
  1643. oh = _lookup(name);
  1644. return oh;
  1645. }
  1646. /**
  1647. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1648. * @fn: pointer to a callback function
  1649. * @data: void * data to pass to callback function
  1650. *
  1651. * Call @fn for each registered omap_hwmod, passing @data to each
  1652. * function. @fn must return 0 for success or any other value for
  1653. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1654. * will stop and the non-zero return value will be passed to the
  1655. * caller of omap_hwmod_for_each(). @fn is called with
  1656. * omap_hwmod_for_each() held.
  1657. */
  1658. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1659. void *data)
  1660. {
  1661. struct omap_hwmod *temp_oh;
  1662. int ret = 0;
  1663. if (!fn)
  1664. return -EINVAL;
  1665. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1666. ret = (*fn)(temp_oh, data);
  1667. if (ret)
  1668. break;
  1669. }
  1670. return ret;
  1671. }
  1672. /**
  1673. * omap_hwmod_register - register an array of hwmods
  1674. * @ohs: pointer to an array of omap_hwmods to register
  1675. *
  1676. * Intended to be called early in boot before the clock framework is
  1677. * initialized. If @ohs is not null, will register all omap_hwmods
  1678. * listed in @ohs that are valid for this chip. Returns 0.
  1679. */
  1680. int __init omap_hwmod_register(struct omap_hwmod **ohs)
  1681. {
  1682. int r, i;
  1683. if (!ohs)
  1684. return 0;
  1685. i = 0;
  1686. do {
  1687. r = _register(ohs[i]);
  1688. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  1689. r);
  1690. } while (ohs[++i]);
  1691. return 0;
  1692. }
  1693. /*
  1694. * _populate_mpu_rt_base - populate the virtual address for a hwmod
  1695. *
  1696. * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
  1697. * Assumes the caller takes care of locking if needed.
  1698. */
  1699. static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1700. {
  1701. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1702. return 0;
  1703. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1704. return 0;
  1705. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1706. return 0;
  1707. }
  1708. /**
  1709. * omap_hwmod_setup_one - set up a single hwmod
  1710. * @oh_name: const char * name of the already-registered hwmod to set up
  1711. *
  1712. * Must be called after omap2_clk_init(). Resolves the struct clk
  1713. * names to struct clk pointers for each registered omap_hwmod. Also
  1714. * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
  1715. * success.
  1716. */
  1717. int __init omap_hwmod_setup_one(const char *oh_name)
  1718. {
  1719. struct omap_hwmod *oh;
  1720. int r;
  1721. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  1722. if (!mpu_oh) {
  1723. pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
  1724. oh_name, MPU_INITIATOR_NAME);
  1725. return -EINVAL;
  1726. }
  1727. oh = _lookup(oh_name);
  1728. if (!oh) {
  1729. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  1730. return -EINVAL;
  1731. }
  1732. if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  1733. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  1734. r = _populate_mpu_rt_base(oh, NULL);
  1735. if (IS_ERR_VALUE(r)) {
  1736. WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
  1737. return -EINVAL;
  1738. }
  1739. r = _init_clocks(oh, NULL);
  1740. if (IS_ERR_VALUE(r)) {
  1741. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
  1742. return -EINVAL;
  1743. }
  1744. _setup(oh, NULL);
  1745. return 0;
  1746. }
  1747. /**
  1748. * omap_hwmod_setup - do some post-clock framework initialization
  1749. *
  1750. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1751. * to struct clk pointers for each registered omap_hwmod. Also calls
  1752. * _setup() on each hwmod. Returns 0 upon success.
  1753. */
  1754. static int __init omap_hwmod_setup_all(void)
  1755. {
  1756. int r;
  1757. if (!mpu_oh) {
  1758. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  1759. __func__, MPU_INITIATOR_NAME);
  1760. return -EINVAL;
  1761. }
  1762. r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
  1763. r = omap_hwmod_for_each(_init_clocks, NULL);
  1764. WARN(IS_ERR_VALUE(r),
  1765. "omap_hwmod: %s: _init_clocks failed\n", __func__);
  1766. omap_hwmod_for_each(_setup, NULL);
  1767. return 0;
  1768. }
  1769. core_initcall(omap_hwmod_setup_all);
  1770. /**
  1771. * omap_hwmod_enable - enable an omap_hwmod
  1772. * @oh: struct omap_hwmod *
  1773. *
  1774. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1775. * Returns -EINVAL on error or passes along the return value from _enable().
  1776. */
  1777. int omap_hwmod_enable(struct omap_hwmod *oh)
  1778. {
  1779. int r;
  1780. unsigned long flags;
  1781. if (!oh)
  1782. return -EINVAL;
  1783. spin_lock_irqsave(&oh->_lock, flags);
  1784. r = _enable(oh);
  1785. spin_unlock_irqrestore(&oh->_lock, flags);
  1786. return r;
  1787. }
  1788. /**
  1789. * omap_hwmod_idle - idle an omap_hwmod
  1790. * @oh: struct omap_hwmod *
  1791. *
  1792. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1793. * Returns -EINVAL on error or passes along the return value from _idle().
  1794. */
  1795. int omap_hwmod_idle(struct omap_hwmod *oh)
  1796. {
  1797. unsigned long flags;
  1798. if (!oh)
  1799. return -EINVAL;
  1800. spin_lock_irqsave(&oh->_lock, flags);
  1801. _idle(oh);
  1802. spin_unlock_irqrestore(&oh->_lock, flags);
  1803. return 0;
  1804. }
  1805. /**
  1806. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1807. * @oh: struct omap_hwmod *
  1808. *
  1809. * Shutdown an omap_hwmod @oh. Intended to be called by
  1810. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1811. * the return value from _shutdown().
  1812. */
  1813. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1814. {
  1815. unsigned long flags;
  1816. if (!oh)
  1817. return -EINVAL;
  1818. spin_lock_irqsave(&oh->_lock, flags);
  1819. _shutdown(oh);
  1820. spin_unlock_irqrestore(&oh->_lock, flags);
  1821. return 0;
  1822. }
  1823. /**
  1824. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1825. * @oh: struct omap_hwmod *oh
  1826. *
  1827. * Intended to be called by the omap_device code.
  1828. */
  1829. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1830. {
  1831. unsigned long flags;
  1832. spin_lock_irqsave(&oh->_lock, flags);
  1833. _enable_clocks(oh);
  1834. spin_unlock_irqrestore(&oh->_lock, flags);
  1835. return 0;
  1836. }
  1837. /**
  1838. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1839. * @oh: struct omap_hwmod *oh
  1840. *
  1841. * Intended to be called by the omap_device code.
  1842. */
  1843. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1844. {
  1845. unsigned long flags;
  1846. spin_lock_irqsave(&oh->_lock, flags);
  1847. _disable_clocks(oh);
  1848. spin_unlock_irqrestore(&oh->_lock, flags);
  1849. return 0;
  1850. }
  1851. /**
  1852. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1853. * @oh: struct omap_hwmod *oh
  1854. *
  1855. * Intended to be called by drivers and core code when all posted
  1856. * writes to a device must complete before continuing further
  1857. * execution (for example, after clearing some device IRQSTATUS
  1858. * register bits)
  1859. *
  1860. * XXX what about targets with multiple OCP threads?
  1861. */
  1862. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1863. {
  1864. BUG_ON(!oh);
  1865. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1866. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1867. "device configuration\n", oh->name);
  1868. return;
  1869. }
  1870. /*
  1871. * Forces posted writes to complete on the OCP thread handling
  1872. * register writes
  1873. */
  1874. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1875. }
  1876. /**
  1877. * omap_hwmod_reset - reset the hwmod
  1878. * @oh: struct omap_hwmod *
  1879. *
  1880. * Under some conditions, a driver may wish to reset the entire device.
  1881. * Called from omap_device code. Returns -EINVAL on error or passes along
  1882. * the return value from _reset().
  1883. */
  1884. int omap_hwmod_reset(struct omap_hwmod *oh)
  1885. {
  1886. int r;
  1887. unsigned long flags;
  1888. if (!oh)
  1889. return -EINVAL;
  1890. spin_lock_irqsave(&oh->_lock, flags);
  1891. r = _reset(oh);
  1892. spin_unlock_irqrestore(&oh->_lock, flags);
  1893. return r;
  1894. }
  1895. /**
  1896. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1897. * @oh: struct omap_hwmod *
  1898. * @res: pointer to the first element of an array of struct resource to fill
  1899. *
  1900. * Count the number of struct resource array elements necessary to
  1901. * contain omap_hwmod @oh resources. Intended to be called by code
  1902. * that registers omap_devices. Intended to be used to determine the
  1903. * size of a dynamically-allocated struct resource array, before
  1904. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1905. * resource array elements needed.
  1906. *
  1907. * XXX This code is not optimized. It could attempt to merge adjacent
  1908. * resource IDs.
  1909. *
  1910. */
  1911. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1912. {
  1913. int ret, i;
  1914. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  1915. for (i = 0; i < oh->slaves_cnt; i++)
  1916. ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
  1917. return ret;
  1918. }
  1919. /**
  1920. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1921. * @oh: struct omap_hwmod *
  1922. * @res: pointer to the first element of an array of struct resource to fill
  1923. *
  1924. * Fill the struct resource array @res with resource data from the
  1925. * omap_hwmod @oh. Intended to be called by code that registers
  1926. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1927. * number of array elements filled.
  1928. */
  1929. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1930. {
  1931. int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
  1932. int r = 0;
  1933. /* For each IRQ, DMA, memory area, fill in array.*/
  1934. mpu_irqs_cnt = _count_mpu_irqs(oh);
  1935. for (i = 0; i < mpu_irqs_cnt; i++) {
  1936. (res + r)->name = (oh->mpu_irqs + i)->name;
  1937. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1938. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1939. (res + r)->flags = IORESOURCE_IRQ;
  1940. r++;
  1941. }
  1942. sdma_reqs_cnt = _count_sdma_reqs(oh);
  1943. for (i = 0; i < sdma_reqs_cnt; i++) {
  1944. (res + r)->name = (oh->sdma_reqs + i)->name;
  1945. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1946. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1947. (res + r)->flags = IORESOURCE_DMA;
  1948. r++;
  1949. }
  1950. for (i = 0; i < oh->slaves_cnt; i++) {
  1951. struct omap_hwmod_ocp_if *os;
  1952. int addr_cnt;
  1953. os = oh->slaves[i];
  1954. addr_cnt = _count_ocp_if_addr_spaces(os);
  1955. for (j = 0; j < addr_cnt; j++) {
  1956. (res + r)->name = (os->addr + j)->name;
  1957. (res + r)->start = (os->addr + j)->pa_start;
  1958. (res + r)->end = (os->addr + j)->pa_end;
  1959. (res + r)->flags = IORESOURCE_MEM;
  1960. r++;
  1961. }
  1962. }
  1963. return r;
  1964. }
  1965. /**
  1966. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1967. * @oh: struct omap_hwmod *
  1968. *
  1969. * Return the powerdomain pointer associated with the OMAP module
  1970. * @oh's main clock. If @oh does not have a main clk, return the
  1971. * powerdomain associated with the interface clock associated with the
  1972. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1973. * instead?) Returns NULL on error, or a struct powerdomain * on
  1974. * success.
  1975. */
  1976. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1977. {
  1978. struct clk *c;
  1979. if (!oh)
  1980. return NULL;
  1981. if (oh->_clk) {
  1982. c = oh->_clk;
  1983. } else {
  1984. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1985. return NULL;
  1986. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1987. }
  1988. if (!c->clkdm)
  1989. return NULL;
  1990. return c->clkdm->pwrdm.ptr;
  1991. }
  1992. /**
  1993. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1994. * @oh: struct omap_hwmod *
  1995. *
  1996. * Returns the virtual address corresponding to the beginning of the
  1997. * module's register target, in the address range that is intended to
  1998. * be used by the MPU. Returns the virtual address upon success or NULL
  1999. * upon error.
  2000. */
  2001. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  2002. {
  2003. if (!oh)
  2004. return NULL;
  2005. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2006. return NULL;
  2007. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  2008. return NULL;
  2009. return oh->_mpu_rt_va;
  2010. }
  2011. /**
  2012. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  2013. * @oh: struct omap_hwmod *
  2014. * @init_oh: struct omap_hwmod * (initiator)
  2015. *
  2016. * Add a sleep dependency between the initiator @init_oh and @oh.
  2017. * Intended to be called by DSP/Bridge code via platform_data for the
  2018. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2019. * code needs to add/del initiator dependencies dynamically
  2020. * before/after accessing a device. Returns the return value from
  2021. * _add_initiator_dep().
  2022. *
  2023. * XXX Keep a usecount in the clockdomain code
  2024. */
  2025. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  2026. struct omap_hwmod *init_oh)
  2027. {
  2028. return _add_initiator_dep(oh, init_oh);
  2029. }
  2030. /*
  2031. * XXX what about functions for drivers to save/restore ocp_sysconfig
  2032. * for context save/restore operations?
  2033. */
  2034. /**
  2035. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  2036. * @oh: struct omap_hwmod *
  2037. * @init_oh: struct omap_hwmod * (initiator)
  2038. *
  2039. * Remove a sleep dependency between the initiator @init_oh and @oh.
  2040. * Intended to be called by DSP/Bridge code via platform_data for the
  2041. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2042. * code needs to add/del initiator dependencies dynamically
  2043. * before/after accessing a device. Returns the return value from
  2044. * _del_initiator_dep().
  2045. *
  2046. * XXX Keep a usecount in the clockdomain code
  2047. */
  2048. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  2049. struct omap_hwmod *init_oh)
  2050. {
  2051. return _del_initiator_dep(oh, init_oh);
  2052. }
  2053. /**
  2054. * omap_hwmod_enable_wakeup - allow device to wake up the system
  2055. * @oh: struct omap_hwmod *
  2056. *
  2057. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  2058. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  2059. * registers to cause the PRCM to receive wakeup events from the
  2060. * module. Does not set any wakeup routing registers beyond this
  2061. * point - if the module is to wake up any other module or subsystem,
  2062. * that must be set separately. Called by omap_device code. Returns
  2063. * -EINVAL on error or 0 upon success.
  2064. */
  2065. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  2066. {
  2067. unsigned long flags;
  2068. u32 v;
  2069. if (!oh->class->sysc ||
  2070. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  2071. return -EINVAL;
  2072. spin_lock_irqsave(&oh->_lock, flags);
  2073. v = oh->_sysc_cache;
  2074. _enable_wakeup(oh, &v);
  2075. _write_sysconfig(v, oh);
  2076. _set_idle_ioring_wakeup(oh, true);
  2077. spin_unlock_irqrestore(&oh->_lock, flags);
  2078. return 0;
  2079. }
  2080. /**
  2081. * omap_hwmod_disable_wakeup - prevent device from waking the system
  2082. * @oh: struct omap_hwmod *
  2083. *
  2084. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  2085. * from sending wakeups to the PRCM. Eventually this should clear
  2086. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  2087. * from the module. Does not set any wakeup routing registers beyond
  2088. * this point - if the module is to wake up any other module or
  2089. * subsystem, that must be set separately. Called by omap_device
  2090. * code. Returns -EINVAL on error or 0 upon success.
  2091. */
  2092. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  2093. {
  2094. unsigned long flags;
  2095. u32 v;
  2096. if (!oh->class->sysc ||
  2097. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  2098. return -EINVAL;
  2099. spin_lock_irqsave(&oh->_lock, flags);
  2100. v = oh->_sysc_cache;
  2101. _disable_wakeup(oh, &v);
  2102. _write_sysconfig(v, oh);
  2103. _set_idle_ioring_wakeup(oh, false);
  2104. spin_unlock_irqrestore(&oh->_lock, flags);
  2105. return 0;
  2106. }
  2107. /**
  2108. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  2109. * contained in the hwmod module.
  2110. * @oh: struct omap_hwmod *
  2111. * @name: name of the reset line to lookup and assert
  2112. *
  2113. * Some IP like dsp, ipu or iva contain processor that require
  2114. * an HW reset line to be assert / deassert in order to enable fully
  2115. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2116. * yet supported on this OMAP; otherwise, passes along the return value
  2117. * from _assert_hardreset().
  2118. */
  2119. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  2120. {
  2121. int ret;
  2122. unsigned long flags;
  2123. if (!oh)
  2124. return -EINVAL;
  2125. spin_lock_irqsave(&oh->_lock, flags);
  2126. ret = _assert_hardreset(oh, name);
  2127. spin_unlock_irqrestore(&oh->_lock, flags);
  2128. return ret;
  2129. }
  2130. /**
  2131. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  2132. * contained in the hwmod module.
  2133. * @oh: struct omap_hwmod *
  2134. * @name: name of the reset line to look up and deassert
  2135. *
  2136. * Some IP like dsp, ipu or iva contain processor that require
  2137. * an HW reset line to be assert / deassert in order to enable fully
  2138. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2139. * yet supported on this OMAP; otherwise, passes along the return value
  2140. * from _deassert_hardreset().
  2141. */
  2142. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  2143. {
  2144. int ret;
  2145. unsigned long flags;
  2146. if (!oh)
  2147. return -EINVAL;
  2148. spin_lock_irqsave(&oh->_lock, flags);
  2149. ret = _deassert_hardreset(oh, name);
  2150. spin_unlock_irqrestore(&oh->_lock, flags);
  2151. return ret;
  2152. }
  2153. /**
  2154. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  2155. * contained in the hwmod module
  2156. * @oh: struct omap_hwmod *
  2157. * @name: name of the reset line to look up and read
  2158. *
  2159. * Return the current state of the hwmod @oh's reset line named @name:
  2160. * returns -EINVAL upon parameter error or if this operation
  2161. * is unsupported on the current OMAP; otherwise, passes along the return
  2162. * value from _read_hardreset().
  2163. */
  2164. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  2165. {
  2166. int ret;
  2167. unsigned long flags;
  2168. if (!oh)
  2169. return -EINVAL;
  2170. spin_lock_irqsave(&oh->_lock, flags);
  2171. ret = _read_hardreset(oh, name);
  2172. spin_unlock_irqrestore(&oh->_lock, flags);
  2173. return ret;
  2174. }
  2175. /**
  2176. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  2177. * @classname: struct omap_hwmod_class name to search for
  2178. * @fn: callback function pointer to call for each hwmod in class @classname
  2179. * @user: arbitrary context data to pass to the callback function
  2180. *
  2181. * For each omap_hwmod of class @classname, call @fn.
  2182. * If the callback function returns something other than
  2183. * zero, the iterator is terminated, and the callback function's return
  2184. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  2185. * if @classname or @fn are NULL, or passes back the error code from @fn.
  2186. */
  2187. int omap_hwmod_for_each_by_class(const char *classname,
  2188. int (*fn)(struct omap_hwmod *oh,
  2189. void *user),
  2190. void *user)
  2191. {
  2192. struct omap_hwmod *temp_oh;
  2193. int ret = 0;
  2194. if (!classname || !fn)
  2195. return -EINVAL;
  2196. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  2197. __func__, classname);
  2198. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2199. if (!strcmp(temp_oh->class->name, classname)) {
  2200. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  2201. __func__, temp_oh->name);
  2202. ret = (*fn)(temp_oh, user);
  2203. if (ret)
  2204. break;
  2205. }
  2206. }
  2207. if (ret)
  2208. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  2209. __func__, ret);
  2210. return ret;
  2211. }
  2212. /**
  2213. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  2214. * @oh: struct omap_hwmod *
  2215. * @state: state that _setup() should leave the hwmod in
  2216. *
  2217. * Sets the hwmod state that @oh will enter at the end of _setup()
  2218. * (called by omap_hwmod_setup_*()). Only valid to call between
  2219. * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
  2220. * 0 upon success or -EINVAL if there is a problem with the arguments
  2221. * or if the hwmod is in the wrong state.
  2222. */
  2223. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  2224. {
  2225. int ret;
  2226. unsigned long flags;
  2227. if (!oh)
  2228. return -EINVAL;
  2229. if (state != _HWMOD_STATE_DISABLED &&
  2230. state != _HWMOD_STATE_ENABLED &&
  2231. state != _HWMOD_STATE_IDLE)
  2232. return -EINVAL;
  2233. spin_lock_irqsave(&oh->_lock, flags);
  2234. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2235. ret = -EINVAL;
  2236. goto ohsps_unlock;
  2237. }
  2238. oh->_postsetup_state = state;
  2239. ret = 0;
  2240. ohsps_unlock:
  2241. spin_unlock_irqrestore(&oh->_lock, flags);
  2242. return ret;
  2243. }
  2244. /**
  2245. * omap_hwmod_get_context_loss_count - get lost context count
  2246. * @oh: struct omap_hwmod *
  2247. *
  2248. * Query the powerdomain of of @oh to get the context loss
  2249. * count for this device.
  2250. *
  2251. * Returns the context loss count of the powerdomain assocated with @oh
  2252. * upon success, or zero if no powerdomain exists for @oh.
  2253. */
  2254. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  2255. {
  2256. struct powerdomain *pwrdm;
  2257. int ret = 0;
  2258. pwrdm = omap_hwmod_get_pwrdm(oh);
  2259. if (pwrdm)
  2260. ret = pwrdm_get_context_loss_count(pwrdm);
  2261. return ret;
  2262. }
  2263. /**
  2264. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  2265. * @oh: struct omap_hwmod *
  2266. *
  2267. * Prevent the hwmod @oh from being reset during the setup process.
  2268. * Intended for use by board-*.c files on boards with devices that
  2269. * cannot tolerate being reset. Must be called before the hwmod has
  2270. * been set up. Returns 0 upon success or negative error code upon
  2271. * failure.
  2272. */
  2273. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2274. {
  2275. if (!oh)
  2276. return -EINVAL;
  2277. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2278. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2279. oh->name);
  2280. return -EINVAL;
  2281. }
  2282. oh->flags |= HWMOD_INIT_NO_RESET;
  2283. return 0;
  2284. }