mach-mxs.c 7.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322
  1. /*
  2. * Copyright 2012 Freescale Semiconductor, Inc.
  3. * Copyright 2012 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/clkdev.h>
  14. #include <linux/err.h>
  15. #include <linux/init.h>
  16. #include <linux/init.h>
  17. #include <linux/irqdomain.h>
  18. #include <linux/micrel_phy.h>
  19. #include <linux/mxsfb.h>
  20. #include <linux/of_irq.h>
  21. #include <linux/of_platform.h>
  22. #include <linux/phy.h>
  23. #include <asm/mach/arch.h>
  24. #include <asm/mach/time.h>
  25. #include <mach/common.h>
  26. static struct fb_videomode mx23evk_video_modes[] = {
  27. {
  28. .name = "Samsung-LMS430HF02",
  29. .refresh = 60,
  30. .xres = 480,
  31. .yres = 272,
  32. .pixclock = 108096, /* picosecond (9.2 MHz) */
  33. .left_margin = 15,
  34. .right_margin = 8,
  35. .upper_margin = 12,
  36. .lower_margin = 4,
  37. .hsync_len = 1,
  38. .vsync_len = 1,
  39. .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
  40. FB_SYNC_DOTCLK_FAILING_ACT,
  41. },
  42. };
  43. static struct fb_videomode mx28evk_video_modes[] = {
  44. {
  45. .name = "Seiko-43WVF1G",
  46. .refresh = 60,
  47. .xres = 800,
  48. .yres = 480,
  49. .pixclock = 29851, /* picosecond (33.5 MHz) */
  50. .left_margin = 89,
  51. .right_margin = 164,
  52. .upper_margin = 23,
  53. .lower_margin = 10,
  54. .hsync_len = 10,
  55. .vsync_len = 10,
  56. .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
  57. FB_SYNC_DOTCLK_FAILING_ACT,
  58. },
  59. };
  60. static struct fb_videomode m28evk_video_modes[] = {
  61. {
  62. .name = "Ampire AM-800480R2TMQW-T01H",
  63. .refresh = 60,
  64. .xres = 800,
  65. .yres = 480,
  66. .pixclock = 30066, /* picosecond (33.26 MHz) */
  67. .left_margin = 0,
  68. .right_margin = 256,
  69. .upper_margin = 0,
  70. .lower_margin = 45,
  71. .hsync_len = 1,
  72. .vsync_len = 1,
  73. .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
  74. },
  75. };
  76. static struct fb_videomode apx4devkit_video_modes[] = {
  77. {
  78. .name = "HannStar PJ70112A",
  79. .refresh = 60,
  80. .xres = 800,
  81. .yres = 480,
  82. .pixclock = 33333, /* picosecond (30.00 MHz) */
  83. .left_margin = 88,
  84. .right_margin = 40,
  85. .upper_margin = 32,
  86. .lower_margin = 13,
  87. .hsync_len = 48,
  88. .vsync_len = 3,
  89. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
  90. FB_SYNC_DATA_ENABLE_HIGH_ACT |
  91. FB_SYNC_DOTCLK_FAILING_ACT,
  92. },
  93. };
  94. static struct mxsfb_platform_data mxsfb_pdata __initdata;
  95. static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
  96. OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata),
  97. OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata),
  98. { /* sentinel */ }
  99. };
  100. static int __init mxs_icoll_add_irq_domain(struct device_node *np,
  101. struct device_node *interrupt_parent)
  102. {
  103. irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
  104. return 0;
  105. }
  106. static int __init mxs_gpio_add_irq_domain(struct device_node *np,
  107. struct device_node *interrupt_parent)
  108. {
  109. static int gpio_irq_base = MXS_GPIO_IRQ_START;
  110. irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
  111. gpio_irq_base += 32;
  112. return 0;
  113. }
  114. static const struct of_device_id mxs_irq_match[] __initconst = {
  115. { .compatible = "fsl,mxs-icoll", .data = mxs_icoll_add_irq_domain, },
  116. { .compatible = "fsl,mxs-gpio", .data = mxs_gpio_add_irq_domain, },
  117. { /* sentinel */ }
  118. };
  119. static void __init mxs_dt_init_irq(void)
  120. {
  121. icoll_init_irq();
  122. of_irq_init(mxs_irq_match);
  123. }
  124. static void __init imx23_timer_init(void)
  125. {
  126. mx23_clocks_init();
  127. }
  128. static struct sys_timer imx23_timer = {
  129. .init = imx23_timer_init,
  130. };
  131. static void __init imx28_timer_init(void)
  132. {
  133. mx28_clocks_init();
  134. }
  135. static struct sys_timer imx28_timer = {
  136. .init = imx28_timer_init,
  137. };
  138. enum mac_oui {
  139. OUI_FSL,
  140. OUI_DENX,
  141. };
  142. static void __init update_fec_mac_prop(enum mac_oui oui)
  143. {
  144. struct device_node *np, *from = NULL;
  145. struct property *newmac;
  146. const u32 *ocotp = mxs_get_ocotp();
  147. u8 *macaddr;
  148. u32 val;
  149. int i;
  150. for (i = 0; i < 2; i++) {
  151. np = of_find_compatible_node(from, NULL, "fsl,imx28-fec");
  152. if (!np)
  153. return;
  154. from = np;
  155. newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL);
  156. if (!newmac)
  157. return;
  158. newmac->value = newmac + 1;
  159. newmac->length = 6;
  160. newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
  161. if (!newmac->name) {
  162. kfree(newmac);
  163. return;
  164. }
  165. /*
  166. * OCOTP only stores the last 4 octets for each mac address,
  167. * so hard-code OUI here.
  168. */
  169. macaddr = newmac->value;
  170. switch (oui) {
  171. case OUI_FSL:
  172. macaddr[0] = 0x00;
  173. macaddr[1] = 0x04;
  174. macaddr[2] = 0x9f;
  175. break;
  176. case OUI_DENX:
  177. macaddr[0] = 0xc0;
  178. macaddr[1] = 0xe5;
  179. macaddr[2] = 0x4e;
  180. break;
  181. }
  182. val = ocotp[i];
  183. macaddr[3] = (val >> 16) & 0xff;
  184. macaddr[4] = (val >> 8) & 0xff;
  185. macaddr[5] = (val >> 0) & 0xff;
  186. prom_update_property(np, newmac);
  187. }
  188. }
  189. static void __init imx23_evk_init(void)
  190. {
  191. mxsfb_pdata.mode_list = mx23evk_video_modes;
  192. mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
  193. mxsfb_pdata.default_bpp = 32;
  194. mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
  195. }
  196. static inline void enable_clk_enet_out(void)
  197. {
  198. struct clk *clk = clk_get_sys("enet_out", NULL);
  199. if (!IS_ERR(clk))
  200. clk_prepare_enable(clk);
  201. }
  202. static void __init imx28_evk_init(void)
  203. {
  204. enable_clk_enet_out();
  205. update_fec_mac_prop(OUI_FSL);
  206. mxsfb_pdata.mode_list = mx28evk_video_modes;
  207. mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
  208. mxsfb_pdata.default_bpp = 32;
  209. mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
  210. }
  211. static void __init m28evk_init(void)
  212. {
  213. enable_clk_enet_out();
  214. update_fec_mac_prop(OUI_DENX);
  215. mxsfb_pdata.mode_list = m28evk_video_modes;
  216. mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
  217. mxsfb_pdata.default_bpp = 16;
  218. mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
  219. }
  220. static int apx4devkit_phy_fixup(struct phy_device *phy)
  221. {
  222. phy->dev_flags |= MICREL_PHY_50MHZ_CLK;
  223. return 0;
  224. }
  225. static void __init apx4devkit_init(void)
  226. {
  227. enable_clk_enet_out();
  228. if (IS_BUILTIN(CONFIG_PHYLIB))
  229. phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK,
  230. apx4devkit_phy_fixup);
  231. mxsfb_pdata.mode_list = apx4devkit_video_modes;
  232. mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
  233. mxsfb_pdata.default_bpp = 32;
  234. mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
  235. }
  236. static void __init mxs_machine_init(void)
  237. {
  238. if (of_machine_is_compatible("fsl,imx28-evk"))
  239. imx28_evk_init();
  240. else if (of_machine_is_compatible("fsl,imx23-evk"))
  241. imx23_evk_init();
  242. else if (of_machine_is_compatible("denx,m28evk"))
  243. m28evk_init();
  244. else if (of_machine_is_compatible("bluegiga,apx4devkit"))
  245. apx4devkit_init();
  246. of_platform_populate(NULL, of_default_bus_match_table,
  247. mxs_auxdata_lookup, NULL);
  248. }
  249. static const char *imx23_dt_compat[] __initdata = {
  250. "fsl,imx23-evk",
  251. "fsl,stmp378x_devb"
  252. "olimex,imx23-olinuxino",
  253. "fsl,imx23",
  254. NULL,
  255. };
  256. static const char *imx28_dt_compat[] __initdata = {
  257. "bluegiga,apx4devkit",
  258. "crystalfontz,cfa10036",
  259. "denx,m28evk",
  260. "fsl,imx28-evk",
  261. "karo,tx28",
  262. "fsl,imx28",
  263. NULL,
  264. };
  265. DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)")
  266. .map_io = mx23_map_io,
  267. .init_irq = mxs_dt_init_irq,
  268. .timer = &imx23_timer,
  269. .init_machine = mxs_machine_init,
  270. .dt_compat = imx23_dt_compat,
  271. .restart = mxs_restart,
  272. MACHINE_END
  273. DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)")
  274. .map_io = mx28_map_io,
  275. .init_irq = mxs_dt_init_irq,
  276. .timer = &imx28_timer,
  277. .init_machine = mxs_machine_init,
  278. .dt_compat = imx28_dt_compat,
  279. .restart = mxs_restart,
  280. MACHINE_END