intel_opregion.c 22 KB

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  1. /*
  2. * Copyright 2008 Intel Corporation <hong.liu@intel.com>
  3. * Copyright 2008 Red Hat <mjg@redhat.com>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  20. * NON-INFRINGEMENT. IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  22. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  23. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  24. * SOFTWARE.
  25. *
  26. */
  27. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  28. #include <linux/acpi.h>
  29. #include <linux/acpi_io.h>
  30. #include <acpi/video.h>
  31. #include <drm/drmP.h>
  32. #include <drm/i915_drm.h>
  33. #include "i915_drv.h"
  34. #include "intel_drv.h"
  35. #define PCI_ASLE 0xe4
  36. #define PCI_ASLS 0xfc
  37. #define PCI_SWSCI 0xe8
  38. #define PCI_SWSCI_SCISEL (1 << 15)
  39. #define PCI_SWSCI_GSSCIE (1 << 0)
  40. #define OPREGION_HEADER_OFFSET 0
  41. #define OPREGION_ACPI_OFFSET 0x100
  42. #define ACPI_CLID 0x01ac /* current lid state indicator */
  43. #define ACPI_CDCK 0x01b0 /* current docking state indicator */
  44. #define OPREGION_SWSCI_OFFSET 0x200
  45. #define OPREGION_ASLE_OFFSET 0x300
  46. #define OPREGION_VBT_OFFSET 0x400
  47. #define OPREGION_SIGNATURE "IntelGraphicsMem"
  48. #define MBOX_ACPI (1<<0)
  49. #define MBOX_SWSCI (1<<1)
  50. #define MBOX_ASLE (1<<2)
  51. struct opregion_header {
  52. u8 signature[16];
  53. u32 size;
  54. u32 opregion_ver;
  55. u8 bios_ver[32];
  56. u8 vbios_ver[16];
  57. u8 driver_ver[16];
  58. u32 mboxes;
  59. u8 reserved[164];
  60. } __attribute__((packed));
  61. /* OpRegion mailbox #1: public ACPI methods */
  62. struct opregion_acpi {
  63. u32 drdy; /* driver readiness */
  64. u32 csts; /* notification status */
  65. u32 cevt; /* current event */
  66. u8 rsvd1[20];
  67. u32 didl[8]; /* supported display devices ID list */
  68. u32 cpdl[8]; /* currently presented display list */
  69. u32 cadl[8]; /* currently active display list */
  70. u32 nadl[8]; /* next active devices list */
  71. u32 aslp; /* ASL sleep time-out */
  72. u32 tidx; /* toggle table index */
  73. u32 chpd; /* current hotplug enable indicator */
  74. u32 clid; /* current lid state*/
  75. u32 cdck; /* current docking state */
  76. u32 sxsw; /* Sx state resume */
  77. u32 evts; /* ASL supported events */
  78. u32 cnot; /* current OS notification */
  79. u32 nrdy; /* driver status */
  80. u8 rsvd2[60];
  81. } __attribute__((packed));
  82. /* OpRegion mailbox #2: SWSCI */
  83. struct opregion_swsci {
  84. u32 scic; /* SWSCI command|status|data */
  85. u32 parm; /* command parameters */
  86. u32 dslp; /* driver sleep time-out */
  87. u8 rsvd[244];
  88. } __attribute__((packed));
  89. /* OpRegion mailbox #3: ASLE */
  90. struct opregion_asle {
  91. u32 ardy; /* driver readiness */
  92. u32 aslc; /* ASLE interrupt command */
  93. u32 tche; /* technology enabled indicator */
  94. u32 alsi; /* current ALS illuminance reading */
  95. u32 bclp; /* backlight brightness to set */
  96. u32 pfit; /* panel fitting state */
  97. u32 cblv; /* current brightness level */
  98. u16 bclm[20]; /* backlight level duty cycle mapping table */
  99. u32 cpfm; /* current panel fitting mode */
  100. u32 epfm; /* enabled panel fitting modes */
  101. u8 plut[74]; /* panel LUT and identifier */
  102. u32 pfmb; /* PWM freq and min brightness */
  103. u8 rsvd[102];
  104. } __attribute__((packed));
  105. /* Driver readiness indicator */
  106. #define ASLE_ARDY_READY (1 << 0)
  107. #define ASLE_ARDY_NOT_READY (0 << 0)
  108. /* ASLE irq request bits */
  109. #define ASLE_SET_ALS_ILLUM (1 << 0)
  110. #define ASLE_SET_BACKLIGHT (1 << 1)
  111. #define ASLE_SET_PFIT (1 << 2)
  112. #define ASLE_SET_PWM_FREQ (1 << 3)
  113. #define ASLE_REQ_MSK 0xf
  114. /* response bits of ASLE irq request */
  115. #define ASLE_ALS_ILLUM_FAILED (1<<10)
  116. #define ASLE_BACKLIGHT_FAILED (1<<12)
  117. #define ASLE_PFIT_FAILED (1<<14)
  118. #define ASLE_PWM_FREQ_FAILED (1<<16)
  119. /* Technology enabled indicator */
  120. #define ASLE_TCHE_ALS_EN (1 << 0)
  121. #define ASLE_TCHE_BLC_EN (1 << 1)
  122. #define ASLE_TCHE_PFIT_EN (1 << 2)
  123. #define ASLE_TCHE_PFMB_EN (1 << 3)
  124. /* ASLE backlight brightness to set */
  125. #define ASLE_BCLP_VALID (1<<31)
  126. #define ASLE_BCLP_MSK (~(1<<31))
  127. /* ASLE panel fitting request */
  128. #define ASLE_PFIT_VALID (1<<31)
  129. #define ASLE_PFIT_CENTER (1<<0)
  130. #define ASLE_PFIT_STRETCH_TEXT (1<<1)
  131. #define ASLE_PFIT_STRETCH_GFX (1<<2)
  132. /* PWM frequency and minimum brightness */
  133. #define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
  134. #define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
  135. #define ASLE_PFMB_PWM_MASK (0x7ffffe00)
  136. #define ASLE_PFMB_PWM_VALID (1<<31)
  137. #define ASLE_CBLV_VALID (1<<31)
  138. /* Software System Control Interrupt (SWSCI) */
  139. #define SWSCI_SCIC_INDICATOR (1 << 0)
  140. #define SWSCI_SCIC_MAIN_FUNCTION_SHIFT 1
  141. #define SWSCI_SCIC_MAIN_FUNCTION_MASK (0xf << 1)
  142. #define SWSCI_SCIC_SUB_FUNCTION_SHIFT 8
  143. #define SWSCI_SCIC_SUB_FUNCTION_MASK (0xff << 8)
  144. #define SWSCI_SCIC_EXIT_PARAMETER_SHIFT 8
  145. #define SWSCI_SCIC_EXIT_PARAMETER_MASK (0xff << 8)
  146. #define SWSCI_SCIC_EXIT_STATUS_SHIFT 5
  147. #define SWSCI_SCIC_EXIT_STATUS_MASK (7 << 5)
  148. #define SWSCI_SCIC_EXIT_STATUS_SUCCESS 1
  149. #define SWSCI_FUNCTION_CODE(main, sub) \
  150. ((main) << SWSCI_SCIC_MAIN_FUNCTION_SHIFT | \
  151. (sub) << SWSCI_SCIC_SUB_FUNCTION_SHIFT)
  152. /* SWSCI: Get BIOS Data (GBDA) */
  153. #define SWSCI_GBDA 4
  154. #define SWSCI_GBDA_SUPPORTED_CALLS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 0)
  155. #define SWSCI_GBDA_REQUESTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 1)
  156. #define SWSCI_GBDA_BOOT_DISPLAY_PREF SWSCI_FUNCTION_CODE(SWSCI_GBDA, 4)
  157. #define SWSCI_GBDA_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 5)
  158. #define SWSCI_GBDA_TV_STANDARD SWSCI_FUNCTION_CODE(SWSCI_GBDA, 6)
  159. #define SWSCI_GBDA_INTERNAL_GRAPHICS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 7)
  160. #define SWSCI_GBDA_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_GBDA, 10)
  161. /* SWSCI: System BIOS Callbacks (SBCB) */
  162. #define SWSCI_SBCB 6
  163. #define SWSCI_SBCB_SUPPORTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 0)
  164. #define SWSCI_SBCB_INIT_COMPLETION SWSCI_FUNCTION_CODE(SWSCI_SBCB, 1)
  165. #define SWSCI_SBCB_PRE_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 3)
  166. #define SWSCI_SBCB_POST_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 4)
  167. #define SWSCI_SBCB_DISPLAY_SWITCH SWSCI_FUNCTION_CODE(SWSCI_SBCB, 5)
  168. #define SWSCI_SBCB_SET_TV_FORMAT SWSCI_FUNCTION_CODE(SWSCI_SBCB, 6)
  169. #define SWSCI_SBCB_ADAPTER_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 7)
  170. #define SWSCI_SBCB_DISPLAY_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 8)
  171. #define SWSCI_SBCB_SET_BOOT_DISPLAY SWSCI_FUNCTION_CODE(SWSCI_SBCB, 9)
  172. #define SWSCI_SBCB_SET_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 10)
  173. #define SWSCI_SBCB_SET_INTERNAL_GFX SWSCI_FUNCTION_CODE(SWSCI_SBCB, 11)
  174. #define SWSCI_SBCB_POST_HIRES_TO_DOS_FS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 16)
  175. #define SWSCI_SBCB_SUSPEND_RESUME SWSCI_FUNCTION_CODE(SWSCI_SBCB, 17)
  176. #define SWSCI_SBCB_SET_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 18)
  177. #define SWSCI_SBCB_POST_VBE_PM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 19)
  178. #define SWSCI_SBCB_ENABLE_DISABLE_AUDIO SWSCI_FUNCTION_CODE(SWSCI_SBCB, 21)
  179. #define ACPI_OTHER_OUTPUT (0<<8)
  180. #define ACPI_VGA_OUTPUT (1<<8)
  181. #define ACPI_TV_OUTPUT (2<<8)
  182. #define ACPI_DIGITAL_OUTPUT (3<<8)
  183. #define ACPI_LVDS_OUTPUT (4<<8)
  184. #ifdef CONFIG_ACPI
  185. static int swsci(struct drm_device *dev, u32 function, u32 parm, u32 *parm_out)
  186. {
  187. struct drm_i915_private *dev_priv = dev->dev_private;
  188. struct opregion_swsci __iomem *swsci = dev_priv->opregion.swsci;
  189. u32 main_function, sub_function, scic;
  190. u16 pci_swsci;
  191. u32 dslp;
  192. if (!swsci)
  193. return -ENODEV;
  194. main_function = (function & SWSCI_SCIC_MAIN_FUNCTION_MASK) >>
  195. SWSCI_SCIC_MAIN_FUNCTION_SHIFT;
  196. sub_function = (function & SWSCI_SCIC_SUB_FUNCTION_MASK) >>
  197. SWSCI_SCIC_SUB_FUNCTION_SHIFT;
  198. /* Check if we can call the function. See swsci_setup for details. */
  199. if (main_function == SWSCI_SBCB) {
  200. if ((dev_priv->opregion.swsci_sbcb_sub_functions &
  201. (1 << sub_function)) == 0)
  202. return -EINVAL;
  203. } else if (main_function == SWSCI_GBDA) {
  204. if ((dev_priv->opregion.swsci_gbda_sub_functions &
  205. (1 << sub_function)) == 0)
  206. return -EINVAL;
  207. }
  208. /* Driver sleep timeout in ms. */
  209. dslp = ioread32(&swsci->dslp);
  210. if (!dslp) {
  211. dslp = 2;
  212. } else if (dslp > 500) {
  213. /* Hey bios, trust must be earned. */
  214. WARN_ONCE(1, "excessive driver sleep timeout (DSPL) %u\n", dslp);
  215. dslp = 500;
  216. }
  217. /* The spec tells us to do this, but we are the only user... */
  218. scic = ioread32(&swsci->scic);
  219. if (scic & SWSCI_SCIC_INDICATOR) {
  220. DRM_DEBUG_DRIVER("SWSCI request already in progress\n");
  221. return -EBUSY;
  222. }
  223. scic = function | SWSCI_SCIC_INDICATOR;
  224. iowrite32(parm, &swsci->parm);
  225. iowrite32(scic, &swsci->scic);
  226. /* Ensure SCI event is selected and event trigger is cleared. */
  227. pci_read_config_word(dev->pdev, PCI_SWSCI, &pci_swsci);
  228. if (!(pci_swsci & PCI_SWSCI_SCISEL) || (pci_swsci & PCI_SWSCI_GSSCIE)) {
  229. pci_swsci |= PCI_SWSCI_SCISEL;
  230. pci_swsci &= ~PCI_SWSCI_GSSCIE;
  231. pci_write_config_word(dev->pdev, PCI_SWSCI, pci_swsci);
  232. }
  233. /* Use event trigger to tell bios to check the mail. */
  234. pci_swsci |= PCI_SWSCI_GSSCIE;
  235. pci_write_config_word(dev->pdev, PCI_SWSCI, pci_swsci);
  236. /* Poll for the result. */
  237. #define C (((scic = ioread32(&swsci->scic)) & SWSCI_SCIC_INDICATOR) == 0)
  238. if (wait_for(C, dslp)) {
  239. DRM_DEBUG_DRIVER("SWSCI request timed out\n");
  240. return -ETIMEDOUT;
  241. }
  242. scic = (scic & SWSCI_SCIC_EXIT_STATUS_MASK) >>
  243. SWSCI_SCIC_EXIT_STATUS_SHIFT;
  244. /* Note: scic == 0 is an error! */
  245. if (scic != SWSCI_SCIC_EXIT_STATUS_SUCCESS) {
  246. DRM_DEBUG_DRIVER("SWSCI request error %u\n", scic);
  247. return -EIO;
  248. }
  249. if (parm_out)
  250. *parm_out = ioread32(&swsci->parm);
  251. return 0;
  252. #undef C
  253. }
  254. #define DISPLAY_TYPE_CRT 0
  255. #define DISPLAY_TYPE_TV 1
  256. #define DISPLAY_TYPE_EXTERNAL_FLAT_PANEL 2
  257. #define DISPLAY_TYPE_INTERNAL_FLAT_PANEL 3
  258. int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder,
  259. bool enable)
  260. {
  261. struct drm_device *dev = intel_encoder->base.dev;
  262. u32 parm = 0;
  263. u32 type = 0;
  264. u32 port;
  265. /* don't care about old stuff for now */
  266. if (!HAS_DDI(dev))
  267. return 0;
  268. port = intel_ddi_get_encoder_port(intel_encoder);
  269. if (port == PORT_E) {
  270. port = 0;
  271. } else {
  272. parm |= 1 << port;
  273. port++;
  274. }
  275. if (!enable)
  276. parm |= 4 << 8;
  277. switch (intel_encoder->type) {
  278. case INTEL_OUTPUT_ANALOG:
  279. type = DISPLAY_TYPE_CRT;
  280. break;
  281. case INTEL_OUTPUT_UNKNOWN:
  282. case INTEL_OUTPUT_DISPLAYPORT:
  283. case INTEL_OUTPUT_HDMI:
  284. type = DISPLAY_TYPE_EXTERNAL_FLAT_PANEL;
  285. break;
  286. case INTEL_OUTPUT_EDP:
  287. type = DISPLAY_TYPE_INTERNAL_FLAT_PANEL;
  288. break;
  289. default:
  290. WARN_ONCE(1, "unsupported intel_encoder type %d\n",
  291. intel_encoder->type);
  292. return -EINVAL;
  293. }
  294. parm |= type << (16 + port * 3);
  295. return swsci(dev, SWSCI_SBCB_DISPLAY_POWER_STATE, parm, NULL);
  296. }
  297. static const struct {
  298. pci_power_t pci_power_state;
  299. u32 parm;
  300. } power_state_map[] = {
  301. { PCI_D0, 0x00 },
  302. { PCI_D1, 0x01 },
  303. { PCI_D2, 0x02 },
  304. { PCI_D3hot, 0x04 },
  305. { PCI_D3cold, 0x04 },
  306. };
  307. int intel_opregion_notify_adapter(struct drm_device *dev, pci_power_t state)
  308. {
  309. int i;
  310. if (!HAS_DDI(dev))
  311. return 0;
  312. for (i = 0; i < ARRAY_SIZE(power_state_map); i++) {
  313. if (state == power_state_map[i].pci_power_state)
  314. return swsci(dev, SWSCI_SBCB_ADAPTER_POWER_STATE,
  315. power_state_map[i].parm, NULL);
  316. }
  317. return -EINVAL;
  318. }
  319. static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
  320. {
  321. struct drm_i915_private *dev_priv = dev->dev_private;
  322. struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
  323. DRM_DEBUG_DRIVER("bclp = 0x%08x\n", bclp);
  324. if (!(bclp & ASLE_BCLP_VALID))
  325. return ASLE_BACKLIGHT_FAILED;
  326. bclp &= ASLE_BCLP_MSK;
  327. if (bclp > 255)
  328. return ASLE_BACKLIGHT_FAILED;
  329. intel_panel_set_backlight(dev, bclp, 255);
  330. iowrite32((bclp*0x64)/0xff | ASLE_CBLV_VALID, &asle->cblv);
  331. return 0;
  332. }
  333. static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi)
  334. {
  335. /* alsi is the current ALS reading in lux. 0 indicates below sensor
  336. range, 0xffff indicates above sensor range. 1-0xfffe are valid */
  337. DRM_DEBUG_DRIVER("Illum is not supported\n");
  338. return ASLE_ALS_ILLUM_FAILED;
  339. }
  340. static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb)
  341. {
  342. DRM_DEBUG_DRIVER("PWM freq is not supported\n");
  343. return ASLE_PWM_FREQ_FAILED;
  344. }
  345. static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
  346. {
  347. /* Panel fitting is currently controlled by the X code, so this is a
  348. noop until modesetting support works fully */
  349. DRM_DEBUG_DRIVER("Pfit is not supported\n");
  350. return ASLE_PFIT_FAILED;
  351. }
  352. void intel_opregion_asle_intr(struct drm_device *dev)
  353. {
  354. struct drm_i915_private *dev_priv = dev->dev_private;
  355. struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
  356. u32 asle_stat = 0;
  357. u32 asle_req;
  358. if (!asle)
  359. return;
  360. asle_req = ioread32(&asle->aslc) & ASLE_REQ_MSK;
  361. if (!asle_req) {
  362. DRM_DEBUG_DRIVER("non asle set request??\n");
  363. return;
  364. }
  365. if (asle_req & ASLE_SET_ALS_ILLUM)
  366. asle_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi));
  367. if (asle_req & ASLE_SET_BACKLIGHT)
  368. asle_stat |= asle_set_backlight(dev, ioread32(&asle->bclp));
  369. if (asle_req & ASLE_SET_PFIT)
  370. asle_stat |= asle_set_pfit(dev, ioread32(&asle->pfit));
  371. if (asle_req & ASLE_SET_PWM_FREQ)
  372. asle_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb));
  373. iowrite32(asle_stat, &asle->aslc);
  374. }
  375. #define ACPI_EV_DISPLAY_SWITCH (1<<0)
  376. #define ACPI_EV_LID (1<<1)
  377. #define ACPI_EV_DOCK (1<<2)
  378. static struct intel_opregion *system_opregion;
  379. static int intel_opregion_video_event(struct notifier_block *nb,
  380. unsigned long val, void *data)
  381. {
  382. /* The only video events relevant to opregion are 0x80. These indicate
  383. either a docking event, lid switch or display switch request. In
  384. Linux, these are handled by the dock, button and video drivers.
  385. */
  386. struct opregion_acpi __iomem *acpi;
  387. struct acpi_bus_event *event = data;
  388. int ret = NOTIFY_OK;
  389. if (strcmp(event->device_class, ACPI_VIDEO_CLASS) != 0)
  390. return NOTIFY_DONE;
  391. if (!system_opregion)
  392. return NOTIFY_DONE;
  393. acpi = system_opregion->acpi;
  394. if (event->type == 0x80 &&
  395. (ioread32(&acpi->cevt) & 1) == 0)
  396. ret = NOTIFY_BAD;
  397. iowrite32(0, &acpi->csts);
  398. return ret;
  399. }
  400. static struct notifier_block intel_opregion_notifier = {
  401. .notifier_call = intel_opregion_video_event,
  402. };
  403. /*
  404. * Initialise the DIDL field in opregion. This passes a list of devices to
  405. * the firmware. Values are defined by section B.4.2 of the ACPI specification
  406. * (version 3)
  407. */
  408. static void intel_didl_outputs(struct drm_device *dev)
  409. {
  410. struct drm_i915_private *dev_priv = dev->dev_private;
  411. struct intel_opregion *opregion = &dev_priv->opregion;
  412. struct drm_connector *connector;
  413. acpi_handle handle;
  414. struct acpi_device *acpi_dev, *acpi_cdev, *acpi_video_bus = NULL;
  415. unsigned long long device_id;
  416. acpi_status status;
  417. u32 temp;
  418. int i = 0;
  419. handle = DEVICE_ACPI_HANDLE(&dev->pdev->dev);
  420. if (!handle || acpi_bus_get_device(handle, &acpi_dev))
  421. return;
  422. if (acpi_is_video_device(handle))
  423. acpi_video_bus = acpi_dev;
  424. else {
  425. list_for_each_entry(acpi_cdev, &acpi_dev->children, node) {
  426. if (acpi_is_video_device(acpi_cdev->handle)) {
  427. acpi_video_bus = acpi_cdev;
  428. break;
  429. }
  430. }
  431. }
  432. if (!acpi_video_bus) {
  433. pr_warn("No ACPI video bus found\n");
  434. return;
  435. }
  436. list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) {
  437. if (i >= 8) {
  438. dev_dbg(&dev->pdev->dev,
  439. "More than 8 outputs detected via ACPI\n");
  440. return;
  441. }
  442. status =
  443. acpi_evaluate_integer(acpi_cdev->handle, "_ADR",
  444. NULL, &device_id);
  445. if (ACPI_SUCCESS(status)) {
  446. if (!device_id)
  447. goto blind_set;
  448. iowrite32((u32)(device_id & 0x0f0f),
  449. &opregion->acpi->didl[i]);
  450. i++;
  451. }
  452. }
  453. end:
  454. /* If fewer than 8 outputs, the list must be null terminated */
  455. if (i < 8)
  456. iowrite32(0, &opregion->acpi->didl[i]);
  457. return;
  458. blind_set:
  459. i = 0;
  460. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  461. int output_type = ACPI_OTHER_OUTPUT;
  462. if (i >= 8) {
  463. dev_dbg(&dev->pdev->dev,
  464. "More than 8 outputs in connector list\n");
  465. return;
  466. }
  467. switch (connector->connector_type) {
  468. case DRM_MODE_CONNECTOR_VGA:
  469. case DRM_MODE_CONNECTOR_DVIA:
  470. output_type = ACPI_VGA_OUTPUT;
  471. break;
  472. case DRM_MODE_CONNECTOR_Composite:
  473. case DRM_MODE_CONNECTOR_SVIDEO:
  474. case DRM_MODE_CONNECTOR_Component:
  475. case DRM_MODE_CONNECTOR_9PinDIN:
  476. output_type = ACPI_TV_OUTPUT;
  477. break;
  478. case DRM_MODE_CONNECTOR_DVII:
  479. case DRM_MODE_CONNECTOR_DVID:
  480. case DRM_MODE_CONNECTOR_DisplayPort:
  481. case DRM_MODE_CONNECTOR_HDMIA:
  482. case DRM_MODE_CONNECTOR_HDMIB:
  483. output_type = ACPI_DIGITAL_OUTPUT;
  484. break;
  485. case DRM_MODE_CONNECTOR_LVDS:
  486. output_type = ACPI_LVDS_OUTPUT;
  487. break;
  488. }
  489. temp = ioread32(&opregion->acpi->didl[i]);
  490. iowrite32(temp | (1<<31) | output_type | i,
  491. &opregion->acpi->didl[i]);
  492. i++;
  493. }
  494. goto end;
  495. }
  496. static void intel_setup_cadls(struct drm_device *dev)
  497. {
  498. struct drm_i915_private *dev_priv = dev->dev_private;
  499. struct intel_opregion *opregion = &dev_priv->opregion;
  500. int i = 0;
  501. u32 disp_id;
  502. /* Initialize the CADL field by duplicating the DIDL values.
  503. * Technically, this is not always correct as display outputs may exist,
  504. * but not active. This initialization is necessary for some Clevo
  505. * laptops that check this field before processing the brightness and
  506. * display switching hotkeys. Just like DIDL, CADL is NULL-terminated if
  507. * there are less than eight devices. */
  508. do {
  509. disp_id = ioread32(&opregion->acpi->didl[i]);
  510. iowrite32(disp_id, &opregion->acpi->cadl[i]);
  511. } while (++i < 8 && disp_id != 0);
  512. }
  513. void intel_opregion_init(struct drm_device *dev)
  514. {
  515. struct drm_i915_private *dev_priv = dev->dev_private;
  516. struct intel_opregion *opregion = &dev_priv->opregion;
  517. if (!opregion->header)
  518. return;
  519. if (opregion->acpi) {
  520. if (drm_core_check_feature(dev, DRIVER_MODESET)) {
  521. intel_didl_outputs(dev);
  522. intel_setup_cadls(dev);
  523. }
  524. /* Notify BIOS we are ready to handle ACPI video ext notifs.
  525. * Right now, all the events are handled by the ACPI video module.
  526. * We don't actually need to do anything with them. */
  527. iowrite32(0, &opregion->acpi->csts);
  528. iowrite32(1, &opregion->acpi->drdy);
  529. system_opregion = opregion;
  530. register_acpi_notifier(&intel_opregion_notifier);
  531. }
  532. if (opregion->asle) {
  533. iowrite32(ASLE_TCHE_BLC_EN, &opregion->asle->tche);
  534. iowrite32(ASLE_ARDY_READY, &opregion->asle->ardy);
  535. }
  536. }
  537. void intel_opregion_fini(struct drm_device *dev)
  538. {
  539. struct drm_i915_private *dev_priv = dev->dev_private;
  540. struct intel_opregion *opregion = &dev_priv->opregion;
  541. if (!opregion->header)
  542. return;
  543. if (opregion->asle)
  544. iowrite32(ASLE_ARDY_NOT_READY, &opregion->asle->ardy);
  545. if (opregion->acpi) {
  546. iowrite32(0, &opregion->acpi->drdy);
  547. system_opregion = NULL;
  548. unregister_acpi_notifier(&intel_opregion_notifier);
  549. }
  550. /* just clear all opregion memory pointers now */
  551. iounmap(opregion->header);
  552. opregion->header = NULL;
  553. opregion->acpi = NULL;
  554. opregion->swsci = NULL;
  555. opregion->asle = NULL;
  556. opregion->vbt = NULL;
  557. }
  558. static void swsci_setup(struct drm_device *dev)
  559. {
  560. struct drm_i915_private *dev_priv = dev->dev_private;
  561. struct intel_opregion *opregion = &dev_priv->opregion;
  562. bool requested_callbacks = false;
  563. u32 tmp;
  564. /* Sub-function code 0 is okay, let's allow them. */
  565. opregion->swsci_gbda_sub_functions = 1;
  566. opregion->swsci_sbcb_sub_functions = 1;
  567. /* We use GBDA to ask for supported GBDA calls. */
  568. if (swsci(dev, SWSCI_GBDA_SUPPORTED_CALLS, 0, &tmp) == 0) {
  569. /* make the bits match the sub-function codes */
  570. tmp <<= 1;
  571. opregion->swsci_gbda_sub_functions |= tmp;
  572. }
  573. /*
  574. * We also use GBDA to ask for _requested_ SBCB callbacks. The driver
  575. * must not call interfaces that are not specifically requested by the
  576. * bios.
  577. */
  578. if (swsci(dev, SWSCI_GBDA_REQUESTED_CALLBACKS, 0, &tmp) == 0) {
  579. /* here, the bits already match sub-function codes */
  580. opregion->swsci_sbcb_sub_functions |= tmp;
  581. requested_callbacks = true;
  582. }
  583. /*
  584. * But we use SBCB to ask for _supported_ SBCB calls. This does not mean
  585. * the callback is _requested_. But we still can't call interfaces that
  586. * are not requested.
  587. */
  588. if (swsci(dev, SWSCI_SBCB_SUPPORTED_CALLBACKS, 0, &tmp) == 0) {
  589. /* make the bits match the sub-function codes */
  590. u32 low = tmp & 0x7ff;
  591. u32 high = tmp & ~0xfff; /* bit 11 is reserved */
  592. tmp = (high << 4) | (low << 1) | 1;
  593. /* best guess what to do with supported wrt requested */
  594. if (requested_callbacks) {
  595. u32 req = opregion->swsci_sbcb_sub_functions;
  596. if ((req & tmp) != req)
  597. DRM_DEBUG_DRIVER("SWSCI BIOS requested (%08x) SBCB callbacks that are not supported (%08x)\n", req, tmp);
  598. /* XXX: for now, trust the requested callbacks */
  599. /* opregion->swsci_sbcb_sub_functions &= tmp; */
  600. } else {
  601. opregion->swsci_sbcb_sub_functions |= tmp;
  602. }
  603. }
  604. DRM_DEBUG_DRIVER("SWSCI GBDA callbacks %08x, SBCB callbacks %08x\n",
  605. opregion->swsci_gbda_sub_functions,
  606. opregion->swsci_sbcb_sub_functions);
  607. }
  608. #else /* CONFIG_ACPI */
  609. static inline void swsci_setup(struct drm_device *dev) {}
  610. #endif /* CONFIG_ACPI */
  611. int intel_opregion_setup(struct drm_device *dev)
  612. {
  613. struct drm_i915_private *dev_priv = dev->dev_private;
  614. struct intel_opregion *opregion = &dev_priv->opregion;
  615. void __iomem *base;
  616. u32 asls, mboxes;
  617. char buf[sizeof(OPREGION_SIGNATURE)];
  618. int err = 0;
  619. pci_read_config_dword(dev->pdev, PCI_ASLS, &asls);
  620. DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls);
  621. if (asls == 0) {
  622. DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n");
  623. return -ENOTSUPP;
  624. }
  625. base = acpi_os_ioremap(asls, OPREGION_SIZE);
  626. if (!base)
  627. return -ENOMEM;
  628. memcpy_fromio(buf, base, sizeof(buf));
  629. if (memcmp(buf, OPREGION_SIGNATURE, 16)) {
  630. DRM_DEBUG_DRIVER("opregion signature mismatch\n");
  631. err = -EINVAL;
  632. goto err_out;
  633. }
  634. opregion->header = base;
  635. opregion->vbt = base + OPREGION_VBT_OFFSET;
  636. opregion->lid_state = base + ACPI_CLID;
  637. mboxes = ioread32(&opregion->header->mboxes);
  638. if (mboxes & MBOX_ACPI) {
  639. DRM_DEBUG_DRIVER("Public ACPI methods supported\n");
  640. opregion->acpi = base + OPREGION_ACPI_OFFSET;
  641. }
  642. if (mboxes & MBOX_SWSCI) {
  643. DRM_DEBUG_DRIVER("SWSCI supported\n");
  644. opregion->swsci = base + OPREGION_SWSCI_OFFSET;
  645. swsci_setup(dev);
  646. }
  647. if (mboxes & MBOX_ASLE) {
  648. DRM_DEBUG_DRIVER("ASLE supported\n");
  649. opregion->asle = base + OPREGION_ASLE_OFFSET;
  650. iowrite32(ASLE_ARDY_NOT_READY, &opregion->asle->ardy);
  651. }
  652. return 0;
  653. err_out:
  654. iounmap(base);
  655. return err;
  656. }