mpc8313erdb.dts 4.7 KB

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  1. /*
  2. * MPC8313E RDB Device Tree Source
  3. *
  4. * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8313ERDB";
  13. compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. PowerPC,8313@0 {
  20. device_type = "cpu";
  21. reg = <0>;
  22. d-cache-line-size = <20>; // 32 bytes
  23. i-cache-line-size = <20>; // 32 bytes
  24. d-cache-size = <4000>; // L1, 16K
  25. i-cache-size = <4000>; // L1, 16K
  26. timebase-frequency = <0>; // from bootloader
  27. bus-frequency = <0>; // from bootloader
  28. clock-frequency = <0>; // from bootloader
  29. };
  30. };
  31. memory {
  32. device_type = "memory";
  33. reg = <00000000 08000000>; // 128MB at 0
  34. };
  35. soc8313@e0000000 {
  36. #address-cells = <1>;
  37. #size-cells = <1>;
  38. device_type = "soc";
  39. ranges = <0 e0000000 00100000>;
  40. reg = <e0000000 00000200>;
  41. bus-frequency = <0>;
  42. wdt@200 {
  43. device_type = "watchdog";
  44. compatible = "mpc83xx_wdt";
  45. reg = <200 100>;
  46. };
  47. i2c@3000 {
  48. #address-cells = <1>;
  49. #size-cells = <0>;
  50. cell-index = <0>;
  51. compatible = "fsl-i2c";
  52. reg = <3000 100>;
  53. interrupts = <e 8>;
  54. interrupt-parent = < &ipic >;
  55. dfsrr;
  56. };
  57. i2c@3100 {
  58. #address-cells = <1>;
  59. #size-cells = <0>;
  60. cell-index = <1>;
  61. compatible = "fsl-i2c";
  62. reg = <3100 100>;
  63. interrupts = <f 8>;
  64. interrupt-parent = < &ipic >;
  65. dfsrr;
  66. };
  67. spi@7000 {
  68. device_type = "spi";
  69. compatible = "fsl_spi";
  70. reg = <7000 1000>;
  71. interrupts = <10 8>;
  72. interrupt-parent = < &ipic >;
  73. mode = "cpu";
  74. };
  75. /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
  76. usb@23000 {
  77. device_type = "usb";
  78. compatible = "fsl-usb2-dr";
  79. reg = <23000 1000>;
  80. #address-cells = <1>;
  81. #size-cells = <0>;
  82. interrupt-parent = < &ipic >;
  83. interrupts = <26 8>;
  84. phy_type = "utmi_wide";
  85. };
  86. mdio@24520 {
  87. device_type = "mdio";
  88. compatible = "gianfar";
  89. reg = <24520 20>;
  90. #address-cells = <1>;
  91. #size-cells = <0>;
  92. phy1: ethernet-phy@1 {
  93. interrupt-parent = < &ipic >;
  94. interrupts = <13 8>;
  95. reg = <1>;
  96. device_type = "ethernet-phy";
  97. };
  98. phy4: ethernet-phy@4 {
  99. interrupt-parent = < &ipic >;
  100. interrupts = <14 8>;
  101. reg = <4>;
  102. device_type = "ethernet-phy";
  103. };
  104. };
  105. ethernet@24000 {
  106. device_type = "network";
  107. model = "eTSEC";
  108. compatible = "gianfar";
  109. reg = <24000 1000>;
  110. local-mac-address = [ 00 00 00 00 00 00 ];
  111. interrupts = <25 8 24 8 23 8>;
  112. interrupt-parent = < &ipic >;
  113. phy-handle = < &phy1 >;
  114. };
  115. ethernet@25000 {
  116. device_type = "network";
  117. model = "eTSEC";
  118. compatible = "gianfar";
  119. reg = <25000 1000>;
  120. local-mac-address = [ 00 00 00 00 00 00 ];
  121. interrupts = <22 8 21 8 20 8>;
  122. interrupt-parent = < &ipic >;
  123. phy-handle = < &phy4 >;
  124. };
  125. serial@4500 {
  126. device_type = "serial";
  127. compatible = "ns16550";
  128. reg = <4500 100>;
  129. clock-frequency = <0>;
  130. interrupts = <9 8>;
  131. interrupt-parent = < &ipic >;
  132. };
  133. serial@4600 {
  134. device_type = "serial";
  135. compatible = "ns16550";
  136. reg = <4600 100>;
  137. clock-frequency = <0>;
  138. interrupts = <a 8>;
  139. interrupt-parent = < &ipic >;
  140. };
  141. crypto@30000 {
  142. device_type = "crypto";
  143. model = "SEC2";
  144. compatible = "talitos";
  145. reg = <30000 7000>;
  146. interrupts = <b 8>;
  147. interrupt-parent = < &ipic >;
  148. /* Rev. 2.2 */
  149. num-channels = <1>;
  150. channel-fifo-len = <18>;
  151. exec-units-mask = <0000004c>;
  152. descriptor-types-mask = <0122003f>;
  153. };
  154. /* IPIC
  155. * interrupts cell = <intr #, sense>
  156. * sense values match linux IORESOURCE_IRQ_* defines:
  157. * sense == 8: Level, low assertion
  158. * sense == 2: Edge, high-to-low change
  159. */
  160. ipic: pic@700 {
  161. interrupt-controller;
  162. #address-cells = <0>;
  163. #interrupt-cells = <2>;
  164. reg = <700 100>;
  165. device_type = "ipic";
  166. };
  167. };
  168. pci@e0008500 {
  169. interrupt-map-mask = <f800 0 0 7>;
  170. interrupt-map = <
  171. /* IDSEL 0x0E -mini PCI */
  172. 7000 0 0 1 &ipic 12 8
  173. 7000 0 0 2 &ipic 12 8
  174. 7000 0 0 3 &ipic 12 8
  175. 7000 0 0 4 &ipic 12 8
  176. /* IDSEL 0x0F - PCI slot */
  177. 7800 0 0 1 &ipic 11 8
  178. 7800 0 0 2 &ipic 12 8
  179. 7800 0 0 3 &ipic 11 8
  180. 7800 0 0 4 &ipic 12 8>;
  181. interrupt-parent = < &ipic >;
  182. interrupts = <42 8>;
  183. bus-range = <0 0>;
  184. ranges = <02000000 0 90000000 90000000 0 10000000
  185. 42000000 0 80000000 80000000 0 10000000
  186. 01000000 0 00000000 e2000000 0 00100000>;
  187. clock-frequency = <3f940aa>;
  188. #interrupt-cells = <1>;
  189. #size-cells = <2>;
  190. #address-cells = <3>;
  191. reg = <e0008500 100>;
  192. compatible = "fsl,mpc8349-pci";
  193. device_type = "pci";
  194. };
  195. };