nv50_sor.c 9.3 KB

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  1. /*
  2. * Copyright (C) 2008 Maarten Maathuis.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include "drmP.h"
  27. #include "drm_crtc_helper.h"
  28. #define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
  29. #include "nouveau_reg.h"
  30. #include "nouveau_drv.h"
  31. #include "nouveau_dma.h"
  32. #include "nouveau_encoder.h"
  33. #include "nouveau_connector.h"
  34. #include "nouveau_crtc.h"
  35. #include "nv50_display.h"
  36. static void
  37. nv50_sor_disconnect(struct drm_encoder *encoder)
  38. {
  39. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  40. struct drm_device *dev = encoder->dev;
  41. struct drm_nouveau_private *dev_priv = dev->dev_private;
  42. struct nouveau_channel *evo = dev_priv->evo;
  43. int ret;
  44. if (!nv_encoder->crtc)
  45. return;
  46. NV_DEBUG_KMS(dev, "Disconnecting SOR %d\n", nv_encoder->or);
  47. ret = RING_SPACE(evo, 2);
  48. if (ret) {
  49. NV_ERROR(dev, "no space while disconnecting SOR\n");
  50. return;
  51. }
  52. BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
  53. OUT_RING(evo, 0);
  54. nv_encoder->crtc = NULL;
  55. nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
  56. }
  57. static void
  58. nv50_sor_dp_link_train(struct drm_encoder *encoder)
  59. {
  60. struct drm_device *dev = encoder->dev;
  61. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  62. struct bit_displayport_encoder_table *dpe;
  63. int dpe_headerlen;
  64. dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen);
  65. if (!dpe) {
  66. NV_ERROR(dev, "SOR-%d: no DP encoder table!\n", nv_encoder->or);
  67. return;
  68. }
  69. if (dpe->script0) {
  70. NV_DEBUG_KMS(dev, "SOR-%d: running DP script 0\n", nv_encoder->or);
  71. nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script0),
  72. nv_encoder->dcb);
  73. }
  74. if (!nouveau_dp_link_train(encoder))
  75. NV_ERROR(dev, "SOR-%d: link training failed\n", nv_encoder->or);
  76. if (dpe->script1) {
  77. NV_DEBUG_KMS(dev, "SOR-%d: running DP script 1\n", nv_encoder->or);
  78. nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script1),
  79. nv_encoder->dcb);
  80. }
  81. }
  82. static void
  83. nv50_sor_dpms(struct drm_encoder *encoder, int mode)
  84. {
  85. struct drm_device *dev = encoder->dev;
  86. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  87. struct drm_encoder *enc;
  88. uint32_t val;
  89. int or = nv_encoder->or;
  90. NV_DEBUG_KMS(dev, "or %d type %d mode %d\n", or, nv_encoder->dcb->type, mode);
  91. nv_encoder->last_dpms = mode;
  92. list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
  93. struct nouveau_encoder *nvenc = nouveau_encoder(enc);
  94. if (nvenc == nv_encoder ||
  95. (nvenc->dcb->type != OUTPUT_TMDS &&
  96. nvenc->dcb->type != OUTPUT_LVDS &&
  97. nvenc->dcb->type != OUTPUT_DP) ||
  98. nvenc->dcb->or != nv_encoder->dcb->or)
  99. continue;
  100. if (nvenc->last_dpms == DRM_MODE_DPMS_ON)
  101. return;
  102. }
  103. /* wait for it to be done */
  104. if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_CTRL(or),
  105. NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING, 0)) {
  106. NV_ERROR(dev, "timeout: SOR_DPMS_CTRL_PENDING(%d) == 0\n", or);
  107. NV_ERROR(dev, "SOR_DPMS_CTRL(%d) = 0x%08x\n", or,
  108. nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or)));
  109. }
  110. val = nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or));
  111. if (mode == DRM_MODE_DPMS_ON)
  112. val |= NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
  113. else
  114. val &= ~NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
  115. nv_wr32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or), val |
  116. NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING);
  117. if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_STATE(or),
  118. NV50_PDISPLAY_SOR_DPMS_STATE_WAIT, 0)) {
  119. NV_ERROR(dev, "timeout: SOR_DPMS_STATE_WAIT(%d) == 0\n", or);
  120. NV_ERROR(dev, "SOR_DPMS_STATE(%d) = 0x%08x\n", or,
  121. nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or)));
  122. }
  123. if (nv_encoder->dcb->type == OUTPUT_DP && mode == DRM_MODE_DPMS_ON)
  124. nv50_sor_dp_link_train(encoder);
  125. }
  126. static void
  127. nv50_sor_save(struct drm_encoder *encoder)
  128. {
  129. NV_ERROR(encoder->dev, "!!\n");
  130. }
  131. static void
  132. nv50_sor_restore(struct drm_encoder *encoder)
  133. {
  134. NV_ERROR(encoder->dev, "!!\n");
  135. }
  136. static bool
  137. nv50_sor_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
  138. struct drm_display_mode *adjusted_mode)
  139. {
  140. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  141. struct nouveau_connector *connector;
  142. NV_DEBUG_KMS(encoder->dev, "or %d\n", nv_encoder->or);
  143. connector = nouveau_encoder_connector_get(nv_encoder);
  144. if (!connector) {
  145. NV_ERROR(encoder->dev, "Encoder has no connector\n");
  146. return false;
  147. }
  148. if (connector->scaling_mode != DRM_MODE_SCALE_NONE &&
  149. connector->native_mode) {
  150. int id = adjusted_mode->base.id;
  151. *adjusted_mode = *connector->native_mode;
  152. adjusted_mode->base.id = id;
  153. }
  154. return true;
  155. }
  156. static void
  157. nv50_sor_prepare(struct drm_encoder *encoder)
  158. {
  159. }
  160. static void
  161. nv50_sor_commit(struct drm_encoder *encoder)
  162. {
  163. }
  164. static void
  165. nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
  166. struct drm_display_mode *adjusted_mode)
  167. {
  168. struct drm_nouveau_private *dev_priv = encoder->dev->dev_private;
  169. struct nouveau_channel *evo = dev_priv->evo;
  170. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  171. struct drm_device *dev = encoder->dev;
  172. struct nouveau_crtc *crtc = nouveau_crtc(encoder->crtc);
  173. uint32_t mode_ctl = 0;
  174. int ret;
  175. NV_DEBUG_KMS(dev, "or %d\n", nv_encoder->or);
  176. nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
  177. switch (nv_encoder->dcb->type) {
  178. case OUTPUT_TMDS:
  179. if (nv_encoder->dcb->sorconf.link & 1) {
  180. if (adjusted_mode->clock < 165000)
  181. mode_ctl = 0x0100;
  182. else
  183. mode_ctl = 0x0500;
  184. } else
  185. mode_ctl = 0x0200;
  186. break;
  187. case OUTPUT_DP:
  188. mode_ctl |= (nv_encoder->dp.mc_unknown << 16);
  189. if (nv_encoder->dcb->sorconf.link & 1)
  190. mode_ctl |= 0x00000800;
  191. else
  192. mode_ctl |= 0x00000900;
  193. break;
  194. default:
  195. break;
  196. }
  197. if (crtc->index == 1)
  198. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC1;
  199. else
  200. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC0;
  201. if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
  202. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NHSYNC;
  203. if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
  204. mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NVSYNC;
  205. ret = RING_SPACE(evo, 2);
  206. if (ret) {
  207. NV_ERROR(dev, "no space while connecting SOR\n");
  208. return;
  209. }
  210. BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
  211. OUT_RING(evo, mode_ctl);
  212. nv_encoder->crtc = encoder->crtc;
  213. }
  214. static struct drm_crtc *
  215. nv50_sor_crtc_get(struct drm_encoder *encoder)
  216. {
  217. return nouveau_encoder(encoder)->crtc;
  218. }
  219. static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {
  220. .dpms = nv50_sor_dpms,
  221. .save = nv50_sor_save,
  222. .restore = nv50_sor_restore,
  223. .mode_fixup = nv50_sor_mode_fixup,
  224. .prepare = nv50_sor_prepare,
  225. .commit = nv50_sor_commit,
  226. .mode_set = nv50_sor_mode_set,
  227. .get_crtc = nv50_sor_crtc_get,
  228. .detect = NULL,
  229. .disable = nv50_sor_disconnect
  230. };
  231. static void
  232. nv50_sor_destroy(struct drm_encoder *encoder)
  233. {
  234. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  235. if (!encoder)
  236. return;
  237. NV_DEBUG_KMS(encoder->dev, "\n");
  238. drm_encoder_cleanup(encoder);
  239. kfree(nv_encoder);
  240. }
  241. static const struct drm_encoder_funcs nv50_sor_encoder_funcs = {
  242. .destroy = nv50_sor_destroy,
  243. };
  244. int
  245. nv50_sor_create(struct drm_connector *connector, struct dcb_entry *entry)
  246. {
  247. struct nouveau_encoder *nv_encoder = NULL;
  248. struct drm_device *dev = connector->dev;
  249. struct drm_encoder *encoder;
  250. int type;
  251. NV_DEBUG_KMS(dev, "\n");
  252. switch (entry->type) {
  253. case OUTPUT_TMDS:
  254. case OUTPUT_DP:
  255. type = DRM_MODE_ENCODER_TMDS;
  256. break;
  257. case OUTPUT_LVDS:
  258. type = DRM_MODE_ENCODER_LVDS;
  259. break;
  260. default:
  261. return -EINVAL;
  262. }
  263. nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
  264. if (!nv_encoder)
  265. return -ENOMEM;
  266. encoder = to_drm_encoder(nv_encoder);
  267. nv_encoder->dcb = entry;
  268. nv_encoder->or = ffs(entry->or) - 1;
  269. nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
  270. drm_encoder_init(dev, encoder, &nv50_sor_encoder_funcs, type);
  271. drm_encoder_helper_add(encoder, &nv50_sor_helper_funcs);
  272. encoder->possible_crtcs = entry->heads;
  273. encoder->possible_clones = 0;
  274. if (nv_encoder->dcb->type == OUTPUT_DP) {
  275. int or = nv_encoder->or, link = !(entry->dpconf.sor.link & 1);
  276. uint32_t tmp;
  277. tmp = nv_rd32(dev, 0x61c700 + (or * 0x800));
  278. switch ((tmp & 0x00000f00) >> 8) {
  279. case 8:
  280. case 9:
  281. nv_encoder->dp.mc_unknown = (tmp & 0x000f0000) >> 16;
  282. tmp = nv_rd32(dev, NV50_SOR_DP_CTRL(or, link));
  283. nv_encoder->dp.unk0 = tmp & 0x000001fc;
  284. tmp = nv_rd32(dev, NV50_SOR_DP_UNK128(or, link));
  285. nv_encoder->dp.unk1 = tmp & 0x010f7f3f;
  286. break;
  287. default:
  288. break;
  289. }
  290. if (!nv_encoder->dp.mc_unknown)
  291. nv_encoder->dp.mc_unknown = 5;
  292. }
  293. drm_mode_connector_attach_encoder(connector, encoder);
  294. return 0;
  295. }