at91sam9260.dtsi 9.1 KB

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  1. /*
  2. * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
  3. *
  4. * Copyright (C) 2011 Atmel,
  5. * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
  6. * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  7. *
  8. * Licensed under GPLv2 or later.
  9. */
  10. /include/ "skeleton.dtsi"
  11. / {
  12. model = "Atmel AT91SAM9260 family SoC";
  13. compatible = "atmel,at91sam9260";
  14. interrupt-parent = <&aic>;
  15. aliases {
  16. serial0 = &dbgu;
  17. serial1 = &usart0;
  18. serial2 = &usart1;
  19. serial3 = &usart2;
  20. serial4 = &usart3;
  21. serial5 = &usart4;
  22. serial6 = &usart5;
  23. gpio0 = &pioA;
  24. gpio1 = &pioB;
  25. gpio2 = &pioC;
  26. tcb0 = &tcb0;
  27. tcb1 = &tcb1;
  28. i2c0 = &i2c0;
  29. };
  30. cpus {
  31. cpu@0 {
  32. compatible = "arm,arm926ejs";
  33. };
  34. };
  35. memory {
  36. reg = <0x20000000 0x04000000>;
  37. };
  38. ahb {
  39. compatible = "simple-bus";
  40. #address-cells = <1>;
  41. #size-cells = <1>;
  42. ranges;
  43. apb {
  44. compatible = "simple-bus";
  45. #address-cells = <1>;
  46. #size-cells = <1>;
  47. ranges;
  48. aic: interrupt-controller@fffff000 {
  49. #interrupt-cells = <3>;
  50. compatible = "atmel,at91rm9200-aic";
  51. interrupt-controller;
  52. reg = <0xfffff000 0x200>;
  53. atmel,external-irqs = <29 30 31>;
  54. };
  55. ramc0: ramc@ffffea00 {
  56. compatible = "atmel,at91sam9260-sdramc";
  57. reg = <0xffffea00 0x200>;
  58. };
  59. pmc: pmc@fffffc00 {
  60. compatible = "atmel,at91rm9200-pmc";
  61. reg = <0xfffffc00 0x100>;
  62. };
  63. rstc@fffffd00 {
  64. compatible = "atmel,at91sam9260-rstc";
  65. reg = <0xfffffd00 0x10>;
  66. };
  67. shdwc@fffffd10 {
  68. compatible = "atmel,at91sam9260-shdwc";
  69. reg = <0xfffffd10 0x10>;
  70. };
  71. pit: timer@fffffd30 {
  72. compatible = "atmel,at91sam9260-pit";
  73. reg = <0xfffffd30 0xf>;
  74. interrupts = <1 4 7>;
  75. };
  76. tcb0: timer@fffa0000 {
  77. compatible = "atmel,at91rm9200-tcb";
  78. reg = <0xfffa0000 0x100>;
  79. interrupts = <17 4 0 18 4 0 19 4 0>;
  80. };
  81. tcb1: timer@fffdc000 {
  82. compatible = "atmel,at91rm9200-tcb";
  83. reg = <0xfffdc000 0x100>;
  84. interrupts = <26 4 0 27 4 0 28 4 0>;
  85. };
  86. pinctrl@fffff400 {
  87. #address-cells = <1>;
  88. #size-cells = <1>;
  89. compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
  90. ranges = <0xfffff400 0xfffff400 0x600>;
  91. atmel,mux-mask = <
  92. /* A B */
  93. 0xffffffff 0xffc00c3b /* pioA */
  94. 0xffffffff 0x7fff3ccf /* pioB */
  95. 0xffffffff 0x007fffff /* pioC */
  96. >;
  97. /* shared pinctrl settings */
  98. dbgu {
  99. pinctrl_dbgu: dbgu-0 {
  100. atmel,pins =
  101. <1 14 0x1 0x0 /* PB14 periph A */
  102. 1 15 0x1 0x1>; /* PB15 periph with pullup */
  103. };
  104. };
  105. uart0 {
  106. pinctrl_uart0: uart0-0 {
  107. atmel,pins =
  108. <1 4 0x1 0x0 /* PB4 periph A */
  109. 1 5 0x1 0x0>; /* PB5 periph A */
  110. };
  111. pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
  112. atmel,pins =
  113. <1 26 0x1 0x0 /* PB26 periph A */
  114. 1 27 0x1 0x0>; /* PB27 periph A */
  115. };
  116. pinctrl_uart0_dtr_dsr: uart0_dtr_dsr-0 {
  117. atmel,pins =
  118. <1 24 0x1 0x0 /* PB24 periph A */
  119. 1 22 0x1 0x0>; /* PB22 periph A */
  120. };
  121. pinctrl_uart0_dcd: uart0_dcd-0 {
  122. atmel,pins =
  123. <1 23 0x1 0x0>; /* PB23 periph A */
  124. };
  125. pinctrl_uart0_ri: uart0_ri-0 {
  126. atmel,pins =
  127. <1 25 0x1 0x0>; /* PB25 periph A */
  128. };
  129. };
  130. uart1 {
  131. pinctrl_uart1: uart1-0 {
  132. atmel,pins =
  133. <2 6 0x1 0x1 /* PB6 periph A with pullup */
  134. 2 7 0x1 0x0>; /* PB7 periph A */
  135. };
  136. pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
  137. atmel,pins =
  138. <1 28 0x1 0x0 /* PB28 periph A */
  139. 1 29 0x1 0x0>; /* PB29 periph A */
  140. };
  141. };
  142. uart2 {
  143. pinctrl_uart2: uart2-0 {
  144. atmel,pins =
  145. <1 8 0x1 0x1 /* PB8 periph A with pullup */
  146. 1 9 0x1 0x0>; /* PB9 periph A */
  147. };
  148. pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
  149. atmel,pins =
  150. <0 4 0x1 0x0 /* PA4 periph A */
  151. 0 5 0x1 0x0>; /* PA5 periph A */
  152. };
  153. };
  154. uart3 {
  155. pinctrl_uart3: uart3-0 {
  156. atmel,pins =
  157. <2 10 0x1 0x1 /* PB10 periph A with pullup */
  158. 2 11 0x1 0x0>; /* PB11 periph A */
  159. };
  160. pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
  161. atmel,pins =
  162. <3 8 0x2 0x0 /* PB8 periph B */
  163. 3 10 0x2 0x0>; /* PB10 periph B */
  164. };
  165. };
  166. uart4 {
  167. pinctrl_uart4: uart4-0 {
  168. atmel,pins =
  169. <0 31 0x2 0x1 /* PA31 periph B with pullup */
  170. 0 30 0x2 0x0>; /* PA30 periph B */
  171. };
  172. };
  173. uart5 {
  174. pinctrl_uart5: uart5-0 {
  175. atmel,pins =
  176. <2 12 0x1 0x1 /* PB12 periph A with pullup */
  177. 2 13 0x1 0x0>; /* PB13 periph A */
  178. };
  179. };
  180. pioA: gpio@fffff400 {
  181. compatible = "atmel,at91rm9200-gpio";
  182. reg = <0xfffff400 0x200>;
  183. interrupts = <2 4 1>;
  184. #gpio-cells = <2>;
  185. gpio-controller;
  186. interrupt-controller;
  187. #interrupt-cells = <2>;
  188. };
  189. pioB: gpio@fffff600 {
  190. compatible = "atmel,at91rm9200-gpio";
  191. reg = <0xfffff600 0x200>;
  192. interrupts = <3 4 1>;
  193. #gpio-cells = <2>;
  194. gpio-controller;
  195. interrupt-controller;
  196. #interrupt-cells = <2>;
  197. };
  198. pioC: gpio@fffff800 {
  199. compatible = "atmel,at91rm9200-gpio";
  200. reg = <0xfffff800 0x200>;
  201. interrupts = <4 4 1>;
  202. #gpio-cells = <2>;
  203. gpio-controller;
  204. interrupt-controller;
  205. #interrupt-cells = <2>;
  206. };
  207. };
  208. dbgu: serial@fffff200 {
  209. compatible = "atmel,at91sam9260-usart";
  210. reg = <0xfffff200 0x200>;
  211. interrupts = <1 4 7>;
  212. pinctrl-names = "default";
  213. pinctrl-0 = <&pinctrl_dbgu>;
  214. status = "disabled";
  215. };
  216. usart0: serial@fffb0000 {
  217. compatible = "atmel,at91sam9260-usart";
  218. reg = <0xfffb0000 0x200>;
  219. interrupts = <6 4 5>;
  220. atmel,use-dma-rx;
  221. atmel,use-dma-tx;
  222. pinctrl-names = "default";
  223. pinctrl-0 = <&pinctrl_uart0>;
  224. status = "disabled";
  225. };
  226. usart1: serial@fffb4000 {
  227. compatible = "atmel,at91sam9260-usart";
  228. reg = <0xfffb4000 0x200>;
  229. interrupts = <7 4 5>;
  230. atmel,use-dma-rx;
  231. atmel,use-dma-tx;
  232. pinctrl-names = "default";
  233. pinctrl-0 = <&pinctrl_uart1>;
  234. status = "disabled";
  235. };
  236. usart2: serial@fffb8000 {
  237. compatible = "atmel,at91sam9260-usart";
  238. reg = <0xfffb8000 0x200>;
  239. interrupts = <8 4 5>;
  240. atmel,use-dma-rx;
  241. atmel,use-dma-tx;
  242. pinctrl-names = "default";
  243. pinctrl-0 = <&pinctrl_uart2>;
  244. status = "disabled";
  245. };
  246. usart3: serial@fffd0000 {
  247. compatible = "atmel,at91sam9260-usart";
  248. reg = <0xfffd0000 0x200>;
  249. interrupts = <23 4 5>;
  250. atmel,use-dma-rx;
  251. atmel,use-dma-tx;
  252. pinctrl-names = "default";
  253. pinctrl-0 = <&pinctrl_uart3>;
  254. status = "disabled";
  255. };
  256. usart4: serial@fffd4000 {
  257. compatible = "atmel,at91sam9260-usart";
  258. reg = <0xfffd4000 0x200>;
  259. interrupts = <24 4 5>;
  260. atmel,use-dma-rx;
  261. atmel,use-dma-tx;
  262. pinctrl-names = "default";
  263. pinctrl-0 = <&pinctrl_uart4>;
  264. status = "disabled";
  265. };
  266. usart5: serial@fffd8000 {
  267. compatible = "atmel,at91sam9260-usart";
  268. reg = <0xfffd8000 0x200>;
  269. interrupts = <25 4 5>;
  270. atmel,use-dma-rx;
  271. atmel,use-dma-tx;
  272. pinctrl-names = "default";
  273. pinctrl-0 = <&pinctrl_uart5>;
  274. status = "disabled";
  275. };
  276. macb0: ethernet@fffc4000 {
  277. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  278. reg = <0xfffc4000 0x100>;
  279. interrupts = <21 4 3>;
  280. status = "disabled";
  281. };
  282. usb1: gadget@fffa4000 {
  283. compatible = "atmel,at91rm9200-udc";
  284. reg = <0xfffa4000 0x4000>;
  285. interrupts = <10 4 2>;
  286. status = "disabled";
  287. };
  288. i2c0: i2c@fffac000 {
  289. compatible = "atmel,at91sam9260-i2c";
  290. reg = <0xfffac000 0x100>;
  291. interrupts = <11 4 6>;
  292. #address-cells = <1>;
  293. #size-cells = <0>;
  294. status = "disabled";
  295. };
  296. adc0: adc@fffe0000 {
  297. compatible = "atmel,at91sam9260-adc";
  298. reg = <0xfffe0000 0x100>;
  299. interrupts = <5 4 0>;
  300. atmel,adc-use-external-triggers;
  301. atmel,adc-channels-used = <0xf>;
  302. atmel,adc-vref = <3300>;
  303. atmel,adc-num-channels = <4>;
  304. atmel,adc-startup-time = <15>;
  305. atmel,adc-channel-base = <0x30>;
  306. atmel,adc-drdy-mask = <0x10000>;
  307. atmel,adc-status-register = <0x1c>;
  308. atmel,adc-trigger-register = <0x04>;
  309. trigger@0 {
  310. trigger-name = "timer-counter-0";
  311. trigger-value = <0x1>;
  312. };
  313. trigger@1 {
  314. trigger-name = "timer-counter-1";
  315. trigger-value = <0x3>;
  316. };
  317. trigger@2 {
  318. trigger-name = "timer-counter-2";
  319. trigger-value = <0x5>;
  320. };
  321. trigger@3 {
  322. trigger-name = "external";
  323. trigger-value = <0x13>;
  324. trigger-external;
  325. };
  326. };
  327. };
  328. nand0: nand@40000000 {
  329. compatible = "atmel,at91rm9200-nand";
  330. #address-cells = <1>;
  331. #size-cells = <1>;
  332. reg = <0x40000000 0x10000000
  333. 0xffffe800 0x200
  334. >;
  335. atmel,nand-addr-offset = <21>;
  336. atmel,nand-cmd-offset = <22>;
  337. gpios = <&pioC 13 0
  338. &pioC 14 0
  339. 0
  340. >;
  341. status = "disabled";
  342. };
  343. usb0: ohci@00500000 {
  344. compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  345. reg = <0x00500000 0x100000>;
  346. interrupts = <20 4 2>;
  347. status = "disabled";
  348. };
  349. };
  350. i2c@0 {
  351. compatible = "i2c-gpio";
  352. gpios = <&pioA 23 0 /* sda */
  353. &pioA 24 0 /* scl */
  354. >;
  355. i2c-gpio,sda-open-drain;
  356. i2c-gpio,scl-open-drain;
  357. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  358. #address-cells = <1>;
  359. #size-cells = <0>;
  360. status = "disabled";
  361. };
  362. };