process.c 8.1 KB

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  1. /*
  2. * Based on arch/arm/kernel/process.c
  3. *
  4. * Original Copyright (C) 1995 Linus Torvalds
  5. * Copyright (C) 1996-2000 Russell King - Converted to ARM.
  6. * Copyright (C) 2012 ARM Ltd.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include <stdarg.h>
  21. #include <linux/export.h>
  22. #include <linux/sched.h>
  23. #include <linux/kernel.h>
  24. #include <linux/mm.h>
  25. #include <linux/stddef.h>
  26. #include <linux/unistd.h>
  27. #include <linux/user.h>
  28. #include <linux/delay.h>
  29. #include <linux/reboot.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/kallsyms.h>
  32. #include <linux/init.h>
  33. #include <linux/cpu.h>
  34. #include <linux/elfcore.h>
  35. #include <linux/pm.h>
  36. #include <linux/tick.h>
  37. #include <linux/utsname.h>
  38. #include <linux/uaccess.h>
  39. #include <linux/random.h>
  40. #include <linux/hw_breakpoint.h>
  41. #include <linux/personality.h>
  42. #include <linux/notifier.h>
  43. #include <asm/compat.h>
  44. #include <asm/cacheflush.h>
  45. #include <asm/fpsimd.h>
  46. #include <asm/mmu_context.h>
  47. #include <asm/processor.h>
  48. #include <asm/stacktrace.h>
  49. static void setup_restart(void)
  50. {
  51. /*
  52. * Tell the mm system that we are going to reboot -
  53. * we may need it to insert some 1:1 mappings so that
  54. * soft boot works.
  55. */
  56. setup_mm_for_reboot();
  57. /* Clean and invalidate caches */
  58. flush_cache_all();
  59. /* Turn D-cache off */
  60. cpu_cache_off();
  61. /* Push out any further dirty data, and ensure cache is empty */
  62. flush_cache_all();
  63. }
  64. void soft_restart(unsigned long addr)
  65. {
  66. setup_restart();
  67. cpu_reset(addr);
  68. }
  69. /*
  70. * Function pointers to optional machine specific functions
  71. */
  72. void (*pm_power_off)(void);
  73. EXPORT_SYMBOL_GPL(pm_power_off);
  74. void (*pm_restart)(const char *cmd);
  75. EXPORT_SYMBOL_GPL(pm_restart);
  76. /*
  77. * This is our default idle handler.
  78. */
  79. static void default_idle(void)
  80. {
  81. /*
  82. * This should do all the clock switching and wait for interrupt
  83. * tricks
  84. */
  85. cpu_do_idle();
  86. local_irq_enable();
  87. }
  88. void (*pm_idle)(void) = default_idle;
  89. EXPORT_SYMBOL_GPL(pm_idle);
  90. /*
  91. * The idle thread, has rather strange semantics for calling pm_idle,
  92. * but this is what x86 does and we need to do the same, so that
  93. * things like cpuidle get called in the same way. The only difference
  94. * is that we always respect 'hlt_counter' to prevent low power idle.
  95. */
  96. void cpu_idle(void)
  97. {
  98. local_fiq_enable();
  99. /* endless idle loop with no priority at all */
  100. while (1) {
  101. tick_nohz_idle_enter();
  102. rcu_idle_enter();
  103. while (!need_resched()) {
  104. /*
  105. * We need to disable interrupts here to ensure
  106. * we don't miss a wakeup call.
  107. */
  108. local_irq_disable();
  109. if (!need_resched()) {
  110. stop_critical_timings();
  111. pm_idle();
  112. start_critical_timings();
  113. /*
  114. * pm_idle functions should always return
  115. * with IRQs enabled.
  116. */
  117. WARN_ON(irqs_disabled());
  118. } else {
  119. local_irq_enable();
  120. }
  121. }
  122. rcu_idle_exit();
  123. tick_nohz_idle_exit();
  124. schedule_preempt_disabled();
  125. }
  126. }
  127. void machine_shutdown(void)
  128. {
  129. #ifdef CONFIG_SMP
  130. smp_send_stop();
  131. #endif
  132. }
  133. void machine_halt(void)
  134. {
  135. machine_shutdown();
  136. while (1);
  137. }
  138. void machine_power_off(void)
  139. {
  140. machine_shutdown();
  141. if (pm_power_off)
  142. pm_power_off();
  143. }
  144. void machine_restart(char *cmd)
  145. {
  146. machine_shutdown();
  147. /* Disable interrupts first */
  148. local_irq_disable();
  149. local_fiq_disable();
  150. /* Now call the architecture specific reboot code. */
  151. if (pm_restart)
  152. pm_restart(cmd);
  153. /*
  154. * Whoops - the architecture was unable to reboot.
  155. */
  156. printk("Reboot failed -- System halted\n");
  157. while (1);
  158. }
  159. void __show_regs(struct pt_regs *regs)
  160. {
  161. int i;
  162. printk("CPU: %d %s (%s %.*s)\n",
  163. raw_smp_processor_id(), print_tainted(),
  164. init_utsname()->release,
  165. (int)strcspn(init_utsname()->version, " "),
  166. init_utsname()->version);
  167. print_symbol("PC is at %s\n", instruction_pointer(regs));
  168. print_symbol("LR is at %s\n", regs->regs[30]);
  169. printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
  170. regs->pc, regs->regs[30], regs->pstate);
  171. printk("sp : %016llx\n", regs->sp);
  172. for (i = 29; i >= 0; i--) {
  173. printk("x%-2d: %016llx ", i, regs->regs[i]);
  174. if (i % 2 == 0)
  175. printk("\n");
  176. }
  177. printk("\n");
  178. }
  179. void show_regs(struct pt_regs * regs)
  180. {
  181. printk("\n");
  182. printk("Pid: %d, comm: %20s\n", task_pid_nr(current), current->comm);
  183. __show_regs(regs);
  184. }
  185. /*
  186. * Free current thread data structures etc..
  187. */
  188. void exit_thread(void)
  189. {
  190. }
  191. void flush_thread(void)
  192. {
  193. fpsimd_flush_thread();
  194. flush_ptrace_hw_breakpoint(current);
  195. }
  196. void release_thread(struct task_struct *dead_task)
  197. {
  198. }
  199. int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
  200. {
  201. fpsimd_save_state(&current->thread.fpsimd_state);
  202. *dst = *src;
  203. return 0;
  204. }
  205. asmlinkage void ret_from_fork(void) asm("ret_from_fork");
  206. int copy_thread(unsigned long clone_flags, unsigned long stack_start,
  207. unsigned long stk_sz, struct task_struct *p)
  208. {
  209. struct pt_regs *childregs = task_pt_regs(p);
  210. unsigned long tls = p->thread.tp_value;
  211. memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
  212. if (likely(!(p->flags & PF_KTHREAD))) {
  213. *childregs = *current_pt_regs();
  214. childregs->regs[0] = 0;
  215. if (is_compat_thread(task_thread_info(p))) {
  216. if (stack_start)
  217. childregs->compat_sp = stack_start;
  218. } else {
  219. /*
  220. * Read the current TLS pointer from tpidr_el0 as it may be
  221. * out-of-sync with the saved value.
  222. */
  223. asm("mrs %0, tpidr_el0" : "=r" (tls));
  224. if (stack_start) {
  225. /* 16-byte aligned stack mandatory on AArch64 */
  226. if (stack_start & 15)
  227. return -EINVAL;
  228. childregs->sp = stack_start;
  229. }
  230. }
  231. /*
  232. * If a TLS pointer was passed to clone (4th argument), use it
  233. * for the new thread.
  234. */
  235. if (clone_flags & CLONE_SETTLS)
  236. tls = childregs->regs[3];
  237. } else {
  238. memset(childregs, 0, sizeof(struct pt_regs));
  239. childregs->pstate = PSR_MODE_EL1h;
  240. p->thread.cpu_context.x19 = stack_start;
  241. p->thread.cpu_context.x20 = stk_sz;
  242. }
  243. p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
  244. p->thread.cpu_context.sp = (unsigned long)childregs;
  245. p->thread.tp_value = tls;
  246. ptrace_hw_copy_thread(p);
  247. return 0;
  248. }
  249. static void tls_thread_switch(struct task_struct *next)
  250. {
  251. unsigned long tpidr, tpidrro;
  252. if (!is_compat_task()) {
  253. asm("mrs %0, tpidr_el0" : "=r" (tpidr));
  254. current->thread.tp_value = tpidr;
  255. }
  256. if (is_compat_thread(task_thread_info(next))) {
  257. tpidr = 0;
  258. tpidrro = next->thread.tp_value;
  259. } else {
  260. tpidr = next->thread.tp_value;
  261. tpidrro = 0;
  262. }
  263. asm(
  264. " msr tpidr_el0, %0\n"
  265. " msr tpidrro_el0, %1"
  266. : : "r" (tpidr), "r" (tpidrro));
  267. }
  268. /*
  269. * Thread switching.
  270. */
  271. struct task_struct *__switch_to(struct task_struct *prev,
  272. struct task_struct *next)
  273. {
  274. struct task_struct *last;
  275. fpsimd_thread_switch(next);
  276. tls_thread_switch(next);
  277. hw_breakpoint_thread_switch(next);
  278. /* the actual thread switch */
  279. last = cpu_switch_to(prev, next);
  280. contextidr_thread_switch(next);
  281. return last;
  282. }
  283. unsigned long get_wchan(struct task_struct *p)
  284. {
  285. struct stackframe frame;
  286. int count = 0;
  287. if (!p || p == current || p->state == TASK_RUNNING)
  288. return 0;
  289. frame.fp = thread_saved_fp(p);
  290. frame.sp = thread_saved_sp(p);
  291. frame.pc = thread_saved_pc(p);
  292. do {
  293. int ret = unwind_frame(&frame);
  294. if (ret < 0)
  295. return 0;
  296. if (!in_sched_functions(frame.pc))
  297. return frame.pc;
  298. } while (count ++ < 16);
  299. return 0;
  300. }
  301. unsigned long arch_align_stack(unsigned long sp)
  302. {
  303. if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
  304. sp -= get_random_int() & ~PAGE_MASK;
  305. return sp & ~0xf;
  306. }
  307. static unsigned long randomize_base(unsigned long base)
  308. {
  309. unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1;
  310. return randomize_range(base, range_end, 0) ? : base;
  311. }
  312. unsigned long arch_randomize_brk(struct mm_struct *mm)
  313. {
  314. return randomize_base(mm->brk);
  315. }
  316. unsigned long randomize_et_dyn(unsigned long base)
  317. {
  318. return randomize_base(base);
  319. }