nouveau_fence.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619
  1. /*
  2. * Copyright (C) 2007 Ben Skeggs.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include "drmP.h"
  27. #include "drm.h"
  28. #include "nouveau_drv.h"
  29. #include "nouveau_ramht.h"
  30. #include "nouveau_dma.h"
  31. #define USE_REFCNT(dev) (nouveau_private(dev)->chipset >= 0x10)
  32. #define USE_SEMA(dev) (nouveau_private(dev)->chipset >= 0x17)
  33. struct nouveau_fence {
  34. struct nouveau_channel *channel;
  35. struct kref refcount;
  36. struct list_head entry;
  37. uint32_t sequence;
  38. bool signalled;
  39. void (*work)(void *priv, bool signalled);
  40. void *priv;
  41. };
  42. struct nouveau_semaphore {
  43. struct kref ref;
  44. struct drm_device *dev;
  45. struct drm_mm_node *mem;
  46. };
  47. static inline struct nouveau_fence *
  48. nouveau_fence(void *sync_obj)
  49. {
  50. return (struct nouveau_fence *)sync_obj;
  51. }
  52. static void
  53. nouveau_fence_del(struct kref *ref)
  54. {
  55. struct nouveau_fence *fence =
  56. container_of(ref, struct nouveau_fence, refcount);
  57. nouveau_channel_ref(NULL, &fence->channel);
  58. kfree(fence);
  59. }
  60. void
  61. nouveau_fence_update(struct nouveau_channel *chan)
  62. {
  63. struct drm_device *dev = chan->dev;
  64. struct nouveau_fence *tmp, *fence;
  65. uint32_t sequence;
  66. spin_lock(&chan->fence.lock);
  67. /* Fetch the last sequence if the channel is still up and running */
  68. if (likely(!list_empty(&chan->fence.pending))) {
  69. if (USE_REFCNT(dev))
  70. sequence = nvchan_rd32(chan, 0x48);
  71. else
  72. sequence = atomic_read(&chan->fence.last_sequence_irq);
  73. if (chan->fence.sequence_ack == sequence)
  74. goto out;
  75. chan->fence.sequence_ack = sequence;
  76. }
  77. list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
  78. sequence = fence->sequence;
  79. fence->signalled = true;
  80. list_del(&fence->entry);
  81. if (unlikely(fence->work))
  82. fence->work(fence->priv, true);
  83. kref_put(&fence->refcount, nouveau_fence_del);
  84. if (sequence == chan->fence.sequence_ack)
  85. break;
  86. }
  87. out:
  88. spin_unlock(&chan->fence.lock);
  89. }
  90. int
  91. nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **pfence,
  92. bool emit)
  93. {
  94. struct nouveau_fence *fence;
  95. int ret = 0;
  96. fence = kzalloc(sizeof(*fence), GFP_KERNEL);
  97. if (!fence)
  98. return -ENOMEM;
  99. kref_init(&fence->refcount);
  100. nouveau_channel_ref(chan, &fence->channel);
  101. if (emit)
  102. ret = nouveau_fence_emit(fence);
  103. if (ret)
  104. nouveau_fence_unref(&fence);
  105. *pfence = fence;
  106. return ret;
  107. }
  108. struct nouveau_channel *
  109. nouveau_fence_channel(struct nouveau_fence *fence)
  110. {
  111. return fence ? nouveau_channel_get_unlocked(fence->channel) : NULL;
  112. }
  113. int
  114. nouveau_fence_emit(struct nouveau_fence *fence)
  115. {
  116. struct nouveau_channel *chan = fence->channel;
  117. struct drm_device *dev = chan->dev;
  118. struct drm_nouveau_private *dev_priv = dev->dev_private;
  119. int ret;
  120. ret = RING_SPACE(chan, 2);
  121. if (ret)
  122. return ret;
  123. if (unlikely(chan->fence.sequence == chan->fence.sequence_ack - 1)) {
  124. nouveau_fence_update(chan);
  125. BUG_ON(chan->fence.sequence ==
  126. chan->fence.sequence_ack - 1);
  127. }
  128. fence->sequence = ++chan->fence.sequence;
  129. kref_get(&fence->refcount);
  130. spin_lock(&chan->fence.lock);
  131. list_add_tail(&fence->entry, &chan->fence.pending);
  132. spin_unlock(&chan->fence.lock);
  133. if (USE_REFCNT(dev)) {
  134. if (dev_priv->card_type < NV_C0)
  135. BEGIN_RING(chan, NvSubSw, 0x0050, 1);
  136. else
  137. BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0050, 1);
  138. } else {
  139. BEGIN_RING(chan, NvSubSw, 0x0150, 1);
  140. }
  141. OUT_RING (chan, fence->sequence);
  142. FIRE_RING(chan);
  143. return 0;
  144. }
  145. void
  146. nouveau_fence_work(struct nouveau_fence *fence,
  147. void (*work)(void *priv, bool signalled),
  148. void *priv)
  149. {
  150. BUG_ON(fence->work);
  151. spin_lock(&fence->channel->fence.lock);
  152. if (fence->signalled) {
  153. work(priv, true);
  154. } else {
  155. fence->work = work;
  156. fence->priv = priv;
  157. }
  158. spin_unlock(&fence->channel->fence.lock);
  159. }
  160. void
  161. __nouveau_fence_unref(void **sync_obj)
  162. {
  163. struct nouveau_fence *fence = nouveau_fence(*sync_obj);
  164. if (fence)
  165. kref_put(&fence->refcount, nouveau_fence_del);
  166. *sync_obj = NULL;
  167. }
  168. void *
  169. __nouveau_fence_ref(void *sync_obj)
  170. {
  171. struct nouveau_fence *fence = nouveau_fence(sync_obj);
  172. kref_get(&fence->refcount);
  173. return sync_obj;
  174. }
  175. bool
  176. __nouveau_fence_signalled(void *sync_obj, void *sync_arg)
  177. {
  178. struct nouveau_fence *fence = nouveau_fence(sync_obj);
  179. struct nouveau_channel *chan = fence->channel;
  180. if (fence->signalled)
  181. return true;
  182. nouveau_fence_update(chan);
  183. return fence->signalled;
  184. }
  185. int
  186. __nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)
  187. {
  188. unsigned long timeout = jiffies + (3 * DRM_HZ);
  189. unsigned long sleep_time = jiffies + 1;
  190. int ret = 0;
  191. while (1) {
  192. if (__nouveau_fence_signalled(sync_obj, sync_arg))
  193. break;
  194. if (time_after_eq(jiffies, timeout)) {
  195. ret = -EBUSY;
  196. break;
  197. }
  198. __set_current_state(intr ? TASK_INTERRUPTIBLE
  199. : TASK_UNINTERRUPTIBLE);
  200. if (lazy && time_after_eq(jiffies, sleep_time))
  201. schedule_timeout(1);
  202. if (intr && signal_pending(current)) {
  203. ret = -ERESTARTSYS;
  204. break;
  205. }
  206. }
  207. __set_current_state(TASK_RUNNING);
  208. return ret;
  209. }
  210. static struct nouveau_semaphore *
  211. semaphore_alloc(struct drm_device *dev)
  212. {
  213. struct drm_nouveau_private *dev_priv = dev->dev_private;
  214. struct nouveau_semaphore *sema;
  215. int size = (dev_priv->chipset < 0x84) ? 4 : 16;
  216. int ret, i;
  217. if (!USE_SEMA(dev))
  218. return NULL;
  219. sema = kmalloc(sizeof(*sema), GFP_KERNEL);
  220. if (!sema)
  221. goto fail;
  222. ret = drm_mm_pre_get(&dev_priv->fence.heap);
  223. if (ret)
  224. goto fail;
  225. spin_lock(&dev_priv->fence.lock);
  226. sema->mem = drm_mm_search_free(&dev_priv->fence.heap, size, 0, 0);
  227. if (sema->mem)
  228. sema->mem = drm_mm_get_block_atomic(sema->mem, size, 0);
  229. spin_unlock(&dev_priv->fence.lock);
  230. if (!sema->mem)
  231. goto fail;
  232. kref_init(&sema->ref);
  233. sema->dev = dev;
  234. for (i = sema->mem->start; i < sema->mem->start + size; i += 4)
  235. nouveau_bo_wr32(dev_priv->fence.bo, i / 4, 0);
  236. return sema;
  237. fail:
  238. kfree(sema);
  239. return NULL;
  240. }
  241. static void
  242. semaphore_free(struct kref *ref)
  243. {
  244. struct nouveau_semaphore *sema =
  245. container_of(ref, struct nouveau_semaphore, ref);
  246. struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
  247. spin_lock(&dev_priv->fence.lock);
  248. drm_mm_put_block(sema->mem);
  249. spin_unlock(&dev_priv->fence.lock);
  250. kfree(sema);
  251. }
  252. static void
  253. semaphore_work(void *priv, bool signalled)
  254. {
  255. struct nouveau_semaphore *sema = priv;
  256. struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
  257. if (unlikely(!signalled))
  258. nouveau_bo_wr32(dev_priv->fence.bo, sema->mem->start / 4, 1);
  259. kref_put(&sema->ref, semaphore_free);
  260. }
  261. static int
  262. semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
  263. {
  264. struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
  265. struct nouveau_fence *fence = NULL;
  266. int ret;
  267. if (dev_priv->chipset < 0x84) {
  268. ret = RING_SPACE(chan, 3);
  269. if (ret)
  270. return ret;
  271. BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_OFFSET, 2);
  272. OUT_RING (chan, sema->mem->start);
  273. OUT_RING (chan, 1);
  274. } else
  275. if (dev_priv->chipset < 0xc0) {
  276. struct nouveau_vma *vma = &dev_priv->fence.bo->vma;
  277. u64 offset = vma->offset + sema->mem->start;
  278. ret = RING_SPACE(chan, 5);
  279. if (ret)
  280. return ret;
  281. BEGIN_RING(chan, NvSubSw, 0x0010, 4);
  282. OUT_RING (chan, upper_32_bits(offset));
  283. OUT_RING (chan, lower_32_bits(offset));
  284. OUT_RING (chan, 1);
  285. OUT_RING (chan, 1); /* ACQUIRE_EQ */
  286. } else {
  287. struct nouveau_vma *vma = &dev_priv->fence.bo->vma;
  288. u64 offset = vma->offset + sema->mem->start;
  289. ret = RING_SPACE(chan, 5);
  290. if (ret)
  291. return ret;
  292. BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0010, 4);
  293. OUT_RING (chan, upper_32_bits(offset));
  294. OUT_RING (chan, lower_32_bits(offset));
  295. OUT_RING (chan, 1);
  296. OUT_RING (chan, 0x1001); /* ACQUIRE_EQ */
  297. }
  298. /* Delay semaphore destruction until its work is done */
  299. ret = nouveau_fence_new(chan, &fence, true);
  300. if (ret)
  301. return ret;
  302. kref_get(&sema->ref);
  303. nouveau_fence_work(fence, semaphore_work, sema);
  304. nouveau_fence_unref(&fence);
  305. return 0;
  306. }
  307. static int
  308. semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
  309. {
  310. struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
  311. struct nouveau_fence *fence = NULL;
  312. int ret;
  313. if (dev_priv->chipset < 0x84) {
  314. ret = RING_SPACE(chan, 4);
  315. if (ret)
  316. return ret;
  317. BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_OFFSET, 1);
  318. OUT_RING (chan, sema->mem->start);
  319. BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_RELEASE, 1);
  320. OUT_RING (chan, 1);
  321. } else
  322. if (dev_priv->chipset < 0xc0) {
  323. struct nouveau_vma *vma = &dev_priv->fence.bo->vma;
  324. u64 offset = vma->offset + sema->mem->start;
  325. ret = RING_SPACE(chan, 5);
  326. if (ret)
  327. return ret;
  328. BEGIN_RING(chan, NvSubSw, 0x0010, 4);
  329. OUT_RING (chan, upper_32_bits(offset));
  330. OUT_RING (chan, lower_32_bits(offset));
  331. OUT_RING (chan, 1);
  332. OUT_RING (chan, 2); /* RELEASE */
  333. } else {
  334. struct nouveau_vma *vma = &dev_priv->fence.bo->vma;
  335. u64 offset = vma->offset + sema->mem->start;
  336. ret = RING_SPACE(chan, 5);
  337. if (ret)
  338. return ret;
  339. BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0010, 4);
  340. OUT_RING (chan, upper_32_bits(offset));
  341. OUT_RING (chan, lower_32_bits(offset));
  342. OUT_RING (chan, 1);
  343. OUT_RING (chan, 0x1002); /* RELEASE */
  344. }
  345. /* Delay semaphore destruction until its work is done */
  346. ret = nouveau_fence_new(chan, &fence, true);
  347. if (ret)
  348. return ret;
  349. kref_get(&sema->ref);
  350. nouveau_fence_work(fence, semaphore_work, sema);
  351. nouveau_fence_unref(&fence);
  352. return 0;
  353. }
  354. int
  355. nouveau_fence_sync(struct nouveau_fence *fence,
  356. struct nouveau_channel *wchan)
  357. {
  358. struct nouveau_channel *chan = nouveau_fence_channel(fence);
  359. struct drm_device *dev = wchan->dev;
  360. struct nouveau_semaphore *sema;
  361. int ret = 0;
  362. if (likely(!chan || chan == wchan ||
  363. nouveau_fence_signalled(fence)))
  364. goto out;
  365. sema = semaphore_alloc(dev);
  366. if (!sema) {
  367. /* Early card or broken userspace, fall back to
  368. * software sync. */
  369. ret = nouveau_fence_wait(fence, true, false);
  370. goto out;
  371. }
  372. /* try to take chan's mutex, if we can't take it right away
  373. * we have to fallback to software sync to prevent locking
  374. * order issues
  375. */
  376. if (!mutex_trylock(&chan->mutex)) {
  377. ret = nouveau_fence_wait(fence, true, false);
  378. goto out_unref;
  379. }
  380. /* Make wchan wait until it gets signalled */
  381. ret = semaphore_acquire(wchan, sema);
  382. if (ret)
  383. goto out_unlock;
  384. /* Signal the semaphore from chan */
  385. ret = semaphore_release(chan, sema);
  386. out_unlock:
  387. mutex_unlock(&chan->mutex);
  388. out_unref:
  389. kref_put(&sema->ref, semaphore_free);
  390. out:
  391. if (chan)
  392. nouveau_channel_put_unlocked(&chan);
  393. return ret;
  394. }
  395. int
  396. __nouveau_fence_flush(void *sync_obj, void *sync_arg)
  397. {
  398. return 0;
  399. }
  400. int
  401. nouveau_fence_channel_init(struct nouveau_channel *chan)
  402. {
  403. struct drm_device *dev = chan->dev;
  404. struct drm_nouveau_private *dev_priv = dev->dev_private;
  405. struct nouveau_gpuobj *obj = NULL;
  406. int ret;
  407. if (dev_priv->card_type >= NV_C0)
  408. goto out_initialised;
  409. /* Create an NV_SW object for various sync purposes */
  410. ret = nouveau_gpuobj_gr_new(chan, NvSw, NV_SW);
  411. if (ret)
  412. return ret;
  413. /* we leave subchannel empty for nvc0 */
  414. ret = RING_SPACE(chan, 2);
  415. if (ret)
  416. return ret;
  417. BEGIN_RING(chan, NvSubSw, 0, 1);
  418. OUT_RING(chan, NvSw);
  419. /* Create a DMA object for the shared cross-channel sync area. */
  420. if (USE_SEMA(dev) && dev_priv->chipset < 0x84) {
  421. struct ttm_mem_reg *mem = &dev_priv->fence.bo->bo.mem;
  422. ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
  423. mem->start << PAGE_SHIFT,
  424. mem->size, NV_MEM_ACCESS_RW,
  425. NV_MEM_TARGET_VRAM, &obj);
  426. if (ret)
  427. return ret;
  428. ret = nouveau_ramht_insert(chan, NvSema, obj);
  429. nouveau_gpuobj_ref(NULL, &obj);
  430. if (ret)
  431. return ret;
  432. ret = RING_SPACE(chan, 2);
  433. if (ret)
  434. return ret;
  435. BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
  436. OUT_RING(chan, NvSema);
  437. } else {
  438. ret = RING_SPACE(chan, 2);
  439. if (ret)
  440. return ret;
  441. BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
  442. OUT_RING (chan, chan->vram_handle); /* whole VM */
  443. }
  444. FIRE_RING(chan);
  445. out_initialised:
  446. INIT_LIST_HEAD(&chan->fence.pending);
  447. spin_lock_init(&chan->fence.lock);
  448. atomic_set(&chan->fence.last_sequence_irq, 0);
  449. return 0;
  450. }
  451. void
  452. nouveau_fence_channel_fini(struct nouveau_channel *chan)
  453. {
  454. struct nouveau_fence *tmp, *fence;
  455. spin_lock(&chan->fence.lock);
  456. list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
  457. fence->signalled = true;
  458. list_del(&fence->entry);
  459. if (unlikely(fence->work))
  460. fence->work(fence->priv, false);
  461. kref_put(&fence->refcount, nouveau_fence_del);
  462. }
  463. spin_unlock(&chan->fence.lock);
  464. }
  465. int
  466. nouveau_fence_init(struct drm_device *dev)
  467. {
  468. struct drm_nouveau_private *dev_priv = dev->dev_private;
  469. int size = (dev_priv->chipset < 0x84) ? 4096 : 16384;
  470. int ret;
  471. /* Create a shared VRAM heap for cross-channel sync. */
  472. if (USE_SEMA(dev)) {
  473. ret = nouveau_bo_new(dev, NULL, size, 0, TTM_PL_FLAG_VRAM,
  474. 0, 0, false, true, &dev_priv->fence.bo);
  475. if (ret)
  476. return ret;
  477. ret = nouveau_bo_pin(dev_priv->fence.bo, TTM_PL_FLAG_VRAM);
  478. if (ret)
  479. goto fail;
  480. ret = nouveau_bo_map(dev_priv->fence.bo);
  481. if (ret)
  482. goto fail;
  483. ret = drm_mm_init(&dev_priv->fence.heap, 0,
  484. dev_priv->fence.bo->bo.mem.size);
  485. if (ret)
  486. goto fail;
  487. spin_lock_init(&dev_priv->fence.lock);
  488. }
  489. return 0;
  490. fail:
  491. nouveau_bo_unmap(dev_priv->fence.bo);
  492. nouveau_bo_ref(NULL, &dev_priv->fence.bo);
  493. return ret;
  494. }
  495. void
  496. nouveau_fence_fini(struct drm_device *dev)
  497. {
  498. struct drm_nouveau_private *dev_priv = dev->dev_private;
  499. if (USE_SEMA(dev)) {
  500. drm_mm_takedown(&dev_priv->fence.heap);
  501. nouveau_bo_unmap(dev_priv->fence.bo);
  502. nouveau_bo_unpin(dev_priv->fence.bo);
  503. nouveau_bo_ref(NULL, &dev_priv->fence.bo);
  504. }
  505. }