sh_mobile_lcdcfb.c 43 KB

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  1. /*
  2. * SuperH Mobile LCDC Framebuffer
  3. *
  4. * Copyright (c) 2008 Magnus Damm
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/delay.h>
  13. #include <linux/mm.h>
  14. #include <linux/clk.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/vmalloc.h>
  20. #include <linux/ioctl.h>
  21. #include <linux/slab.h>
  22. #include <linux/console.h>
  23. #include <linux/backlight.h>
  24. #include <linux/gpio.h>
  25. #include <video/sh_mobile_lcdc.h>
  26. #include <linux/atomic.h>
  27. #include "sh_mobile_lcdcfb.h"
  28. #include "sh_mobile_meram.h"
  29. #define SIDE_B_OFFSET 0x1000
  30. #define MIRROR_OFFSET 0x2000
  31. /* shared registers */
  32. #define _LDDCKR 0x410
  33. #define _LDDCKSTPR 0x414
  34. #define _LDINTR 0x468
  35. #define _LDSR 0x46c
  36. #define _LDCNT1R 0x470
  37. #define _LDCNT2R 0x474
  38. #define _LDRCNTR 0x478
  39. #define _LDDDSR 0x47c
  40. #define _LDDWD0R 0x800
  41. #define _LDDRDR 0x840
  42. #define _LDDWAR 0x900
  43. #define _LDDRAR 0x904
  44. /* shared registers and their order for context save/restore */
  45. static int lcdc_shared_regs[] = {
  46. _LDDCKR,
  47. _LDDCKSTPR,
  48. _LDINTR,
  49. _LDDDSR,
  50. _LDCNT1R,
  51. _LDCNT2R,
  52. };
  53. #define NR_SHARED_REGS ARRAY_SIZE(lcdc_shared_regs)
  54. #define MAX_XRES 1920
  55. #define MAX_YRES 1080
  56. static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
  57. [LDDCKPAT1R] = 0x400,
  58. [LDDCKPAT2R] = 0x404,
  59. [LDMT1R] = 0x418,
  60. [LDMT2R] = 0x41c,
  61. [LDMT3R] = 0x420,
  62. [LDDFR] = 0x424,
  63. [LDSM1R] = 0x428,
  64. [LDSM2R] = 0x42c,
  65. [LDSA1R] = 0x430,
  66. [LDSA2R] = 0x434,
  67. [LDMLSR] = 0x438,
  68. [LDHCNR] = 0x448,
  69. [LDHSYNR] = 0x44c,
  70. [LDVLNR] = 0x450,
  71. [LDVSYNR] = 0x454,
  72. [LDPMR] = 0x460,
  73. [LDHAJR] = 0x4a0,
  74. };
  75. static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
  76. [LDDCKPAT1R] = 0x408,
  77. [LDDCKPAT2R] = 0x40c,
  78. [LDMT1R] = 0x600,
  79. [LDMT2R] = 0x604,
  80. [LDMT3R] = 0x608,
  81. [LDDFR] = 0x60c,
  82. [LDSM1R] = 0x610,
  83. [LDSM2R] = 0x614,
  84. [LDSA1R] = 0x618,
  85. [LDMLSR] = 0x620,
  86. [LDHCNR] = 0x624,
  87. [LDHSYNR] = 0x628,
  88. [LDVLNR] = 0x62c,
  89. [LDVSYNR] = 0x630,
  90. [LDPMR] = 0x63c,
  91. };
  92. #define START_LCDC 0x00000001
  93. #define LCDC_RESET 0x00000100
  94. #define DISPLAY_BEU 0x00000008
  95. #define LCDC_ENABLE 0x00000001
  96. #define LDINTR_FE 0x00000400
  97. #define LDINTR_VSE 0x00000200
  98. #define LDINTR_VEE 0x00000100
  99. #define LDINTR_FS 0x00000004
  100. #define LDINTR_VSS 0x00000002
  101. #define LDINTR_VES 0x00000001
  102. #define LDRCNTR_SRS 0x00020000
  103. #define LDRCNTR_SRC 0x00010000
  104. #define LDRCNTR_MRS 0x00000002
  105. #define LDRCNTR_MRC 0x00000001
  106. #define LDSR_MRS 0x00000100
  107. static const struct fb_videomode default_720p = {
  108. .name = "HDMI 720p",
  109. .xres = 1280,
  110. .yres = 720,
  111. .left_margin = 220,
  112. .right_margin = 110,
  113. .hsync_len = 40,
  114. .upper_margin = 20,
  115. .lower_margin = 5,
  116. .vsync_len = 5,
  117. .pixclock = 13468,
  118. .refresh = 60,
  119. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  120. };
  121. struct sh_mobile_lcdc_priv {
  122. void __iomem *base;
  123. int irq;
  124. atomic_t hw_usecnt;
  125. struct device *dev;
  126. struct clk *dot_clk;
  127. unsigned long lddckr;
  128. struct sh_mobile_lcdc_chan ch[2];
  129. struct notifier_block notifier;
  130. unsigned long saved_shared_regs[NR_SHARED_REGS];
  131. int started;
  132. int forced_bpp; /* 2 channel LCDC must share bpp setting */
  133. struct sh_mobile_meram_info *meram_dev;
  134. };
  135. static bool banked(int reg_nr)
  136. {
  137. switch (reg_nr) {
  138. case LDMT1R:
  139. case LDMT2R:
  140. case LDMT3R:
  141. case LDDFR:
  142. case LDSM1R:
  143. case LDSA1R:
  144. case LDSA2R:
  145. case LDMLSR:
  146. case LDHCNR:
  147. case LDHSYNR:
  148. case LDVLNR:
  149. case LDVSYNR:
  150. return true;
  151. }
  152. return false;
  153. }
  154. static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
  155. int reg_nr, unsigned long data)
  156. {
  157. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
  158. if (banked(reg_nr))
  159. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
  160. SIDE_B_OFFSET);
  161. }
  162. static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
  163. int reg_nr, unsigned long data)
  164. {
  165. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
  166. MIRROR_OFFSET);
  167. }
  168. static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
  169. int reg_nr)
  170. {
  171. return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
  172. }
  173. static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
  174. unsigned long reg_offs, unsigned long data)
  175. {
  176. iowrite32(data, priv->base + reg_offs);
  177. }
  178. static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
  179. unsigned long reg_offs)
  180. {
  181. return ioread32(priv->base + reg_offs);
  182. }
  183. static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
  184. unsigned long reg_offs,
  185. unsigned long mask, unsigned long until)
  186. {
  187. while ((lcdc_read(priv, reg_offs) & mask) != until)
  188. cpu_relax();
  189. }
  190. static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
  191. {
  192. return chan->cfg.chan == LCDC_CHAN_SUBLCD;
  193. }
  194. static void lcdc_sys_write_index(void *handle, unsigned long data)
  195. {
  196. struct sh_mobile_lcdc_chan *ch = handle;
  197. lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000);
  198. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  199. lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  200. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  201. }
  202. static void lcdc_sys_write_data(void *handle, unsigned long data)
  203. {
  204. struct sh_mobile_lcdc_chan *ch = handle;
  205. lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000);
  206. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  207. lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  208. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  209. }
  210. static unsigned long lcdc_sys_read_data(void *handle)
  211. {
  212. struct sh_mobile_lcdc_chan *ch = handle;
  213. lcdc_write(ch->lcdc, _LDDRDR, 0x01000000);
  214. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  215. lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  216. udelay(1);
  217. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  218. return lcdc_read(ch->lcdc, _LDDRDR) & 0x3ffff;
  219. }
  220. struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
  221. lcdc_sys_write_index,
  222. lcdc_sys_write_data,
  223. lcdc_sys_read_data,
  224. };
  225. static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
  226. {
  227. if (atomic_inc_and_test(&priv->hw_usecnt)) {
  228. pm_runtime_get_sync(priv->dev);
  229. if (priv->dot_clk)
  230. clk_enable(priv->dot_clk);
  231. if (priv->meram_dev && priv->meram_dev->pdev)
  232. pm_runtime_get_sync(&priv->meram_dev->pdev->dev);
  233. }
  234. }
  235. static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
  236. {
  237. if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
  238. if (priv->dot_clk)
  239. clk_disable(priv->dot_clk);
  240. if (priv->meram_dev && priv->meram_dev->pdev)
  241. pm_runtime_put_sync(&priv->meram_dev->pdev->dev);
  242. pm_runtime_put(priv->dev);
  243. }
  244. }
  245. static int sh_mobile_lcdc_sginit(struct fb_info *info,
  246. struct list_head *pagelist)
  247. {
  248. struct sh_mobile_lcdc_chan *ch = info->par;
  249. unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT;
  250. struct page *page;
  251. int nr_pages = 0;
  252. sg_init_table(ch->sglist, nr_pages_max);
  253. list_for_each_entry(page, pagelist, lru)
  254. sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
  255. return nr_pages;
  256. }
  257. static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
  258. struct list_head *pagelist)
  259. {
  260. struct sh_mobile_lcdc_chan *ch = info->par;
  261. struct sh_mobile_lcdc_board_cfg *bcfg = &ch->cfg.board_cfg;
  262. /* enable clocks before accessing hardware */
  263. sh_mobile_lcdc_clk_on(ch->lcdc);
  264. /*
  265. * It's possible to get here without anything on the pagelist via
  266. * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
  267. * invocation. In the former case, the acceleration routines are
  268. * stepped in to when using the framebuffer console causing the
  269. * workqueue to be scheduled without any dirty pages on the list.
  270. *
  271. * Despite this, a panel update is still needed given that the
  272. * acceleration routines have their own methods for writing in
  273. * that still need to be updated.
  274. *
  275. * The fsync() and empty pagelist case could be optimized for,
  276. * but we don't bother, as any application exhibiting such
  277. * behaviour is fundamentally broken anyways.
  278. */
  279. if (!list_empty(pagelist)) {
  280. unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
  281. /* trigger panel update */
  282. dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
  283. if (bcfg->start_transfer)
  284. bcfg->start_transfer(bcfg->board_data, ch,
  285. &sh_mobile_lcdc_sys_bus_ops);
  286. lcdc_write_chan(ch, LDSM2R, 1);
  287. dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
  288. } else {
  289. if (bcfg->start_transfer)
  290. bcfg->start_transfer(bcfg->board_data, ch,
  291. &sh_mobile_lcdc_sys_bus_ops);
  292. lcdc_write_chan(ch, LDSM2R, 1);
  293. }
  294. }
  295. static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
  296. {
  297. struct fb_deferred_io *fbdefio = info->fbdefio;
  298. if (fbdefio)
  299. schedule_delayed_work(&info->deferred_work, fbdefio->delay);
  300. }
  301. static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
  302. {
  303. struct sh_mobile_lcdc_priv *priv = data;
  304. struct sh_mobile_lcdc_chan *ch;
  305. unsigned long tmp;
  306. unsigned long ldintr;
  307. int is_sub;
  308. int k;
  309. /* acknowledge interrupt */
  310. ldintr = tmp = lcdc_read(priv, _LDINTR);
  311. /*
  312. * disable further VSYNC End IRQs, preserve all other enabled IRQs,
  313. * write 0 to bits 0-6 to ack all triggered IRQs.
  314. */
  315. tmp &= 0xffffff00 & ~LDINTR_VEE;
  316. lcdc_write(priv, _LDINTR, tmp);
  317. /* figure out if this interrupt is for main or sub lcd */
  318. is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0;
  319. /* wake up channel and disable clocks */
  320. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  321. ch = &priv->ch[k];
  322. if (!ch->enabled)
  323. continue;
  324. /* Frame Start */
  325. if (ldintr & LDINTR_FS) {
  326. if (is_sub == lcdc_chan_is_sublcd(ch)) {
  327. ch->frame_end = 1;
  328. wake_up(&ch->frame_end_wait);
  329. sh_mobile_lcdc_clk_off(priv);
  330. }
  331. }
  332. /* VSYNC End */
  333. if (ldintr & LDINTR_VES)
  334. complete(&ch->vsync_completion);
  335. }
  336. return IRQ_HANDLED;
  337. }
  338. static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
  339. int start)
  340. {
  341. unsigned long tmp = lcdc_read(priv, _LDCNT2R);
  342. int k;
  343. /* start or stop the lcdc */
  344. if (start)
  345. lcdc_write(priv, _LDCNT2R, tmp | START_LCDC);
  346. else
  347. lcdc_write(priv, _LDCNT2R, tmp & ~START_LCDC);
  348. /* wait until power is applied/stopped on all channels */
  349. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  350. if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
  351. while (1) {
  352. tmp = lcdc_read_chan(&priv->ch[k], LDPMR) & 3;
  353. if (start && tmp == 3)
  354. break;
  355. if (!start && tmp == 0)
  356. break;
  357. cpu_relax();
  358. }
  359. if (!start)
  360. lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
  361. }
  362. static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
  363. {
  364. struct fb_var_screeninfo *var = &ch->info->var, *display_var = &ch->display_var;
  365. unsigned long h_total, hsync_pos, display_h_total;
  366. u32 tmp;
  367. tmp = ch->ldmt1r_value;
  368. tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1 << 28;
  369. tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1 << 27;
  370. tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? 1 << 26 : 0;
  371. tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? 1 << 25 : 0;
  372. tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? 1 << 24 : 0;
  373. tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? 1 << 17 : 0;
  374. tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? 1 << 16 : 0;
  375. lcdc_write_chan(ch, LDMT1R, tmp);
  376. /* setup SYS bus */
  377. lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
  378. lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
  379. /* horizontal configuration */
  380. h_total = display_var->xres + display_var->hsync_len +
  381. display_var->left_margin + display_var->right_margin;
  382. tmp = h_total / 8; /* HTCN */
  383. tmp |= (min(display_var->xres, var->xres) / 8) << 16; /* HDCN */
  384. lcdc_write_chan(ch, LDHCNR, tmp);
  385. hsync_pos = display_var->xres + display_var->right_margin;
  386. tmp = hsync_pos / 8; /* HSYNP */
  387. tmp |= (display_var->hsync_len / 8) << 16; /* HSYNW */
  388. lcdc_write_chan(ch, LDHSYNR, tmp);
  389. /* vertical configuration */
  390. tmp = display_var->yres + display_var->vsync_len +
  391. display_var->upper_margin + display_var->lower_margin; /* VTLN */
  392. tmp |= min(display_var->yres, var->yres) << 16; /* VDLN */
  393. lcdc_write_chan(ch, LDVLNR, tmp);
  394. tmp = display_var->yres + display_var->lower_margin; /* VSYNP */
  395. tmp |= display_var->vsync_len << 16; /* VSYNW */
  396. lcdc_write_chan(ch, LDVSYNR, tmp);
  397. /* Adjust horizontal synchronisation for HDMI */
  398. display_h_total = display_var->xres + display_var->hsync_len +
  399. display_var->left_margin + display_var->right_margin;
  400. tmp = ((display_var->xres & 7) << 24) |
  401. ((display_h_total & 7) << 16) |
  402. ((display_var->hsync_len & 7) << 8) |
  403. hsync_pos;
  404. lcdc_write_chan(ch, LDHAJR, tmp);
  405. }
  406. static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
  407. {
  408. struct sh_mobile_lcdc_chan *ch;
  409. struct sh_mobile_lcdc_board_cfg *board_cfg;
  410. unsigned long tmp;
  411. int bpp = 0;
  412. unsigned long ldddsr;
  413. int k, m, ret;
  414. /* enable clocks before accessing the hardware */
  415. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  416. if (priv->ch[k].enabled) {
  417. sh_mobile_lcdc_clk_on(priv);
  418. if (!bpp)
  419. bpp = priv->ch[k].info->var.bits_per_pixel;
  420. }
  421. }
  422. /* reset */
  423. lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LCDC_RESET);
  424. lcdc_wait_bit(priv, _LDCNT2R, LCDC_RESET, 0);
  425. /* enable LCDC channels */
  426. tmp = lcdc_read(priv, _LDCNT2R);
  427. tmp |= priv->ch[0].enabled;
  428. tmp |= priv->ch[1].enabled;
  429. lcdc_write(priv, _LDCNT2R, tmp);
  430. /* read data from external memory, avoid using the BEU for now */
  431. lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) & ~DISPLAY_BEU);
  432. /* stop the lcdc first */
  433. sh_mobile_lcdc_start_stop(priv, 0);
  434. /* configure clocks */
  435. tmp = priv->lddckr;
  436. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  437. ch = &priv->ch[k];
  438. if (!priv->ch[k].enabled)
  439. continue;
  440. m = ch->cfg.clock_divider;
  441. if (!m)
  442. continue;
  443. if (m == 1)
  444. m = 1 << 6;
  445. tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
  446. /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider denominator */
  447. lcdc_write_chan(ch, LDDCKPAT1R, 0);
  448. lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
  449. }
  450. lcdc_write(priv, _LDDCKR, tmp);
  451. /* start dotclock again */
  452. lcdc_write(priv, _LDDCKSTPR, 0);
  453. lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
  454. /* interrupts are disabled to begin with */
  455. lcdc_write(priv, _LDINTR, 0);
  456. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  457. ch = &priv->ch[k];
  458. if (!ch->enabled)
  459. continue;
  460. sh_mobile_lcdc_geometry(ch);
  461. /* power supply */
  462. lcdc_write_chan(ch, LDPMR, 0);
  463. board_cfg = &ch->cfg.board_cfg;
  464. if (board_cfg->setup_sys) {
  465. ret = board_cfg->setup_sys(board_cfg->board_data,
  466. ch, &sh_mobile_lcdc_sys_bus_ops);
  467. if (ret)
  468. return ret;
  469. }
  470. }
  471. /* word and long word swap */
  472. ldddsr = lcdc_read(priv, _LDDDSR);
  473. if (priv->ch[0].info->var.nonstd)
  474. lcdc_write(priv, _LDDDSR, ldddsr | 7);
  475. else {
  476. switch (bpp) {
  477. case 16:
  478. lcdc_write(priv, _LDDDSR, ldddsr | 6);
  479. break;
  480. case 24:
  481. lcdc_write(priv, _LDDDSR, ldddsr | 7);
  482. break;
  483. case 32:
  484. lcdc_write(priv, _LDDDSR, ldddsr | 4);
  485. break;
  486. }
  487. }
  488. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  489. unsigned long base_addr_y;
  490. unsigned long base_addr_c = 0;
  491. int pitch;
  492. ch = &priv->ch[k];
  493. if (!priv->ch[k].enabled)
  494. continue;
  495. /* set bpp format in PKF[4:0] */
  496. tmp = lcdc_read_chan(ch, LDDFR);
  497. tmp &= ~0x0003031f;
  498. if (ch->info->var.nonstd) {
  499. tmp |= (ch->info->var.nonstd << 16);
  500. switch (ch->info->var.bits_per_pixel) {
  501. case 12:
  502. break;
  503. case 16:
  504. tmp |= (0x1 << 8);
  505. break;
  506. case 24:
  507. tmp |= (0x2 << 8);
  508. break;
  509. }
  510. } else {
  511. switch (ch->info->var.bits_per_pixel) {
  512. case 16:
  513. tmp |= 0x03;
  514. break;
  515. case 24:
  516. tmp |= 0x0b;
  517. break;
  518. case 32:
  519. break;
  520. }
  521. }
  522. lcdc_write_chan(ch, LDDFR, tmp);
  523. base_addr_y = ch->info->fix.smem_start;
  524. base_addr_c = base_addr_y +
  525. ch->info->var.xres *
  526. ch->info->var.yres_virtual;
  527. pitch = ch->info->fix.line_length;
  528. /* test if we can enable meram */
  529. if (ch->cfg.meram_cfg && priv->meram_dev &&
  530. priv->meram_dev->ops) {
  531. struct sh_mobile_meram_cfg *cfg;
  532. struct sh_mobile_meram_info *mdev;
  533. unsigned long icb_addr_y, icb_addr_c;
  534. int icb_pitch;
  535. int pf;
  536. cfg = ch->cfg.meram_cfg;
  537. mdev = priv->meram_dev;
  538. /* we need to de-init configured ICBs before we
  539. * we can re-initialize them.
  540. */
  541. if (ch->meram_enabled)
  542. mdev->ops->meram_unregister(mdev, cfg);
  543. ch->meram_enabled = 0;
  544. if (ch->info->var.nonstd) {
  545. if (ch->info->var.bits_per_pixel == 24)
  546. pf = SH_MOBILE_MERAM_PF_NV24;
  547. else
  548. pf = SH_MOBILE_MERAM_PF_NV;
  549. } else {
  550. pf = SH_MOBILE_MERAM_PF_RGB;
  551. }
  552. ret = mdev->ops->meram_register(mdev, cfg, pitch,
  553. ch->info->var.yres,
  554. pf,
  555. base_addr_y,
  556. base_addr_c,
  557. &icb_addr_y,
  558. &icb_addr_c,
  559. &icb_pitch);
  560. if (!ret) {
  561. /* set LDSA1R value */
  562. base_addr_y = icb_addr_y;
  563. pitch = icb_pitch;
  564. /* set LDSA2R value if required */
  565. if (base_addr_c)
  566. base_addr_c = icb_addr_c;
  567. ch->meram_enabled = 1;
  568. }
  569. }
  570. /* point out our frame buffer */
  571. lcdc_write_chan(ch, LDSA1R, base_addr_y);
  572. if (ch->info->var.nonstd)
  573. lcdc_write_chan(ch, LDSA2R, base_addr_c);
  574. /* set line size */
  575. lcdc_write_chan(ch, LDMLSR, pitch);
  576. /* setup deferred io if SYS bus */
  577. tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
  578. if (ch->ldmt1r_value & (1 << 12) && tmp) {
  579. ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
  580. ch->defio.delay = msecs_to_jiffies(tmp);
  581. ch->info->fbdefio = &ch->defio;
  582. fb_deferred_io_init(ch->info);
  583. /* one-shot mode */
  584. lcdc_write_chan(ch, LDSM1R, 1);
  585. /* enable "Frame End Interrupt Enable" bit */
  586. lcdc_write(priv, _LDINTR, LDINTR_FE);
  587. } else {
  588. /* continuous read mode */
  589. lcdc_write_chan(ch, LDSM1R, 0);
  590. }
  591. }
  592. /* display output */
  593. lcdc_write(priv, _LDCNT1R, LCDC_ENABLE);
  594. /* start the lcdc */
  595. sh_mobile_lcdc_start_stop(priv, 1);
  596. priv->started = 1;
  597. /* tell the board code to enable the panel */
  598. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  599. ch = &priv->ch[k];
  600. if (!ch->enabled)
  601. continue;
  602. board_cfg = &ch->cfg.board_cfg;
  603. if (board_cfg->display_on && try_module_get(board_cfg->owner)) {
  604. board_cfg->display_on(board_cfg->board_data, ch->info);
  605. module_put(board_cfg->owner);
  606. }
  607. if (ch->bl) {
  608. ch->bl->props.power = FB_BLANK_UNBLANK;
  609. backlight_update_status(ch->bl);
  610. }
  611. }
  612. return 0;
  613. }
  614. static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
  615. {
  616. struct sh_mobile_lcdc_chan *ch;
  617. struct sh_mobile_lcdc_board_cfg *board_cfg;
  618. int k;
  619. /* clean up deferred io and ask board code to disable panel */
  620. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  621. ch = &priv->ch[k];
  622. if (!ch->enabled)
  623. continue;
  624. /* deferred io mode:
  625. * flush frame, and wait for frame end interrupt
  626. * clean up deferred io and enable clock
  627. */
  628. if (ch->info && ch->info->fbdefio) {
  629. ch->frame_end = 0;
  630. schedule_delayed_work(&ch->info->deferred_work, 0);
  631. wait_event(ch->frame_end_wait, ch->frame_end);
  632. fb_deferred_io_cleanup(ch->info);
  633. ch->info->fbdefio = NULL;
  634. sh_mobile_lcdc_clk_on(priv);
  635. }
  636. if (ch->bl) {
  637. ch->bl->props.power = FB_BLANK_POWERDOWN;
  638. backlight_update_status(ch->bl);
  639. }
  640. board_cfg = &ch->cfg.board_cfg;
  641. if (board_cfg->display_off && try_module_get(board_cfg->owner)) {
  642. board_cfg->display_off(board_cfg->board_data);
  643. module_put(board_cfg->owner);
  644. }
  645. /* disable the meram */
  646. if (ch->meram_enabled) {
  647. struct sh_mobile_meram_cfg *cfg;
  648. struct sh_mobile_meram_info *mdev;
  649. cfg = ch->cfg.meram_cfg;
  650. mdev = priv->meram_dev;
  651. mdev->ops->meram_unregister(mdev, cfg);
  652. ch->meram_enabled = 0;
  653. }
  654. }
  655. /* stop the lcdc */
  656. if (priv->started) {
  657. sh_mobile_lcdc_start_stop(priv, 0);
  658. priv->started = 0;
  659. }
  660. /* stop clocks */
  661. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  662. if (priv->ch[k].enabled)
  663. sh_mobile_lcdc_clk_off(priv);
  664. }
  665. static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
  666. {
  667. int ifm, miftyp;
  668. switch (ch->cfg.interface_type) {
  669. case RGB8: ifm = 0; miftyp = 0; break;
  670. case RGB9: ifm = 0; miftyp = 4; break;
  671. case RGB12A: ifm = 0; miftyp = 5; break;
  672. case RGB12B: ifm = 0; miftyp = 6; break;
  673. case RGB16: ifm = 0; miftyp = 7; break;
  674. case RGB18: ifm = 0; miftyp = 10; break;
  675. case RGB24: ifm = 0; miftyp = 11; break;
  676. case SYS8A: ifm = 1; miftyp = 0; break;
  677. case SYS8B: ifm = 1; miftyp = 1; break;
  678. case SYS8C: ifm = 1; miftyp = 2; break;
  679. case SYS8D: ifm = 1; miftyp = 3; break;
  680. case SYS9: ifm = 1; miftyp = 4; break;
  681. case SYS12: ifm = 1; miftyp = 5; break;
  682. case SYS16A: ifm = 1; miftyp = 7; break;
  683. case SYS16B: ifm = 1; miftyp = 8; break;
  684. case SYS16C: ifm = 1; miftyp = 9; break;
  685. case SYS18: ifm = 1; miftyp = 10; break;
  686. case SYS24: ifm = 1; miftyp = 11; break;
  687. default: goto bad;
  688. }
  689. /* SUBLCD only supports SYS interface */
  690. if (lcdc_chan_is_sublcd(ch)) {
  691. if (ifm == 0)
  692. goto bad;
  693. else
  694. ifm = 0;
  695. }
  696. ch->ldmt1r_value = (ifm << 12) | miftyp;
  697. return 0;
  698. bad:
  699. return -EINVAL;
  700. }
  701. static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
  702. int clock_source,
  703. struct sh_mobile_lcdc_priv *priv)
  704. {
  705. char *str;
  706. int icksel;
  707. switch (clock_source) {
  708. case LCDC_CLK_BUS: str = "bus_clk"; icksel = 0; break;
  709. case LCDC_CLK_PERIPHERAL: str = "peripheral_clk"; icksel = 1; break;
  710. case LCDC_CLK_EXTERNAL: str = NULL; icksel = 2; break;
  711. default:
  712. return -EINVAL;
  713. }
  714. priv->lddckr = icksel << 16;
  715. if (str) {
  716. priv->dot_clk = clk_get(&pdev->dev, str);
  717. if (IS_ERR(priv->dot_clk)) {
  718. dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
  719. return PTR_ERR(priv->dot_clk);
  720. }
  721. }
  722. /* Runtime PM support involves two step for this driver:
  723. * 1) Enable Runtime PM
  724. * 2) Force Runtime PM Resume since hardware is accessed from probe()
  725. */
  726. priv->dev = &pdev->dev;
  727. pm_runtime_enable(priv->dev);
  728. pm_runtime_resume(priv->dev);
  729. return 0;
  730. }
  731. static int sh_mobile_lcdc_setcolreg(u_int regno,
  732. u_int red, u_int green, u_int blue,
  733. u_int transp, struct fb_info *info)
  734. {
  735. u32 *palette = info->pseudo_palette;
  736. if (regno >= PALETTE_NR)
  737. return -EINVAL;
  738. /* only FB_VISUAL_TRUECOLOR supported */
  739. red >>= 16 - info->var.red.length;
  740. green >>= 16 - info->var.green.length;
  741. blue >>= 16 - info->var.blue.length;
  742. transp >>= 16 - info->var.transp.length;
  743. palette[regno] = (red << info->var.red.offset) |
  744. (green << info->var.green.offset) |
  745. (blue << info->var.blue.offset) |
  746. (transp << info->var.transp.offset);
  747. return 0;
  748. }
  749. static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
  750. .id = "SH Mobile LCDC",
  751. .type = FB_TYPE_PACKED_PIXELS,
  752. .visual = FB_VISUAL_TRUECOLOR,
  753. .accel = FB_ACCEL_NONE,
  754. .xpanstep = 0,
  755. .ypanstep = 1,
  756. .ywrapstep = 0,
  757. };
  758. static void sh_mobile_lcdc_fillrect(struct fb_info *info,
  759. const struct fb_fillrect *rect)
  760. {
  761. sys_fillrect(info, rect);
  762. sh_mobile_lcdc_deferred_io_touch(info);
  763. }
  764. static void sh_mobile_lcdc_copyarea(struct fb_info *info,
  765. const struct fb_copyarea *area)
  766. {
  767. sys_copyarea(info, area);
  768. sh_mobile_lcdc_deferred_io_touch(info);
  769. }
  770. static void sh_mobile_lcdc_imageblit(struct fb_info *info,
  771. const struct fb_image *image)
  772. {
  773. sys_imageblit(info, image);
  774. sh_mobile_lcdc_deferred_io_touch(info);
  775. }
  776. static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
  777. struct fb_info *info)
  778. {
  779. struct sh_mobile_lcdc_chan *ch = info->par;
  780. struct sh_mobile_lcdc_priv *priv = ch->lcdc;
  781. unsigned long ldrcntr;
  782. unsigned long new_pan_offset;
  783. unsigned long base_addr_y, base_addr_c;
  784. unsigned long c_offset;
  785. if (!var->nonstd)
  786. new_pan_offset = (var->yoffset * info->fix.line_length) +
  787. (var->xoffset * (info->var.bits_per_pixel / 8));
  788. else
  789. new_pan_offset = (var->yoffset * info->fix.line_length) +
  790. (var->xoffset);
  791. if (new_pan_offset == ch->pan_offset)
  792. return 0; /* No change, do nothing */
  793. ldrcntr = lcdc_read(priv, _LDRCNTR);
  794. /* Set the source address for the next refresh */
  795. base_addr_y = ch->dma_handle + new_pan_offset;
  796. if (var->nonstd) {
  797. /* Set y offset */
  798. c_offset = (var->yoffset *
  799. info->fix.line_length *
  800. (info->var.bits_per_pixel - 8)) / 8;
  801. base_addr_c = ch->dma_handle + var->xres * var->yres_virtual +
  802. c_offset;
  803. /* Set x offset */
  804. if (info->var.bits_per_pixel == 24)
  805. base_addr_c += 2 * var->xoffset;
  806. else
  807. base_addr_c += var->xoffset;
  808. } else
  809. base_addr_c = 0;
  810. if (!ch->meram_enabled) {
  811. lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y);
  812. if (base_addr_c)
  813. lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c);
  814. } else {
  815. struct sh_mobile_meram_cfg *cfg;
  816. struct sh_mobile_meram_info *mdev;
  817. unsigned long icb_addr_y, icb_addr_c;
  818. int ret;
  819. cfg = ch->cfg.meram_cfg;
  820. mdev = priv->meram_dev;
  821. ret = mdev->ops->meram_update(mdev, cfg,
  822. base_addr_y, base_addr_c,
  823. &icb_addr_y, &icb_addr_c);
  824. if (ret)
  825. return ret;
  826. lcdc_write_chan_mirror(ch, LDSA1R, icb_addr_y);
  827. if (icb_addr_c)
  828. lcdc_write_chan_mirror(ch, LDSA2R, icb_addr_c);
  829. }
  830. if (lcdc_chan_is_sublcd(ch))
  831. lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
  832. else
  833. lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
  834. ch->pan_offset = new_pan_offset;
  835. sh_mobile_lcdc_deferred_io_touch(info);
  836. return 0;
  837. }
  838. static int sh_mobile_wait_for_vsync(struct fb_info *info)
  839. {
  840. struct sh_mobile_lcdc_chan *ch = info->par;
  841. unsigned long ldintr;
  842. int ret;
  843. /* Enable VSync End interrupt */
  844. ldintr = lcdc_read(ch->lcdc, _LDINTR);
  845. ldintr |= LDINTR_VEE;
  846. lcdc_write(ch->lcdc, _LDINTR, ldintr);
  847. ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
  848. msecs_to_jiffies(100));
  849. if (!ret)
  850. return -ETIMEDOUT;
  851. return 0;
  852. }
  853. static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
  854. unsigned long arg)
  855. {
  856. int retval;
  857. switch (cmd) {
  858. case FBIO_WAITFORVSYNC:
  859. retval = sh_mobile_wait_for_vsync(info);
  860. break;
  861. default:
  862. retval = -ENOIOCTLCMD;
  863. break;
  864. }
  865. return retval;
  866. }
  867. static void sh_mobile_fb_reconfig(struct fb_info *info)
  868. {
  869. struct sh_mobile_lcdc_chan *ch = info->par;
  870. struct fb_videomode mode1, mode2;
  871. struct fb_event event;
  872. int evnt = FB_EVENT_MODE_CHANGE_ALL;
  873. if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par))
  874. /* More framebuffer users are active */
  875. return;
  876. fb_var_to_videomode(&mode1, &ch->display_var);
  877. fb_var_to_videomode(&mode2, &info->var);
  878. if (fb_mode_is_equal(&mode1, &mode2))
  879. return;
  880. /* Display has been re-plugged, framebuffer is free now, reconfigure */
  881. if (fb_set_var(info, &ch->display_var) < 0)
  882. /* Couldn't reconfigure, hopefully, can continue as before */
  883. return;
  884. if (info->var.nonstd)
  885. info->fix.line_length = mode1.xres;
  886. else
  887. info->fix.line_length = mode1.xres * (ch->cfg.bpp / 8);
  888. /*
  889. * fb_set_var() calls the notifier change internally, only if
  890. * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a
  891. * user event, we have to call the chain ourselves.
  892. */
  893. event.info = info;
  894. event.data = &mode1;
  895. fb_notifier_call_chain(evnt, &event);
  896. }
  897. /*
  898. * Locking: both .fb_release() and .fb_open() are called with info->lock held if
  899. * user == 1, or with console sem held, if user == 0.
  900. */
  901. static int sh_mobile_release(struct fb_info *info, int user)
  902. {
  903. struct sh_mobile_lcdc_chan *ch = info->par;
  904. mutex_lock(&ch->open_lock);
  905. dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
  906. ch->use_count--;
  907. /* Nothing to reconfigure, when called from fbcon */
  908. if (user) {
  909. console_lock();
  910. sh_mobile_fb_reconfig(info);
  911. console_unlock();
  912. }
  913. mutex_unlock(&ch->open_lock);
  914. return 0;
  915. }
  916. static int sh_mobile_open(struct fb_info *info, int user)
  917. {
  918. struct sh_mobile_lcdc_chan *ch = info->par;
  919. mutex_lock(&ch->open_lock);
  920. ch->use_count++;
  921. dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
  922. mutex_unlock(&ch->open_lock);
  923. return 0;
  924. }
  925. static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  926. {
  927. struct sh_mobile_lcdc_chan *ch = info->par;
  928. struct sh_mobile_lcdc_priv *p = ch->lcdc;
  929. if (var->xres > MAX_XRES || var->yres > MAX_YRES ||
  930. var->xres * var->yres * (ch->cfg.bpp / 8) * 2 > info->fix.smem_len) {
  931. dev_warn(info->dev, "Invalid info: %u-%u-%u-%u x %u-%u-%u-%u @ %lukHz!\n",
  932. var->left_margin, var->xres, var->right_margin, var->hsync_len,
  933. var->upper_margin, var->yres, var->lower_margin, var->vsync_len,
  934. PICOS2KHZ(var->pixclock));
  935. return -EINVAL;
  936. }
  937. /* only accept the forced_bpp for dual channel configurations */
  938. if (p->forced_bpp && p->forced_bpp != var->bits_per_pixel)
  939. return -EINVAL;
  940. switch (var->bits_per_pixel) {
  941. case 16: /* PKF[4:0] = 00011 - RGB 565 */
  942. case 24: /* PKF[4:0] = 01011 - RGB 888 */
  943. case 32: /* PKF[4:0] = 00000 - RGBA 888 */
  944. break;
  945. default:
  946. return -EINVAL;
  947. }
  948. return 0;
  949. }
  950. /*
  951. * Screen blanking. Behavior is as follows:
  952. * FB_BLANK_UNBLANK: screen unblanked, clocks enabled
  953. * FB_BLANK_NORMAL: screen blanked, clocks enabled
  954. * FB_BLANK_VSYNC,
  955. * FB_BLANK_HSYNC,
  956. * FB_BLANK_POWEROFF: screen blanked, clocks disabled
  957. */
  958. static int sh_mobile_lcdc_blank(int blank, struct fb_info *info)
  959. {
  960. struct sh_mobile_lcdc_chan *ch = info->par;
  961. struct sh_mobile_lcdc_priv *p = ch->lcdc;
  962. /* blank the screen? */
  963. if (blank > FB_BLANK_UNBLANK && ch->blank_status == FB_BLANK_UNBLANK) {
  964. struct fb_fillrect rect = {
  965. .width = info->var.xres,
  966. .height = info->var.yres,
  967. };
  968. sh_mobile_lcdc_fillrect(info, &rect);
  969. }
  970. /* turn clocks on? */
  971. if (blank <= FB_BLANK_NORMAL && ch->blank_status > FB_BLANK_NORMAL) {
  972. sh_mobile_lcdc_clk_on(p);
  973. }
  974. /* turn clocks off? */
  975. if (blank > FB_BLANK_NORMAL && ch->blank_status <= FB_BLANK_NORMAL) {
  976. /* make sure the screen is updated with the black fill before
  977. * switching the clocks off. one vsync is not enough since
  978. * blanking may occur in the middle of a refresh. deferred io
  979. * mode will reenable the clocks and update the screen in time,
  980. * so it does not need this. */
  981. if (!info->fbdefio) {
  982. sh_mobile_wait_for_vsync(info);
  983. sh_mobile_wait_for_vsync(info);
  984. }
  985. sh_mobile_lcdc_clk_off(p);
  986. }
  987. ch->blank_status = blank;
  988. return 0;
  989. }
  990. static struct fb_ops sh_mobile_lcdc_ops = {
  991. .owner = THIS_MODULE,
  992. .fb_setcolreg = sh_mobile_lcdc_setcolreg,
  993. .fb_read = fb_sys_read,
  994. .fb_write = fb_sys_write,
  995. .fb_fillrect = sh_mobile_lcdc_fillrect,
  996. .fb_copyarea = sh_mobile_lcdc_copyarea,
  997. .fb_imageblit = sh_mobile_lcdc_imageblit,
  998. .fb_blank = sh_mobile_lcdc_blank,
  999. .fb_pan_display = sh_mobile_fb_pan_display,
  1000. .fb_ioctl = sh_mobile_ioctl,
  1001. .fb_open = sh_mobile_open,
  1002. .fb_release = sh_mobile_release,
  1003. .fb_check_var = sh_mobile_check_var,
  1004. };
  1005. static int sh_mobile_lcdc_update_bl(struct backlight_device *bdev)
  1006. {
  1007. struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
  1008. struct sh_mobile_lcdc_board_cfg *cfg = &ch->cfg.board_cfg;
  1009. int brightness = bdev->props.brightness;
  1010. if (bdev->props.power != FB_BLANK_UNBLANK ||
  1011. bdev->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
  1012. brightness = 0;
  1013. return cfg->set_brightness(cfg->board_data, brightness);
  1014. }
  1015. static int sh_mobile_lcdc_get_brightness(struct backlight_device *bdev)
  1016. {
  1017. struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
  1018. struct sh_mobile_lcdc_board_cfg *cfg = &ch->cfg.board_cfg;
  1019. return cfg->get_brightness(cfg->board_data);
  1020. }
  1021. static int sh_mobile_lcdc_check_fb(struct backlight_device *bdev,
  1022. struct fb_info *info)
  1023. {
  1024. return (info->bl_dev == bdev);
  1025. }
  1026. static struct backlight_ops sh_mobile_lcdc_bl_ops = {
  1027. .options = BL_CORE_SUSPENDRESUME,
  1028. .update_status = sh_mobile_lcdc_update_bl,
  1029. .get_brightness = sh_mobile_lcdc_get_brightness,
  1030. .check_fb = sh_mobile_lcdc_check_fb,
  1031. };
  1032. static struct backlight_device *sh_mobile_lcdc_bl_probe(struct device *parent,
  1033. struct sh_mobile_lcdc_chan *ch)
  1034. {
  1035. struct backlight_device *bl;
  1036. bl = backlight_device_register(ch->cfg.bl_info.name, parent, ch,
  1037. &sh_mobile_lcdc_bl_ops, NULL);
  1038. if (IS_ERR(bl)) {
  1039. dev_err(parent, "unable to register backlight device: %ld\n",
  1040. PTR_ERR(bl));
  1041. return NULL;
  1042. }
  1043. bl->props.max_brightness = ch->cfg.bl_info.max_brightness;
  1044. bl->props.brightness = bl->props.max_brightness;
  1045. backlight_update_status(bl);
  1046. return bl;
  1047. }
  1048. static void sh_mobile_lcdc_bl_remove(struct backlight_device *bdev)
  1049. {
  1050. backlight_device_unregister(bdev);
  1051. }
  1052. static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp,
  1053. int nonstd)
  1054. {
  1055. if (nonstd) {
  1056. switch (bpp) {
  1057. case 12:
  1058. case 16:
  1059. case 24:
  1060. var->bits_per_pixel = bpp;
  1061. var->nonstd = nonstd;
  1062. return 0;
  1063. default:
  1064. return -EINVAL;
  1065. }
  1066. }
  1067. switch (bpp) {
  1068. case 16: /* PKF[4:0] = 00011 - RGB 565 */
  1069. var->red.offset = 11;
  1070. var->red.length = 5;
  1071. var->green.offset = 5;
  1072. var->green.length = 6;
  1073. var->blue.offset = 0;
  1074. var->blue.length = 5;
  1075. var->transp.offset = 0;
  1076. var->transp.length = 0;
  1077. break;
  1078. case 24: /* PKF[4:0] = 01011 - RGB 888 */
  1079. var->red.offset = 16;
  1080. var->red.length = 8;
  1081. var->green.offset = 8;
  1082. var->green.length = 8;
  1083. var->blue.offset = 0;
  1084. var->blue.length = 8;
  1085. var->transp.offset = 0;
  1086. var->transp.length = 0;
  1087. break;
  1088. case 32: /* PKF[4:0] = 00000 - RGBA 888 */
  1089. var->red.offset = 16;
  1090. var->red.length = 8;
  1091. var->green.offset = 8;
  1092. var->green.length = 8;
  1093. var->blue.offset = 0;
  1094. var->blue.length = 8;
  1095. var->transp.offset = 24;
  1096. var->transp.length = 8;
  1097. break;
  1098. default:
  1099. return -EINVAL;
  1100. }
  1101. var->bits_per_pixel = bpp;
  1102. var->red.msb_right = 0;
  1103. var->green.msb_right = 0;
  1104. var->blue.msb_right = 0;
  1105. var->transp.msb_right = 0;
  1106. return 0;
  1107. }
  1108. static int sh_mobile_lcdc_suspend(struct device *dev)
  1109. {
  1110. struct platform_device *pdev = to_platform_device(dev);
  1111. sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
  1112. return 0;
  1113. }
  1114. static int sh_mobile_lcdc_resume(struct device *dev)
  1115. {
  1116. struct platform_device *pdev = to_platform_device(dev);
  1117. return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
  1118. }
  1119. static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
  1120. {
  1121. struct platform_device *pdev = to_platform_device(dev);
  1122. struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
  1123. struct sh_mobile_lcdc_chan *ch;
  1124. int k, n;
  1125. /* save per-channel registers */
  1126. for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
  1127. ch = &p->ch[k];
  1128. if (!ch->enabled)
  1129. continue;
  1130. for (n = 0; n < NR_CH_REGS; n++)
  1131. ch->saved_ch_regs[n] = lcdc_read_chan(ch, n);
  1132. }
  1133. /* save shared registers */
  1134. for (n = 0; n < NR_SHARED_REGS; n++)
  1135. p->saved_shared_regs[n] = lcdc_read(p, lcdc_shared_regs[n]);
  1136. /* turn off LCDC hardware */
  1137. lcdc_write(p, _LDCNT1R, 0);
  1138. return 0;
  1139. }
  1140. static int sh_mobile_lcdc_runtime_resume(struct device *dev)
  1141. {
  1142. struct platform_device *pdev = to_platform_device(dev);
  1143. struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
  1144. struct sh_mobile_lcdc_chan *ch;
  1145. int k, n;
  1146. /* restore per-channel registers */
  1147. for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
  1148. ch = &p->ch[k];
  1149. if (!ch->enabled)
  1150. continue;
  1151. for (n = 0; n < NR_CH_REGS; n++)
  1152. lcdc_write_chan(ch, n, ch->saved_ch_regs[n]);
  1153. }
  1154. /* restore shared registers */
  1155. for (n = 0; n < NR_SHARED_REGS; n++)
  1156. lcdc_write(p, lcdc_shared_regs[n], p->saved_shared_regs[n]);
  1157. return 0;
  1158. }
  1159. static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
  1160. .suspend = sh_mobile_lcdc_suspend,
  1161. .resume = sh_mobile_lcdc_resume,
  1162. .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
  1163. .runtime_resume = sh_mobile_lcdc_runtime_resume,
  1164. };
  1165. /* locking: called with info->lock held */
  1166. static int sh_mobile_lcdc_notify(struct notifier_block *nb,
  1167. unsigned long action, void *data)
  1168. {
  1169. struct fb_event *event = data;
  1170. struct fb_info *info = event->info;
  1171. struct sh_mobile_lcdc_chan *ch = info->par;
  1172. struct sh_mobile_lcdc_board_cfg *board_cfg = &ch->cfg.board_cfg;
  1173. if (&ch->lcdc->notifier != nb)
  1174. return NOTIFY_DONE;
  1175. dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
  1176. __func__, action, event->data);
  1177. switch(action) {
  1178. case FB_EVENT_SUSPEND:
  1179. if (board_cfg->display_off && try_module_get(board_cfg->owner)) {
  1180. board_cfg->display_off(board_cfg->board_data);
  1181. module_put(board_cfg->owner);
  1182. }
  1183. sh_mobile_lcdc_stop(ch->lcdc);
  1184. break;
  1185. case FB_EVENT_RESUME:
  1186. mutex_lock(&ch->open_lock);
  1187. sh_mobile_fb_reconfig(info);
  1188. mutex_unlock(&ch->open_lock);
  1189. /* HDMI must be enabled before LCDC configuration */
  1190. if (board_cfg->display_on && try_module_get(board_cfg->owner)) {
  1191. board_cfg->display_on(board_cfg->board_data, info);
  1192. module_put(board_cfg->owner);
  1193. }
  1194. sh_mobile_lcdc_start(ch->lcdc);
  1195. }
  1196. return NOTIFY_OK;
  1197. }
  1198. static int sh_mobile_lcdc_remove(struct platform_device *pdev);
  1199. static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
  1200. {
  1201. struct fb_info *info;
  1202. struct sh_mobile_lcdc_priv *priv;
  1203. struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
  1204. struct resource *res;
  1205. int error;
  1206. void *buf;
  1207. int i, j;
  1208. if (!pdata) {
  1209. dev_err(&pdev->dev, "no platform data defined\n");
  1210. return -EINVAL;
  1211. }
  1212. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1213. i = platform_get_irq(pdev, 0);
  1214. if (!res || i < 0) {
  1215. dev_err(&pdev->dev, "cannot get platform resources\n");
  1216. return -ENOENT;
  1217. }
  1218. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  1219. if (!priv) {
  1220. dev_err(&pdev->dev, "cannot allocate device data\n");
  1221. return -ENOMEM;
  1222. }
  1223. platform_set_drvdata(pdev, priv);
  1224. error = request_irq(i, sh_mobile_lcdc_irq, IRQF_DISABLED,
  1225. dev_name(&pdev->dev), priv);
  1226. if (error) {
  1227. dev_err(&pdev->dev, "unable to request irq\n");
  1228. goto err1;
  1229. }
  1230. priv->irq = i;
  1231. atomic_set(&priv->hw_usecnt, -1);
  1232. j = 0;
  1233. for (i = 0; i < ARRAY_SIZE(pdata->ch); i++) {
  1234. struct sh_mobile_lcdc_chan *ch = priv->ch + j;
  1235. ch->lcdc = priv;
  1236. memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i]));
  1237. error = sh_mobile_lcdc_check_interface(ch);
  1238. if (error) {
  1239. dev_err(&pdev->dev, "unsupported interface type\n");
  1240. goto err1;
  1241. }
  1242. init_waitqueue_head(&ch->frame_end_wait);
  1243. init_completion(&ch->vsync_completion);
  1244. ch->pan_offset = 0;
  1245. /* probe the backlight is there is one defined */
  1246. if (ch->cfg.bl_info.max_brightness)
  1247. ch->bl = sh_mobile_lcdc_bl_probe(&pdev->dev, ch);
  1248. switch (pdata->ch[i].chan) {
  1249. case LCDC_CHAN_MAINLCD:
  1250. ch->enabled = 1 << 1;
  1251. ch->reg_offs = lcdc_offs_mainlcd;
  1252. j++;
  1253. break;
  1254. case LCDC_CHAN_SUBLCD:
  1255. ch->enabled = 1 << 2;
  1256. ch->reg_offs = lcdc_offs_sublcd;
  1257. j++;
  1258. break;
  1259. }
  1260. }
  1261. if (!j) {
  1262. dev_err(&pdev->dev, "no channels defined\n");
  1263. error = -EINVAL;
  1264. goto err1;
  1265. }
  1266. /* for dual channel LCDC (MAIN + SUB) force shared bpp setting */
  1267. if (j == 2)
  1268. priv->forced_bpp = pdata->ch[0].bpp;
  1269. priv->base = ioremap_nocache(res->start, resource_size(res));
  1270. if (!priv->base)
  1271. goto err1;
  1272. error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv);
  1273. if (error) {
  1274. dev_err(&pdev->dev, "unable to setup clocks\n");
  1275. goto err1;
  1276. }
  1277. priv->meram_dev = pdata->meram_dev;
  1278. for (i = 0; i < j; i++) {
  1279. struct fb_var_screeninfo *var;
  1280. const struct fb_videomode *lcd_cfg, *max_cfg = NULL;
  1281. struct sh_mobile_lcdc_chan *ch = priv->ch + i;
  1282. struct sh_mobile_lcdc_chan_cfg *cfg = &ch->cfg;
  1283. const struct fb_videomode *mode = cfg->lcd_cfg;
  1284. unsigned long max_size = 0;
  1285. int k;
  1286. int num_cfg;
  1287. ch->info = framebuffer_alloc(0, &pdev->dev);
  1288. if (!ch->info) {
  1289. dev_err(&pdev->dev, "unable to allocate fb_info\n");
  1290. error = -ENOMEM;
  1291. break;
  1292. }
  1293. info = ch->info;
  1294. var = &info->var;
  1295. info->fbops = &sh_mobile_lcdc_ops;
  1296. info->par = ch;
  1297. mutex_init(&ch->open_lock);
  1298. for (k = 0, lcd_cfg = mode;
  1299. k < cfg->num_cfg && lcd_cfg;
  1300. k++, lcd_cfg++) {
  1301. unsigned long size = lcd_cfg->yres * lcd_cfg->xres;
  1302. /* NV12 buffers must have even number of lines */
  1303. if ((cfg->nonstd) && cfg->bpp == 12 &&
  1304. (lcd_cfg->yres & 0x1)) {
  1305. dev_err(&pdev->dev, "yres must be multiple of 2"
  1306. " for YCbCr420 mode.\n");
  1307. error = -EINVAL;
  1308. goto err1;
  1309. }
  1310. if (size > max_size) {
  1311. max_cfg = lcd_cfg;
  1312. max_size = size;
  1313. }
  1314. }
  1315. if (!mode)
  1316. max_size = MAX_XRES * MAX_YRES;
  1317. else if (max_cfg)
  1318. dev_dbg(&pdev->dev, "Found largest videomode %ux%u\n",
  1319. max_cfg->xres, max_cfg->yres);
  1320. info->fix = sh_mobile_lcdc_fix;
  1321. info->fix.smem_len = max_size * 2 * cfg->bpp / 8;
  1322. /* Only pan in 2 line steps for NV12 */
  1323. if (cfg->nonstd && cfg->bpp == 12)
  1324. info->fix.ypanstep = 2;
  1325. if (!mode) {
  1326. mode = &default_720p;
  1327. num_cfg = 1;
  1328. } else {
  1329. num_cfg = cfg->num_cfg;
  1330. }
  1331. fb_videomode_to_modelist(mode, num_cfg, &info->modelist);
  1332. fb_videomode_to_var(var, mode);
  1333. var->width = cfg->lcd_size_cfg.width;
  1334. var->height = cfg->lcd_size_cfg.height;
  1335. /* Default Y virtual resolution is 2x panel size */
  1336. var->yres_virtual = var->yres * 2;
  1337. var->activate = FB_ACTIVATE_NOW;
  1338. error = sh_mobile_lcdc_set_bpp(var, cfg->bpp, cfg->nonstd);
  1339. if (error)
  1340. break;
  1341. buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len,
  1342. &ch->dma_handle, GFP_KERNEL);
  1343. if (!buf) {
  1344. dev_err(&pdev->dev, "unable to allocate buffer\n");
  1345. error = -ENOMEM;
  1346. break;
  1347. }
  1348. info->pseudo_palette = &ch->pseudo_palette;
  1349. info->flags = FBINFO_FLAG_DEFAULT;
  1350. error = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
  1351. if (error < 0) {
  1352. dev_err(&pdev->dev, "unable to allocate cmap\n");
  1353. dma_free_coherent(&pdev->dev, info->fix.smem_len,
  1354. buf, ch->dma_handle);
  1355. break;
  1356. }
  1357. info->fix.smem_start = ch->dma_handle;
  1358. if (var->nonstd)
  1359. info->fix.line_length = var->xres;
  1360. else
  1361. info->fix.line_length = var->xres * (cfg->bpp / 8);
  1362. info->screen_base = buf;
  1363. info->device = &pdev->dev;
  1364. ch->display_var = *var;
  1365. }
  1366. if (error)
  1367. goto err1;
  1368. error = sh_mobile_lcdc_start(priv);
  1369. if (error) {
  1370. dev_err(&pdev->dev, "unable to start hardware\n");
  1371. goto err1;
  1372. }
  1373. for (i = 0; i < j; i++) {
  1374. struct sh_mobile_lcdc_chan *ch = priv->ch + i;
  1375. info = ch->info;
  1376. if (info->fbdefio) {
  1377. ch->sglist = vmalloc(sizeof(struct scatterlist) *
  1378. info->fix.smem_len >> PAGE_SHIFT);
  1379. if (!ch->sglist) {
  1380. dev_err(&pdev->dev, "cannot allocate sglist\n");
  1381. goto err1;
  1382. }
  1383. }
  1384. info->bl_dev = ch->bl;
  1385. error = register_framebuffer(info);
  1386. if (error < 0)
  1387. goto err1;
  1388. dev_info(info->dev,
  1389. "registered %s/%s as %dx%d %dbpp.\n",
  1390. pdev->name,
  1391. (ch->cfg.chan == LCDC_CHAN_MAINLCD) ?
  1392. "mainlcd" : "sublcd",
  1393. info->var.xres, info->var.yres,
  1394. ch->cfg.bpp);
  1395. /* deferred io mode: disable clock to save power */
  1396. if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
  1397. sh_mobile_lcdc_clk_off(priv);
  1398. }
  1399. /* Failure ignored */
  1400. priv->notifier.notifier_call = sh_mobile_lcdc_notify;
  1401. fb_register_client(&priv->notifier);
  1402. return 0;
  1403. err1:
  1404. sh_mobile_lcdc_remove(pdev);
  1405. return error;
  1406. }
  1407. static int sh_mobile_lcdc_remove(struct platform_device *pdev)
  1408. {
  1409. struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
  1410. struct fb_info *info;
  1411. int i;
  1412. fb_unregister_client(&priv->notifier);
  1413. for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
  1414. if (priv->ch[i].info && priv->ch[i].info->dev)
  1415. unregister_framebuffer(priv->ch[i].info);
  1416. sh_mobile_lcdc_stop(priv);
  1417. for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
  1418. info = priv->ch[i].info;
  1419. if (!info || !info->device)
  1420. continue;
  1421. if (priv->ch[i].sglist)
  1422. vfree(priv->ch[i].sglist);
  1423. if (info->screen_base)
  1424. dma_free_coherent(&pdev->dev, info->fix.smem_len,
  1425. info->screen_base,
  1426. priv->ch[i].dma_handle);
  1427. fb_dealloc_cmap(&info->cmap);
  1428. framebuffer_release(info);
  1429. }
  1430. for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
  1431. if (priv->ch[i].bl)
  1432. sh_mobile_lcdc_bl_remove(priv->ch[i].bl);
  1433. }
  1434. if (priv->dot_clk)
  1435. clk_put(priv->dot_clk);
  1436. if (priv->dev)
  1437. pm_runtime_disable(priv->dev);
  1438. if (priv->base)
  1439. iounmap(priv->base);
  1440. if (priv->irq)
  1441. free_irq(priv->irq, priv);
  1442. kfree(priv);
  1443. return 0;
  1444. }
  1445. static struct platform_driver sh_mobile_lcdc_driver = {
  1446. .driver = {
  1447. .name = "sh_mobile_lcdc_fb",
  1448. .owner = THIS_MODULE,
  1449. .pm = &sh_mobile_lcdc_dev_pm_ops,
  1450. },
  1451. .probe = sh_mobile_lcdc_probe,
  1452. .remove = sh_mobile_lcdc_remove,
  1453. };
  1454. static int __init sh_mobile_lcdc_init(void)
  1455. {
  1456. return platform_driver_register(&sh_mobile_lcdc_driver);
  1457. }
  1458. static void __exit sh_mobile_lcdc_exit(void)
  1459. {
  1460. platform_driver_unregister(&sh_mobile_lcdc_driver);
  1461. }
  1462. module_init(sh_mobile_lcdc_init);
  1463. module_exit(sh_mobile_lcdc_exit);
  1464. MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
  1465. MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
  1466. MODULE_LICENSE("GPL v2");