spi-sh-hspi.c 6.9 KB

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  1. /*
  2. * SuperH HSPI bus driver
  3. *
  4. * Copyright (C) 2011 Kuninori Morimoto
  5. *
  6. * Based on spi-sh.c:
  7. * Based on pxa2xx_spi.c:
  8. * Copyright (C) 2011 Renesas Solutions Corp.
  9. * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; version 2 of the License.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  23. *
  24. */
  25. #include <linux/module.h>
  26. #include <linux/kernel.h>
  27. #include <linux/timer.h>
  28. #include <linux/delay.h>
  29. #include <linux/list.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/pm_runtime.h>
  33. #include <linux/io.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/spi/sh_hspi.h>
  36. #define SPCR 0x00
  37. #define SPSR 0x04
  38. #define SPSCR 0x08
  39. #define SPTBR 0x0C
  40. #define SPRBR 0x10
  41. #define SPCR2 0x14
  42. /* SPSR */
  43. #define RXFL (1 << 2)
  44. #define hspi2info(h) (h->dev->platform_data)
  45. struct hspi_priv {
  46. void __iomem *addr;
  47. struct spi_master *master;
  48. struct device *dev;
  49. };
  50. /*
  51. * basic function
  52. */
  53. static void hspi_write(struct hspi_priv *hspi, int reg, u32 val)
  54. {
  55. iowrite32(val, hspi->addr + reg);
  56. }
  57. static u32 hspi_read(struct hspi_priv *hspi, int reg)
  58. {
  59. return ioread32(hspi->addr + reg);
  60. }
  61. /*
  62. * transfer function
  63. */
  64. static int hspi_status_check_timeout(struct hspi_priv *hspi, u32 mask, u32 val)
  65. {
  66. int t = 256;
  67. while (t--) {
  68. if ((mask & hspi_read(hspi, SPSR)) == val)
  69. return 0;
  70. msleep(20);
  71. }
  72. dev_err(hspi->dev, "timeout\n");
  73. return -ETIMEDOUT;
  74. }
  75. static int hspi_push(struct hspi_priv *hspi, struct spi_message *msg,
  76. struct spi_transfer *t)
  77. {
  78. int i, ret;
  79. u8 *data = (u8 *)t->tx_buf;
  80. /*
  81. * FIXME
  82. * very simple, but polling transfer
  83. */
  84. for (i = 0; i < t->len; i++) {
  85. /* wait remains */
  86. ret = hspi_status_check_timeout(hspi, 0x1, 0x0);
  87. if (ret < 0)
  88. return ret;
  89. hspi_write(hspi, SPTBR, (u32)data[i]);
  90. /* wait recive */
  91. ret = hspi_status_check_timeout(hspi, 0x4, 0x4);
  92. if (ret < 0)
  93. return ret;
  94. /* dummy read */
  95. hspi_read(hspi, SPRBR);
  96. }
  97. return 0;
  98. }
  99. static int hspi_pop(struct hspi_priv *hspi, struct spi_message *msg,
  100. struct spi_transfer *t)
  101. {
  102. int i, ret;
  103. u8 *data = (u8 *)t->rx_buf;
  104. /*
  105. * FIXME
  106. * very simple, but polling receive
  107. */
  108. for (i = 0; i < t->len; i++) {
  109. /* wait remains */
  110. ret = hspi_status_check_timeout(hspi, 0x1, 0);
  111. if (ret < 0)
  112. return ret;
  113. /* dummy write */
  114. hspi_write(hspi, SPTBR, 0x0);
  115. /* wait recive */
  116. ret = hspi_status_check_timeout(hspi, 0x4, 0x4);
  117. if (ret < 0)
  118. return ret;
  119. data[i] = (u8)hspi_read(hspi, SPRBR);
  120. }
  121. return 0;
  122. }
  123. /*
  124. * spi master function
  125. */
  126. static int hspi_prepare_transfer(struct spi_master *master)
  127. {
  128. struct hspi_priv *hspi = spi_master_get_devdata(master);
  129. pm_runtime_get_sync(hspi->dev);
  130. return 0;
  131. }
  132. static int hspi_unprepare_transfer(struct spi_master *master)
  133. {
  134. struct hspi_priv *hspi = spi_master_get_devdata(master);
  135. pm_runtime_put_sync(hspi->dev);
  136. return 0;
  137. }
  138. static int hspi_transfer_one_message(struct spi_master *master,
  139. struct spi_message *msg)
  140. {
  141. struct hspi_priv *hspi = spi_master_get_devdata(master);
  142. struct spi_transfer *t;
  143. int ret;
  144. dev_dbg(hspi->dev, "%s\n", __func__);
  145. ret = 0;
  146. list_for_each_entry(t, &msg->transfers, transfer_list) {
  147. if (t->tx_buf) {
  148. ret = hspi_push(hspi, msg, t);
  149. if (ret < 0)
  150. goto error;
  151. }
  152. if (t->rx_buf) {
  153. ret = hspi_pop(hspi, msg, t);
  154. if (ret < 0)
  155. goto error;
  156. }
  157. msg->actual_length += t->len;
  158. }
  159. error:
  160. msg->status = ret;
  161. spi_finalize_current_message(master);
  162. return ret;
  163. }
  164. static int hspi_setup(struct spi_device *spi)
  165. {
  166. struct hspi_priv *hspi = spi_master_get_devdata(spi->master);
  167. struct device *dev = hspi->dev;
  168. struct sh_hspi_info *info = hspi2info(hspi);
  169. u32 data;
  170. if (8 != spi->bits_per_word) {
  171. dev_err(dev, "bits_per_word should be 8\n");
  172. return -EIO;
  173. }
  174. /* setup first of all in under pm_runtime */
  175. data = SH_HSPI_CLK_DIVC(info->flags);
  176. if (info->flags & SH_HSPI_FBS)
  177. data |= 1 << 7;
  178. if (info->flags & SH_HSPI_CLKP_HIGH)
  179. data |= 1 << 6;
  180. if (info->flags & SH_HSPI_IDIV_DIV128)
  181. data |= 1 << 5;
  182. hspi_write(hspi, SPCR, data);
  183. hspi_write(hspi, SPSR, 0x0);
  184. hspi_write(hspi, SPSCR, 0x1); /* master mode */
  185. dev_dbg(dev, "%s setup\n", spi->modalias);
  186. return 0;
  187. }
  188. static void hspi_cleanup(struct spi_device *spi)
  189. {
  190. struct hspi_priv *hspi = spi_master_get_devdata(spi->master);
  191. struct device *dev = hspi->dev;
  192. dev_dbg(dev, "%s cleanup\n", spi->modalias);
  193. }
  194. static int __devinit hspi_probe(struct platform_device *pdev)
  195. {
  196. struct resource *res;
  197. struct spi_master *master;
  198. struct hspi_priv *hspi;
  199. int ret;
  200. /* get base addr */
  201. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  202. if (!res) {
  203. dev_err(&pdev->dev, "invalid resource\n");
  204. return -EINVAL;
  205. }
  206. master = spi_alloc_master(&pdev->dev, sizeof(*hspi));
  207. if (!master) {
  208. dev_err(&pdev->dev, "spi_alloc_master error.\n");
  209. return -ENOMEM;
  210. }
  211. hspi = spi_master_get_devdata(master);
  212. dev_set_drvdata(&pdev->dev, hspi);
  213. /* init hspi */
  214. hspi->master = master;
  215. hspi->dev = &pdev->dev;
  216. hspi->addr = devm_ioremap(hspi->dev,
  217. res->start, resource_size(res));
  218. if (!hspi->addr) {
  219. dev_err(&pdev->dev, "ioremap error.\n");
  220. ret = -ENOMEM;
  221. goto error1;
  222. }
  223. master->num_chipselect = 1;
  224. master->bus_num = pdev->id;
  225. master->setup = hspi_setup;
  226. master->cleanup = hspi_cleanup;
  227. master->mode_bits = SPI_CPOL | SPI_CPHA;
  228. master->prepare_transfer_hardware = hspi_prepare_transfer;
  229. master->transfer_one_message = hspi_transfer_one_message;
  230. master->unprepare_transfer_hardware = hspi_unprepare_transfer;
  231. ret = spi_register_master(master);
  232. if (ret < 0) {
  233. dev_err(&pdev->dev, "spi_register_master error.\n");
  234. goto error2;
  235. }
  236. pm_runtime_enable(&pdev->dev);
  237. dev_info(&pdev->dev, "probed\n");
  238. return 0;
  239. error2:
  240. devm_iounmap(hspi->dev, hspi->addr);
  241. error1:
  242. spi_master_put(master);
  243. return ret;
  244. }
  245. static int __devexit hspi_remove(struct platform_device *pdev)
  246. {
  247. struct hspi_priv *hspi = dev_get_drvdata(&pdev->dev);
  248. pm_runtime_disable(&pdev->dev);
  249. spi_unregister_master(hspi->master);
  250. devm_iounmap(hspi->dev, hspi->addr);
  251. return 0;
  252. }
  253. static struct platform_driver hspi_driver = {
  254. .probe = hspi_probe,
  255. .remove = __devexit_p(hspi_remove),
  256. .driver = {
  257. .name = "sh-hspi",
  258. .owner = THIS_MODULE,
  259. },
  260. };
  261. module_platform_driver(hspi_driver);
  262. MODULE_DESCRIPTION("SuperH HSPI bus driver");
  263. MODULE_LICENSE("GPL");
  264. MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
  265. MODULE_ALIAS("platform:sh_spi");