intel_lvds.c 31 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. };
  45. struct intel_lvds_encoder {
  46. struct intel_encoder base;
  47. bool is_dual_link;
  48. u32 reg;
  49. struct intel_lvds_connector *attached_connector;
  50. };
  51. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds_encoder, base.base);
  54. }
  55. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  56. {
  57. return container_of(connector, struct intel_lvds_connector, base.base);
  58. }
  59. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  60. enum pipe *pipe)
  61. {
  62. struct drm_device *dev = encoder->base.dev;
  63. struct drm_i915_private *dev_priv = dev->dev_private;
  64. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  65. u32 tmp;
  66. tmp = I915_READ(lvds_encoder->reg);
  67. if (!(tmp & LVDS_PORT_EN))
  68. return false;
  69. if (HAS_PCH_CPT(dev))
  70. *pipe = PORT_TO_PIPE_CPT(tmp);
  71. else
  72. *pipe = PORT_TO_PIPE(tmp);
  73. return true;
  74. }
  75. /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  76. * This is an exception to the general rule that mode_set doesn't turn
  77. * things on.
  78. */
  79. static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
  80. {
  81. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  82. struct drm_device *dev = encoder->base.dev;
  83. struct drm_i915_private *dev_priv = dev->dev_private;
  84. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  85. struct drm_display_mode *fixed_mode =
  86. lvds_encoder->attached_connector->base.panel.fixed_mode;
  87. int pipe = intel_crtc->pipe;
  88. u32 temp;
  89. temp = I915_READ(lvds_encoder->reg);
  90. temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  91. if (HAS_PCH_CPT(dev)) {
  92. temp &= ~PORT_TRANS_SEL_MASK;
  93. temp |= PORT_TRANS_SEL_CPT(pipe);
  94. } else {
  95. if (pipe == 1) {
  96. temp |= LVDS_PIPEB_SELECT;
  97. } else {
  98. temp &= ~LVDS_PIPEB_SELECT;
  99. }
  100. }
  101. /* set the corresponsding LVDS_BORDER bit */
  102. temp |= dev_priv->lvds_border_bits;
  103. /* Set the B0-B3 data pairs corresponding to whether we're going to
  104. * set the DPLLs for dual-channel mode or not.
  105. */
  106. if (lvds_encoder->is_dual_link)
  107. temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  108. else
  109. temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  110. /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  111. * appropriately here, but we need to look more thoroughly into how
  112. * panels behave in the two modes.
  113. */
  114. /* Set the dithering flag on LVDS as needed, note that there is no
  115. * special lvds dither control bit on pch-split platforms, dithering is
  116. * only controlled through the PIPECONF reg. */
  117. if (INTEL_INFO(dev)->gen == 4) {
  118. /* Bspec wording suggests that LVDS port dithering only exists
  119. * for 18bpp panels. */
  120. if (intel_crtc->config.dither &&
  121. intel_crtc->config.pipe_bpp == 18)
  122. temp |= LVDS_ENABLE_DITHER;
  123. else
  124. temp &= ~LVDS_ENABLE_DITHER;
  125. }
  126. temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  127. if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
  128. temp |= LVDS_HSYNC_POLARITY;
  129. if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
  130. temp |= LVDS_VSYNC_POLARITY;
  131. I915_WRITE(lvds_encoder->reg, temp);
  132. }
  133. /**
  134. * Sets the power state for the panel.
  135. */
  136. static void intel_enable_lvds(struct intel_encoder *encoder)
  137. {
  138. struct drm_device *dev = encoder->base.dev;
  139. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  140. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  141. struct drm_i915_private *dev_priv = dev->dev_private;
  142. u32 ctl_reg, stat_reg;
  143. if (HAS_PCH_SPLIT(dev)) {
  144. ctl_reg = PCH_PP_CONTROL;
  145. stat_reg = PCH_PP_STATUS;
  146. } else {
  147. ctl_reg = PP_CONTROL;
  148. stat_reg = PP_STATUS;
  149. }
  150. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  151. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  152. POSTING_READ(lvds_encoder->reg);
  153. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  154. DRM_ERROR("timed out waiting for panel to power on\n");
  155. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  156. }
  157. static void intel_disable_lvds(struct intel_encoder *encoder)
  158. {
  159. struct drm_device *dev = encoder->base.dev;
  160. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  161. struct drm_i915_private *dev_priv = dev->dev_private;
  162. u32 ctl_reg, stat_reg;
  163. if (HAS_PCH_SPLIT(dev)) {
  164. ctl_reg = PCH_PP_CONTROL;
  165. stat_reg = PCH_PP_STATUS;
  166. } else {
  167. ctl_reg = PP_CONTROL;
  168. stat_reg = PP_STATUS;
  169. }
  170. intel_panel_disable_backlight(dev);
  171. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  172. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  173. DRM_ERROR("timed out waiting for panel to power off\n");
  174. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  175. POSTING_READ(lvds_encoder->reg);
  176. }
  177. static int intel_lvds_mode_valid(struct drm_connector *connector,
  178. struct drm_display_mode *mode)
  179. {
  180. struct intel_connector *intel_connector = to_intel_connector(connector);
  181. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  182. if (mode->hdisplay > fixed_mode->hdisplay)
  183. return MODE_PANEL;
  184. if (mode->vdisplay > fixed_mode->vdisplay)
  185. return MODE_PANEL;
  186. return MODE_OK;
  187. }
  188. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  189. struct intel_crtc_config *pipe_config)
  190. {
  191. struct drm_device *dev = intel_encoder->base.dev;
  192. struct drm_i915_private *dev_priv = dev->dev_private;
  193. struct intel_lvds_encoder *lvds_encoder =
  194. to_lvds_encoder(&intel_encoder->base);
  195. struct intel_connector *intel_connector =
  196. &lvds_encoder->attached_connector->base;
  197. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  198. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  199. unsigned int lvds_bpp;
  200. int pipe;
  201. /* Should never happen!! */
  202. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  203. DRM_ERROR("Can't support LVDS on pipe A\n");
  204. return false;
  205. }
  206. if (intel_encoder_check_is_cloned(&lvds_encoder->base))
  207. return false;
  208. if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
  209. LVDS_A3_POWER_UP)
  210. lvds_bpp = 8*3;
  211. else
  212. lvds_bpp = 6*3;
  213. if (lvds_bpp != pipe_config->pipe_bpp) {
  214. DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  215. pipe_config->pipe_bpp, lvds_bpp);
  216. pipe_config->pipe_bpp = lvds_bpp;
  217. }
  218. /*
  219. * We have timings from the BIOS for the panel, put them in
  220. * to the adjusted mode. The CRTC will be set up for this mode,
  221. * with the panel scaling set up to source from the H/VDisplay
  222. * of the original mode.
  223. */
  224. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  225. adjusted_mode);
  226. if (HAS_PCH_SPLIT(dev)) {
  227. pipe_config->has_pch_encoder = true;
  228. intel_pch_panel_fitting(intel_crtc, pipe_config,
  229. intel_connector->panel.fitting_mode);
  230. return true;
  231. } else {
  232. intel_gmch_panel_fitting(intel_crtc, pipe_config,
  233. intel_connector->panel.fitting_mode);
  234. }
  235. /*
  236. * Enable automatic panel scaling for non-native modes so that they fill
  237. * the screen. Should be enabled before the pipe is enabled, according
  238. * to register description and PRM.
  239. * Change the value here to see the borders for debugging
  240. */
  241. for_each_pipe(pipe)
  242. I915_WRITE(BCLRPAT(pipe), 0);
  243. drm_mode_set_crtcinfo(adjusted_mode, 0);
  244. pipe_config->timings_set = true;
  245. /*
  246. * XXX: It would be nice to support lower refresh rates on the
  247. * panels to reduce power consumption, and perhaps match the
  248. * user's requested refresh rate.
  249. */
  250. return true;
  251. }
  252. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  253. struct drm_display_mode *mode,
  254. struct drm_display_mode *adjusted_mode)
  255. {
  256. /*
  257. * The LVDS pin pair will already have been turned on in the
  258. * intel_crtc_mode_set since it has a large impact on the DPLL
  259. * settings.
  260. */
  261. }
  262. /**
  263. * Detect the LVDS connection.
  264. *
  265. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  266. * connected and closed means disconnected. We also send hotplug events as
  267. * needed, using lid status notification from the input layer.
  268. */
  269. static enum drm_connector_status
  270. intel_lvds_detect(struct drm_connector *connector, bool force)
  271. {
  272. struct drm_device *dev = connector->dev;
  273. enum drm_connector_status status;
  274. status = intel_panel_detect(dev);
  275. if (status != connector_status_unknown)
  276. return status;
  277. return connector_status_connected;
  278. }
  279. /**
  280. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  281. */
  282. static int intel_lvds_get_modes(struct drm_connector *connector)
  283. {
  284. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  285. struct drm_device *dev = connector->dev;
  286. struct drm_display_mode *mode;
  287. /* use cached edid if we have one */
  288. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  289. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  290. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  291. if (mode == NULL)
  292. return 0;
  293. drm_mode_probed_add(connector, mode);
  294. return 1;
  295. }
  296. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  297. {
  298. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  299. return 1;
  300. }
  301. /* The GPU hangs up on these systems if modeset is performed on LID open */
  302. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  303. {
  304. .callback = intel_no_modeset_on_lid_dmi_callback,
  305. .ident = "Toshiba Tecra A11",
  306. .matches = {
  307. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  308. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  309. },
  310. },
  311. { } /* terminating entry */
  312. };
  313. /*
  314. * Lid events. Note the use of 'modeset':
  315. * - we set it to MODESET_ON_LID_OPEN on lid close,
  316. * and set it to MODESET_DONE on open
  317. * - we use it as a "only once" bit (ie we ignore
  318. * duplicate events where it was already properly set)
  319. * - the suspend/resume paths will set it to
  320. * MODESET_SUSPENDED and ignore the lid open event,
  321. * because they restore the mode ("lid open").
  322. */
  323. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  324. void *unused)
  325. {
  326. struct intel_lvds_connector *lvds_connector =
  327. container_of(nb, struct intel_lvds_connector, lid_notifier);
  328. struct drm_connector *connector = &lvds_connector->base.base;
  329. struct drm_device *dev = connector->dev;
  330. struct drm_i915_private *dev_priv = dev->dev_private;
  331. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  332. return NOTIFY_OK;
  333. mutex_lock(&dev_priv->modeset_restore_lock);
  334. if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  335. goto exit;
  336. /*
  337. * check and update the status of LVDS connector after receiving
  338. * the LID nofication event.
  339. */
  340. connector->status = connector->funcs->detect(connector, false);
  341. /* Don't force modeset on machines where it causes a GPU lockup */
  342. if (dmi_check_system(intel_no_modeset_on_lid))
  343. goto exit;
  344. if (!acpi_lid_open()) {
  345. /* do modeset on next lid open event */
  346. dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  347. goto exit;
  348. }
  349. if (dev_priv->modeset_restore == MODESET_DONE)
  350. goto exit;
  351. drm_modeset_lock_all(dev);
  352. intel_modeset_setup_hw_state(dev, true);
  353. drm_modeset_unlock_all(dev);
  354. dev_priv->modeset_restore = MODESET_DONE;
  355. exit:
  356. mutex_unlock(&dev_priv->modeset_restore_lock);
  357. return NOTIFY_OK;
  358. }
  359. /**
  360. * intel_lvds_destroy - unregister and free LVDS structures
  361. * @connector: connector to free
  362. *
  363. * Unregister the DDC bus for this connector then free the driver private
  364. * structure.
  365. */
  366. static void intel_lvds_destroy(struct drm_connector *connector)
  367. {
  368. struct intel_lvds_connector *lvds_connector =
  369. to_lvds_connector(connector);
  370. if (lvds_connector->lid_notifier.notifier_call)
  371. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  372. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  373. kfree(lvds_connector->base.edid);
  374. intel_panel_fini(&lvds_connector->base.panel);
  375. drm_sysfs_connector_remove(connector);
  376. drm_connector_cleanup(connector);
  377. kfree(connector);
  378. }
  379. static int intel_lvds_set_property(struct drm_connector *connector,
  380. struct drm_property *property,
  381. uint64_t value)
  382. {
  383. struct intel_connector *intel_connector = to_intel_connector(connector);
  384. struct drm_device *dev = connector->dev;
  385. if (property == dev->mode_config.scaling_mode_property) {
  386. struct drm_crtc *crtc;
  387. if (value == DRM_MODE_SCALE_NONE) {
  388. DRM_DEBUG_KMS("no scaling not supported\n");
  389. return -EINVAL;
  390. }
  391. if (intel_connector->panel.fitting_mode == value) {
  392. /* the LVDS scaling property is not changed */
  393. return 0;
  394. }
  395. intel_connector->panel.fitting_mode = value;
  396. crtc = intel_attached_encoder(connector)->base.crtc;
  397. if (crtc && crtc->enabled) {
  398. /*
  399. * If the CRTC is enabled, the display will be changed
  400. * according to the new panel fitting mode.
  401. */
  402. intel_crtc_restore_mode(crtc);
  403. }
  404. }
  405. return 0;
  406. }
  407. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  408. .mode_set = intel_lvds_mode_set,
  409. };
  410. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  411. .get_modes = intel_lvds_get_modes,
  412. .mode_valid = intel_lvds_mode_valid,
  413. .best_encoder = intel_best_encoder,
  414. };
  415. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  416. .dpms = intel_connector_dpms,
  417. .detect = intel_lvds_detect,
  418. .fill_modes = drm_helper_probe_single_connector_modes,
  419. .set_property = intel_lvds_set_property,
  420. .destroy = intel_lvds_destroy,
  421. };
  422. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  423. .destroy = intel_encoder_destroy,
  424. };
  425. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  426. {
  427. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  428. return 1;
  429. }
  430. /* These systems claim to have LVDS, but really don't */
  431. static const struct dmi_system_id intel_no_lvds[] = {
  432. {
  433. .callback = intel_no_lvds_dmi_callback,
  434. .ident = "Apple Mac Mini (Core series)",
  435. .matches = {
  436. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  437. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  438. },
  439. },
  440. {
  441. .callback = intel_no_lvds_dmi_callback,
  442. .ident = "Apple Mac Mini (Core 2 series)",
  443. .matches = {
  444. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  445. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  446. },
  447. },
  448. {
  449. .callback = intel_no_lvds_dmi_callback,
  450. .ident = "MSI IM-945GSE-A",
  451. .matches = {
  452. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  453. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  454. },
  455. },
  456. {
  457. .callback = intel_no_lvds_dmi_callback,
  458. .ident = "Dell Studio Hybrid",
  459. .matches = {
  460. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  461. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  462. },
  463. },
  464. {
  465. .callback = intel_no_lvds_dmi_callback,
  466. .ident = "Dell OptiPlex FX170",
  467. .matches = {
  468. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  469. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  470. },
  471. },
  472. {
  473. .callback = intel_no_lvds_dmi_callback,
  474. .ident = "AOpen Mini PC",
  475. .matches = {
  476. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  477. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  478. },
  479. },
  480. {
  481. .callback = intel_no_lvds_dmi_callback,
  482. .ident = "AOpen Mini PC MP915",
  483. .matches = {
  484. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  485. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  486. },
  487. },
  488. {
  489. .callback = intel_no_lvds_dmi_callback,
  490. .ident = "AOpen i915GMm-HFS",
  491. .matches = {
  492. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  493. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  494. },
  495. },
  496. {
  497. .callback = intel_no_lvds_dmi_callback,
  498. .ident = "AOpen i45GMx-I",
  499. .matches = {
  500. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  501. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  502. },
  503. },
  504. {
  505. .callback = intel_no_lvds_dmi_callback,
  506. .ident = "Aopen i945GTt-VFA",
  507. .matches = {
  508. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  509. },
  510. },
  511. {
  512. .callback = intel_no_lvds_dmi_callback,
  513. .ident = "Clientron U800",
  514. .matches = {
  515. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  516. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  517. },
  518. },
  519. {
  520. .callback = intel_no_lvds_dmi_callback,
  521. .ident = "Clientron E830",
  522. .matches = {
  523. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  524. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  525. },
  526. },
  527. {
  528. .callback = intel_no_lvds_dmi_callback,
  529. .ident = "Asus EeeBox PC EB1007",
  530. .matches = {
  531. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  532. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  533. },
  534. },
  535. {
  536. .callback = intel_no_lvds_dmi_callback,
  537. .ident = "Asus AT5NM10T-I",
  538. .matches = {
  539. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  540. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  541. },
  542. },
  543. {
  544. .callback = intel_no_lvds_dmi_callback,
  545. .ident = "Hewlett-Packard HP t5740e Thin Client",
  546. .matches = {
  547. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  548. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  549. },
  550. },
  551. {
  552. .callback = intel_no_lvds_dmi_callback,
  553. .ident = "Hewlett-Packard t5745",
  554. .matches = {
  555. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  556. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  557. },
  558. },
  559. {
  560. .callback = intel_no_lvds_dmi_callback,
  561. .ident = "Hewlett-Packard st5747",
  562. .matches = {
  563. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  564. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  565. },
  566. },
  567. {
  568. .callback = intel_no_lvds_dmi_callback,
  569. .ident = "MSI Wind Box DC500",
  570. .matches = {
  571. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  572. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  573. },
  574. },
  575. {
  576. .callback = intel_no_lvds_dmi_callback,
  577. .ident = "Gigabyte GA-D525TUD",
  578. .matches = {
  579. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  580. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  581. },
  582. },
  583. {
  584. .callback = intel_no_lvds_dmi_callback,
  585. .ident = "Supermicro X7SPA-H",
  586. .matches = {
  587. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  588. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  589. },
  590. },
  591. {
  592. .callback = intel_no_lvds_dmi_callback,
  593. .ident = "Fujitsu Esprimo Q900",
  594. .matches = {
  595. DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  596. DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  597. },
  598. },
  599. { } /* terminating entry */
  600. };
  601. /**
  602. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  603. * @dev: drm device
  604. * @connector: LVDS connector
  605. *
  606. * Find the reduced downclock for LVDS in EDID.
  607. */
  608. static void intel_find_lvds_downclock(struct drm_device *dev,
  609. struct drm_display_mode *fixed_mode,
  610. struct drm_connector *connector)
  611. {
  612. struct drm_i915_private *dev_priv = dev->dev_private;
  613. struct drm_display_mode *scan;
  614. int temp_downclock;
  615. temp_downclock = fixed_mode->clock;
  616. list_for_each_entry(scan, &connector->probed_modes, head) {
  617. /*
  618. * If one mode has the same resolution with the fixed_panel
  619. * mode while they have the different refresh rate, it means
  620. * that the reduced downclock is found for the LVDS. In such
  621. * case we can set the different FPx0/1 to dynamically select
  622. * between low and high frequency.
  623. */
  624. if (scan->hdisplay == fixed_mode->hdisplay &&
  625. scan->hsync_start == fixed_mode->hsync_start &&
  626. scan->hsync_end == fixed_mode->hsync_end &&
  627. scan->htotal == fixed_mode->htotal &&
  628. scan->vdisplay == fixed_mode->vdisplay &&
  629. scan->vsync_start == fixed_mode->vsync_start &&
  630. scan->vsync_end == fixed_mode->vsync_end &&
  631. scan->vtotal == fixed_mode->vtotal) {
  632. if (scan->clock < temp_downclock) {
  633. /*
  634. * The downclock is already found. But we
  635. * expect to find the lower downclock.
  636. */
  637. temp_downclock = scan->clock;
  638. }
  639. }
  640. }
  641. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  642. /* We found the downclock for LVDS. */
  643. dev_priv->lvds_downclock_avail = 1;
  644. dev_priv->lvds_downclock = temp_downclock;
  645. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  646. "Normal clock %dKhz, downclock %dKhz\n",
  647. fixed_mode->clock, temp_downclock);
  648. }
  649. }
  650. /*
  651. * Enumerate the child dev array parsed from VBT to check whether
  652. * the LVDS is present.
  653. * If it is present, return 1.
  654. * If it is not present, return false.
  655. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  656. */
  657. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  658. u8 *i2c_pin)
  659. {
  660. struct drm_i915_private *dev_priv = dev->dev_private;
  661. int i;
  662. if (!dev_priv->child_dev_num)
  663. return true;
  664. for (i = 0; i < dev_priv->child_dev_num; i++) {
  665. struct child_device_config *child = dev_priv->child_dev + i;
  666. /* If the device type is not LFP, continue.
  667. * We have to check both the new identifiers as well as the
  668. * old for compatibility with some BIOSes.
  669. */
  670. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  671. child->device_type != DEVICE_TYPE_LFP)
  672. continue;
  673. if (intel_gmbus_is_port_valid(child->i2c_pin))
  674. *i2c_pin = child->i2c_pin;
  675. /* However, we cannot trust the BIOS writers to populate
  676. * the VBT correctly. Since LVDS requires additional
  677. * information from AIM blocks, a non-zero addin offset is
  678. * a good indicator that the LVDS is actually present.
  679. */
  680. if (child->addin_offset)
  681. return true;
  682. /* But even then some BIOS writers perform some black magic
  683. * and instantiate the device without reference to any
  684. * additional data. Trust that if the VBT was written into
  685. * the OpRegion then they have validated the LVDS's existence.
  686. */
  687. if (dev_priv->opregion.vbt)
  688. return true;
  689. }
  690. return false;
  691. }
  692. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  693. {
  694. DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  695. return 1;
  696. }
  697. static const struct dmi_system_id intel_dual_link_lvds[] = {
  698. {
  699. .callback = intel_dual_link_lvds_callback,
  700. .ident = "Apple MacBook Pro (Core i5/i7 Series)",
  701. .matches = {
  702. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  703. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  704. },
  705. },
  706. { } /* terminating entry */
  707. };
  708. bool intel_is_dual_link_lvds(struct drm_device *dev)
  709. {
  710. struct intel_encoder *encoder;
  711. struct intel_lvds_encoder *lvds_encoder;
  712. list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  713. base.head) {
  714. if (encoder->type == INTEL_OUTPUT_LVDS) {
  715. lvds_encoder = to_lvds_encoder(&encoder->base);
  716. return lvds_encoder->is_dual_link;
  717. }
  718. }
  719. return false;
  720. }
  721. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  722. {
  723. struct drm_device *dev = lvds_encoder->base.base.dev;
  724. unsigned int val;
  725. struct drm_i915_private *dev_priv = dev->dev_private;
  726. /* use the module option value if specified */
  727. if (i915_lvds_channel_mode > 0)
  728. return i915_lvds_channel_mode == 2;
  729. if (dmi_check_system(intel_dual_link_lvds))
  730. return true;
  731. /* BIOS should set the proper LVDS register value at boot, but
  732. * in reality, it doesn't set the value when the lid is closed;
  733. * we need to check "the value to be set" in VBT when LVDS
  734. * register is uninitialized.
  735. */
  736. val = I915_READ(lvds_encoder->reg);
  737. if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  738. val = dev_priv->bios_lvds_val;
  739. return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  740. }
  741. static bool intel_lvds_supported(struct drm_device *dev)
  742. {
  743. /* With the introduction of the PCH we gained a dedicated
  744. * LVDS presence pin, use it. */
  745. if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  746. return true;
  747. /* Otherwise LVDS was only attached to mobile products,
  748. * except for the inglorious 830gm */
  749. if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  750. return true;
  751. return false;
  752. }
  753. /**
  754. * intel_lvds_init - setup LVDS connectors on this device
  755. * @dev: drm device
  756. *
  757. * Create the connector, register the LVDS DDC bus, and try to figure out what
  758. * modes we can display on the LVDS panel (if present).
  759. */
  760. bool intel_lvds_init(struct drm_device *dev)
  761. {
  762. struct drm_i915_private *dev_priv = dev->dev_private;
  763. struct intel_lvds_encoder *lvds_encoder;
  764. struct intel_encoder *intel_encoder;
  765. struct intel_lvds_connector *lvds_connector;
  766. struct intel_connector *intel_connector;
  767. struct drm_connector *connector;
  768. struct drm_encoder *encoder;
  769. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  770. struct drm_display_mode *fixed_mode = NULL;
  771. struct edid *edid;
  772. struct drm_crtc *crtc;
  773. u32 lvds;
  774. int pipe;
  775. u8 pin;
  776. if (!intel_lvds_supported(dev))
  777. return false;
  778. /* Skip init on machines we know falsely report LVDS */
  779. if (dmi_check_system(intel_no_lvds))
  780. return false;
  781. pin = GMBUS_PORT_PANEL;
  782. if (!lvds_is_present_in_vbt(dev, &pin)) {
  783. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  784. return false;
  785. }
  786. if (HAS_PCH_SPLIT(dev)) {
  787. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  788. return false;
  789. if (dev_priv->edp.support) {
  790. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  791. return false;
  792. }
  793. }
  794. lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  795. if (!lvds_encoder)
  796. return false;
  797. lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  798. if (!lvds_connector) {
  799. kfree(lvds_encoder);
  800. return false;
  801. }
  802. lvds_encoder->attached_connector = lvds_connector;
  803. intel_encoder = &lvds_encoder->base;
  804. encoder = &intel_encoder->base;
  805. intel_connector = &lvds_connector->base;
  806. connector = &intel_connector->base;
  807. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  808. DRM_MODE_CONNECTOR_LVDS);
  809. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  810. DRM_MODE_ENCODER_LVDS);
  811. intel_encoder->enable = intel_enable_lvds;
  812. intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
  813. intel_encoder->compute_config = intel_lvds_compute_config;
  814. intel_encoder->disable = intel_disable_lvds;
  815. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  816. intel_connector->get_hw_state = intel_connector_get_hw_state;
  817. intel_connector_attach_encoder(intel_connector, intel_encoder);
  818. intel_encoder->type = INTEL_OUTPUT_LVDS;
  819. intel_encoder->cloneable = false;
  820. if (HAS_PCH_SPLIT(dev))
  821. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  822. else if (IS_GEN4(dev))
  823. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  824. else
  825. intel_encoder->crtc_mask = (1 << 1);
  826. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  827. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  828. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  829. connector->interlace_allowed = false;
  830. connector->doublescan_allowed = false;
  831. if (HAS_PCH_SPLIT(dev)) {
  832. lvds_encoder->reg = PCH_LVDS;
  833. } else {
  834. lvds_encoder->reg = LVDS;
  835. }
  836. /* create the scaling mode property */
  837. drm_mode_create_scaling_mode_property(dev);
  838. drm_object_attach_property(&connector->base,
  839. dev->mode_config.scaling_mode_property,
  840. DRM_MODE_SCALE_ASPECT);
  841. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  842. /*
  843. * LVDS discovery:
  844. * 1) check for EDID on DDC
  845. * 2) check for VBT data
  846. * 3) check to see if LVDS is already on
  847. * if none of the above, no panel
  848. * 4) make sure lid is open
  849. * if closed, act like it's not there for now
  850. */
  851. /*
  852. * Attempt to get the fixed panel mode from DDC. Assume that the
  853. * preferred mode is the right one.
  854. */
  855. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  856. if (edid) {
  857. if (drm_add_edid_modes(connector, edid)) {
  858. drm_mode_connector_update_edid_property(connector,
  859. edid);
  860. } else {
  861. kfree(edid);
  862. edid = ERR_PTR(-EINVAL);
  863. }
  864. } else {
  865. edid = ERR_PTR(-ENOENT);
  866. }
  867. lvds_connector->base.edid = edid;
  868. if (IS_ERR_OR_NULL(edid)) {
  869. /* Didn't get an EDID, so
  870. * Set wide sync ranges so we get all modes
  871. * handed to valid_mode for checking
  872. */
  873. connector->display_info.min_vfreq = 0;
  874. connector->display_info.max_vfreq = 200;
  875. connector->display_info.min_hfreq = 0;
  876. connector->display_info.max_hfreq = 200;
  877. }
  878. list_for_each_entry(scan, &connector->probed_modes, head) {
  879. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  880. DRM_DEBUG_KMS("using preferred mode from EDID: ");
  881. drm_mode_debug_printmodeline(scan);
  882. fixed_mode = drm_mode_duplicate(dev, scan);
  883. if (fixed_mode) {
  884. intel_find_lvds_downclock(dev, fixed_mode,
  885. connector);
  886. goto out;
  887. }
  888. }
  889. }
  890. /* Failed to get EDID, what about VBT? */
  891. if (dev_priv->lfp_lvds_vbt_mode) {
  892. DRM_DEBUG_KMS("using mode from VBT: ");
  893. drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode);
  894. fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  895. if (fixed_mode) {
  896. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  897. goto out;
  898. }
  899. }
  900. /*
  901. * If we didn't get EDID, try checking if the panel is already turned
  902. * on. If so, assume that whatever is currently programmed is the
  903. * correct mode.
  904. */
  905. /* Ironlake: FIXME if still fail, not try pipe mode now */
  906. if (HAS_PCH_SPLIT(dev))
  907. goto failed;
  908. lvds = I915_READ(LVDS);
  909. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  910. crtc = intel_get_crtc_for_pipe(dev, pipe);
  911. if (crtc && (lvds & LVDS_PORT_EN)) {
  912. fixed_mode = intel_crtc_mode_get(dev, crtc);
  913. if (fixed_mode) {
  914. DRM_DEBUG_KMS("using current (BIOS) mode: ");
  915. drm_mode_debug_printmodeline(fixed_mode);
  916. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  917. goto out;
  918. }
  919. }
  920. /* If we still don't have a mode after all that, give up. */
  921. if (!fixed_mode)
  922. goto failed;
  923. out:
  924. lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  925. DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  926. lvds_encoder->is_dual_link ? "dual" : "single");
  927. /*
  928. * Unlock registers and just
  929. * leave them unlocked
  930. */
  931. if (HAS_PCH_SPLIT(dev)) {
  932. I915_WRITE(PCH_PP_CONTROL,
  933. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  934. } else {
  935. I915_WRITE(PP_CONTROL,
  936. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  937. }
  938. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  939. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  940. DRM_DEBUG_KMS("lid notifier registration failed\n");
  941. lvds_connector->lid_notifier.notifier_call = NULL;
  942. }
  943. drm_sysfs_connector_add(connector);
  944. intel_panel_init(&intel_connector->panel, fixed_mode);
  945. intel_panel_setup_backlight(connector);
  946. return true;
  947. failed:
  948. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  949. drm_connector_cleanup(connector);
  950. drm_encoder_cleanup(encoder);
  951. if (fixed_mode)
  952. drm_mode_destroy(dev, fixed_mode);
  953. kfree(lvds_encoder);
  954. kfree(lvds_connector);
  955. return false;
  956. }