em28xx-reg.h 2.6 KB

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  1. #define EM_GPIO_0 (1 << 0)
  2. #define EM_GPIO_1 (1 << 1)
  3. #define EM_GPIO_2 (1 << 2)
  4. #define EM_GPIO_3 (1 << 3)
  5. #define EM_GPIO_4 (1 << 4)
  6. #define EM_GPIO_5 (1 << 5)
  7. #define EM_GPIO_6 (1 << 6)
  8. #define EM_GPIO_7 (1 << 7)
  9. #define EM_GPO_0 (1 << 0)
  10. #define EM_GPO_1 (1 << 1)
  11. #define EM_GPO_2 (1 << 2)
  12. #define EM_GPO_3 (1 << 3)
  13. /* em2800 registers */
  14. #define EM2800_R08_AUDIOSRC 0x08
  15. /* em28xx registers */
  16. /* GPIO/GPO registers */
  17. #define EM2880_R04_GPO 0x04 /* em2880-em2883 only */
  18. #define EM28XX_R08_GPIO 0x08 /* em2820 or upper */
  19. #define EM28XX_R06_I2C_CLK 0x06
  20. #define EM28XX_R0A_CHIPID 0x0a
  21. #define EM28XX_R0C_USBSUSP 0x0c /* */
  22. #define EM28XX_R0E_AUDIOSRC 0x0e
  23. #define EM28XX_R0F_XCLK 0x0f
  24. #define EM28XX_R10_VINMODE 0x10
  25. #define EM28XX_R11_VINCTRL 0x11
  26. #define EM28XX_R12_VINENABLE 0x12 /* */
  27. #define EM28XX_R14_GAMMA 0x14
  28. #define EM28XX_R15_RGAIN 0x15
  29. #define EM28XX_R16_GGAIN 0x16
  30. #define EM28XX_R17_BGAIN 0x17
  31. #define EM28XX_R18_ROFFSET 0x18
  32. #define EM28XX_R19_GOFFSET 0x19
  33. #define EM28XX_R1A_BOFFSET 0x1a
  34. #define EM28XX_R1B_OFLOW 0x1b
  35. #define EM28XX_R1C_HSTART 0x1c
  36. #define EM28XX_R1D_VSTART 0x1d
  37. #define EM28XX_R1E_CWIDTH 0x1e
  38. #define EM28XX_R1F_CHEIGHT 0x1f
  39. #define EM28XX_R20_YGAIN 0x20
  40. #define EM28XX_R21_YOFFSET 0x21
  41. #define EM28XX_R22_UVGAIN 0x22
  42. #define EM28XX_R23_UOFFSET 0x23
  43. #define EM28XX_R24_VOFFSET 0x24
  44. #define EM28XX_R25_SHARPNESS 0x25
  45. #define EM28XX_R26_COMPR 0x26
  46. #define EM28XX_R27_OUTFMT 0x27
  47. #define EM28XX_R28_XMIN 0x28
  48. #define EM28XX_R29_XMAX 0x29
  49. #define EM28XX_R2A_YMIN 0x2a
  50. #define EM28XX_R2B_YMAX 0x2b
  51. #define EM28XX_R30_HSCALELOW 0x30
  52. #define EM28XX_R31_HSCALEHIGH 0x31
  53. #define EM28XX_R32_VSCALELOW 0x32
  54. #define EM28XX_R33_VSCALEHIGH 0x33
  55. #define EM28XX_R40_AC97LSB 0x40
  56. #define EM28XX_R41_AC97MSB 0x41
  57. #define EM28XX_R42_AC97ADDR 0x42
  58. #define EM28XX_R43_AC97BUSY 0x43
  59. /* em202 registers */
  60. #define EM28XX_R02_MASTER_AC97 0x02
  61. #define EM28XX_R10_LINE_IN_AC97 0x10
  62. #define EM28XX_R14_VIDEO_AC97 0x14
  63. /* em2874 registers */
  64. #define EM2874_R5F_TS_ENABLE 0x5f
  65. #define EM2874_R80_GPIO 0x80
  66. /* em2874 Transport Stream Enable Register (0x5f) */
  67. #define EM2874_TS1_CAPTURE_ENABLE (1 << 0)
  68. #define EM2874_TS1_FILTER_ENABLE (1 << 1)
  69. #define EM2874_TS1_NULL_DISCARD (1 << 2)
  70. #define EM2874_TS2_CAPTURE_ENABLE (1 << 4)
  71. #define EM2874_TS2_FILTER_ENABLE (1 << 5)
  72. #define EM2874_TS2_NULL_DISCARD (1 << 6)
  73. /* register settings */
  74. #define EM2800_AUDIO_SRC_TUNER 0x0d
  75. #define EM2800_AUDIO_SRC_LINE 0x0c
  76. #define EM28XX_AUDIO_SRC_TUNER 0xc0
  77. #define EM28XX_AUDIO_SRC_LINE 0x80
  78. /* FIXME: Need to be populated with the other chip ID's */
  79. enum em28xx_chip_id {
  80. CHIP_ID_EM2860 = 34,
  81. CHIP_ID_EM2883 = 36,
  82. CHIP_ID_EM2874 = 65,
  83. };