core.h 24 KB

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  1. /*
  2. * core.h -- Core Driver for Wolfson WM8350 PMIC
  3. *
  4. * Copyright 2007 Wolfson Microelectronics PLC
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. */
  12. #ifndef __LINUX_MFD_WM8350_CORE_H_
  13. #define __LINUX_MFD_WM8350_CORE_H_
  14. #include <linux/kernel.h>
  15. #include <linux/mutex.h>
  16. #include <linux/workqueue.h>
  17. /*
  18. * Register values.
  19. */
  20. #define WM8350_RESET_ID 0x00
  21. #define WM8350_ID 0x01
  22. #define WM8350_SYSTEM_CONTROL_1 0x03
  23. #define WM8350_SYSTEM_CONTROL_2 0x04
  24. #define WM8350_SYSTEM_HIBERNATE 0x05
  25. #define WM8350_INTERFACE_CONTROL 0x06
  26. #define WM8350_POWER_MGMT_1 0x08
  27. #define WM8350_POWER_MGMT_2 0x09
  28. #define WM8350_POWER_MGMT_3 0x0A
  29. #define WM8350_POWER_MGMT_4 0x0B
  30. #define WM8350_POWER_MGMT_5 0x0C
  31. #define WM8350_POWER_MGMT_6 0x0D
  32. #define WM8350_POWER_MGMT_7 0x0E
  33. #define WM8350_SYSTEM_INTERRUPTS 0x18
  34. #define WM8350_INT_STATUS_1 0x19
  35. #define WM8350_INT_STATUS_2 0x1A
  36. #define WM8350_POWER_UP_INT_STATUS 0x1B
  37. #define WM8350_UNDER_VOLTAGE_INT_STATUS 0x1C
  38. #define WM8350_OVER_CURRENT_INT_STATUS 0x1D
  39. #define WM8350_GPIO_INT_STATUS 0x1E
  40. #define WM8350_COMPARATOR_INT_STATUS 0x1F
  41. #define WM8350_SYSTEM_INTERRUPTS_MASK 0x20
  42. #define WM8350_INT_STATUS_1_MASK 0x21
  43. #define WM8350_INT_STATUS_2_MASK 0x22
  44. #define WM8350_POWER_UP_INT_STATUS_MASK 0x23
  45. #define WM8350_UNDER_VOLTAGE_INT_STATUS_MASK 0x24
  46. #define WM8350_OVER_CURRENT_INT_STATUS_MASK 0x25
  47. #define WM8350_GPIO_INT_STATUS_MASK 0x26
  48. #define WM8350_COMPARATOR_INT_STATUS_MASK 0x27
  49. #define WM8350_MAX_REGISTER 0xFF
  50. /*
  51. * Field Definitions.
  52. */
  53. /*
  54. * R0 (0x00) - Reset/ID
  55. */
  56. #define WM8350_SW_RESET_CHIP_ID_MASK 0xFFFF
  57. /*
  58. * R1 (0x01) - ID
  59. */
  60. #define WM8350_CHIP_REV_MASK 0x7000
  61. #define WM8350_CONF_STS_MASK 0x0C00
  62. #define WM8350_CUST_ID_MASK 0x00FF
  63. /*
  64. * R3 (0x03) - System Control 1
  65. */
  66. #define WM8350_CHIP_ON 0x8000
  67. #define WM8350_POWERCYCLE 0x2000
  68. #define WM8350_VCC_FAULT_OV 0x1000
  69. #define WM8350_REG_RSTB_TIME_MASK 0x0C00
  70. #define WM8350_BG_SLEEP 0x0200
  71. #define WM8350_MEM_VALID 0x0020
  72. #define WM8350_CHIP_SET_UP 0x0010
  73. #define WM8350_ON_DEB_T 0x0008
  74. #define WM8350_ON_POL 0x0002
  75. #define WM8350_IRQ_POL 0x0001
  76. /*
  77. * R4 (0x04) - System Control 2
  78. */
  79. #define WM8350_USB_SUSPEND_8MA 0x8000
  80. #define WM8350_USB_SUSPEND 0x4000
  81. #define WM8350_USB_MSTR 0x2000
  82. #define WM8350_USB_MSTR_SRC 0x1000
  83. #define WM8350_USB_500MA 0x0800
  84. #define WM8350_USB_NOLIM 0x0400
  85. /*
  86. * R5 (0x05) - System Hibernate
  87. */
  88. #define WM8350_HIBERNATE 0x8000
  89. #define WM8350_WDOG_HIB_MODE 0x0080
  90. #define WM8350_REG_HIB_STARTUP_SEQ 0x0040
  91. #define WM8350_REG_RESET_HIB_MODE 0x0020
  92. #define WM8350_RST_HIB_MODE 0x0010
  93. #define WM8350_IRQ_HIB_MODE 0x0008
  94. #define WM8350_MEMRST_HIB_MODE 0x0004
  95. #define WM8350_PCCOMP_HIB_MODE 0x0002
  96. #define WM8350_TEMPMON_HIB_MODE 0x0001
  97. /*
  98. * R6 (0x06) - Interface Control
  99. */
  100. #define WM8350_USE_DEV_PINS 0x8000
  101. #define WM8350_USE_DEV_PINS_MASK 0x8000
  102. #define WM8350_USE_DEV_PINS_SHIFT 15
  103. #define WM8350_DEV_ADDR_MASK 0x6000
  104. #define WM8350_DEV_ADDR_SHIFT 13
  105. #define WM8350_CONFIG_DONE 0x1000
  106. #define WM8350_CONFIG_DONE_MASK 0x1000
  107. #define WM8350_CONFIG_DONE_SHIFT 12
  108. #define WM8350_RECONFIG_AT_ON 0x0800
  109. #define WM8350_RECONFIG_AT_ON_MASK 0x0800
  110. #define WM8350_RECONFIG_AT_ON_SHIFT 11
  111. #define WM8350_AUTOINC 0x0200
  112. #define WM8350_AUTOINC_MASK 0x0200
  113. #define WM8350_AUTOINC_SHIFT 9
  114. #define WM8350_ARA 0x0100
  115. #define WM8350_ARA_MASK 0x0100
  116. #define WM8350_ARA_SHIFT 8
  117. #define WM8350_SPI_CFG 0x0008
  118. #define WM8350_SPI_CFG_MASK 0x0008
  119. #define WM8350_SPI_CFG_SHIFT 3
  120. #define WM8350_SPI_4WIRE 0x0004
  121. #define WM8350_SPI_4WIRE_MASK 0x0004
  122. #define WM8350_SPI_4WIRE_SHIFT 2
  123. #define WM8350_SPI_3WIRE 0x0002
  124. #define WM8350_SPI_3WIRE_MASK 0x0002
  125. #define WM8350_SPI_3WIRE_SHIFT 1
  126. /* Bit values for R06 (0x06) */
  127. #define WM8350_USE_DEV_PINS_PRIMARY 0
  128. #define WM8350_USE_DEV_PINS_DEV 1
  129. #define WM8350_DEV_ADDR_34 0
  130. #define WM8350_DEV_ADDR_36 1
  131. #define WM8350_DEV_ADDR_3C 2
  132. #define WM8350_DEV_ADDR_3E 3
  133. #define WM8350_CONFIG_DONE_OFF 0
  134. #define WM8350_CONFIG_DONE_DONE 1
  135. #define WM8350_RECONFIG_AT_ON_OFF 0
  136. #define WM8350_RECONFIG_AT_ON_ON 1
  137. #define WM8350_AUTOINC_OFF 0
  138. #define WM8350_AUTOINC_ON 1
  139. #define WM8350_ARA_OFF 0
  140. #define WM8350_ARA_ON 1
  141. #define WM8350_SPI_CFG_CMOS 0
  142. #define WM8350_SPI_CFG_OD 1
  143. #define WM8350_SPI_4WIRE_3WIRE 0
  144. #define WM8350_SPI_4WIRE_4WIRE 1
  145. #define WM8350_SPI_3WIRE_I2C 0
  146. #define WM8350_SPI_3WIRE_SPI 1
  147. /*
  148. * R8 (0x08) - Power mgmt (1)
  149. */
  150. #define WM8350_CODEC_ISEL_MASK 0xC000
  151. #define WM8350_VBUFEN 0x2000
  152. #define WM8350_OUTPUT_DRAIN_EN 0x0400
  153. #define WM8350_MIC_DET_ENA 0x0100
  154. #define WM8350_BIASEN 0x0020
  155. #define WM8350_MICBEN 0x0010
  156. #define WM8350_VMIDEN 0x0004
  157. #define WM8350_VMID_MASK 0x0003
  158. #define WM8350_VMID_SHIFT 0
  159. /*
  160. * R9 (0x09) - Power mgmt (2)
  161. */
  162. #define WM8350_IN3R_ENA 0x0800
  163. #define WM8350_IN3L_ENA 0x0400
  164. #define WM8350_INR_ENA 0x0200
  165. #define WM8350_INL_ENA 0x0100
  166. #define WM8350_MIXINR_ENA 0x0080
  167. #define WM8350_MIXINL_ENA 0x0040
  168. #define WM8350_OUT4_ENA 0x0020
  169. #define WM8350_OUT3_ENA 0x0010
  170. #define WM8350_MIXOUTR_ENA 0x0002
  171. #define WM8350_MIXOUTL_ENA 0x0001
  172. /*
  173. * R10 (0x0A) - Power mgmt (3)
  174. */
  175. #define WM8350_IN3R_TO_OUT2R 0x0080
  176. #define WM8350_OUT2R_ENA 0x0008
  177. #define WM8350_OUT2L_ENA 0x0004
  178. #define WM8350_OUT1R_ENA 0x0002
  179. #define WM8350_OUT1L_ENA 0x0001
  180. /*
  181. * R11 (0x0B) - Power mgmt (4)
  182. */
  183. #define WM8350_SYSCLK_ENA 0x4000
  184. #define WM8350_ADC_HPF_ENA 0x2000
  185. #define WM8350_FLL_ENA 0x0800
  186. #define WM8350_FLL_OSC_ENA 0x0400
  187. #define WM8350_TOCLK_ENA 0x0100
  188. #define WM8350_DACR_ENA 0x0020
  189. #define WM8350_DACL_ENA 0x0010
  190. #define WM8350_ADCR_ENA 0x0008
  191. #define WM8350_ADCL_ENA 0x0004
  192. /*
  193. * R12 (0x0C) - Power mgmt (5)
  194. */
  195. #define WM8350_CODEC_ENA 0x1000
  196. #define WM8350_RTC_TICK_ENA 0x0800
  197. #define WM8350_OSC32K_ENA 0x0400
  198. #define WM8350_CHG_ENA 0x0200
  199. #define WM8350_ACC_DET_ENA 0x0100
  200. #define WM8350_AUXADC_ENA 0x0080
  201. #define WM8350_DCMP4_ENA 0x0008
  202. #define WM8350_DCMP3_ENA 0x0004
  203. #define WM8350_DCMP2_ENA 0x0002
  204. #define WM8350_DCMP1_ENA 0x0001
  205. /*
  206. * R13 (0x0D) - Power mgmt (6)
  207. */
  208. #define WM8350_LS_ENA 0x8000
  209. #define WM8350_LDO4_ENA 0x0800
  210. #define WM8350_LDO3_ENA 0x0400
  211. #define WM8350_LDO2_ENA 0x0200
  212. #define WM8350_LDO1_ENA 0x0100
  213. #define WM8350_DC6_ENA 0x0020
  214. #define WM8350_DC5_ENA 0x0010
  215. #define WM8350_DC4_ENA 0x0008
  216. #define WM8350_DC3_ENA 0x0004
  217. #define WM8350_DC2_ENA 0x0002
  218. #define WM8350_DC1_ENA 0x0001
  219. /*
  220. * R14 (0x0E) - Power mgmt (7)
  221. */
  222. #define WM8350_CS2_ENA 0x0002
  223. #define WM8350_CS1_ENA 0x0001
  224. /*
  225. * R24 (0x18) - System Interrupts
  226. */
  227. #define WM8350_OC_INT 0x2000
  228. #define WM8350_UV_INT 0x1000
  229. #define WM8350_PUTO_INT 0x0800
  230. #define WM8350_CS_INT 0x0200
  231. #define WM8350_EXT_INT 0x0100
  232. #define WM8350_CODEC_INT 0x0080
  233. #define WM8350_GP_INT 0x0040
  234. #define WM8350_AUXADC_INT 0x0020
  235. #define WM8350_RTC_INT 0x0010
  236. #define WM8350_SYS_INT 0x0008
  237. #define WM8350_CHG_INT 0x0004
  238. #define WM8350_USB_INT 0x0002
  239. #define WM8350_WKUP_INT 0x0001
  240. /*
  241. * R25 (0x19) - Interrupt Status 1
  242. */
  243. #define WM8350_CHG_BAT_HOT_EINT 0x8000
  244. #define WM8350_CHG_BAT_COLD_EINT 0x4000
  245. #define WM8350_CHG_BAT_FAIL_EINT 0x2000
  246. #define WM8350_CHG_TO_EINT 0x1000
  247. #define WM8350_CHG_END_EINT 0x0800
  248. #define WM8350_CHG_START_EINT 0x0400
  249. #define WM8350_CHG_FAST_RDY_EINT 0x0200
  250. #define WM8350_RTC_PER_EINT 0x0080
  251. #define WM8350_RTC_SEC_EINT 0x0040
  252. #define WM8350_RTC_ALM_EINT 0x0020
  253. #define WM8350_CHG_VBATT_LT_3P9_EINT 0x0004
  254. #define WM8350_CHG_VBATT_LT_3P1_EINT 0x0002
  255. #define WM8350_CHG_VBATT_LT_2P85_EINT 0x0001
  256. /*
  257. * R26 (0x1A) - Interrupt Status 2
  258. */
  259. #define WM8350_CS1_EINT 0x2000
  260. #define WM8350_CS2_EINT 0x1000
  261. #define WM8350_USB_LIMIT_EINT 0x0400
  262. #define WM8350_AUXADC_DATARDY_EINT 0x0100
  263. #define WM8350_AUXADC_DCOMP4_EINT 0x0080
  264. #define WM8350_AUXADC_DCOMP3_EINT 0x0040
  265. #define WM8350_AUXADC_DCOMP2_EINT 0x0020
  266. #define WM8350_AUXADC_DCOMP1_EINT 0x0010
  267. #define WM8350_SYS_HYST_COMP_FAIL_EINT 0x0008
  268. #define WM8350_SYS_CHIP_GT115_EINT 0x0004
  269. #define WM8350_SYS_CHIP_GT140_EINT 0x0002
  270. #define WM8350_SYS_WDOG_TO_EINT 0x0001
  271. /*
  272. * R27 (0x1B) - Power Up Interrupt Status
  273. */
  274. #define WM8350_PUTO_LDO4_EINT 0x0800
  275. #define WM8350_PUTO_LDO3_EINT 0x0400
  276. #define WM8350_PUTO_LDO2_EINT 0x0200
  277. #define WM8350_PUTO_LDO1_EINT 0x0100
  278. #define WM8350_PUTO_DC6_EINT 0x0020
  279. #define WM8350_PUTO_DC5_EINT 0x0010
  280. #define WM8350_PUTO_DC4_EINT 0x0008
  281. #define WM8350_PUTO_DC3_EINT 0x0004
  282. #define WM8350_PUTO_DC2_EINT 0x0002
  283. #define WM8350_PUTO_DC1_EINT 0x0001
  284. /*
  285. * R28 (0x1C) - Under Voltage Interrupt status
  286. */
  287. #define WM8350_UV_LDO4_EINT 0x0800
  288. #define WM8350_UV_LDO3_EINT 0x0400
  289. #define WM8350_UV_LDO2_EINT 0x0200
  290. #define WM8350_UV_LDO1_EINT 0x0100
  291. #define WM8350_UV_DC6_EINT 0x0020
  292. #define WM8350_UV_DC5_EINT 0x0010
  293. #define WM8350_UV_DC4_EINT 0x0008
  294. #define WM8350_UV_DC3_EINT 0x0004
  295. #define WM8350_UV_DC2_EINT 0x0002
  296. #define WM8350_UV_DC1_EINT 0x0001
  297. /*
  298. * R29 (0x1D) - Over Current Interrupt status
  299. */
  300. #define WM8350_OC_LS_EINT 0x8000
  301. /*
  302. * R30 (0x1E) - GPIO Interrupt Status
  303. */
  304. #define WM8350_GP12_EINT 0x1000
  305. #define WM8350_GP11_EINT 0x0800
  306. #define WM8350_GP10_EINT 0x0400
  307. #define WM8350_GP9_EINT 0x0200
  308. #define WM8350_GP8_EINT 0x0100
  309. #define WM8350_GP7_EINT 0x0080
  310. #define WM8350_GP6_EINT 0x0040
  311. #define WM8350_GP5_EINT 0x0020
  312. #define WM8350_GP4_EINT 0x0010
  313. #define WM8350_GP3_EINT 0x0008
  314. #define WM8350_GP2_EINT 0x0004
  315. #define WM8350_GP1_EINT 0x0002
  316. #define WM8350_GP0_EINT 0x0001
  317. /*
  318. * R31 (0x1F) - Comparator Interrupt Status
  319. */
  320. #define WM8350_EXT_USB_FB_EINT 0x8000
  321. #define WM8350_EXT_WALL_FB_EINT 0x4000
  322. #define WM8350_EXT_BAT_FB_EINT 0x2000
  323. #define WM8350_CODEC_JCK_DET_L_EINT 0x0800
  324. #define WM8350_CODEC_JCK_DET_R_EINT 0x0400
  325. #define WM8350_CODEC_MICSCD_EINT 0x0200
  326. #define WM8350_CODEC_MICD_EINT 0x0100
  327. #define WM8350_WKUP_OFF_STATE_EINT 0x0040
  328. #define WM8350_WKUP_HIB_STATE_EINT 0x0020
  329. #define WM8350_WKUP_CONV_FAULT_EINT 0x0010
  330. #define WM8350_WKUP_WDOG_RST_EINT 0x0008
  331. #define WM8350_WKUP_GP_PWR_ON_EINT 0x0004
  332. #define WM8350_WKUP_ONKEY_EINT 0x0002
  333. #define WM8350_WKUP_GP_WAKEUP_EINT 0x0001
  334. /*
  335. * R32 (0x20) - System Interrupts Mask
  336. */
  337. #define WM8350_IM_OC_INT 0x2000
  338. #define WM8350_IM_UV_INT 0x1000
  339. #define WM8350_IM_PUTO_INT 0x0800
  340. #define WM8350_IM_SPARE_INT 0x0400
  341. #define WM8350_IM_CS_INT 0x0200
  342. #define WM8350_IM_EXT_INT 0x0100
  343. #define WM8350_IM_CODEC_INT 0x0080
  344. #define WM8350_IM_GP_INT 0x0040
  345. #define WM8350_IM_AUXADC_INT 0x0020
  346. #define WM8350_IM_RTC_INT 0x0010
  347. #define WM8350_IM_SYS_INT 0x0008
  348. #define WM8350_IM_CHG_INT 0x0004
  349. #define WM8350_IM_USB_INT 0x0002
  350. #define WM8350_IM_WKUP_INT 0x0001
  351. /*
  352. * R33 (0x21) - Interrupt Status 1 Mask
  353. */
  354. #define WM8350_IM_CHG_BAT_HOT_EINT 0x8000
  355. #define WM8350_IM_CHG_BAT_COLD_EINT 0x4000
  356. #define WM8350_IM_CHG_BAT_FAIL_EINT 0x2000
  357. #define WM8350_IM_CHG_TO_EINT 0x1000
  358. #define WM8350_IM_CHG_END_EINT 0x0800
  359. #define WM8350_IM_CHG_START_EINT 0x0400
  360. #define WM8350_IM_CHG_FAST_RDY_EINT 0x0200
  361. #define WM8350_IM_RTC_PER_EINT 0x0080
  362. #define WM8350_IM_RTC_SEC_EINT 0x0040
  363. #define WM8350_IM_RTC_ALM_EINT 0x0020
  364. #define WM8350_IM_CHG_VBATT_LT_3P9_EINT 0x0004
  365. #define WM8350_IM_CHG_VBATT_LT_3P1_EINT 0x0002
  366. #define WM8350_IM_CHG_VBATT_LT_2P85_EINT 0x0001
  367. /*
  368. * R34 (0x22) - Interrupt Status 2 Mask
  369. */
  370. #define WM8350_IM_SPARE2_EINT 0x8000
  371. #define WM8350_IM_SPARE1_EINT 0x4000
  372. #define WM8350_IM_CS1_EINT 0x2000
  373. #define WM8350_IM_CS2_EINT 0x1000
  374. #define WM8350_IM_USB_LIMIT_EINT 0x0400
  375. #define WM8350_IM_AUXADC_DATARDY_EINT 0x0100
  376. #define WM8350_IM_AUXADC_DCOMP4_EINT 0x0080
  377. #define WM8350_IM_AUXADC_DCOMP3_EINT 0x0040
  378. #define WM8350_IM_AUXADC_DCOMP2_EINT 0x0020
  379. #define WM8350_IM_AUXADC_DCOMP1_EINT 0x0010
  380. #define WM8350_IM_SYS_HYST_COMP_FAIL_EINT 0x0008
  381. #define WM8350_IM_SYS_CHIP_GT115_EINT 0x0004
  382. #define WM8350_IM_SYS_CHIP_GT140_EINT 0x0002
  383. #define WM8350_IM_SYS_WDOG_TO_EINT 0x0001
  384. /*
  385. * R35 (0x23) - Power Up Interrupt Status Mask
  386. */
  387. #define WM8350_IM_PUTO_LDO4_EINT 0x0800
  388. #define WM8350_IM_PUTO_LDO3_EINT 0x0400
  389. #define WM8350_IM_PUTO_LDO2_EINT 0x0200
  390. #define WM8350_IM_PUTO_LDO1_EINT 0x0100
  391. #define WM8350_IM_PUTO_DC6_EINT 0x0020
  392. #define WM8350_IM_PUTO_DC5_EINT 0x0010
  393. #define WM8350_IM_PUTO_DC4_EINT 0x0008
  394. #define WM8350_IM_PUTO_DC3_EINT 0x0004
  395. #define WM8350_IM_PUTO_DC2_EINT 0x0002
  396. #define WM8350_IM_PUTO_DC1_EINT 0x0001
  397. /*
  398. * R36 (0x24) - Under Voltage Interrupt status Mask
  399. */
  400. #define WM8350_IM_UV_LDO4_EINT 0x0800
  401. #define WM8350_IM_UV_LDO3_EINT 0x0400
  402. #define WM8350_IM_UV_LDO2_EINT 0x0200
  403. #define WM8350_IM_UV_LDO1_EINT 0x0100
  404. #define WM8350_IM_UV_DC6_EINT 0x0020
  405. #define WM8350_IM_UV_DC5_EINT 0x0010
  406. #define WM8350_IM_UV_DC4_EINT 0x0008
  407. #define WM8350_IM_UV_DC3_EINT 0x0004
  408. #define WM8350_IM_UV_DC2_EINT 0x0002
  409. #define WM8350_IM_UV_DC1_EINT 0x0001
  410. /*
  411. * R37 (0x25) - Over Current Interrupt status Mask
  412. */
  413. #define WM8350_IM_OC_LS_EINT 0x8000
  414. /*
  415. * R38 (0x26) - GPIO Interrupt Status Mask
  416. */
  417. #define WM8350_IM_GP12_EINT 0x1000
  418. #define WM8350_IM_GP11_EINT 0x0800
  419. #define WM8350_IM_GP10_EINT 0x0400
  420. #define WM8350_IM_GP9_EINT 0x0200
  421. #define WM8350_IM_GP8_EINT 0x0100
  422. #define WM8350_IM_GP7_EINT 0x0080
  423. #define WM8350_IM_GP6_EINT 0x0040
  424. #define WM8350_IM_GP5_EINT 0x0020
  425. #define WM8350_IM_GP4_EINT 0x0010
  426. #define WM8350_IM_GP3_EINT 0x0008
  427. #define WM8350_IM_GP2_EINT 0x0004
  428. #define WM8350_IM_GP1_EINT 0x0002
  429. #define WM8350_IM_GP0_EINT 0x0001
  430. /*
  431. * R39 (0x27) - Comparator Interrupt Status Mask
  432. */
  433. #define WM8350_IM_EXT_USB_FB_EINT 0x8000
  434. #define WM8350_IM_EXT_WALL_FB_EINT 0x4000
  435. #define WM8350_IM_EXT_BAT_FB_EINT 0x2000
  436. #define WM8350_IM_CODEC_JCK_DET_L_EINT 0x0800
  437. #define WM8350_IM_CODEC_JCK_DET_R_EINT 0x0400
  438. #define WM8350_IM_CODEC_MICSCD_EINT 0x0200
  439. #define WM8350_IM_CODEC_MICD_EINT 0x0100
  440. #define WM8350_IM_WKUP_OFF_STATE_EINT 0x0040
  441. #define WM8350_IM_WKUP_HIB_STATE_EINT 0x0020
  442. #define WM8350_IM_WKUP_CONV_FAULT_EINT 0x0010
  443. #define WM8350_IM_WKUP_WDOG_RST_EINT 0x0008
  444. #define WM8350_IM_WKUP_GP_PWR_ON_EINT 0x0004
  445. #define WM8350_IM_WKUP_ONKEY_EINT 0x0002
  446. #define WM8350_IM_WKUP_GP_WAKEUP_EINT 0x0001
  447. /*
  448. * R220 (0xDC) - RAM BIST 1
  449. */
  450. #define WM8350_READ_STATUS 0x0800
  451. #define WM8350_TSTRAM_CLK 0x0100
  452. #define WM8350_TSTRAM_CLK_ENA 0x0080
  453. #define WM8350_STARTSEQ 0x0040
  454. #define WM8350_READ_SRC 0x0020
  455. #define WM8350_COUNT_DIR 0x0010
  456. #define WM8350_TSTRAM_MODE_MASK 0x000E
  457. #define WM8350_TSTRAM_ENA 0x0001
  458. /*
  459. * R225 (0xE1) - DCDC/LDO status
  460. */
  461. #define WM8350_LS_STS 0x8000
  462. #define WM8350_LDO4_STS 0x0800
  463. #define WM8350_LDO3_STS 0x0400
  464. #define WM8350_LDO2_STS 0x0200
  465. #define WM8350_LDO1_STS 0x0100
  466. #define WM8350_DC6_STS 0x0020
  467. #define WM8350_DC5_STS 0x0010
  468. #define WM8350_DC4_STS 0x0008
  469. #define WM8350_DC3_STS 0x0004
  470. #define WM8350_DC2_STS 0x0002
  471. #define WM8350_DC1_STS 0x0001
  472. /* WM8350 wake up conditions */
  473. #define WM8350_IRQ_WKUP_OFF_STATE 43
  474. #define WM8350_IRQ_WKUP_HIB_STATE 44
  475. #define WM8350_IRQ_WKUP_CONV_FAULT 45
  476. #define WM8350_IRQ_WKUP_WDOG_RST 46
  477. #define WM8350_IRQ_WKUP_GP_PWR_ON 47
  478. #define WM8350_IRQ_WKUP_ONKEY 48
  479. #define WM8350_IRQ_WKUP_GP_WAKEUP 49
  480. /* wm8350 chip revisions */
  481. #define WM8350_REV_E 0x4
  482. #define WM8350_REV_F 0x5
  483. #define WM8350_REV_G 0x6
  484. #define WM8350_NUM_IRQ 63
  485. struct wm8350_reg_access {
  486. u16 readable; /* Mask of readable bits */
  487. u16 writable; /* Mask of writable bits */
  488. u16 vol; /* Mask of volatile bits */
  489. };
  490. extern const struct wm8350_reg_access wm8350_reg_io_map[];
  491. extern const u16 wm8350_mode0_defaults[];
  492. extern const u16 wm8350_mode1_defaults[];
  493. extern const u16 wm8350_mode2_defaults[];
  494. extern const u16 wm8350_mode3_defaults[];
  495. struct wm8350;
  496. struct wm8350_irq {
  497. void (*handler) (struct wm8350 *, int, void *);
  498. void *data;
  499. };
  500. struct wm8350 {
  501. int rev; /* chip revision */
  502. struct device *dev;
  503. /* device IO */
  504. union {
  505. struct i2c_client *i2c_client;
  506. struct spi_device *spi_device;
  507. };
  508. int (*read_dev)(struct wm8350 *wm8350, char reg, int size, void *dest);
  509. int (*write_dev)(struct wm8350 *wm8350, char reg, int size,
  510. void *src);
  511. u16 *reg_cache;
  512. /* Interrupt handling */
  513. struct work_struct irq_work;
  514. struct mutex irq_mutex; /* IRQ table mutex */
  515. struct wm8350_irq irq[WM8350_NUM_IRQ];
  516. int chip_irq;
  517. };
  518. /**
  519. * Data to be supplied by the platform to initialise the WM8350.
  520. *
  521. * @init: Function called during driver initialisation. Should be
  522. * used by the platform to configure GPIO functions and similar.
  523. */
  524. struct wm8350_platform_data {
  525. int (*init)(struct wm8350 *wm8350);
  526. };
  527. /*
  528. * WM8350 device initialisation and exit.
  529. */
  530. int wm8350_device_init(struct wm8350 *wm8350, int irq,
  531. struct wm8350_platform_data *pdata);
  532. void wm8350_device_exit(struct wm8350 *wm8350);
  533. /*
  534. * WM8350 device IO
  535. */
  536. int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
  537. int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
  538. u16 wm8350_reg_read(struct wm8350 *wm8350, int reg);
  539. int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val);
  540. int wm8350_reg_lock(struct wm8350 *wm8350);
  541. int wm8350_reg_unlock(struct wm8350 *wm8350);
  542. int wm8350_block_read(struct wm8350 *wm8350, int reg, int size, u16 *dest);
  543. int wm8350_block_write(struct wm8350 *wm8350, int reg, int size, u16 *src);
  544. /*
  545. * WM8350 internal interrupts
  546. */
  547. int wm8350_register_irq(struct wm8350 *wm8350, int irq,
  548. void (*handler) (struct wm8350 *, int, void *),
  549. void *data);
  550. int wm8350_free_irq(struct wm8350 *wm8350, int irq);
  551. int wm8350_mask_irq(struct wm8350 *wm8350, int irq);
  552. int wm8350_unmask_irq(struct wm8350 *wm8350, int irq);
  553. #endif