ov519.c 116 KB

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  1. /**
  2. * OV519 driver
  3. *
  4. * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
  5. * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
  6. *
  7. * This module is adapted from the ov51x-jpeg package, which itself
  8. * was adapted from the ov511 driver.
  9. *
  10. * Original copyright for the ov511 driver is:
  11. *
  12. * Copyright (c) 1999-2006 Mark W. McClelland
  13. * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
  14. * Many improvements by Bret Wallach <bwallac1@san.rr.com>
  15. * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
  16. * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
  17. * Changes by Claudio Matsuoka <claudio@conectiva.com>
  18. *
  19. * ov51x-jpeg original copyright is:
  20. *
  21. * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
  22. * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
  23. *
  24. * This program is free software; you can redistribute it and/or modify
  25. * it under the terms of the GNU General Public License as published by
  26. * the Free Software Foundation; either version 2 of the License, or
  27. * any later version.
  28. *
  29. * This program is distributed in the hope that it will be useful,
  30. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  31. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  32. * GNU General Public License for more details.
  33. *
  34. * You should have received a copy of the GNU General Public License
  35. * along with this program; if not, write to the Free Software
  36. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  37. *
  38. */
  39. #define MODULE_NAME "ov519"
  40. #include "gspca.h"
  41. MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
  42. MODULE_DESCRIPTION("OV519 USB Camera Driver");
  43. MODULE_LICENSE("GPL");
  44. /* global parameters */
  45. static int frame_rate;
  46. /* Number of times to retry a failed I2C transaction. Increase this if you
  47. * are getting "Failed to read sensor ID..." */
  48. static int i2c_detect_tries = 10;
  49. /* ov519 device descriptor */
  50. struct sd {
  51. struct gspca_dev gspca_dev; /* !! must be the first item */
  52. __u8 packet_nr;
  53. char bridge;
  54. #define BRIDGE_OV511 0
  55. #define BRIDGE_OV511PLUS 1
  56. #define BRIDGE_OV518 2
  57. #define BRIDGE_OV518PLUS 3
  58. #define BRIDGE_OV519 4
  59. #define BRIDGE_OVFX2 5
  60. #define BRIDGE_MASK 7
  61. char invert_led;
  62. #define BRIDGE_INVERT_LED 8
  63. /* Determined by sensor type */
  64. __u8 sif;
  65. __u8 brightness;
  66. __u8 contrast;
  67. __u8 colors;
  68. __u8 hflip;
  69. __u8 vflip;
  70. __u8 autobrightness;
  71. __u8 freq;
  72. __u8 stopped; /* Streaming is temporarily paused */
  73. __u8 frame_rate; /* current Framerate */
  74. __u8 clockdiv; /* clockdiv override */
  75. char sensor; /* Type of image sensor chip (SEN_*) */
  76. #define SEN_UNKNOWN 0
  77. #define SEN_OV2610 1
  78. #define SEN_OV3610 2
  79. #define SEN_OV6620 3
  80. #define SEN_OV6630 4
  81. #define SEN_OV66308AF 5
  82. #define SEN_OV7610 6
  83. #define SEN_OV7620 7
  84. #define SEN_OV7640 8
  85. #define SEN_OV7670 9
  86. #define SEN_OV76BE 10
  87. #define SEN_OV8610 11
  88. };
  89. /* V4L2 controls supported by the driver */
  90. static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
  91. static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
  92. static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
  93. static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
  94. static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
  95. static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
  96. static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
  97. static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
  98. static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
  99. static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
  100. static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val);
  101. static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val);
  102. static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
  103. static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
  104. static void setbrightness(struct gspca_dev *gspca_dev);
  105. static void setcontrast(struct gspca_dev *gspca_dev);
  106. static void setcolors(struct gspca_dev *gspca_dev);
  107. static void setautobrightness(struct sd *sd);
  108. static void setfreq(struct sd *sd);
  109. static const struct ctrl sd_ctrls[] = {
  110. {
  111. {
  112. .id = V4L2_CID_BRIGHTNESS,
  113. .type = V4L2_CTRL_TYPE_INTEGER,
  114. .name = "Brightness",
  115. .minimum = 0,
  116. .maximum = 255,
  117. .step = 1,
  118. #define BRIGHTNESS_DEF 127
  119. .default_value = BRIGHTNESS_DEF,
  120. },
  121. .set = sd_setbrightness,
  122. .get = sd_getbrightness,
  123. },
  124. {
  125. {
  126. .id = V4L2_CID_CONTRAST,
  127. .type = V4L2_CTRL_TYPE_INTEGER,
  128. .name = "Contrast",
  129. .minimum = 0,
  130. .maximum = 255,
  131. .step = 1,
  132. #define CONTRAST_DEF 127
  133. .default_value = CONTRAST_DEF,
  134. },
  135. .set = sd_setcontrast,
  136. .get = sd_getcontrast,
  137. },
  138. {
  139. {
  140. .id = V4L2_CID_SATURATION,
  141. .type = V4L2_CTRL_TYPE_INTEGER,
  142. .name = "Color",
  143. .minimum = 0,
  144. .maximum = 255,
  145. .step = 1,
  146. #define COLOR_DEF 127
  147. .default_value = COLOR_DEF,
  148. },
  149. .set = sd_setcolors,
  150. .get = sd_getcolors,
  151. },
  152. /* The flip controls work with ov7670 only */
  153. #define HFLIP_IDX 3
  154. {
  155. {
  156. .id = V4L2_CID_HFLIP,
  157. .type = V4L2_CTRL_TYPE_BOOLEAN,
  158. .name = "Mirror",
  159. .minimum = 0,
  160. .maximum = 1,
  161. .step = 1,
  162. #define HFLIP_DEF 0
  163. .default_value = HFLIP_DEF,
  164. },
  165. .set = sd_sethflip,
  166. .get = sd_gethflip,
  167. },
  168. #define VFLIP_IDX 4
  169. {
  170. {
  171. .id = V4L2_CID_VFLIP,
  172. .type = V4L2_CTRL_TYPE_BOOLEAN,
  173. .name = "Vflip",
  174. .minimum = 0,
  175. .maximum = 1,
  176. .step = 1,
  177. #define VFLIP_DEF 0
  178. .default_value = VFLIP_DEF,
  179. },
  180. .set = sd_setvflip,
  181. .get = sd_getvflip,
  182. },
  183. #define AUTOBRIGHT_IDX 5
  184. {
  185. {
  186. .id = V4L2_CID_AUTOBRIGHTNESS,
  187. .type = V4L2_CTRL_TYPE_BOOLEAN,
  188. .name = "Auto Brightness",
  189. .minimum = 0,
  190. .maximum = 1,
  191. .step = 1,
  192. #define AUTOBRIGHT_DEF 1
  193. .default_value = AUTOBRIGHT_DEF,
  194. },
  195. .set = sd_setautobrightness,
  196. .get = sd_getautobrightness,
  197. },
  198. #define FREQ_IDX 6
  199. {
  200. {
  201. .id = V4L2_CID_POWER_LINE_FREQUENCY,
  202. .type = V4L2_CTRL_TYPE_MENU,
  203. .name = "Light frequency filter",
  204. .minimum = 0,
  205. .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
  206. .step = 1,
  207. #define FREQ_DEF 0
  208. .default_value = FREQ_DEF,
  209. },
  210. .set = sd_setfreq,
  211. .get = sd_getfreq,
  212. },
  213. #define OV7670_FREQ_IDX 7
  214. {
  215. {
  216. .id = V4L2_CID_POWER_LINE_FREQUENCY,
  217. .type = V4L2_CTRL_TYPE_MENU,
  218. .name = "Light frequency filter",
  219. .minimum = 0,
  220. .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */
  221. .step = 1,
  222. #define OV7670_FREQ_DEF 3
  223. .default_value = OV7670_FREQ_DEF,
  224. },
  225. .set = sd_setfreq,
  226. .get = sd_getfreq,
  227. },
  228. };
  229. static const struct v4l2_pix_format ov519_vga_mode[] = {
  230. {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  231. .bytesperline = 320,
  232. .sizeimage = 320 * 240 * 3 / 8 + 590,
  233. .colorspace = V4L2_COLORSPACE_JPEG,
  234. .priv = 1},
  235. {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  236. .bytesperline = 640,
  237. .sizeimage = 640 * 480 * 3 / 8 + 590,
  238. .colorspace = V4L2_COLORSPACE_JPEG,
  239. .priv = 0},
  240. };
  241. static const struct v4l2_pix_format ov519_sif_mode[] = {
  242. {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  243. .bytesperline = 160,
  244. .sizeimage = 160 * 120 * 3 / 8 + 590,
  245. .colorspace = V4L2_COLORSPACE_JPEG,
  246. .priv = 3},
  247. {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  248. .bytesperline = 176,
  249. .sizeimage = 176 * 144 * 3 / 8 + 590,
  250. .colorspace = V4L2_COLORSPACE_JPEG,
  251. .priv = 1},
  252. {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  253. .bytesperline = 320,
  254. .sizeimage = 320 * 240 * 3 / 8 + 590,
  255. .colorspace = V4L2_COLORSPACE_JPEG,
  256. .priv = 2},
  257. {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  258. .bytesperline = 352,
  259. .sizeimage = 352 * 288 * 3 / 8 + 590,
  260. .colorspace = V4L2_COLORSPACE_JPEG,
  261. .priv = 0},
  262. };
  263. /* Note some of the sizeimage values for the ov511 / ov518 may seem
  264. larger then necessary, however they need to be this big as the ov511 /
  265. ov518 always fills the entire isoc frame, using 0 padding bytes when
  266. it doesn't have any data. So with low framerates the amount of data
  267. transfered can become quite large (libv4l will remove all the 0 padding
  268. in userspace). */
  269. static const struct v4l2_pix_format ov518_vga_mode[] = {
  270. {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  271. .bytesperline = 320,
  272. .sizeimage = 320 * 240 * 3,
  273. .colorspace = V4L2_COLORSPACE_JPEG,
  274. .priv = 1},
  275. {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  276. .bytesperline = 640,
  277. .sizeimage = 640 * 480 * 2,
  278. .colorspace = V4L2_COLORSPACE_JPEG,
  279. .priv = 0},
  280. };
  281. static const struct v4l2_pix_format ov518_sif_mode[] = {
  282. {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  283. .bytesperline = 160,
  284. .sizeimage = 70000,
  285. .colorspace = V4L2_COLORSPACE_JPEG,
  286. .priv = 3},
  287. {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  288. .bytesperline = 176,
  289. .sizeimage = 70000,
  290. .colorspace = V4L2_COLORSPACE_JPEG,
  291. .priv = 1},
  292. {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  293. .bytesperline = 320,
  294. .sizeimage = 320 * 240 * 3,
  295. .colorspace = V4L2_COLORSPACE_JPEG,
  296. .priv = 2},
  297. {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  298. .bytesperline = 352,
  299. .sizeimage = 352 * 288 * 3,
  300. .colorspace = V4L2_COLORSPACE_JPEG,
  301. .priv = 0},
  302. };
  303. static const struct v4l2_pix_format ov511_vga_mode[] = {
  304. {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  305. .bytesperline = 320,
  306. .sizeimage = 320 * 240 * 3,
  307. .colorspace = V4L2_COLORSPACE_JPEG,
  308. .priv = 1},
  309. {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  310. .bytesperline = 640,
  311. .sizeimage = 640 * 480 * 2,
  312. .colorspace = V4L2_COLORSPACE_JPEG,
  313. .priv = 0},
  314. };
  315. static const struct v4l2_pix_format ov511_sif_mode[] = {
  316. {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  317. .bytesperline = 160,
  318. .sizeimage = 70000,
  319. .colorspace = V4L2_COLORSPACE_JPEG,
  320. .priv = 3},
  321. {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  322. .bytesperline = 176,
  323. .sizeimage = 70000,
  324. .colorspace = V4L2_COLORSPACE_JPEG,
  325. .priv = 1},
  326. {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  327. .bytesperline = 320,
  328. .sizeimage = 320 * 240 * 3,
  329. .colorspace = V4L2_COLORSPACE_JPEG,
  330. .priv = 2},
  331. {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  332. .bytesperline = 352,
  333. .sizeimage = 352 * 288 * 3,
  334. .colorspace = V4L2_COLORSPACE_JPEG,
  335. .priv = 0},
  336. };
  337. static const struct v4l2_pix_format ovfx2_vga_mode[] = {
  338. {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  339. .bytesperline = 320,
  340. .sizeimage = 320 * 240,
  341. .colorspace = V4L2_COLORSPACE_SRGB,
  342. .priv = 1},
  343. {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  344. .bytesperline = 640,
  345. .sizeimage = 640 * 480,
  346. .colorspace = V4L2_COLORSPACE_SRGB,
  347. .priv = 0},
  348. };
  349. static const struct v4l2_pix_format ovfx2_cif_mode[] = {
  350. {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  351. .bytesperline = 160,
  352. .sizeimage = 160 * 120,
  353. .colorspace = V4L2_COLORSPACE_SRGB,
  354. .priv = 3},
  355. {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  356. .bytesperline = 176,
  357. .sizeimage = 176 * 144,
  358. .colorspace = V4L2_COLORSPACE_SRGB,
  359. .priv = 1},
  360. {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  361. .bytesperline = 320,
  362. .sizeimage = 320 * 240,
  363. .colorspace = V4L2_COLORSPACE_SRGB,
  364. .priv = 2},
  365. {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  366. .bytesperline = 352,
  367. .sizeimage = 352 * 288,
  368. .colorspace = V4L2_COLORSPACE_SRGB,
  369. .priv = 0},
  370. };
  371. static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
  372. {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  373. .bytesperline = 1600,
  374. .sizeimage = 1600 * 1200,
  375. .colorspace = V4L2_COLORSPACE_SRGB},
  376. };
  377. static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
  378. {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  379. .bytesperline = 640,
  380. .sizeimage = 640 * 480,
  381. .colorspace = V4L2_COLORSPACE_SRGB,
  382. .priv = 1},
  383. {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  384. .bytesperline = 800,
  385. .sizeimage = 800 * 600,
  386. .colorspace = V4L2_COLORSPACE_SRGB,
  387. .priv = 1},
  388. {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  389. .bytesperline = 1024,
  390. .sizeimage = 1024 * 768,
  391. .colorspace = V4L2_COLORSPACE_SRGB,
  392. .priv = 1},
  393. {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  394. .bytesperline = 1600,
  395. .sizeimage = 1600 * 1200,
  396. .colorspace = V4L2_COLORSPACE_SRGB,
  397. .priv = 0},
  398. {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  399. .bytesperline = 2048,
  400. .sizeimage = 2048 * 1536,
  401. .colorspace = V4L2_COLORSPACE_SRGB,
  402. .priv = 0},
  403. };
  404. /* Registers common to OV511 / OV518 */
  405. #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
  406. #define R51x_SYS_RESET 0x50
  407. /* Reset type flags */
  408. #define OV511_RESET_OMNICE 0x08
  409. #define R51x_SYS_INIT 0x53
  410. #define R51x_SYS_SNAP 0x52
  411. #define R51x_SYS_CUST_ID 0x5F
  412. #define R51x_COMP_LUT_BEGIN 0x80
  413. /* OV511 Camera interface register numbers */
  414. #define R511_CAM_DELAY 0x10
  415. #define R511_CAM_EDGE 0x11
  416. #define R511_CAM_PXCNT 0x12
  417. #define R511_CAM_LNCNT 0x13
  418. #define R511_CAM_PXDIV 0x14
  419. #define R511_CAM_LNDIV 0x15
  420. #define R511_CAM_UV_EN 0x16
  421. #define R511_CAM_LINE_MODE 0x17
  422. #define R511_CAM_OPTS 0x18
  423. #define R511_SNAP_FRAME 0x19
  424. #define R511_SNAP_PXCNT 0x1A
  425. #define R511_SNAP_LNCNT 0x1B
  426. #define R511_SNAP_PXDIV 0x1C
  427. #define R511_SNAP_LNDIV 0x1D
  428. #define R511_SNAP_UV_EN 0x1E
  429. #define R511_SNAP_UV_EN 0x1E
  430. #define R511_SNAP_OPTS 0x1F
  431. #define R511_DRAM_FLOW_CTL 0x20
  432. #define R511_FIFO_OPTS 0x31
  433. #define R511_I2C_CTL 0x40
  434. #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
  435. #define R511_COMP_EN 0x78
  436. #define R511_COMP_LUT_EN 0x79
  437. /* OV518 Camera interface register numbers */
  438. #define R518_GPIO_OUT 0x56 /* OV518(+) only */
  439. #define R518_GPIO_CTL 0x57 /* OV518(+) only */
  440. /* OV519 Camera interface register numbers */
  441. #define OV519_R10_H_SIZE 0x10
  442. #define OV519_R11_V_SIZE 0x11
  443. #define OV519_R12_X_OFFSETL 0x12
  444. #define OV519_R13_X_OFFSETH 0x13
  445. #define OV519_R14_Y_OFFSETL 0x14
  446. #define OV519_R15_Y_OFFSETH 0x15
  447. #define OV519_R16_DIVIDER 0x16
  448. #define OV519_R20_DFR 0x20
  449. #define OV519_R25_FORMAT 0x25
  450. /* OV519 System Controller register numbers */
  451. #define OV519_SYS_RESET1 0x51
  452. #define OV519_SYS_EN_CLK1 0x54
  453. #define OV519_GPIO_DATA_OUT0 0x71
  454. #define OV519_GPIO_IO_CTRL0 0x72
  455. #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
  456. /*
  457. * The FX2 chip does not give us a zero length read at end of frame.
  458. * It does, however, give a short read at the end of a frame, if
  459. * neccessary, rather than run two frames together.
  460. *
  461. * By choosing the right bulk transfer size, we are guaranteed to always
  462. * get a short read for the last read of each frame. Frame sizes are
  463. * always a composite number (width * height, or a multiple) so if we
  464. * choose a prime number, we are guaranteed that the last read of a
  465. * frame will be short.
  466. *
  467. * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
  468. * otherwise EOVERFLOW "babbling" errors occur. I have not been able
  469. * to figure out why. [PMiller]
  470. *
  471. * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
  472. *
  473. * It isn't enough to know the number of bytes per frame, in case we
  474. * have data dropouts or buffer overruns (even though the FX2 double
  475. * buffers, there are some pretty strict real time constraints for
  476. * isochronous transfer for larger frame sizes).
  477. */
  478. #define OVFX2_BULK_SIZE (13 * 4096)
  479. /* I2C registers */
  480. #define R51x_I2C_W_SID 0x41
  481. #define R51x_I2C_SADDR_3 0x42
  482. #define R51x_I2C_SADDR_2 0x43
  483. #define R51x_I2C_R_SID 0x44
  484. #define R51x_I2C_DATA 0x45
  485. #define R518_I2C_CTL 0x47 /* OV518(+) only */
  486. #define OVFX2_I2C_ADDR 0x00
  487. /* I2C ADDRESSES */
  488. #define OV7xx0_SID 0x42
  489. #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
  490. #define OV8xx0_SID 0xa0
  491. #define OV6xx0_SID 0xc0
  492. /* OV7610 registers */
  493. #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
  494. #define OV7610_REG_BLUE 0x01 /* blue channel balance */
  495. #define OV7610_REG_RED 0x02 /* red channel balance */
  496. #define OV7610_REG_SAT 0x03 /* saturation */
  497. #define OV8610_REG_HUE 0x04 /* 04 reserved */
  498. #define OV7610_REG_CNT 0x05 /* Y contrast */
  499. #define OV7610_REG_BRT 0x06 /* Y brightness */
  500. #define OV7610_REG_COM_C 0x14 /* misc common regs */
  501. #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
  502. #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
  503. #define OV7610_REG_COM_I 0x29 /* misc settings */
  504. /* OV7670 registers */
  505. #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
  506. #define OV7670_REG_BLUE 0x01 /* blue gain */
  507. #define OV7670_REG_RED 0x02 /* red gain */
  508. #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
  509. #define OV7670_REG_COM1 0x04 /* Control 1 */
  510. #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
  511. #define OV7670_REG_COM3 0x0c /* Control 3 */
  512. #define OV7670_REG_COM4 0x0d /* Control 4 */
  513. #define OV7670_REG_COM5 0x0e /* All "reserved" */
  514. #define OV7670_REG_COM6 0x0f /* Control 6 */
  515. #define OV7670_REG_AECH 0x10 /* More bits of AEC value */
  516. #define OV7670_REG_CLKRC 0x11 /* Clock control */
  517. #define OV7670_REG_COM7 0x12 /* Control 7 */
  518. #define OV7670_COM7_FMT_VGA 0x00
  519. #define OV7670_COM7_YUV 0x00 /* YUV */
  520. #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
  521. #define OV7670_COM7_FMT_MASK 0x38
  522. #define OV7670_COM7_RESET 0x80 /* Register reset */
  523. #define OV7670_REG_COM8 0x13 /* Control 8 */
  524. #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
  525. #define OV7670_COM8_AWB 0x02 /* White balance enable */
  526. #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
  527. #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
  528. #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
  529. #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
  530. #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
  531. #define OV7670_REG_COM10 0x15 /* Control 10 */
  532. #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
  533. #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
  534. #define OV7670_REG_VSTART 0x19 /* Vert start high bits */
  535. #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
  536. #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
  537. #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
  538. #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
  539. #define OV7670_REG_AEW 0x24 /* AGC upper limit */
  540. #define OV7670_REG_AEB 0x25 /* AGC lower limit */
  541. #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
  542. #define OV7670_REG_HREF 0x32 /* HREF pieces */
  543. #define OV7670_REG_TSLB 0x3a /* lots of stuff */
  544. #define OV7670_REG_COM11 0x3b /* Control 11 */
  545. #define OV7670_COM11_EXP 0x02
  546. #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
  547. #define OV7670_REG_COM12 0x3c /* Control 12 */
  548. #define OV7670_REG_COM13 0x3d /* Control 13 */
  549. #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
  550. #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
  551. #define OV7670_REG_COM14 0x3e /* Control 14 */
  552. #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
  553. #define OV7670_REG_COM15 0x40 /* Control 15 */
  554. #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
  555. #define OV7670_REG_COM16 0x41 /* Control 16 */
  556. #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
  557. #define OV7670_REG_BRIGHT 0x55 /* Brightness */
  558. #define OV7670_REG_CONTRAS 0x56 /* Contrast control */
  559. #define OV7670_REG_GFIX 0x69 /* Fix gain control */
  560. #define OV7670_REG_RGB444 0x8c /* RGB 444 control */
  561. #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
  562. #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
  563. #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
  564. #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
  565. #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
  566. #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
  567. #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
  568. #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
  569. #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
  570. struct ov_regvals {
  571. __u8 reg;
  572. __u8 val;
  573. };
  574. struct ov_i2c_regvals {
  575. __u8 reg;
  576. __u8 val;
  577. };
  578. /* Settings for OV2610 camera chip */
  579. static const struct ov_i2c_regvals norm_2610[] =
  580. {
  581. { 0x12, 0x80 }, /* reset */
  582. };
  583. static const struct ov_i2c_regvals norm_3620b[] =
  584. {
  585. /*
  586. * From the datasheet: "Note that after writing to register COMH
  587. * (0x12) to change the sensor mode, registers related to the
  588. * sensor’s cropping window will be reset back to their default
  589. * values."
  590. *
  591. * "wait 4096 external clock ... to make sure the sensor is
  592. * stable and ready to access registers" i.e. 160us at 24MHz
  593. */
  594. { 0x12, 0x80 }, /* COMH reset */
  595. { 0x12, 0x00 }, /* QXGA, master */
  596. /*
  597. * 11 CLKRC "Clock Rate Control"
  598. * [7] internal frequency doublers: on
  599. * [6] video port mode: master
  600. * [5:0] clock divider: 1
  601. */
  602. { 0x11, 0x80 },
  603. /*
  604. * 13 COMI "Common Control I"
  605. * = 192 (0xC0) 11000000
  606. * COMI[7] "AEC speed selection"
  607. * = 1 (0x01) 1....... "Faster AEC correction"
  608. * COMI[6] "AEC speed step selection"
  609. * = 1 (0x01) .1...... "Big steps, fast"
  610. * COMI[5] "Banding filter on off"
  611. * = 0 (0x00) ..0..... "Off"
  612. * COMI[4] "Banding filter option"
  613. * = 0 (0x00) ...0.... "Main clock is 48 MHz and
  614. * the PLL is ON"
  615. * COMI[3] "Reserved"
  616. * = 0 (0x00) ....0...
  617. * COMI[2] "AGC auto manual control selection"
  618. * = 0 (0x00) .....0.. "Manual"
  619. * COMI[1] "AWB auto manual control selection"
  620. * = 0 (0x00) ......0. "Manual"
  621. * COMI[0] "Exposure control"
  622. * = 0 (0x00) .......0 "Manual"
  623. */
  624. { 0x13, 0xC0 },
  625. /*
  626. * 09 COMC "Common Control C"
  627. * = 8 (0x08) 00001000
  628. * COMC[7:5] "Reserved"
  629. * = 0 (0x00) 000.....
  630. * COMC[4] "Sleep Mode Enable"
  631. * = 0 (0x00) ...0.... "Normal mode"
  632. * COMC[3:2] "Sensor sampling reset timing selection"
  633. * = 2 (0x02) ....10.. "Longer reset time"
  634. * COMC[1:0] "Output drive current select"
  635. * = 0 (0x00) ......00 "Weakest"
  636. */
  637. { 0x09, 0x08 },
  638. /*
  639. * 0C COMD "Common Control D"
  640. * = 8 (0x08) 00001000
  641. * COMD[7] "Reserved"
  642. * = 0 (0x00) 0.......
  643. * COMD[6] "Swap MSB and LSB at the output port"
  644. * = 0 (0x00) .0...... "False"
  645. * COMD[5:3] "Reserved"
  646. * = 1 (0x01) ..001...
  647. * COMD[2] "Output Average On Off"
  648. * = 0 (0x00) .....0.. "Output Normal"
  649. * COMD[1] "Sensor precharge voltage selection"
  650. * = 0 (0x00) ......0. "Selects internal
  651. * reference precharge
  652. * voltage"
  653. * COMD[0] "Snapshot option"
  654. * = 0 (0x00) .......0 "Enable live video output
  655. * after snapshot sequence"
  656. */
  657. { 0x0c, 0x08 },
  658. /*
  659. * 0D COME "Common Control E"
  660. * = 161 (0xA1) 10100001
  661. * COME[7] "Output average option"
  662. * = 1 (0x01) 1....... "Output average of 4 pixels"
  663. * COME[6] "Anti-blooming control"
  664. * = 0 (0x00) .0...... "Off"
  665. * COME[5:3] "Reserved"
  666. * = 4 (0x04) ..100...
  667. * COME[2] "Clock output power down pin status"
  668. * = 0 (0x00) .....0.. "Tri-state data output pin
  669. * on power down"
  670. * COME[1] "Data output pin status selection at power down"
  671. * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
  672. * HREF, and CHSYNC pins on
  673. * power down"
  674. * COME[0] "Auto zero circuit select"
  675. * = 1 (0x01) .......1 "On"
  676. */
  677. { 0x0d, 0xA1 },
  678. /*
  679. * 0E COMF "Common Control F"
  680. * = 112 (0x70) 01110000
  681. * COMF[7] "System clock selection"
  682. * = 0 (0x00) 0....... "Use 24 MHz system clock"
  683. * COMF[6:4] "Reserved"
  684. * = 7 (0x07) .111....
  685. * COMF[3] "Manual auto negative offset canceling selection"
  686. * = 0 (0x00) ....0... "Auto detect negative
  687. * offset and cancel it"
  688. * COMF[2:0] "Reserved"
  689. * = 0 (0x00) .....000
  690. */
  691. { 0x0e, 0x70 },
  692. /*
  693. * 0F COMG "Common Control G"
  694. * = 66 (0x42) 01000010
  695. * COMG[7] "Optical black output selection"
  696. * = 0 (0x00) 0....... "Disable"
  697. * COMG[6] "Black level calibrate selection"
  698. * = 1 (0x01) .1...... "Use optical black pixels
  699. * to calibrate"
  700. * COMG[5:4] "Reserved"
  701. * = 0 (0x00) ..00....
  702. * COMG[3] "Channel offset adjustment"
  703. * = 0 (0x00) ....0... "Disable offset adjustment"
  704. * COMG[2] "ADC black level calibration option"
  705. * = 0 (0x00) .....0.. "Use B/G line and G/R
  706. * line to calibrate each
  707. * channel's black level"
  708. * COMG[1] "Reserved"
  709. * = 1 (0x01) ......1.
  710. * COMG[0] "ADC black level calibration enable"
  711. * = 0 (0x00) .......0 "Disable"
  712. */
  713. { 0x0f, 0x42 },
  714. /*
  715. * 14 COMJ "Common Control J"
  716. * = 198 (0xC6) 11000110
  717. * COMJ[7:6] "AGC gain ceiling"
  718. * = 3 (0x03) 11...... "8x"
  719. * COMJ[5:4] "Reserved"
  720. * = 0 (0x00) ..00....
  721. * COMJ[3] "Auto banding filter"
  722. * = 0 (0x00) ....0... "Banding filter is always
  723. * on off depending on
  724. * COMI[5] setting"
  725. * COMJ[2] "VSYNC drop option"
  726. * = 1 (0x01) .....1.. "SYNC is dropped if frame
  727. * data is dropped"
  728. * COMJ[1] "Frame data drop"
  729. * = 1 (0x01) ......1. "Drop frame data if
  730. * exposure is not within
  731. * tolerance. In AEC mode,
  732. * data is normally dropped
  733. * when data is out of
  734. * range."
  735. * COMJ[0] "Reserved"
  736. * = 0 (0x00) .......0
  737. */
  738. { 0x14, 0xC6 },
  739. /*
  740. * 15 COMK "Common Control K"
  741. * = 2 (0x02) 00000010
  742. * COMK[7] "CHSYNC pin output swap"
  743. * = 0 (0x00) 0....... "CHSYNC"
  744. * COMK[6] "HREF pin output swap"
  745. * = 0 (0x00) .0...... "HREF"
  746. * COMK[5] "PCLK output selection"
  747. * = 0 (0x00) ..0..... "PCLK always output"
  748. * COMK[4] "PCLK edge selection"
  749. * = 0 (0x00) ...0.... "Data valid on falling edge"
  750. * COMK[3] "HREF output polarity"
  751. * = 0 (0x00) ....0... "positive"
  752. * COMK[2] "Reserved"
  753. * = 0 (0x00) .....0..
  754. * COMK[1] "VSYNC polarity"
  755. * = 1 (0x01) ......1. "negative"
  756. * COMK[0] "HSYNC polarity"
  757. * = 0 (0x00) .......0 "positive"
  758. */
  759. { 0x15, 0x02 },
  760. /*
  761. * 33 CHLF "Current Control"
  762. * = 9 (0x09) 00001001
  763. * CHLF[7:6] "Sensor current control"
  764. * = 0 (0x00) 00......
  765. * CHLF[5] "Sensor current range control"
  766. * = 0 (0x00) ..0..... "normal range"
  767. * CHLF[4] "Sensor current"
  768. * = 0 (0x00) ...0.... "normal current"
  769. * CHLF[3] "Sensor buffer current control"
  770. * = 1 (0x01) ....1... "half current"
  771. * CHLF[2] "Column buffer current control"
  772. * = 0 (0x00) .....0.. "normal current"
  773. * CHLF[1] "Analog DSP current control"
  774. * = 0 (0x00) ......0. "normal current"
  775. * CHLF[1] "ADC current control"
  776. * = 0 (0x00) ......0. "normal current"
  777. */
  778. { 0x33, 0x09 },
  779. /*
  780. * 34 VBLM "Blooming Control"
  781. * = 80 (0x50) 01010000
  782. * VBLM[7] "Hard soft reset switch"
  783. * = 0 (0x00) 0....... "Hard reset"
  784. * VBLM[6:4] "Blooming voltage selection"
  785. * = 5 (0x05) .101....
  786. * VBLM[3:0] "Sensor current control"
  787. * = 0 (0x00) ....0000
  788. */
  789. { 0x34, 0x50 },
  790. /*
  791. * 36 VCHG "Sensor Precharge Voltage Control"
  792. * = 0 (0x00) 00000000
  793. * VCHG[7] "Reserved"
  794. * = 0 (0x00) 0.......
  795. * VCHG[6:4] "Sensor precharge voltage control"
  796. * = 0 (0x00) .000....
  797. * VCHG[3:0] "Sensor array common reference"
  798. * = 0 (0x00) ....0000
  799. */
  800. { 0x36, 0x00 },
  801. /*
  802. * 37 ADC "ADC Reference Control"
  803. * = 4 (0x04) 00000100
  804. * ADC[7:4] "Reserved"
  805. * = 0 (0x00) 0000....
  806. * ADC[3] "ADC input signal range"
  807. * = 0 (0x00) ....0... "Input signal 1.0x"
  808. * ADC[2:0] "ADC range control"
  809. * = 4 (0x04) .....100
  810. */
  811. { 0x37, 0x04 },
  812. /*
  813. * 38 ACOM "Analog Common Ground"
  814. * = 82 (0x52) 01010010
  815. * ACOM[7] "Analog gain control"
  816. * = 0 (0x00) 0....... "Gain 1x"
  817. * ACOM[6] "Analog black level calibration"
  818. * = 1 (0x01) .1...... "On"
  819. * ACOM[5:0] "Reserved"
  820. * = 18 (0x12) ..010010
  821. */
  822. { 0x38, 0x52 },
  823. /*
  824. * 3A FREFA "Internal Reference Adjustment"
  825. * = 0 (0x00) 00000000
  826. * FREFA[7:0] "Range"
  827. * = 0 (0x00) 00000000
  828. */
  829. { 0x3a, 0x00 },
  830. /*
  831. * 3C FVOPT "Internal Reference Adjustment"
  832. * = 31 (0x1F) 00011111
  833. * FVOPT[7:0] "Range"
  834. * = 31 (0x1F) 00011111
  835. */
  836. { 0x3c, 0x1F },
  837. /*
  838. * 44 Undocumented = 0 (0x00) 00000000
  839. * 44[7:0] "It's a secret"
  840. * = 0 (0x00) 00000000
  841. */
  842. { 0x44, 0x00 },
  843. /*
  844. * 40 Undocumented = 0 (0x00) 00000000
  845. * 40[7:0] "It's a secret"
  846. * = 0 (0x00) 00000000
  847. */
  848. { 0x40, 0x00 },
  849. /*
  850. * 41 Undocumented = 0 (0x00) 00000000
  851. * 41[7:0] "It's a secret"
  852. * = 0 (0x00) 00000000
  853. */
  854. { 0x41, 0x00 },
  855. /*
  856. * 42 Undocumented = 0 (0x00) 00000000
  857. * 42[7:0] "It's a secret"
  858. * = 0 (0x00) 00000000
  859. */
  860. { 0x42, 0x00 },
  861. /*
  862. * 43 Undocumented = 0 (0x00) 00000000
  863. * 43[7:0] "It's a secret"
  864. * = 0 (0x00) 00000000
  865. */
  866. { 0x43, 0x00 },
  867. /*
  868. * 45 Undocumented = 128 (0x80) 10000000
  869. * 45[7:0] "It's a secret"
  870. * = 128 (0x80) 10000000
  871. */
  872. { 0x45, 0x80 },
  873. /*
  874. * 48 Undocumented = 192 (0xC0) 11000000
  875. * 48[7:0] "It's a secret"
  876. * = 192 (0xC0) 11000000
  877. */
  878. { 0x48, 0xC0 },
  879. /*
  880. * 49 Undocumented = 25 (0x19) 00011001
  881. * 49[7:0] "It's a secret"
  882. * = 25 (0x19) 00011001
  883. */
  884. { 0x49, 0x19 },
  885. /*
  886. * 4B Undocumented = 128 (0x80) 10000000
  887. * 4B[7:0] "It's a secret"
  888. * = 128 (0x80) 10000000
  889. */
  890. { 0x4B, 0x80 },
  891. /*
  892. * 4D Undocumented = 196 (0xC4) 11000100
  893. * 4D[7:0] "It's a secret"
  894. * = 196 (0xC4) 11000100
  895. */
  896. { 0x4D, 0xC4 },
  897. /*
  898. * 35 VREF "Reference Voltage Control"
  899. * = 76 (0x4C) 01001100
  900. * VREF[7:5] "Column high reference control"
  901. * = 2 (0x02) 010..... "higher voltage"
  902. * VREF[4:2] "Column low reference control"
  903. * = 3 (0x03) ...011.. "Highest voltage"
  904. * VREF[1:0] "Reserved"
  905. * = 0 (0x00) ......00
  906. */
  907. { 0x35, 0x4C },
  908. /*
  909. * 3D Undocumented = 0 (0x00) 00000000
  910. * 3D[7:0] "It's a secret"
  911. * = 0 (0x00) 00000000
  912. */
  913. { 0x3D, 0x00 },
  914. /*
  915. * 3E Undocumented = 0 (0x00) 00000000
  916. * 3E[7:0] "It's a secret"
  917. * = 0 (0x00) 00000000
  918. */
  919. { 0x3E, 0x00 },
  920. /*
  921. * 3B FREFB "Internal Reference Adjustment"
  922. * = 24 (0x18) 00011000
  923. * FREFB[7:0] "Range"
  924. * = 24 (0x18) 00011000
  925. */
  926. { 0x3b, 0x18 },
  927. /*
  928. * 33 CHLF "Current Control"
  929. * = 25 (0x19) 00011001
  930. * CHLF[7:6] "Sensor current control"
  931. * = 0 (0x00) 00......
  932. * CHLF[5] "Sensor current range control"
  933. * = 0 (0x00) ..0..... "normal range"
  934. * CHLF[4] "Sensor current"
  935. * = 1 (0x01) ...1.... "double current"
  936. * CHLF[3] "Sensor buffer current control"
  937. * = 1 (0x01) ....1... "half current"
  938. * CHLF[2] "Column buffer current control"
  939. * = 0 (0x00) .....0.. "normal current"
  940. * CHLF[1] "Analog DSP current control"
  941. * = 0 (0x00) ......0. "normal current"
  942. * CHLF[1] "ADC current control"
  943. * = 0 (0x00) ......0. "normal current"
  944. */
  945. { 0x33, 0x19 },
  946. /*
  947. * 34 VBLM "Blooming Control"
  948. * = 90 (0x5A) 01011010
  949. * VBLM[7] "Hard soft reset switch"
  950. * = 0 (0x00) 0....... "Hard reset"
  951. * VBLM[6:4] "Blooming voltage selection"
  952. * = 5 (0x05) .101....
  953. * VBLM[3:0] "Sensor current control"
  954. * = 10 (0x0A) ....1010
  955. */
  956. { 0x34, 0x5A },
  957. /*
  958. * 3B FREFB "Internal Reference Adjustment"
  959. * = 0 (0x00) 00000000
  960. * FREFB[7:0] "Range"
  961. * = 0 (0x00) 00000000
  962. */
  963. { 0x3b, 0x00 },
  964. /*
  965. * 33 CHLF "Current Control"
  966. * = 9 (0x09) 00001001
  967. * CHLF[7:6] "Sensor current control"
  968. * = 0 (0x00) 00......
  969. * CHLF[5] "Sensor current range control"
  970. * = 0 (0x00) ..0..... "normal range"
  971. * CHLF[4] "Sensor current"
  972. * = 0 (0x00) ...0.... "normal current"
  973. * CHLF[3] "Sensor buffer current control"
  974. * = 1 (0x01) ....1... "half current"
  975. * CHLF[2] "Column buffer current control"
  976. * = 0 (0x00) .....0.. "normal current"
  977. * CHLF[1] "Analog DSP current control"
  978. * = 0 (0x00) ......0. "normal current"
  979. * CHLF[1] "ADC current control"
  980. * = 0 (0x00) ......0. "normal current"
  981. */
  982. { 0x33, 0x09 },
  983. /*
  984. * 34 VBLM "Blooming Control"
  985. * = 80 (0x50) 01010000
  986. * VBLM[7] "Hard soft reset switch"
  987. * = 0 (0x00) 0....... "Hard reset"
  988. * VBLM[6:4] "Blooming voltage selection"
  989. * = 5 (0x05) .101....
  990. * VBLM[3:0] "Sensor current control"
  991. * = 0 (0x00) ....0000
  992. */
  993. { 0x34, 0x50 },
  994. /*
  995. * 12 COMH "Common Control H"
  996. * = 64 (0x40) 01000000
  997. * COMH[7] "SRST"
  998. * = 0 (0x00) 0....... "No-op"
  999. * COMH[6:4] "Resolution selection"
  1000. * = 4 (0x04) .100.... "XGA"
  1001. * COMH[3] "Master slave selection"
  1002. * = 0 (0x00) ....0... "Master mode"
  1003. * COMH[2] "Internal B/R channel option"
  1004. * = 0 (0x00) .....0.. "B/R use same channel"
  1005. * COMH[1] "Color bar test pattern"
  1006. * = 0 (0x00) ......0. "Off"
  1007. * COMH[0] "Reserved"
  1008. * = 0 (0x00) .......0
  1009. */
  1010. { 0x12, 0x40 },
  1011. /*
  1012. * 17 HREFST "Horizontal window start"
  1013. * = 31 (0x1F) 00011111
  1014. * HREFST[7:0] "Horizontal window start, 8 MSBs"
  1015. * = 31 (0x1F) 00011111
  1016. */
  1017. { 0x17, 0x1F },
  1018. /*
  1019. * 18 HREFEND "Horizontal window end"
  1020. * = 95 (0x5F) 01011111
  1021. * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
  1022. * = 95 (0x5F) 01011111
  1023. */
  1024. { 0x18, 0x5F },
  1025. /*
  1026. * 19 VSTRT "Vertical window start"
  1027. * = 0 (0x00) 00000000
  1028. * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
  1029. * = 0 (0x00) 00000000
  1030. */
  1031. { 0x19, 0x00 },
  1032. /*
  1033. * 1A VEND "Vertical window end"
  1034. * = 96 (0x60) 01100000
  1035. * VEND[7:0] "Vertical Window End, 8 MSBs"
  1036. * = 96 (0x60) 01100000
  1037. */
  1038. { 0x1a, 0x60 },
  1039. /*
  1040. * 32 COMM "Common Control M"
  1041. * = 18 (0x12) 00010010
  1042. * COMM[7:6] "Pixel clock divide option"
  1043. * = 0 (0x00) 00...... "/1"
  1044. * COMM[5:3] "Horizontal window end position, 3 LSBs"
  1045. * = 2 (0x02) ..010...
  1046. * COMM[2:0] "Horizontal window start position, 3 LSBs"
  1047. * = 2 (0x02) .....010
  1048. */
  1049. { 0x32, 0x12 },
  1050. /*
  1051. * 03 COMA "Common Control A"
  1052. * = 74 (0x4A) 01001010
  1053. * COMA[7:4] "AWB Update Threshold"
  1054. * = 4 (0x04) 0100....
  1055. * COMA[3:2] "Vertical window end line control 2 LSBs"
  1056. * = 2 (0x02) ....10..
  1057. * COMA[1:0] "Vertical window start line control 2 LSBs"
  1058. * = 2 (0x02) ......10
  1059. */
  1060. { 0x03, 0x4A },
  1061. /*
  1062. * 11 CLKRC "Clock Rate Control"
  1063. * = 128 (0x80) 10000000
  1064. * CLKRC[7] "Internal frequency doublers on off seclection"
  1065. * = 1 (0x01) 1....... "On"
  1066. * CLKRC[6] "Digital video master slave selection"
  1067. * = 0 (0x00) .0...... "Master mode, sensor
  1068. * provides PCLK"
  1069. * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
  1070. * = 0 (0x00) ..000000
  1071. */
  1072. { 0x11, 0x80 },
  1073. /*
  1074. * 12 COMH "Common Control H"
  1075. * = 0 (0x00) 00000000
  1076. * COMH[7] "SRST"
  1077. * = 0 (0x00) 0....... "No-op"
  1078. * COMH[6:4] "Resolution selection"
  1079. * = 0 (0x00) .000.... "QXGA"
  1080. * COMH[3] "Master slave selection"
  1081. * = 0 (0x00) ....0... "Master mode"
  1082. * COMH[2] "Internal B/R channel option"
  1083. * = 0 (0x00) .....0.. "B/R use same channel"
  1084. * COMH[1] "Color bar test pattern"
  1085. * = 0 (0x00) ......0. "Off"
  1086. * COMH[0] "Reserved"
  1087. * = 0 (0x00) .......0
  1088. */
  1089. { 0x12, 0x00 },
  1090. /*
  1091. * 12 COMH "Common Control H"
  1092. * = 64 (0x40) 01000000
  1093. * COMH[7] "SRST"
  1094. * = 0 (0x00) 0....... "No-op"
  1095. * COMH[6:4] "Resolution selection"
  1096. * = 4 (0x04) .100.... "XGA"
  1097. * COMH[3] "Master slave selection"
  1098. * = 0 (0x00) ....0... "Master mode"
  1099. * COMH[2] "Internal B/R channel option"
  1100. * = 0 (0x00) .....0.. "B/R use same channel"
  1101. * COMH[1] "Color bar test pattern"
  1102. * = 0 (0x00) ......0. "Off"
  1103. * COMH[0] "Reserved"
  1104. * = 0 (0x00) .......0
  1105. */
  1106. { 0x12, 0x40 },
  1107. /*
  1108. * 17 HREFST "Horizontal window start"
  1109. * = 31 (0x1F) 00011111
  1110. * HREFST[7:0] "Horizontal window start, 8 MSBs"
  1111. * = 31 (0x1F) 00011111
  1112. */
  1113. { 0x17, 0x1F },
  1114. /*
  1115. * 18 HREFEND "Horizontal window end"
  1116. * = 95 (0x5F) 01011111
  1117. * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
  1118. * = 95 (0x5F) 01011111
  1119. */
  1120. { 0x18, 0x5F },
  1121. /*
  1122. * 19 VSTRT "Vertical window start"
  1123. * = 0 (0x00) 00000000
  1124. * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
  1125. * = 0 (0x00) 00000000
  1126. */
  1127. { 0x19, 0x00 },
  1128. /*
  1129. * 1A VEND "Vertical window end"
  1130. * = 96 (0x60) 01100000
  1131. * VEND[7:0] "Vertical Window End, 8 MSBs"
  1132. * = 96 (0x60) 01100000
  1133. */
  1134. { 0x1a, 0x60 },
  1135. /*
  1136. * 32 COMM "Common Control M"
  1137. * = 18 (0x12) 00010010
  1138. * COMM[7:6] "Pixel clock divide option"
  1139. * = 0 (0x00) 00...... "/1"
  1140. * COMM[5:3] "Horizontal window end position, 3 LSBs"
  1141. * = 2 (0x02) ..010...
  1142. * COMM[2:0] "Horizontal window start position, 3 LSBs"
  1143. * = 2 (0x02) .....010
  1144. */
  1145. { 0x32, 0x12 },
  1146. /*
  1147. * 03 COMA "Common Control A"
  1148. * = 74 (0x4A) 01001010
  1149. * COMA[7:4] "AWB Update Threshold"
  1150. * = 4 (0x04) 0100....
  1151. * COMA[3:2] "Vertical window end line control 2 LSBs"
  1152. * = 2 (0x02) ....10..
  1153. * COMA[1:0] "Vertical window start line control 2 LSBs"
  1154. * = 2 (0x02) ......10
  1155. */
  1156. { 0x03, 0x4A },
  1157. /*
  1158. * 02 RED "Red Gain Control"
  1159. * = 175 (0xAF) 10101111
  1160. * RED[7] "Action"
  1161. * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
  1162. * RED[6:0] "Value"
  1163. * = 47 (0x2F) .0101111
  1164. */
  1165. { 0x02, 0xAF },
  1166. /*
  1167. * 2D ADDVSL "VSYNC Pulse Width"
  1168. * = 210 (0xD2) 11010010
  1169. * ADDVSL[7:0] "VSYNC pulse width, LSB"
  1170. * = 210 (0xD2) 11010010
  1171. */
  1172. { 0x2d, 0xD2 },
  1173. /*
  1174. * 00 GAIN = 24 (0x18) 00011000
  1175. * GAIN[7:6] "Reserved"
  1176. * = 0 (0x00) 00......
  1177. * GAIN[5] "Double"
  1178. * = 0 (0x00) ..0..... "False"
  1179. * GAIN[4] "Double"
  1180. * = 1 (0x01) ...1.... "True"
  1181. * GAIN[3:0] "Range"
  1182. * = 8 (0x08) ....1000
  1183. */
  1184. { 0x00, 0x18 },
  1185. /*
  1186. * 01 BLUE "Blue Gain Control"
  1187. * = 240 (0xF0) 11110000
  1188. * BLUE[7] "Action"
  1189. * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
  1190. * BLUE[6:0] "Value"
  1191. * = 112 (0x70) .1110000
  1192. */
  1193. { 0x01, 0xF0 },
  1194. /*
  1195. * 10 AEC "Automatic Exposure Control"
  1196. * = 10 (0x0A) 00001010
  1197. * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
  1198. * = 10 (0x0A) 00001010
  1199. */
  1200. { 0x10, 0x0A },
  1201. { 0xE1, 0x67 },
  1202. { 0xE3, 0x03 },
  1203. { 0xE4, 0x26 },
  1204. { 0xE5, 0x3E },
  1205. { 0xF8, 0x01 },
  1206. { 0xFF, 0x01 },
  1207. };
  1208. static const struct ov_i2c_regvals norm_6x20[] = {
  1209. { 0x12, 0x80 }, /* reset */
  1210. { 0x11, 0x01 },
  1211. { 0x03, 0x60 },
  1212. { 0x05, 0x7f }, /* For when autoadjust is off */
  1213. { 0x07, 0xa8 },
  1214. /* The ratio of 0x0c and 0x0d controls the white point */
  1215. { 0x0c, 0x24 },
  1216. { 0x0d, 0x24 },
  1217. { 0x0f, 0x15 }, /* COMS */
  1218. { 0x10, 0x75 }, /* AEC Exposure time */
  1219. { 0x12, 0x24 }, /* Enable AGC */
  1220. { 0x14, 0x04 },
  1221. /* 0x16: 0x06 helps frame stability with moving objects */
  1222. { 0x16, 0x06 },
  1223. /* { 0x20, 0x30 }, * Aperture correction enable */
  1224. { 0x26, 0xb2 }, /* BLC enable */
  1225. /* 0x28: 0x05 Selects RGB format if RGB on */
  1226. { 0x28, 0x05 },
  1227. { 0x2a, 0x04 }, /* Disable framerate adjust */
  1228. /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
  1229. { 0x2d, 0x85 },
  1230. { 0x33, 0xa0 }, /* Color Processing Parameter */
  1231. { 0x34, 0xd2 }, /* Max A/D range */
  1232. { 0x38, 0x8b },
  1233. { 0x39, 0x40 },
  1234. { 0x3c, 0x39 }, /* Enable AEC mode changing */
  1235. { 0x3c, 0x3c }, /* Change AEC mode */
  1236. { 0x3c, 0x24 }, /* Disable AEC mode changing */
  1237. { 0x3d, 0x80 },
  1238. /* These next two registers (0x4a, 0x4b) are undocumented.
  1239. * They control the color balance */
  1240. { 0x4a, 0x80 },
  1241. { 0x4b, 0x80 },
  1242. { 0x4d, 0xd2 }, /* This reduces noise a bit */
  1243. { 0x4e, 0xc1 },
  1244. { 0x4f, 0x04 },
  1245. /* Do 50-53 have any effect? */
  1246. /* Toggle 0x12[2] off and on here? */
  1247. };
  1248. static const struct ov_i2c_regvals norm_6x30[] = {
  1249. { 0x12, 0x80 }, /* Reset */
  1250. { 0x00, 0x1f }, /* Gain */
  1251. { 0x01, 0x99 }, /* Blue gain */
  1252. { 0x02, 0x7c }, /* Red gain */
  1253. { 0x03, 0xc0 }, /* Saturation */
  1254. { 0x05, 0x0a }, /* Contrast */
  1255. { 0x06, 0x95 }, /* Brightness */
  1256. { 0x07, 0x2d }, /* Sharpness */
  1257. { 0x0c, 0x20 },
  1258. { 0x0d, 0x20 },
  1259. { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
  1260. { 0x0f, 0x05 },
  1261. { 0x10, 0x9a },
  1262. { 0x11, 0x00 }, /* Pixel clock = fastest */
  1263. { 0x12, 0x24 }, /* Enable AGC and AWB */
  1264. { 0x13, 0x21 },
  1265. { 0x14, 0x80 },
  1266. { 0x15, 0x01 },
  1267. { 0x16, 0x03 },
  1268. { 0x17, 0x38 },
  1269. { 0x18, 0xea },
  1270. { 0x19, 0x04 },
  1271. { 0x1a, 0x93 },
  1272. { 0x1b, 0x00 },
  1273. { 0x1e, 0xc4 },
  1274. { 0x1f, 0x04 },
  1275. { 0x20, 0x20 },
  1276. { 0x21, 0x10 },
  1277. { 0x22, 0x88 },
  1278. { 0x23, 0xc0 }, /* Crystal circuit power level */
  1279. { 0x25, 0x9a }, /* Increase AEC black ratio */
  1280. { 0x26, 0xb2 }, /* BLC enable */
  1281. { 0x27, 0xa2 },
  1282. { 0x28, 0x00 },
  1283. { 0x29, 0x00 },
  1284. { 0x2a, 0x84 }, /* 60 Hz power */
  1285. { 0x2b, 0xa8 }, /* 60 Hz power */
  1286. { 0x2c, 0xa0 },
  1287. { 0x2d, 0x95 }, /* Enable auto-brightness */
  1288. { 0x2e, 0x88 },
  1289. { 0x33, 0x26 },
  1290. { 0x34, 0x03 },
  1291. { 0x36, 0x8f },
  1292. { 0x37, 0x80 },
  1293. { 0x38, 0x83 },
  1294. { 0x39, 0x80 },
  1295. { 0x3a, 0x0f },
  1296. { 0x3b, 0x3c },
  1297. { 0x3c, 0x1a },
  1298. { 0x3d, 0x80 },
  1299. { 0x3e, 0x80 },
  1300. { 0x3f, 0x0e },
  1301. { 0x40, 0x00 }, /* White bal */
  1302. { 0x41, 0x00 }, /* White bal */
  1303. { 0x42, 0x80 },
  1304. { 0x43, 0x3f }, /* White bal */
  1305. { 0x44, 0x80 },
  1306. { 0x45, 0x20 },
  1307. { 0x46, 0x20 },
  1308. { 0x47, 0x80 },
  1309. { 0x48, 0x7f },
  1310. { 0x49, 0x00 },
  1311. { 0x4a, 0x00 },
  1312. { 0x4b, 0x80 },
  1313. { 0x4c, 0xd0 },
  1314. { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
  1315. { 0x4e, 0x40 },
  1316. { 0x4f, 0x07 }, /* UV avg., col. killer: max */
  1317. { 0x50, 0xff },
  1318. { 0x54, 0x23 }, /* Max AGC gain: 18dB */
  1319. { 0x55, 0xff },
  1320. { 0x56, 0x12 },
  1321. { 0x57, 0x81 },
  1322. { 0x58, 0x75 },
  1323. { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
  1324. { 0x5a, 0x2c },
  1325. { 0x5b, 0x0f }, /* AWB chrominance levels */
  1326. { 0x5c, 0x10 },
  1327. { 0x3d, 0x80 },
  1328. { 0x27, 0xa6 },
  1329. { 0x12, 0x20 }, /* Toggle AWB */
  1330. { 0x12, 0x24 },
  1331. };
  1332. /* Lawrence Glaister <lg@jfm.bc.ca> reports:
  1333. *
  1334. * Register 0x0f in the 7610 has the following effects:
  1335. *
  1336. * 0x85 (AEC method 1): Best overall, good contrast range
  1337. * 0x45 (AEC method 2): Very overexposed
  1338. * 0xa5 (spec sheet default): Ok, but the black level is
  1339. * shifted resulting in loss of contrast
  1340. * 0x05 (old driver setting): very overexposed, too much
  1341. * contrast
  1342. */
  1343. static const struct ov_i2c_regvals norm_7610[] = {
  1344. { 0x10, 0xff },
  1345. { 0x16, 0x06 },
  1346. { 0x28, 0x24 },
  1347. { 0x2b, 0xac },
  1348. { 0x12, 0x00 },
  1349. { 0x38, 0x81 },
  1350. { 0x28, 0x24 }, /* 0c */
  1351. { 0x0f, 0x85 }, /* lg's setting */
  1352. { 0x15, 0x01 },
  1353. { 0x20, 0x1c },
  1354. { 0x23, 0x2a },
  1355. { 0x24, 0x10 },
  1356. { 0x25, 0x8a },
  1357. { 0x26, 0xa2 },
  1358. { 0x27, 0xc2 },
  1359. { 0x2a, 0x04 },
  1360. { 0x2c, 0xfe },
  1361. { 0x2d, 0x93 },
  1362. { 0x30, 0x71 },
  1363. { 0x31, 0x60 },
  1364. { 0x32, 0x26 },
  1365. { 0x33, 0x20 },
  1366. { 0x34, 0x48 },
  1367. { 0x12, 0x24 },
  1368. { 0x11, 0x01 },
  1369. { 0x0c, 0x24 },
  1370. { 0x0d, 0x24 },
  1371. };
  1372. static const struct ov_i2c_regvals norm_7620[] = {
  1373. { 0x00, 0x00 }, /* gain */
  1374. { 0x01, 0x80 }, /* blue gain */
  1375. { 0x02, 0x80 }, /* red gain */
  1376. { 0x03, 0xc0 }, /* OV7670_REG_VREF */
  1377. { 0x06, 0x60 },
  1378. { 0x07, 0x00 },
  1379. { 0x0c, 0x24 },
  1380. { 0x0c, 0x24 },
  1381. { 0x0d, 0x24 },
  1382. { 0x11, 0x01 },
  1383. { 0x12, 0x24 },
  1384. { 0x13, 0x01 },
  1385. { 0x14, 0x84 },
  1386. { 0x15, 0x01 },
  1387. { 0x16, 0x03 },
  1388. { 0x17, 0x2f },
  1389. { 0x18, 0xcf },
  1390. { 0x19, 0x06 },
  1391. { 0x1a, 0xf5 },
  1392. { 0x1b, 0x00 },
  1393. { 0x20, 0x18 },
  1394. { 0x21, 0x80 },
  1395. { 0x22, 0x80 },
  1396. { 0x23, 0x00 },
  1397. { 0x26, 0xa2 },
  1398. { 0x27, 0xea },
  1399. { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
  1400. { 0x29, 0x00 },
  1401. { 0x2a, 0x10 },
  1402. { 0x2b, 0x00 },
  1403. { 0x2c, 0x88 },
  1404. { 0x2d, 0x91 },
  1405. { 0x2e, 0x80 },
  1406. { 0x2f, 0x44 },
  1407. { 0x60, 0x27 },
  1408. { 0x61, 0x02 },
  1409. { 0x62, 0x5f },
  1410. { 0x63, 0xd5 },
  1411. { 0x64, 0x57 },
  1412. { 0x65, 0x83 },
  1413. { 0x66, 0x55 },
  1414. { 0x67, 0x92 },
  1415. { 0x68, 0xcf },
  1416. { 0x69, 0x76 },
  1417. { 0x6a, 0x22 },
  1418. { 0x6b, 0x00 },
  1419. { 0x6c, 0x02 },
  1420. { 0x6d, 0x44 },
  1421. { 0x6e, 0x80 },
  1422. { 0x6f, 0x1d },
  1423. { 0x70, 0x8b },
  1424. { 0x71, 0x00 },
  1425. { 0x72, 0x14 },
  1426. { 0x73, 0x54 },
  1427. { 0x74, 0x00 },
  1428. { 0x75, 0x8e },
  1429. { 0x76, 0x00 },
  1430. { 0x77, 0xff },
  1431. { 0x78, 0x80 },
  1432. { 0x79, 0x80 },
  1433. { 0x7a, 0x80 },
  1434. { 0x7b, 0xe2 },
  1435. { 0x7c, 0x00 },
  1436. };
  1437. /* 7640 and 7648. The defaults should be OK for most registers. */
  1438. static const struct ov_i2c_regvals norm_7640[] = {
  1439. { 0x12, 0x80 },
  1440. { 0x12, 0x14 },
  1441. };
  1442. /* 7670. Defaults taken from OmniVision provided data,
  1443. * as provided by Jonathan Corbet of OLPC */
  1444. static const struct ov_i2c_regvals norm_7670[] = {
  1445. { OV7670_REG_COM7, OV7670_COM7_RESET },
  1446. { OV7670_REG_TSLB, 0x04 }, /* OV */
  1447. { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
  1448. { OV7670_REG_CLKRC, 0x01 },
  1449. /*
  1450. * Set the hardware window. These values from OV don't entirely
  1451. * make sense - hstop is less than hstart. But they work...
  1452. */
  1453. { OV7670_REG_HSTART, 0x13 },
  1454. { OV7670_REG_HSTOP, 0x01 },
  1455. { OV7670_REG_HREF, 0xb6 },
  1456. { OV7670_REG_VSTART, 0x02 },
  1457. { OV7670_REG_VSTOP, 0x7a },
  1458. { OV7670_REG_VREF, 0x0a },
  1459. { OV7670_REG_COM3, 0x00 },
  1460. { OV7670_REG_COM14, 0x00 },
  1461. /* Mystery scaling numbers */
  1462. { 0x70, 0x3a },
  1463. { 0x71, 0x35 },
  1464. { 0x72, 0x11 },
  1465. { 0x73, 0xf0 },
  1466. { 0xa2, 0x02 },
  1467. /* { OV7670_REG_COM10, 0x0 }, */
  1468. /* Gamma curve values */
  1469. { 0x7a, 0x20 },
  1470. { 0x7b, 0x10 },
  1471. { 0x7c, 0x1e },
  1472. { 0x7d, 0x35 },
  1473. { 0x7e, 0x5a },
  1474. { 0x7f, 0x69 },
  1475. { 0x80, 0x76 },
  1476. { 0x81, 0x80 },
  1477. { 0x82, 0x88 },
  1478. { 0x83, 0x8f },
  1479. { 0x84, 0x96 },
  1480. { 0x85, 0xa3 },
  1481. { 0x86, 0xaf },
  1482. { 0x87, 0xc4 },
  1483. { 0x88, 0xd7 },
  1484. { 0x89, 0xe8 },
  1485. /* AGC and AEC parameters. Note we start by disabling those features,
  1486. then turn them only after tweaking the values. */
  1487. { OV7670_REG_COM8, OV7670_COM8_FASTAEC
  1488. | OV7670_COM8_AECSTEP
  1489. | OV7670_COM8_BFILT },
  1490. { OV7670_REG_GAIN, 0x00 },
  1491. { OV7670_REG_AECH, 0x00 },
  1492. { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
  1493. { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
  1494. { OV7670_REG_BD50MAX, 0x05 },
  1495. { OV7670_REG_BD60MAX, 0x07 },
  1496. { OV7670_REG_AEW, 0x95 },
  1497. { OV7670_REG_AEB, 0x33 },
  1498. { OV7670_REG_VPT, 0xe3 },
  1499. { OV7670_REG_HAECC1, 0x78 },
  1500. { OV7670_REG_HAECC2, 0x68 },
  1501. { 0xa1, 0x03 }, /* magic */
  1502. { OV7670_REG_HAECC3, 0xd8 },
  1503. { OV7670_REG_HAECC4, 0xd8 },
  1504. { OV7670_REG_HAECC5, 0xf0 },
  1505. { OV7670_REG_HAECC6, 0x90 },
  1506. { OV7670_REG_HAECC7, 0x94 },
  1507. { OV7670_REG_COM8, OV7670_COM8_FASTAEC
  1508. | OV7670_COM8_AECSTEP
  1509. | OV7670_COM8_BFILT
  1510. | OV7670_COM8_AGC
  1511. | OV7670_COM8_AEC },
  1512. /* Almost all of these are magic "reserved" values. */
  1513. { OV7670_REG_COM5, 0x61 },
  1514. { OV7670_REG_COM6, 0x4b },
  1515. { 0x16, 0x02 },
  1516. { OV7670_REG_MVFP, 0x07 },
  1517. { 0x21, 0x02 },
  1518. { 0x22, 0x91 },
  1519. { 0x29, 0x07 },
  1520. { 0x33, 0x0b },
  1521. { 0x35, 0x0b },
  1522. { 0x37, 0x1d },
  1523. { 0x38, 0x71 },
  1524. { 0x39, 0x2a },
  1525. { OV7670_REG_COM12, 0x78 },
  1526. { 0x4d, 0x40 },
  1527. { 0x4e, 0x20 },
  1528. { OV7670_REG_GFIX, 0x00 },
  1529. { 0x6b, 0x4a },
  1530. { 0x74, 0x10 },
  1531. { 0x8d, 0x4f },
  1532. { 0x8e, 0x00 },
  1533. { 0x8f, 0x00 },
  1534. { 0x90, 0x00 },
  1535. { 0x91, 0x00 },
  1536. { 0x96, 0x00 },
  1537. { 0x9a, 0x00 },
  1538. { 0xb0, 0x84 },
  1539. { 0xb1, 0x0c },
  1540. { 0xb2, 0x0e },
  1541. { 0xb3, 0x82 },
  1542. { 0xb8, 0x0a },
  1543. /* More reserved magic, some of which tweaks white balance */
  1544. { 0x43, 0x0a },
  1545. { 0x44, 0xf0 },
  1546. { 0x45, 0x34 },
  1547. { 0x46, 0x58 },
  1548. { 0x47, 0x28 },
  1549. { 0x48, 0x3a },
  1550. { 0x59, 0x88 },
  1551. { 0x5a, 0x88 },
  1552. { 0x5b, 0x44 },
  1553. { 0x5c, 0x67 },
  1554. { 0x5d, 0x49 },
  1555. { 0x5e, 0x0e },
  1556. { 0x6c, 0x0a },
  1557. { 0x6d, 0x55 },
  1558. { 0x6e, 0x11 },
  1559. { 0x6f, 0x9f },
  1560. /* "9e for advance AWB" */
  1561. { 0x6a, 0x40 },
  1562. { OV7670_REG_BLUE, 0x40 },
  1563. { OV7670_REG_RED, 0x60 },
  1564. { OV7670_REG_COM8, OV7670_COM8_FASTAEC
  1565. | OV7670_COM8_AECSTEP
  1566. | OV7670_COM8_BFILT
  1567. | OV7670_COM8_AGC
  1568. | OV7670_COM8_AEC
  1569. | OV7670_COM8_AWB },
  1570. /* Matrix coefficients */
  1571. { 0x4f, 0x80 },
  1572. { 0x50, 0x80 },
  1573. { 0x51, 0x00 },
  1574. { 0x52, 0x22 },
  1575. { 0x53, 0x5e },
  1576. { 0x54, 0x80 },
  1577. { 0x58, 0x9e },
  1578. { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
  1579. { OV7670_REG_EDGE, 0x00 },
  1580. { 0x75, 0x05 },
  1581. { 0x76, 0xe1 },
  1582. { 0x4c, 0x00 },
  1583. { 0x77, 0x01 },
  1584. { OV7670_REG_COM13, OV7670_COM13_GAMMA
  1585. | OV7670_COM13_UVSAT
  1586. | 2}, /* was 3 */
  1587. { 0x4b, 0x09 },
  1588. { 0xc9, 0x60 },
  1589. { OV7670_REG_COM16, 0x38 },
  1590. { 0x56, 0x40 },
  1591. { 0x34, 0x11 },
  1592. { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
  1593. { 0xa4, 0x88 },
  1594. { 0x96, 0x00 },
  1595. { 0x97, 0x30 },
  1596. { 0x98, 0x20 },
  1597. { 0x99, 0x30 },
  1598. { 0x9a, 0x84 },
  1599. { 0x9b, 0x29 },
  1600. { 0x9c, 0x03 },
  1601. { 0x9d, 0x4c },
  1602. { 0x9e, 0x3f },
  1603. { 0x78, 0x04 },
  1604. /* Extra-weird stuff. Some sort of multiplexor register */
  1605. { 0x79, 0x01 },
  1606. { 0xc8, 0xf0 },
  1607. { 0x79, 0x0f },
  1608. { 0xc8, 0x00 },
  1609. { 0x79, 0x10 },
  1610. { 0xc8, 0x7e },
  1611. { 0x79, 0x0a },
  1612. { 0xc8, 0x80 },
  1613. { 0x79, 0x0b },
  1614. { 0xc8, 0x01 },
  1615. { 0x79, 0x0c },
  1616. { 0xc8, 0x0f },
  1617. { 0x79, 0x0d },
  1618. { 0xc8, 0x20 },
  1619. { 0x79, 0x09 },
  1620. { 0xc8, 0x80 },
  1621. { 0x79, 0x02 },
  1622. { 0xc8, 0xc0 },
  1623. { 0x79, 0x03 },
  1624. { 0xc8, 0x40 },
  1625. { 0x79, 0x05 },
  1626. { 0xc8, 0x30 },
  1627. { 0x79, 0x26 },
  1628. };
  1629. static const struct ov_i2c_regvals norm_8610[] = {
  1630. { 0x12, 0x80 },
  1631. { 0x00, 0x00 },
  1632. { 0x01, 0x80 },
  1633. { 0x02, 0x80 },
  1634. { 0x03, 0xc0 },
  1635. { 0x04, 0x30 },
  1636. { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
  1637. { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
  1638. { 0x0a, 0x86 },
  1639. { 0x0b, 0xb0 },
  1640. { 0x0c, 0x20 },
  1641. { 0x0d, 0x20 },
  1642. { 0x11, 0x01 },
  1643. { 0x12, 0x25 },
  1644. { 0x13, 0x01 },
  1645. { 0x14, 0x04 },
  1646. { 0x15, 0x01 }, /* Lin and Win think different about UV order */
  1647. { 0x16, 0x03 },
  1648. { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
  1649. { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
  1650. { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
  1651. { 0x1a, 0xf5 },
  1652. { 0x1b, 0x00 },
  1653. { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
  1654. { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
  1655. { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
  1656. { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
  1657. { 0x26, 0xa2 },
  1658. { 0x27, 0xea },
  1659. { 0x28, 0x00 },
  1660. { 0x29, 0x00 },
  1661. { 0x2a, 0x80 },
  1662. { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
  1663. { 0x2c, 0xac },
  1664. { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
  1665. { 0x2e, 0x80 },
  1666. { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
  1667. { 0x4c, 0x00 },
  1668. { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
  1669. { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
  1670. { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
  1671. { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
  1672. { 0x63, 0xff },
  1673. { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
  1674. * maybe thats wrong */
  1675. { 0x65, 0x00 },
  1676. { 0x66, 0x55 },
  1677. { 0x67, 0xb0 },
  1678. { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
  1679. { 0x69, 0x02 },
  1680. { 0x6a, 0x22 },
  1681. { 0x6b, 0x00 },
  1682. { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
  1683. * deleting bit7 colors the first images red */
  1684. { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
  1685. { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
  1686. { 0x6f, 0x01 },
  1687. { 0x70, 0x8b },
  1688. { 0x71, 0x00 },
  1689. { 0x72, 0x14 },
  1690. { 0x73, 0x54 },
  1691. { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
  1692. { 0x75, 0x0e },
  1693. { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
  1694. { 0x77, 0xff },
  1695. { 0x78, 0x80 },
  1696. { 0x79, 0x80 },
  1697. { 0x7a, 0x80 },
  1698. { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
  1699. { 0x7c, 0x00 },
  1700. { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
  1701. { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
  1702. { 0x7f, 0xfb },
  1703. { 0x80, 0x28 },
  1704. { 0x81, 0x00 },
  1705. { 0x82, 0x23 },
  1706. { 0x83, 0x0b },
  1707. { 0x84, 0x00 },
  1708. { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
  1709. { 0x86, 0xc9 },
  1710. { 0x87, 0x00 },
  1711. { 0x88, 0x00 },
  1712. { 0x89, 0x01 },
  1713. { 0x12, 0x20 },
  1714. { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
  1715. };
  1716. static unsigned char ov7670_abs_to_sm(unsigned char v)
  1717. {
  1718. if (v > 127)
  1719. return v & 0x7f;
  1720. return (128 - v) | 0x80;
  1721. }
  1722. /* Write a OV519 register */
  1723. static int reg_w(struct sd *sd, __u16 index, __u8 value)
  1724. {
  1725. int ret;
  1726. int req;
  1727. switch (sd->bridge) {
  1728. case BRIDGE_OV511:
  1729. case BRIDGE_OV511PLUS:
  1730. req = 2;
  1731. break;
  1732. case BRIDGE_OVFX2:
  1733. ret = usb_control_msg(sd->gspca_dev.dev,
  1734. usb_sndctrlpipe(sd->gspca_dev.dev, 0),
  1735. 0x0a,
  1736. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  1737. (__u16)value, index, NULL, 0, 500);
  1738. goto leave;
  1739. default:
  1740. req = 1;
  1741. }
  1742. sd->gspca_dev.usb_buf[0] = value;
  1743. ret = usb_control_msg(sd->gspca_dev.dev,
  1744. usb_sndctrlpipe(sd->gspca_dev.dev, 0),
  1745. req,
  1746. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  1747. 0, index,
  1748. sd->gspca_dev.usb_buf, 1, 500);
  1749. leave:
  1750. if (ret < 0)
  1751. PDEBUG(D_ERR, "Write reg [%02x] %02x failed", index, value);
  1752. return ret;
  1753. }
  1754. /* Read from a OV519 register */
  1755. /* returns: negative is error, pos or zero is data */
  1756. static int reg_r(struct sd *sd, __u16 index)
  1757. {
  1758. int ret;
  1759. int req;
  1760. switch (sd->bridge) {
  1761. case BRIDGE_OV511:
  1762. case BRIDGE_OV511PLUS:
  1763. req = 3;
  1764. break;
  1765. case BRIDGE_OVFX2:
  1766. req = 0x0b;
  1767. break;
  1768. default:
  1769. req = 1;
  1770. }
  1771. ret = usb_control_msg(sd->gspca_dev.dev,
  1772. usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
  1773. req,
  1774. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  1775. 0, index, sd->gspca_dev.usb_buf, 1, 500);
  1776. if (ret >= 0)
  1777. ret = sd->gspca_dev.usb_buf[0];
  1778. else
  1779. PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
  1780. return ret;
  1781. }
  1782. /* Read 8 values from a OV519 register */
  1783. static int reg_r8(struct sd *sd,
  1784. __u16 index)
  1785. {
  1786. int ret;
  1787. ret = usb_control_msg(sd->gspca_dev.dev,
  1788. usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
  1789. 1, /* REQ_IO */
  1790. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  1791. 0, index, sd->gspca_dev.usb_buf, 8, 500);
  1792. if (ret >= 0)
  1793. ret = sd->gspca_dev.usb_buf[0];
  1794. else
  1795. PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
  1796. return ret;
  1797. }
  1798. /*
  1799. * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
  1800. * the same position as 1's in "mask" are cleared and set to "value". Bits
  1801. * that are in the same position as 0's in "mask" are preserved, regardless
  1802. * of their respective state in "value".
  1803. */
  1804. static int reg_w_mask(struct sd *sd,
  1805. __u16 index,
  1806. __u8 value,
  1807. __u8 mask)
  1808. {
  1809. int ret;
  1810. __u8 oldval;
  1811. if (mask != 0xff) {
  1812. value &= mask; /* Enforce mask on value */
  1813. ret = reg_r(sd, index);
  1814. if (ret < 0)
  1815. return ret;
  1816. oldval = ret & ~mask; /* Clear the masked bits */
  1817. value |= oldval; /* Set the desired bits */
  1818. }
  1819. return reg_w(sd, index, value);
  1820. }
  1821. /*
  1822. * Writes multiple (n) byte value to a single register. Only valid with certain
  1823. * registers (0x30 and 0xc4 - 0xce).
  1824. */
  1825. static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
  1826. {
  1827. int ret;
  1828. *((u32 *)sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
  1829. ret = usb_control_msg(sd->gspca_dev.dev,
  1830. usb_sndctrlpipe(sd->gspca_dev.dev, 0),
  1831. 1 /* REG_IO */,
  1832. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  1833. 0, index,
  1834. sd->gspca_dev.usb_buf, n, 500);
  1835. if (ret < 0)
  1836. PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value);
  1837. return ret;
  1838. }
  1839. static int ov511_i2c_w(struct sd *sd, __u8 reg, __u8 value)
  1840. {
  1841. int rc, retries;
  1842. PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
  1843. /* Three byte write cycle */
  1844. for (retries = 6; ; ) {
  1845. /* Select camera register */
  1846. rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
  1847. if (rc < 0)
  1848. return rc;
  1849. /* Write "value" to I2C data port of OV511 */
  1850. rc = reg_w(sd, R51x_I2C_DATA, value);
  1851. if (rc < 0)
  1852. return rc;
  1853. /* Initiate 3-byte write cycle */
  1854. rc = reg_w(sd, R511_I2C_CTL, 0x01);
  1855. if (rc < 0)
  1856. return rc;
  1857. do
  1858. rc = reg_r(sd, R511_I2C_CTL);
  1859. while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
  1860. if (rc < 0)
  1861. return rc;
  1862. if ((rc & 2) == 0) /* Ack? */
  1863. break;
  1864. if (--retries < 0) {
  1865. PDEBUG(D_USBO, "i2c write retries exhausted");
  1866. return -1;
  1867. }
  1868. }
  1869. return 0;
  1870. }
  1871. static int ov511_i2c_r(struct sd *sd, __u8 reg)
  1872. {
  1873. int rc, value, retries;
  1874. /* Two byte write cycle */
  1875. for (retries = 6; ; ) {
  1876. /* Select camera register */
  1877. rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
  1878. if (rc < 0)
  1879. return rc;
  1880. /* Initiate 2-byte write cycle */
  1881. rc = reg_w(sd, R511_I2C_CTL, 0x03);
  1882. if (rc < 0)
  1883. return rc;
  1884. do
  1885. rc = reg_r(sd, R511_I2C_CTL);
  1886. while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
  1887. if (rc < 0)
  1888. return rc;
  1889. if ((rc & 2) == 0) /* Ack? */
  1890. break;
  1891. /* I2C abort */
  1892. reg_w(sd, R511_I2C_CTL, 0x10);
  1893. if (--retries < 0) {
  1894. PDEBUG(D_USBI, "i2c write retries exhausted");
  1895. return -1;
  1896. }
  1897. }
  1898. /* Two byte read cycle */
  1899. for (retries = 6; ; ) {
  1900. /* Initiate 2-byte read cycle */
  1901. rc = reg_w(sd, R511_I2C_CTL, 0x05);
  1902. if (rc < 0)
  1903. return rc;
  1904. do
  1905. rc = reg_r(sd, R511_I2C_CTL);
  1906. while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
  1907. if (rc < 0)
  1908. return rc;
  1909. if ((rc & 2) == 0) /* Ack? */
  1910. break;
  1911. /* I2C abort */
  1912. rc = reg_w(sd, R511_I2C_CTL, 0x10);
  1913. if (rc < 0)
  1914. return rc;
  1915. if (--retries < 0) {
  1916. PDEBUG(D_USBI, "i2c read retries exhausted");
  1917. return -1;
  1918. }
  1919. }
  1920. value = reg_r(sd, R51x_I2C_DATA);
  1921. PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
  1922. /* This is needed to make i2c_w() work */
  1923. rc = reg_w(sd, R511_I2C_CTL, 0x05);
  1924. if (rc < 0)
  1925. return rc;
  1926. return value;
  1927. }
  1928. /*
  1929. * The OV518 I2C I/O procedure is different, hence, this function.
  1930. * This is normally only called from i2c_w(). Note that this function
  1931. * always succeeds regardless of whether the sensor is present and working.
  1932. */
  1933. static int ov518_i2c_w(struct sd *sd,
  1934. __u8 reg,
  1935. __u8 value)
  1936. {
  1937. int rc;
  1938. PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
  1939. /* Select camera register */
  1940. rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
  1941. if (rc < 0)
  1942. return rc;
  1943. /* Write "value" to I2C data port of OV511 */
  1944. rc = reg_w(sd, R51x_I2C_DATA, value);
  1945. if (rc < 0)
  1946. return rc;
  1947. /* Initiate 3-byte write cycle */
  1948. rc = reg_w(sd, R518_I2C_CTL, 0x01);
  1949. if (rc < 0)
  1950. return rc;
  1951. /* wait for write complete */
  1952. msleep(4);
  1953. return reg_r8(sd, R518_I2C_CTL);
  1954. }
  1955. /*
  1956. * returns: negative is error, pos or zero is data
  1957. *
  1958. * The OV518 I2C I/O procedure is different, hence, this function.
  1959. * This is normally only called from i2c_r(). Note that this function
  1960. * always succeeds regardless of whether the sensor is present and working.
  1961. */
  1962. static int ov518_i2c_r(struct sd *sd, __u8 reg)
  1963. {
  1964. int rc, value;
  1965. /* Select camera register */
  1966. rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
  1967. if (rc < 0)
  1968. return rc;
  1969. /* Initiate 2-byte write cycle */
  1970. rc = reg_w(sd, R518_I2C_CTL, 0x03);
  1971. if (rc < 0)
  1972. return rc;
  1973. /* Initiate 2-byte read cycle */
  1974. rc = reg_w(sd, R518_I2C_CTL, 0x05);
  1975. if (rc < 0)
  1976. return rc;
  1977. value = reg_r(sd, R51x_I2C_DATA);
  1978. PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
  1979. return value;
  1980. }
  1981. static int ovfx2_i2c_w(struct sd *sd, __u8 reg, __u8 value)
  1982. {
  1983. int ret;
  1984. ret = usb_control_msg(sd->gspca_dev.dev,
  1985. usb_sndctrlpipe(sd->gspca_dev.dev, 0),
  1986. 0x02,
  1987. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  1988. (__u16)value, (__u16)reg, NULL, 0, 500);
  1989. if (ret >= 0)
  1990. PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
  1991. else
  1992. PDEBUG(D_ERR, "i2c 0x%02x -> [0x%02x] failed", value, reg);
  1993. return ret;
  1994. }
  1995. static int ovfx2_i2c_r(struct sd *sd, __u8 reg)
  1996. {
  1997. int ret;
  1998. ret = usb_control_msg(sd->gspca_dev.dev,
  1999. usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
  2000. 0x03,
  2001. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  2002. 0, (__u16)reg, sd->gspca_dev.usb_buf, 1, 500);
  2003. if (ret >= 0) {
  2004. ret = sd->gspca_dev.usb_buf[0];
  2005. PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, ret);
  2006. } else
  2007. PDEBUG(D_ERR, "i2c read [0x%02x] failed", reg);
  2008. return ret;
  2009. }
  2010. static int i2c_w(struct sd *sd, __u8 reg, __u8 value)
  2011. {
  2012. switch (sd->bridge) {
  2013. case BRIDGE_OV511:
  2014. case BRIDGE_OV511PLUS:
  2015. return ov511_i2c_w(sd, reg, value);
  2016. case BRIDGE_OV518:
  2017. case BRIDGE_OV518PLUS:
  2018. case BRIDGE_OV519:
  2019. return ov518_i2c_w(sd, reg, value);
  2020. case BRIDGE_OVFX2:
  2021. return ovfx2_i2c_w(sd, reg, value);
  2022. }
  2023. return -1; /* Should never happen */
  2024. }
  2025. static int i2c_r(struct sd *sd, __u8 reg)
  2026. {
  2027. switch (sd->bridge) {
  2028. case BRIDGE_OV511:
  2029. case BRIDGE_OV511PLUS:
  2030. return ov511_i2c_r(sd, reg);
  2031. case BRIDGE_OV518:
  2032. case BRIDGE_OV518PLUS:
  2033. case BRIDGE_OV519:
  2034. return ov518_i2c_r(sd, reg);
  2035. case BRIDGE_OVFX2:
  2036. return ovfx2_i2c_r(sd, reg);
  2037. }
  2038. return -1; /* Should never happen */
  2039. }
  2040. /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
  2041. * the same position as 1's in "mask" are cleared and set to "value". Bits
  2042. * that are in the same position as 0's in "mask" are preserved, regardless
  2043. * of their respective state in "value".
  2044. */
  2045. static int i2c_w_mask(struct sd *sd,
  2046. __u8 reg,
  2047. __u8 value,
  2048. __u8 mask)
  2049. {
  2050. int rc;
  2051. __u8 oldval;
  2052. value &= mask; /* Enforce mask on value */
  2053. rc = i2c_r(sd, reg);
  2054. if (rc < 0)
  2055. return rc;
  2056. oldval = rc & ~mask; /* Clear the masked bits */
  2057. value |= oldval; /* Set the desired bits */
  2058. return i2c_w(sd, reg, value);
  2059. }
  2060. /* Temporarily stops OV511 from functioning. Must do this before changing
  2061. * registers while the camera is streaming */
  2062. static inline int ov51x_stop(struct sd *sd)
  2063. {
  2064. PDEBUG(D_STREAM, "stopping");
  2065. sd->stopped = 1;
  2066. switch (sd->bridge) {
  2067. case BRIDGE_OV511:
  2068. case BRIDGE_OV511PLUS:
  2069. return reg_w(sd, R51x_SYS_RESET, 0x3d);
  2070. case BRIDGE_OV518:
  2071. case BRIDGE_OV518PLUS:
  2072. return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
  2073. case BRIDGE_OV519:
  2074. return reg_w(sd, OV519_SYS_RESET1, 0x0f);
  2075. case BRIDGE_OVFX2:
  2076. return reg_w_mask(sd, 0x0f, 0x00, 0x02);
  2077. }
  2078. return 0;
  2079. }
  2080. /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
  2081. * actually stopped (for performance). */
  2082. static inline int ov51x_restart(struct sd *sd)
  2083. {
  2084. int rc;
  2085. PDEBUG(D_STREAM, "restarting");
  2086. if (!sd->stopped)
  2087. return 0;
  2088. sd->stopped = 0;
  2089. /* Reinitialize the stream */
  2090. switch (sd->bridge) {
  2091. case BRIDGE_OV511:
  2092. case BRIDGE_OV511PLUS:
  2093. return reg_w(sd, R51x_SYS_RESET, 0x00);
  2094. case BRIDGE_OV518:
  2095. case BRIDGE_OV518PLUS:
  2096. rc = reg_w(sd, 0x2f, 0x80);
  2097. if (rc < 0)
  2098. return rc;
  2099. return reg_w(sd, R51x_SYS_RESET, 0x00);
  2100. case BRIDGE_OV519:
  2101. return reg_w(sd, OV519_SYS_RESET1, 0x00);
  2102. case BRIDGE_OVFX2:
  2103. return reg_w_mask(sd, 0x0f, 0x02, 0x02);
  2104. }
  2105. return 0;
  2106. }
  2107. static int ov51x_set_slave_ids(struct sd *sd, __u8 slave);
  2108. /* This does an initial reset of an OmniVision sensor and ensures that I2C
  2109. * is synchronized. Returns <0 on failure.
  2110. */
  2111. static int init_ov_sensor(struct sd *sd, __u8 slave)
  2112. {
  2113. int i;
  2114. if (ov51x_set_slave_ids(sd, slave) < 0)
  2115. return -EIO;
  2116. /* Reset the sensor */
  2117. if (i2c_w(sd, 0x12, 0x80) < 0)
  2118. return -EIO;
  2119. /* Wait for it to initialize */
  2120. msleep(150);
  2121. for (i = 0; i < i2c_detect_tries; i++) {
  2122. if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
  2123. i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
  2124. PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
  2125. return 0;
  2126. }
  2127. /* Reset the sensor */
  2128. if (i2c_w(sd, 0x12, 0x80) < 0)
  2129. return -EIO;
  2130. /* Wait for it to initialize */
  2131. msleep(150);
  2132. /* Dummy read to sync I2C */
  2133. if (i2c_r(sd, 0x00) < 0)
  2134. return -EIO;
  2135. }
  2136. return -EIO;
  2137. }
  2138. /* Set the read and write slave IDs. The "slave" argument is the write slave,
  2139. * and the read slave will be set to (slave + 1).
  2140. * This should not be called from outside the i2c I/O functions.
  2141. * Sets I2C read and write slave IDs. Returns <0 for error
  2142. */
  2143. static int ov51x_set_slave_ids(struct sd *sd,
  2144. __u8 slave)
  2145. {
  2146. int rc;
  2147. if (sd->bridge == BRIDGE_OVFX2)
  2148. return reg_w(sd, OVFX2_I2C_ADDR, slave);
  2149. rc = reg_w(sd, R51x_I2C_W_SID, slave);
  2150. if (rc < 0)
  2151. return rc;
  2152. return reg_w(sd, R51x_I2C_R_SID, slave + 1);
  2153. }
  2154. static int write_regvals(struct sd *sd,
  2155. const struct ov_regvals *regvals,
  2156. int n)
  2157. {
  2158. int rc;
  2159. while (--n >= 0) {
  2160. rc = reg_w(sd, regvals->reg, regvals->val);
  2161. if (rc < 0)
  2162. return rc;
  2163. regvals++;
  2164. }
  2165. return 0;
  2166. }
  2167. static int write_i2c_regvals(struct sd *sd,
  2168. const struct ov_i2c_regvals *regvals,
  2169. int n)
  2170. {
  2171. int rc;
  2172. while (--n >= 0) {
  2173. rc = i2c_w(sd, regvals->reg, regvals->val);
  2174. if (rc < 0)
  2175. return rc;
  2176. regvals++;
  2177. }
  2178. return 0;
  2179. }
  2180. /****************************************************************************
  2181. *
  2182. * OV511 and sensor configuration
  2183. *
  2184. ***************************************************************************/
  2185. /* This initializes the OV2x10 / OV3610 / OV3620 */
  2186. static int ov_hires_configure(struct sd *sd)
  2187. {
  2188. int high, low;
  2189. if (sd->bridge != BRIDGE_OVFX2) {
  2190. PDEBUG(D_ERR, "error hires sensors only supported with ovfx2");
  2191. return -1;
  2192. }
  2193. PDEBUG(D_PROBE, "starting ov hires configuration");
  2194. /* Detect sensor (sub)type */
  2195. high = i2c_r(sd, 0x0a);
  2196. low = i2c_r(sd, 0x0b);
  2197. /* info("%x, %x", high, low); */
  2198. if (high == 0x96 && low == 0x40) {
  2199. PDEBUG(D_PROBE, "Sensor is an OV2610");
  2200. sd->sensor = SEN_OV2610;
  2201. } else if (high == 0x36 && (low & 0x0f) == 0x00) {
  2202. PDEBUG(D_PROBE, "Sensor is an OV3610");
  2203. sd->sensor = SEN_OV3610;
  2204. } else {
  2205. PDEBUG(D_ERR, "Error unknown sensor type: 0x%02x%02x",
  2206. high, low);
  2207. return -1;
  2208. }
  2209. /* Set sensor-specific vars */
  2210. return 0;
  2211. }
  2212. /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
  2213. * the same register settings as the OV8610, since they are very similar.
  2214. */
  2215. static int ov8xx0_configure(struct sd *sd)
  2216. {
  2217. int rc;
  2218. PDEBUG(D_PROBE, "starting ov8xx0 configuration");
  2219. /* Detect sensor (sub)type */
  2220. rc = i2c_r(sd, OV7610_REG_COM_I);
  2221. if (rc < 0) {
  2222. PDEBUG(D_ERR, "Error detecting sensor type");
  2223. return -1;
  2224. }
  2225. if ((rc & 3) == 1) {
  2226. sd->sensor = SEN_OV8610;
  2227. } else {
  2228. PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
  2229. return -1;
  2230. }
  2231. /* Set sensor-specific vars */
  2232. return 0;
  2233. }
  2234. /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
  2235. * the same register settings as the OV7610, since they are very similar.
  2236. */
  2237. static int ov7xx0_configure(struct sd *sd)
  2238. {
  2239. int rc, high, low;
  2240. PDEBUG(D_PROBE, "starting OV7xx0 configuration");
  2241. /* Detect sensor (sub)type */
  2242. rc = i2c_r(sd, OV7610_REG_COM_I);
  2243. /* add OV7670 here
  2244. * it appears to be wrongly detected as a 7610 by default */
  2245. if (rc < 0) {
  2246. PDEBUG(D_ERR, "Error detecting sensor type");
  2247. return -1;
  2248. }
  2249. if ((rc & 3) == 3) {
  2250. /* quick hack to make OV7670s work */
  2251. high = i2c_r(sd, 0x0a);
  2252. low = i2c_r(sd, 0x0b);
  2253. /* info("%x, %x", high, low); */
  2254. if (high == 0x76 && low == 0x73) {
  2255. PDEBUG(D_PROBE, "Sensor is an OV7670");
  2256. sd->sensor = SEN_OV7670;
  2257. } else {
  2258. PDEBUG(D_PROBE, "Sensor is an OV7610");
  2259. sd->sensor = SEN_OV7610;
  2260. }
  2261. } else if ((rc & 3) == 1) {
  2262. /* I don't know what's different about the 76BE yet. */
  2263. if (i2c_r(sd, 0x15) & 1) {
  2264. PDEBUG(D_PROBE, "Sensor is an OV7620AE");
  2265. sd->sensor = SEN_OV7620;
  2266. } else {
  2267. PDEBUG(D_PROBE, "Sensor is an OV76BE");
  2268. sd->sensor = SEN_OV76BE;
  2269. }
  2270. } else if ((rc & 3) == 0) {
  2271. /* try to read product id registers */
  2272. high = i2c_r(sd, 0x0a);
  2273. if (high < 0) {
  2274. PDEBUG(D_ERR, "Error detecting camera chip PID");
  2275. return high;
  2276. }
  2277. low = i2c_r(sd, 0x0b);
  2278. if (low < 0) {
  2279. PDEBUG(D_ERR, "Error detecting camera chip VER");
  2280. return low;
  2281. }
  2282. if (high == 0x76) {
  2283. switch (low) {
  2284. case 0x30:
  2285. PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
  2286. PDEBUG(D_ERR,
  2287. "7630 is not supported by this driver");
  2288. return -1;
  2289. case 0x40:
  2290. PDEBUG(D_PROBE, "Sensor is an OV7645");
  2291. sd->sensor = SEN_OV7640; /* FIXME */
  2292. break;
  2293. case 0x45:
  2294. PDEBUG(D_PROBE, "Sensor is an OV7645B");
  2295. sd->sensor = SEN_OV7640; /* FIXME */
  2296. break;
  2297. case 0x48:
  2298. PDEBUG(D_PROBE, "Sensor is an OV7648");
  2299. sd->sensor = SEN_OV7640; /* FIXME */
  2300. break;
  2301. default:
  2302. PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
  2303. return -1;
  2304. }
  2305. } else {
  2306. PDEBUG(D_PROBE, "Sensor is an OV7620");
  2307. sd->sensor = SEN_OV7620;
  2308. }
  2309. } else {
  2310. PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
  2311. return -1;
  2312. }
  2313. /* Set sensor-specific vars */
  2314. return 0;
  2315. }
  2316. /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
  2317. static int ov6xx0_configure(struct sd *sd)
  2318. {
  2319. int rc;
  2320. PDEBUG(D_PROBE, "starting OV6xx0 configuration");
  2321. /* Detect sensor (sub)type */
  2322. rc = i2c_r(sd, OV7610_REG_COM_I);
  2323. if (rc < 0) {
  2324. PDEBUG(D_ERR, "Error detecting sensor type");
  2325. return -1;
  2326. }
  2327. /* Ugh. The first two bits are the version bits, but
  2328. * the entire register value must be used. I guess OVT
  2329. * underestimated how many variants they would make. */
  2330. switch (rc) {
  2331. case 0x00:
  2332. sd->sensor = SEN_OV6630;
  2333. PDEBUG(D_ERR,
  2334. "WARNING: Sensor is an OV66308. Your camera may have");
  2335. PDEBUG(D_ERR, "been misdetected in previous driver versions.");
  2336. break;
  2337. case 0x01:
  2338. sd->sensor = SEN_OV6620;
  2339. PDEBUG(D_PROBE, "Sensor is an OV6620");
  2340. break;
  2341. case 0x02:
  2342. sd->sensor = SEN_OV6630;
  2343. PDEBUG(D_PROBE, "Sensor is an OV66308AE");
  2344. break;
  2345. case 0x03:
  2346. sd->sensor = SEN_OV66308AF;
  2347. PDEBUG(D_PROBE, "Sensor is an OV66308AF");
  2348. break;
  2349. case 0x90:
  2350. sd->sensor = SEN_OV6630;
  2351. PDEBUG(D_ERR,
  2352. "WARNING: Sensor is an OV66307. Your camera may have");
  2353. PDEBUG(D_ERR, "been misdetected in previous driver versions.");
  2354. break;
  2355. default:
  2356. PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
  2357. return -1;
  2358. }
  2359. /* Set sensor-specific vars */
  2360. sd->sif = 1;
  2361. return 0;
  2362. }
  2363. /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
  2364. static void ov51x_led_control(struct sd *sd, int on)
  2365. {
  2366. if (sd->invert_led)
  2367. on = !on;
  2368. switch (sd->bridge) {
  2369. /* OV511 has no LED control */
  2370. case BRIDGE_OV511PLUS:
  2371. reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
  2372. break;
  2373. case BRIDGE_OV518:
  2374. case BRIDGE_OV518PLUS:
  2375. reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
  2376. break;
  2377. case BRIDGE_OV519:
  2378. reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
  2379. break;
  2380. }
  2381. }
  2382. static int ov51x_upload_quan_tables(struct sd *sd)
  2383. {
  2384. const unsigned char yQuanTable511[] = {
  2385. 0, 1, 1, 2, 2, 3, 3, 4,
  2386. 1, 1, 1, 2, 2, 3, 4, 4,
  2387. 1, 1, 2, 2, 3, 4, 4, 4,
  2388. 2, 2, 2, 3, 4, 4, 4, 4,
  2389. 2, 2, 3, 4, 4, 5, 5, 5,
  2390. 3, 3, 4, 4, 5, 5, 5, 5,
  2391. 3, 4, 4, 4, 5, 5, 5, 5,
  2392. 4, 4, 4, 4, 5, 5, 5, 5
  2393. };
  2394. const unsigned char uvQuanTable511[] = {
  2395. 0, 2, 2, 3, 4, 4, 4, 4,
  2396. 2, 2, 2, 4, 4, 4, 4, 4,
  2397. 2, 2, 3, 4, 4, 4, 4, 4,
  2398. 3, 4, 4, 4, 4, 4, 4, 4,
  2399. 4, 4, 4, 4, 4, 4, 4, 4,
  2400. 4, 4, 4, 4, 4, 4, 4, 4,
  2401. 4, 4, 4, 4, 4, 4, 4, 4,
  2402. 4, 4, 4, 4, 4, 4, 4, 4
  2403. };
  2404. /* OV518 quantization tables are 8x4 (instead of 8x8) */
  2405. const unsigned char yQuanTable518[] = {
  2406. 5, 4, 5, 6, 6, 7, 7, 7,
  2407. 5, 5, 5, 5, 6, 7, 7, 7,
  2408. 6, 6, 6, 6, 7, 7, 7, 8,
  2409. 7, 7, 6, 7, 7, 7, 8, 8
  2410. };
  2411. const unsigned char uvQuanTable518[] = {
  2412. 6, 6, 6, 7, 7, 7, 7, 7,
  2413. 6, 6, 6, 7, 7, 7, 7, 7,
  2414. 6, 6, 6, 7, 7, 7, 7, 8,
  2415. 7, 7, 7, 7, 7, 7, 8, 8
  2416. };
  2417. const unsigned char *pYTable, *pUVTable;
  2418. unsigned char val0, val1;
  2419. int i, size, rc, reg = R51x_COMP_LUT_BEGIN;
  2420. PDEBUG(D_PROBE, "Uploading quantization tables");
  2421. if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
  2422. pYTable = yQuanTable511;
  2423. pUVTable = uvQuanTable511;
  2424. size = 32;
  2425. } else {
  2426. pYTable = yQuanTable518;
  2427. pUVTable = uvQuanTable518;
  2428. size = 16;
  2429. }
  2430. for (i = 0; i < size; i++) {
  2431. val0 = *pYTable++;
  2432. val1 = *pYTable++;
  2433. val0 &= 0x0f;
  2434. val1 &= 0x0f;
  2435. val0 |= val1 << 4;
  2436. rc = reg_w(sd, reg, val0);
  2437. if (rc < 0)
  2438. return rc;
  2439. val0 = *pUVTable++;
  2440. val1 = *pUVTable++;
  2441. val0 &= 0x0f;
  2442. val1 &= 0x0f;
  2443. val0 |= val1 << 4;
  2444. rc = reg_w(sd, reg + size, val0);
  2445. if (rc < 0)
  2446. return rc;
  2447. reg++;
  2448. }
  2449. return 0;
  2450. }
  2451. /* This initializes the OV511/OV511+ and the sensor */
  2452. static int ov511_configure(struct gspca_dev *gspca_dev)
  2453. {
  2454. struct sd *sd = (struct sd *) gspca_dev;
  2455. int rc;
  2456. /* For 511 and 511+ */
  2457. const struct ov_regvals init_511[] = {
  2458. { R51x_SYS_RESET, 0x7f },
  2459. { R51x_SYS_INIT, 0x01 },
  2460. { R51x_SYS_RESET, 0x7f },
  2461. { R51x_SYS_INIT, 0x01 },
  2462. { R51x_SYS_RESET, 0x3f },
  2463. { R51x_SYS_INIT, 0x01 },
  2464. { R51x_SYS_RESET, 0x3d },
  2465. };
  2466. const struct ov_regvals norm_511[] = {
  2467. { R511_DRAM_FLOW_CTL, 0x01 },
  2468. { R51x_SYS_SNAP, 0x00 },
  2469. { R51x_SYS_SNAP, 0x02 },
  2470. { R51x_SYS_SNAP, 0x00 },
  2471. { R511_FIFO_OPTS, 0x1f },
  2472. { R511_COMP_EN, 0x00 },
  2473. { R511_COMP_LUT_EN, 0x03 },
  2474. };
  2475. const struct ov_regvals norm_511_p[] = {
  2476. { R511_DRAM_FLOW_CTL, 0xff },
  2477. { R51x_SYS_SNAP, 0x00 },
  2478. { R51x_SYS_SNAP, 0x02 },
  2479. { R51x_SYS_SNAP, 0x00 },
  2480. { R511_FIFO_OPTS, 0xff },
  2481. { R511_COMP_EN, 0x00 },
  2482. { R511_COMP_LUT_EN, 0x03 },
  2483. };
  2484. const struct ov_regvals compress_511[] = {
  2485. { 0x70, 0x1f },
  2486. { 0x71, 0x05 },
  2487. { 0x72, 0x06 },
  2488. { 0x73, 0x06 },
  2489. { 0x74, 0x14 },
  2490. { 0x75, 0x03 },
  2491. { 0x76, 0x04 },
  2492. { 0x77, 0x04 },
  2493. };
  2494. PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
  2495. rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511));
  2496. if (rc < 0)
  2497. return rc;
  2498. switch (sd->bridge) {
  2499. case BRIDGE_OV511:
  2500. rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
  2501. if (rc < 0)
  2502. return rc;
  2503. break;
  2504. case BRIDGE_OV511PLUS:
  2505. rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
  2506. if (rc < 0)
  2507. return rc;
  2508. break;
  2509. }
  2510. /* Init compression */
  2511. rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
  2512. if (rc < 0)
  2513. return rc;
  2514. rc = ov51x_upload_quan_tables(sd);
  2515. if (rc < 0) {
  2516. PDEBUG(D_ERR, "Error uploading quantization tables");
  2517. return rc;
  2518. }
  2519. return 0;
  2520. }
  2521. /* This initializes the OV518/OV518+ and the sensor */
  2522. static int ov518_configure(struct gspca_dev *gspca_dev)
  2523. {
  2524. struct sd *sd = (struct sd *) gspca_dev;
  2525. int rc;
  2526. /* For 518 and 518+ */
  2527. const struct ov_regvals init_518[] = {
  2528. { R51x_SYS_RESET, 0x40 },
  2529. { R51x_SYS_INIT, 0xe1 },
  2530. { R51x_SYS_RESET, 0x3e },
  2531. { R51x_SYS_INIT, 0xe1 },
  2532. { R51x_SYS_RESET, 0x00 },
  2533. { R51x_SYS_INIT, 0xe1 },
  2534. { 0x46, 0x00 },
  2535. { 0x5d, 0x03 },
  2536. };
  2537. const struct ov_regvals norm_518[] = {
  2538. { R51x_SYS_SNAP, 0x02 }, /* Reset */
  2539. { R51x_SYS_SNAP, 0x01 }, /* Enable */
  2540. { 0x31, 0x0f },
  2541. { 0x5d, 0x03 },
  2542. { 0x24, 0x9f },
  2543. { 0x25, 0x90 },
  2544. { 0x20, 0x00 },
  2545. { 0x51, 0x04 },
  2546. { 0x71, 0x19 },
  2547. { 0x2f, 0x80 },
  2548. };
  2549. const struct ov_regvals norm_518_p[] = {
  2550. { R51x_SYS_SNAP, 0x02 }, /* Reset */
  2551. { R51x_SYS_SNAP, 0x01 }, /* Enable */
  2552. { 0x31, 0x0f },
  2553. { 0x5d, 0x03 },
  2554. { 0x24, 0x9f },
  2555. { 0x25, 0x90 },
  2556. { 0x20, 0x60 },
  2557. { 0x51, 0x02 },
  2558. { 0x71, 0x19 },
  2559. { 0x40, 0xff },
  2560. { 0x41, 0x42 },
  2561. { 0x46, 0x00 },
  2562. { 0x33, 0x04 },
  2563. { 0x21, 0x19 },
  2564. { 0x3f, 0x10 },
  2565. { 0x2f, 0x80 },
  2566. };
  2567. /* First 5 bits of custom ID reg are a revision ID on OV518 */
  2568. PDEBUG(D_PROBE, "Device revision %d",
  2569. 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
  2570. rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
  2571. if (rc < 0)
  2572. return rc;
  2573. /* Set LED GPIO pin to output mode */
  2574. rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
  2575. if (rc < 0)
  2576. return rc;
  2577. switch (sd->bridge) {
  2578. case BRIDGE_OV518:
  2579. rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
  2580. if (rc < 0)
  2581. return rc;
  2582. break;
  2583. case BRIDGE_OV518PLUS:
  2584. rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
  2585. if (rc < 0)
  2586. return rc;
  2587. break;
  2588. }
  2589. rc = ov51x_upload_quan_tables(sd);
  2590. if (rc < 0) {
  2591. PDEBUG(D_ERR, "Error uploading quantization tables");
  2592. return rc;
  2593. }
  2594. rc = reg_w(sd, 0x2f, 0x80);
  2595. if (rc < 0)
  2596. return rc;
  2597. return 0;
  2598. }
  2599. static int ov519_configure(struct sd *sd)
  2600. {
  2601. static const struct ov_regvals init_519[] = {
  2602. { 0x5a, 0x6d }, /* EnableSystem */
  2603. { 0x53, 0x9b },
  2604. { 0x54, 0xff }, /* set bit2 to enable jpeg */
  2605. { 0x5d, 0x03 },
  2606. { 0x49, 0x01 },
  2607. { 0x48, 0x00 },
  2608. /* Set LED pin to output mode. Bit 4 must be cleared or sensor
  2609. * detection will fail. This deserves further investigation. */
  2610. { OV519_GPIO_IO_CTRL0, 0xee },
  2611. { 0x51, 0x0f }, /* SetUsbInit */
  2612. { 0x51, 0x00 },
  2613. { 0x22, 0x00 },
  2614. /* windows reads 0x55 at this point*/
  2615. };
  2616. return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
  2617. }
  2618. static int ovfx2_configure(struct sd *sd)
  2619. {
  2620. static const struct ov_regvals init_fx2[] = {
  2621. { 0x00, 0x60 },
  2622. { 0x02, 0x01 },
  2623. { 0x0f, 0x1d },
  2624. { 0xe9, 0x82 },
  2625. { 0xea, 0xc7 },
  2626. { 0xeb, 0x10 },
  2627. { 0xec, 0xf6 },
  2628. };
  2629. sd->stopped = 1;
  2630. return write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
  2631. }
  2632. /* this function is called at probe time */
  2633. static int sd_config(struct gspca_dev *gspca_dev,
  2634. const struct usb_device_id *id)
  2635. {
  2636. struct sd *sd = (struct sd *) gspca_dev;
  2637. struct cam *cam = &gspca_dev->cam;
  2638. int ret = 0;
  2639. sd->bridge = id->driver_info & BRIDGE_MASK;
  2640. sd->invert_led = id->driver_info & BRIDGE_INVERT_LED;
  2641. switch (sd->bridge) {
  2642. case BRIDGE_OV511:
  2643. case BRIDGE_OV511PLUS:
  2644. ret = ov511_configure(gspca_dev);
  2645. break;
  2646. case BRIDGE_OV518:
  2647. case BRIDGE_OV518PLUS:
  2648. ret = ov518_configure(gspca_dev);
  2649. break;
  2650. case BRIDGE_OV519:
  2651. ret = ov519_configure(sd);
  2652. break;
  2653. case BRIDGE_OVFX2:
  2654. ret = ovfx2_configure(sd);
  2655. cam->bulk_size = OVFX2_BULK_SIZE;
  2656. cam->bulk_nurbs = MAX_NURBS;
  2657. cam->bulk = 1;
  2658. break;
  2659. }
  2660. if (ret)
  2661. goto error;
  2662. ov51x_led_control(sd, 0); /* turn LED off */
  2663. /* The OV519 must be more aggressive about sensor detection since
  2664. * I2C write will never fail if the sensor is not present. We have
  2665. * to try to initialize the sensor to detect its presence */
  2666. /* Test for 76xx */
  2667. if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
  2668. if (ov7xx0_configure(sd) < 0) {
  2669. PDEBUG(D_ERR, "Failed to configure OV7xx0");
  2670. goto error;
  2671. }
  2672. /* Test for 6xx0 */
  2673. } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
  2674. if (ov6xx0_configure(sd) < 0) {
  2675. PDEBUG(D_ERR, "Failed to configure OV6xx0");
  2676. goto error;
  2677. }
  2678. /* Test for 8xx0 */
  2679. } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
  2680. if (ov8xx0_configure(sd) < 0) {
  2681. PDEBUG(D_ERR, "Failed to configure OV8xx0");
  2682. goto error;
  2683. }
  2684. /* Test for 3xxx / 2xxx */
  2685. } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
  2686. if (ov_hires_configure(sd) < 0) {
  2687. PDEBUG(D_ERR, "Failed to configure high res OV");
  2688. goto error;
  2689. }
  2690. } else {
  2691. PDEBUG(D_ERR, "Can't determine sensor slave IDs");
  2692. goto error;
  2693. }
  2694. switch (sd->bridge) {
  2695. case BRIDGE_OV511:
  2696. case BRIDGE_OV511PLUS:
  2697. if (!sd->sif) {
  2698. cam->cam_mode = ov511_vga_mode;
  2699. cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
  2700. } else {
  2701. cam->cam_mode = ov511_sif_mode;
  2702. cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
  2703. }
  2704. break;
  2705. case BRIDGE_OV518:
  2706. case BRIDGE_OV518PLUS:
  2707. if (!sd->sif) {
  2708. cam->cam_mode = ov518_vga_mode;
  2709. cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
  2710. } else {
  2711. cam->cam_mode = ov518_sif_mode;
  2712. cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
  2713. }
  2714. break;
  2715. case BRIDGE_OV519:
  2716. if (!sd->sif) {
  2717. cam->cam_mode = ov519_vga_mode;
  2718. cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
  2719. } else {
  2720. cam->cam_mode = ov519_sif_mode;
  2721. cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
  2722. }
  2723. break;
  2724. case BRIDGE_OVFX2:
  2725. if (sd->sensor == SEN_OV2610) {
  2726. cam->cam_mode = ovfx2_ov2610_mode;
  2727. cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
  2728. } else if (sd->sensor == SEN_OV3610) {
  2729. cam->cam_mode = ovfx2_ov3610_mode;
  2730. cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
  2731. } else if (!sd->sif) {
  2732. cam->cam_mode = ov519_vga_mode;
  2733. cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
  2734. } else {
  2735. cam->cam_mode = ov519_sif_mode;
  2736. cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
  2737. }
  2738. break;
  2739. }
  2740. sd->brightness = BRIGHTNESS_DEF;
  2741. if (sd->sensor == SEN_OV6630 || sd->sensor == SEN_OV66308AF)
  2742. sd->contrast = 200; /* The default is too low for the ov6630 */
  2743. else
  2744. sd->contrast = CONTRAST_DEF;
  2745. sd->colors = COLOR_DEF;
  2746. sd->hflip = HFLIP_DEF;
  2747. sd->vflip = VFLIP_DEF;
  2748. sd->autobrightness = AUTOBRIGHT_DEF;
  2749. if (sd->sensor == SEN_OV7670) {
  2750. sd->freq = OV7670_FREQ_DEF;
  2751. gspca_dev->ctrl_dis = 1 << FREQ_IDX;
  2752. } else {
  2753. sd->freq = FREQ_DEF;
  2754. gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) |
  2755. (1 << OV7670_FREQ_IDX);
  2756. }
  2757. if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
  2758. gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX;
  2759. /* OV8610 Frequency filter control should work but needs testing */
  2760. if (sd->sensor == SEN_OV8610)
  2761. gspca_dev->ctrl_dis |= 1 << FREQ_IDX;
  2762. /* No controls for the OV2610/OV3610 */
  2763. if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
  2764. gspca_dev->ctrl_dis |= 0xFF;
  2765. return 0;
  2766. error:
  2767. PDEBUG(D_ERR, "OV519 Config failed");
  2768. return -EBUSY;
  2769. }
  2770. /* this function is called at probe and resume time */
  2771. static int sd_init(struct gspca_dev *gspca_dev)
  2772. {
  2773. struct sd *sd = (struct sd *) gspca_dev;
  2774. /* initialize the sensor */
  2775. switch (sd->sensor) {
  2776. case SEN_OV2610:
  2777. if (write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610)))
  2778. return -EIO;
  2779. /* Enable autogain, autoexpo, awb, bandfilter */
  2780. if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
  2781. return -EIO;
  2782. break;
  2783. case SEN_OV3610:
  2784. if (write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b)))
  2785. return -EIO;
  2786. /* Enable autogain, autoexpo, awb, bandfilter */
  2787. if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
  2788. return -EIO;
  2789. break;
  2790. case SEN_OV6620:
  2791. if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
  2792. return -EIO;
  2793. break;
  2794. case SEN_OV6630:
  2795. case SEN_OV66308AF:
  2796. if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
  2797. return -EIO;
  2798. break;
  2799. default:
  2800. /* case SEN_OV7610: */
  2801. /* case SEN_OV76BE: */
  2802. if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
  2803. return -EIO;
  2804. if (i2c_w_mask(sd, 0x0e, 0x00, 0x40))
  2805. return -EIO;
  2806. break;
  2807. case SEN_OV7620:
  2808. if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
  2809. return -EIO;
  2810. break;
  2811. case SEN_OV7640:
  2812. if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
  2813. return -EIO;
  2814. break;
  2815. case SEN_OV7670:
  2816. if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
  2817. return -EIO;
  2818. break;
  2819. case SEN_OV8610:
  2820. if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
  2821. return -EIO;
  2822. break;
  2823. }
  2824. return 0;
  2825. }
  2826. /* Set up the OV511/OV511+ with the given image parameters.
  2827. *
  2828. * Do not put any sensor-specific code in here (including I2C I/O functions)
  2829. */
  2830. static int ov511_mode_init_regs(struct sd *sd)
  2831. {
  2832. int hsegs, vsegs, packet_size, fps, needed;
  2833. int interlaced = 0;
  2834. struct usb_host_interface *alt;
  2835. struct usb_interface *intf;
  2836. intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
  2837. alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
  2838. if (!alt) {
  2839. PDEBUG(D_ERR, "Couldn't get altsetting");
  2840. return -EIO;
  2841. }
  2842. packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
  2843. reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
  2844. reg_w(sd, R511_CAM_UV_EN, 0x01);
  2845. reg_w(sd, R511_SNAP_UV_EN, 0x01);
  2846. reg_w(sd, R511_SNAP_OPTS, 0x03);
  2847. /* Here I'm assuming that snapshot size == image size.
  2848. * I hope that's always true. --claudio
  2849. */
  2850. hsegs = (sd->gspca_dev.width >> 3) - 1;
  2851. vsegs = (sd->gspca_dev.height >> 3) - 1;
  2852. reg_w(sd, R511_CAM_PXCNT, hsegs);
  2853. reg_w(sd, R511_CAM_LNCNT, vsegs);
  2854. reg_w(sd, R511_CAM_PXDIV, 0x00);
  2855. reg_w(sd, R511_CAM_LNDIV, 0x00);
  2856. /* YUV420, low pass filter on */
  2857. reg_w(sd, R511_CAM_OPTS, 0x03);
  2858. /* Snapshot additions */
  2859. reg_w(sd, R511_SNAP_PXCNT, hsegs);
  2860. reg_w(sd, R511_SNAP_LNCNT, vsegs);
  2861. reg_w(sd, R511_SNAP_PXDIV, 0x00);
  2862. reg_w(sd, R511_SNAP_LNDIV, 0x00);
  2863. /******** Set the framerate ********/
  2864. if (frame_rate > 0)
  2865. sd->frame_rate = frame_rate;
  2866. switch (sd->sensor) {
  2867. case SEN_OV6620:
  2868. /* No framerate control, doesn't like higher rates yet */
  2869. sd->clockdiv = 3;
  2870. break;
  2871. /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
  2872. for more sensors we need to do this for them too */
  2873. case SEN_OV7620:
  2874. case SEN_OV7640:
  2875. case SEN_OV76BE:
  2876. if (sd->gspca_dev.width == 320)
  2877. interlaced = 1;
  2878. /* Fall through */
  2879. case SEN_OV6630:
  2880. case SEN_OV7610:
  2881. case SEN_OV7670:
  2882. switch (sd->frame_rate) {
  2883. case 30:
  2884. case 25:
  2885. /* Not enough bandwidth to do 640x480 @ 30 fps */
  2886. if (sd->gspca_dev.width != 640) {
  2887. sd->clockdiv = 0;
  2888. break;
  2889. }
  2890. /* Fall through for 640x480 case */
  2891. default:
  2892. /* case 20: */
  2893. /* case 15: */
  2894. sd->clockdiv = 1;
  2895. break;
  2896. case 10:
  2897. sd->clockdiv = 2;
  2898. break;
  2899. case 5:
  2900. sd->clockdiv = 5;
  2901. break;
  2902. }
  2903. if (interlaced) {
  2904. sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
  2905. /* Higher then 10 does not work */
  2906. if (sd->clockdiv > 10)
  2907. sd->clockdiv = 10;
  2908. }
  2909. break;
  2910. case SEN_OV8610:
  2911. /* No framerate control ?? */
  2912. sd->clockdiv = 0;
  2913. break;
  2914. }
  2915. /* Check if we have enough bandwidth to disable compression */
  2916. fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
  2917. needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
  2918. /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
  2919. if (needed > 1400 * packet_size) {
  2920. /* Enable Y and UV quantization and compression */
  2921. reg_w(sd, R511_COMP_EN, 0x07);
  2922. reg_w(sd, R511_COMP_LUT_EN, 0x03);
  2923. } else {
  2924. reg_w(sd, R511_COMP_EN, 0x06);
  2925. reg_w(sd, R511_COMP_LUT_EN, 0x00);
  2926. }
  2927. reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
  2928. reg_w(sd, R51x_SYS_RESET, 0);
  2929. return 0;
  2930. }
  2931. /* Sets up the OV518/OV518+ with the given image parameters
  2932. *
  2933. * OV518 needs a completely different approach, until we can figure out what
  2934. * the individual registers do. Also, only 15 FPS is supported now.
  2935. *
  2936. * Do not put any sensor-specific code in here (including I2C I/O functions)
  2937. */
  2938. static int ov518_mode_init_regs(struct sd *sd)
  2939. {
  2940. int hsegs, vsegs, packet_size;
  2941. struct usb_host_interface *alt;
  2942. struct usb_interface *intf;
  2943. intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
  2944. alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
  2945. if (!alt) {
  2946. PDEBUG(D_ERR, "Couldn't get altsetting");
  2947. return -EIO;
  2948. }
  2949. packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
  2950. ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
  2951. /******** Set the mode ********/
  2952. reg_w(sd, 0x2b, 0);
  2953. reg_w(sd, 0x2c, 0);
  2954. reg_w(sd, 0x2d, 0);
  2955. reg_w(sd, 0x2e, 0);
  2956. reg_w(sd, 0x3b, 0);
  2957. reg_w(sd, 0x3c, 0);
  2958. reg_w(sd, 0x3d, 0);
  2959. reg_w(sd, 0x3e, 0);
  2960. if (sd->bridge == BRIDGE_OV518) {
  2961. /* Set 8-bit (YVYU) input format */
  2962. reg_w_mask(sd, 0x20, 0x08, 0x08);
  2963. /* Set 12-bit (4:2:0) output format */
  2964. reg_w_mask(sd, 0x28, 0x80, 0xf0);
  2965. reg_w_mask(sd, 0x38, 0x80, 0xf0);
  2966. } else {
  2967. reg_w(sd, 0x28, 0x80);
  2968. reg_w(sd, 0x38, 0x80);
  2969. }
  2970. hsegs = sd->gspca_dev.width / 16;
  2971. vsegs = sd->gspca_dev.height / 4;
  2972. reg_w(sd, 0x29, hsegs);
  2973. reg_w(sd, 0x2a, vsegs);
  2974. reg_w(sd, 0x39, hsegs);
  2975. reg_w(sd, 0x3a, vsegs);
  2976. /* Windows driver does this here; who knows why */
  2977. reg_w(sd, 0x2f, 0x80);
  2978. /******** Set the framerate ********/
  2979. sd->clockdiv = 1;
  2980. /* Mode independent, but framerate dependent, regs */
  2981. /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
  2982. reg_w(sd, 0x51, 0x04);
  2983. reg_w(sd, 0x22, 0x18);
  2984. reg_w(sd, 0x23, 0xff);
  2985. if (sd->bridge == BRIDGE_OV518PLUS) {
  2986. switch (sd->sensor) {
  2987. case SEN_OV7620:
  2988. if (sd->gspca_dev.width == 320) {
  2989. reg_w(sd, 0x20, 0x00);
  2990. reg_w(sd, 0x21, 0x19);
  2991. } else {
  2992. reg_w(sd, 0x20, 0x60);
  2993. reg_w(sd, 0x21, 0x1f);
  2994. }
  2995. break;
  2996. default:
  2997. reg_w(sd, 0x21, 0x19);
  2998. }
  2999. } else
  3000. reg_w(sd, 0x71, 0x17); /* Compression-related? */
  3001. /* FIXME: Sensor-specific */
  3002. /* Bit 5 is what matters here. Of course, it is "reserved" */
  3003. i2c_w(sd, 0x54, 0x23);
  3004. reg_w(sd, 0x2f, 0x80);
  3005. if (sd->bridge == BRIDGE_OV518PLUS) {
  3006. reg_w(sd, 0x24, 0x94);
  3007. reg_w(sd, 0x25, 0x90);
  3008. ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
  3009. ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
  3010. ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
  3011. ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
  3012. ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
  3013. ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
  3014. ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
  3015. ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
  3016. ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
  3017. } else {
  3018. reg_w(sd, 0x24, 0x9f);
  3019. reg_w(sd, 0x25, 0x90);
  3020. ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
  3021. ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
  3022. ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
  3023. ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
  3024. ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
  3025. ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
  3026. ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
  3027. ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
  3028. ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
  3029. }
  3030. reg_w(sd, 0x2f, 0x80);
  3031. return 0;
  3032. }
  3033. /* Sets up the OV519 with the given image parameters
  3034. *
  3035. * OV519 needs a completely different approach, until we can figure out what
  3036. * the individual registers do.
  3037. *
  3038. * Do not put any sensor-specific code in here (including I2C I/O functions)
  3039. */
  3040. static int ov519_mode_init_regs(struct sd *sd)
  3041. {
  3042. static const struct ov_regvals mode_init_519_ov7670[] = {
  3043. { 0x5d, 0x03 }, /* Turn off suspend mode */
  3044. { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
  3045. { 0x54, 0x0f }, /* bit2 (jpeg enable) */
  3046. { 0xa2, 0x20 }, /* a2-a5 are undocumented */
  3047. { 0xa3, 0x18 },
  3048. { 0xa4, 0x04 },
  3049. { 0xa5, 0x28 },
  3050. { 0x37, 0x00 }, /* SetUsbInit */
  3051. { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
  3052. /* Enable both fields, YUV Input, disable defect comp (why?) */
  3053. { 0x20, 0x0c },
  3054. { 0x21, 0x38 },
  3055. { 0x22, 0x1d },
  3056. { 0x17, 0x50 }, /* undocumented */
  3057. { 0x37, 0x00 }, /* undocumented */
  3058. { 0x40, 0xff }, /* I2C timeout counter */
  3059. { 0x46, 0x00 }, /* I2C clock prescaler */
  3060. { 0x59, 0x04 }, /* new from windrv 090403 */
  3061. { 0xff, 0x00 }, /* undocumented */
  3062. /* windows reads 0x55 at this point, why? */
  3063. };
  3064. static const struct ov_regvals mode_init_519[] = {
  3065. { 0x5d, 0x03 }, /* Turn off suspend mode */
  3066. { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
  3067. { 0x54, 0x0f }, /* bit2 (jpeg enable) */
  3068. { 0xa2, 0x20 }, /* a2-a5 are undocumented */
  3069. { 0xa3, 0x18 },
  3070. { 0xa4, 0x04 },
  3071. { 0xa5, 0x28 },
  3072. { 0x37, 0x00 }, /* SetUsbInit */
  3073. { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
  3074. /* Enable both fields, YUV Input, disable defect comp (why?) */
  3075. { 0x22, 0x1d },
  3076. { 0x17, 0x50 }, /* undocumented */
  3077. { 0x37, 0x00 }, /* undocumented */
  3078. { 0x40, 0xff }, /* I2C timeout counter */
  3079. { 0x46, 0x00 }, /* I2C clock prescaler */
  3080. { 0x59, 0x04 }, /* new from windrv 090403 */
  3081. { 0xff, 0x00 }, /* undocumented */
  3082. /* windows reads 0x55 at this point, why? */
  3083. };
  3084. /******** Set the mode ********/
  3085. if (sd->sensor != SEN_OV7670) {
  3086. if (write_regvals(sd, mode_init_519,
  3087. ARRAY_SIZE(mode_init_519)))
  3088. return -EIO;
  3089. if (sd->sensor == SEN_OV7640) {
  3090. /* Select 8-bit input mode */
  3091. reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
  3092. }
  3093. } else {
  3094. if (write_regvals(sd, mode_init_519_ov7670,
  3095. ARRAY_SIZE(mode_init_519_ov7670)))
  3096. return -EIO;
  3097. }
  3098. reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
  3099. reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
  3100. if (sd->sensor == SEN_OV7670 &&
  3101. sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
  3102. reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
  3103. else
  3104. reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
  3105. reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
  3106. reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
  3107. reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
  3108. reg_w(sd, OV519_R16_DIVIDER, 0x00);
  3109. reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
  3110. reg_w(sd, 0x26, 0x00); /* Undocumented */
  3111. /******** Set the framerate ********/
  3112. if (frame_rate > 0)
  3113. sd->frame_rate = frame_rate;
  3114. /* FIXME: These are only valid at the max resolution. */
  3115. sd->clockdiv = 0;
  3116. switch (sd->sensor) {
  3117. case SEN_OV7640:
  3118. switch (sd->frame_rate) {
  3119. default:
  3120. /* case 30: */
  3121. reg_w(sd, 0xa4, 0x0c);
  3122. reg_w(sd, 0x23, 0xff);
  3123. break;
  3124. case 25:
  3125. reg_w(sd, 0xa4, 0x0c);
  3126. reg_w(sd, 0x23, 0x1f);
  3127. break;
  3128. case 20:
  3129. reg_w(sd, 0xa4, 0x0c);
  3130. reg_w(sd, 0x23, 0x1b);
  3131. break;
  3132. case 15:
  3133. reg_w(sd, 0xa4, 0x04);
  3134. reg_w(sd, 0x23, 0xff);
  3135. sd->clockdiv = 1;
  3136. break;
  3137. case 10:
  3138. reg_w(sd, 0xa4, 0x04);
  3139. reg_w(sd, 0x23, 0x1f);
  3140. sd->clockdiv = 1;
  3141. break;
  3142. case 5:
  3143. reg_w(sd, 0xa4, 0x04);
  3144. reg_w(sd, 0x23, 0x1b);
  3145. sd->clockdiv = 1;
  3146. break;
  3147. }
  3148. break;
  3149. case SEN_OV8610:
  3150. switch (sd->frame_rate) {
  3151. default: /* 15 fps */
  3152. /* case 15: */
  3153. reg_w(sd, 0xa4, 0x06);
  3154. reg_w(sd, 0x23, 0xff);
  3155. break;
  3156. case 10:
  3157. reg_w(sd, 0xa4, 0x06);
  3158. reg_w(sd, 0x23, 0x1f);
  3159. break;
  3160. case 5:
  3161. reg_w(sd, 0xa4, 0x06);
  3162. reg_w(sd, 0x23, 0x1b);
  3163. break;
  3164. }
  3165. break;
  3166. case SEN_OV7670: /* guesses, based on 7640 */
  3167. PDEBUG(D_STREAM, "Setting framerate to %d fps",
  3168. (sd->frame_rate == 0) ? 15 : sd->frame_rate);
  3169. reg_w(sd, 0xa4, 0x10);
  3170. switch (sd->frame_rate) {
  3171. case 30:
  3172. reg_w(sd, 0x23, 0xff);
  3173. break;
  3174. case 20:
  3175. reg_w(sd, 0x23, 0x1b);
  3176. break;
  3177. default:
  3178. /* case 15: */
  3179. reg_w(sd, 0x23, 0xff);
  3180. sd->clockdiv = 1;
  3181. break;
  3182. }
  3183. break;
  3184. }
  3185. return 0;
  3186. }
  3187. static int mode_init_ov_sensor_regs(struct sd *sd)
  3188. {
  3189. struct gspca_dev *gspca_dev;
  3190. int qvga, xstart, xend, ystart, yend;
  3191. __u8 v;
  3192. gspca_dev = &sd->gspca_dev;
  3193. qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
  3194. /******** Mode (VGA/QVGA) and sensor specific regs ********/
  3195. switch (sd->sensor) {
  3196. case SEN_OV2610:
  3197. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3198. i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
  3199. i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
  3200. i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
  3201. i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
  3202. i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
  3203. i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
  3204. return 0;
  3205. case SEN_OV3610:
  3206. if (qvga) {
  3207. xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
  3208. ystart = (776 - gspca_dev->height) / 2;
  3209. } else {
  3210. xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
  3211. ystart = (1544 - gspca_dev->height) / 2;
  3212. }
  3213. xend = xstart + gspca_dev->width;
  3214. yend = ystart + gspca_dev->height;
  3215. /* Writing to the COMH register resets the other windowing regs
  3216. to their default values, so we must do this first. */
  3217. i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
  3218. i2c_w_mask(sd, 0x32,
  3219. (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
  3220. 0x3f);
  3221. i2c_w_mask(sd, 0x03,
  3222. (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
  3223. 0x0f);
  3224. i2c_w(sd, 0x17, xstart >> 4);
  3225. i2c_w(sd, 0x18, xend >> 4);
  3226. i2c_w(sd, 0x19, ystart >> 3);
  3227. i2c_w(sd, 0x1a, yend >> 3);
  3228. return 0;
  3229. case SEN_OV8610:
  3230. /* For OV8610 qvga means qsvga */
  3231. i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
  3232. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3233. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3234. i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
  3235. i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
  3236. break;
  3237. case SEN_OV7610:
  3238. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3239. i2c_w(sd, 0x35, qvga?0x1e:0x9e);
  3240. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3241. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3242. break;
  3243. case SEN_OV7620:
  3244. case SEN_OV76BE:
  3245. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3246. i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
  3247. i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
  3248. i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
  3249. i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
  3250. i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
  3251. i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
  3252. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3253. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3254. if (sd->sensor == SEN_OV76BE)
  3255. i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
  3256. break;
  3257. case SEN_OV7640:
  3258. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3259. i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
  3260. /* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */
  3261. /* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */
  3262. /* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */
  3263. /* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */
  3264. /* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */
  3265. i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
  3266. break;
  3267. case SEN_OV7670:
  3268. /* set COM7_FMT_VGA or COM7_FMT_QVGA
  3269. * do we need to set anything else?
  3270. * HSTART etc are set in set_ov_sensor_window itself */
  3271. i2c_w_mask(sd, OV7670_REG_COM7,
  3272. qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
  3273. OV7670_COM7_FMT_MASK);
  3274. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3275. i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
  3276. OV7670_COM8_AWB);
  3277. if (qvga) { /* QVGA from ov7670.c by
  3278. * Jonathan Corbet */
  3279. xstart = 164;
  3280. xend = 28;
  3281. ystart = 14;
  3282. yend = 494;
  3283. } else { /* VGA */
  3284. xstart = 158;
  3285. xend = 14;
  3286. ystart = 10;
  3287. yend = 490;
  3288. }
  3289. /* OV7670 hardware window registers are split across
  3290. * multiple locations */
  3291. i2c_w(sd, OV7670_REG_HSTART, xstart >> 3);
  3292. i2c_w(sd, OV7670_REG_HSTOP, xend >> 3);
  3293. v = i2c_r(sd, OV7670_REG_HREF);
  3294. v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
  3295. msleep(10); /* need to sleep between read and write to
  3296. * same reg! */
  3297. i2c_w(sd, OV7670_REG_HREF, v);
  3298. i2c_w(sd, OV7670_REG_VSTART, ystart >> 2);
  3299. i2c_w(sd, OV7670_REG_VSTOP, yend >> 2);
  3300. v = i2c_r(sd, OV7670_REG_VREF);
  3301. v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
  3302. msleep(10); /* need to sleep between read and write to
  3303. * same reg! */
  3304. i2c_w(sd, OV7670_REG_VREF, v);
  3305. break;
  3306. case SEN_OV6620:
  3307. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3308. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3309. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3310. break;
  3311. case SEN_OV6630:
  3312. case SEN_OV66308AF:
  3313. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3314. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3315. break;
  3316. default:
  3317. return -EINVAL;
  3318. }
  3319. /******** Clock programming ********/
  3320. i2c_w(sd, 0x11, sd->clockdiv);
  3321. return 0;
  3322. }
  3323. static void sethvflip(struct sd *sd)
  3324. {
  3325. if (sd->sensor != SEN_OV7670)
  3326. return;
  3327. if (sd->gspca_dev.streaming)
  3328. ov51x_stop(sd);
  3329. i2c_w_mask(sd, OV7670_REG_MVFP,
  3330. OV7670_MVFP_MIRROR * sd->hflip
  3331. | OV7670_MVFP_VFLIP * sd->vflip,
  3332. OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
  3333. if (sd->gspca_dev.streaming)
  3334. ov51x_restart(sd);
  3335. }
  3336. static int set_ov_sensor_window(struct sd *sd)
  3337. {
  3338. struct gspca_dev *gspca_dev;
  3339. int qvga, crop;
  3340. int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
  3341. int ret;
  3342. /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
  3343. if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610 ||
  3344. sd->sensor == SEN_OV7670)
  3345. return mode_init_ov_sensor_regs(sd);
  3346. gspca_dev = &sd->gspca_dev;
  3347. qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
  3348. crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2;
  3349. /* The different sensor ICs handle setting up of window differently.
  3350. * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
  3351. switch (sd->sensor) {
  3352. case SEN_OV8610:
  3353. hwsbase = 0x1e;
  3354. hwebase = 0x1e;
  3355. vwsbase = 0x02;
  3356. vwebase = 0x02;
  3357. break;
  3358. case SEN_OV7610:
  3359. case SEN_OV76BE:
  3360. hwsbase = 0x38;
  3361. hwebase = 0x3a;
  3362. vwsbase = vwebase = 0x05;
  3363. break;
  3364. case SEN_OV6620:
  3365. case SEN_OV6630:
  3366. case SEN_OV66308AF:
  3367. hwsbase = 0x38;
  3368. hwebase = 0x3a;
  3369. vwsbase = 0x05;
  3370. vwebase = 0x06;
  3371. if (sd->sensor == SEN_OV66308AF && qvga)
  3372. /* HDG: this fixes U and V getting swapped */
  3373. hwsbase++;
  3374. if (crop) {
  3375. hwsbase += 8;
  3376. hwebase += 8;
  3377. vwsbase += 11;
  3378. vwebase += 11;
  3379. }
  3380. break;
  3381. case SEN_OV7620:
  3382. hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
  3383. hwebase = 0x2f;
  3384. vwsbase = vwebase = 0x05;
  3385. break;
  3386. case SEN_OV7640:
  3387. hwsbase = 0x1a;
  3388. hwebase = 0x1a;
  3389. vwsbase = vwebase = 0x03;
  3390. break;
  3391. default:
  3392. return -EINVAL;
  3393. }
  3394. switch (sd->sensor) {
  3395. case SEN_OV6620:
  3396. case SEN_OV6630:
  3397. case SEN_OV66308AF:
  3398. if (qvga) { /* QCIF */
  3399. hwscale = 0;
  3400. vwscale = 0;
  3401. } else { /* CIF */
  3402. hwscale = 1;
  3403. vwscale = 1; /* The datasheet says 0;
  3404. * it's wrong */
  3405. }
  3406. break;
  3407. case SEN_OV8610:
  3408. if (qvga) { /* QSVGA */
  3409. hwscale = 1;
  3410. vwscale = 1;
  3411. } else { /* SVGA */
  3412. hwscale = 2;
  3413. vwscale = 2;
  3414. }
  3415. break;
  3416. default: /* SEN_OV7xx0 */
  3417. if (qvga) { /* QVGA */
  3418. hwscale = 1;
  3419. vwscale = 0;
  3420. } else { /* VGA */
  3421. hwscale = 2;
  3422. vwscale = 1;
  3423. }
  3424. }
  3425. ret = mode_init_ov_sensor_regs(sd);
  3426. if (ret < 0)
  3427. return ret;
  3428. i2c_w(sd, 0x17, hwsbase);
  3429. i2c_w(sd, 0x18, hwebase + (sd->gspca_dev.width >> hwscale));
  3430. i2c_w(sd, 0x19, vwsbase);
  3431. i2c_w(sd, 0x1a, vwebase + (sd->gspca_dev.height >> vwscale));
  3432. return 0;
  3433. }
  3434. /* -- start the camera -- */
  3435. static int sd_start(struct gspca_dev *gspca_dev)
  3436. {
  3437. struct sd *sd = (struct sd *) gspca_dev;
  3438. int ret = 0;
  3439. switch (sd->bridge) {
  3440. case BRIDGE_OV511:
  3441. case BRIDGE_OV511PLUS:
  3442. ret = ov511_mode_init_regs(sd);
  3443. break;
  3444. case BRIDGE_OV518:
  3445. case BRIDGE_OV518PLUS:
  3446. ret = ov518_mode_init_regs(sd);
  3447. break;
  3448. case BRIDGE_OV519:
  3449. ret = ov519_mode_init_regs(sd);
  3450. break;
  3451. /* case BRIDGE_OVFX2: nothing to do */
  3452. }
  3453. if (ret < 0)
  3454. goto out;
  3455. ret = set_ov_sensor_window(sd);
  3456. if (ret < 0)
  3457. goto out;
  3458. setcontrast(gspca_dev);
  3459. setbrightness(gspca_dev);
  3460. setcolors(gspca_dev);
  3461. sethvflip(sd);
  3462. setautobrightness(sd);
  3463. setfreq(sd);
  3464. ret = ov51x_restart(sd);
  3465. if (ret < 0)
  3466. goto out;
  3467. ov51x_led_control(sd, 1);
  3468. return 0;
  3469. out:
  3470. PDEBUG(D_ERR, "camera start error:%d", ret);
  3471. return ret;
  3472. }
  3473. static void sd_stopN(struct gspca_dev *gspca_dev)
  3474. {
  3475. struct sd *sd = (struct sd *) gspca_dev;
  3476. ov51x_stop(sd);
  3477. ov51x_led_control(sd, 0);
  3478. }
  3479. static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
  3480. struct gspca_frame *frame, /* target */
  3481. __u8 *in, /* isoc packet */
  3482. int len) /* iso packet length */
  3483. {
  3484. struct sd *sd = (struct sd *) gspca_dev;
  3485. /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
  3486. * byte non-zero. The EOF packet has image width/height in the
  3487. * 10th and 11th bytes. The 9th byte is given as follows:
  3488. *
  3489. * bit 7: EOF
  3490. * 6: compression enabled
  3491. * 5: 422/420/400 modes
  3492. * 4: 422/420/400 modes
  3493. * 3: 1
  3494. * 2: snapshot button on
  3495. * 1: snapshot frame
  3496. * 0: even/odd field
  3497. */
  3498. if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
  3499. (in[8] & 0x08)) {
  3500. if (in[8] & 0x80) {
  3501. /* Frame end */
  3502. if ((in[9] + 1) * 8 != gspca_dev->width ||
  3503. (in[10] + 1) * 8 != gspca_dev->height) {
  3504. PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
  3505. " requested: %dx%d\n",
  3506. (in[9] + 1) * 8, (in[10] + 1) * 8,
  3507. gspca_dev->width, gspca_dev->height);
  3508. gspca_dev->last_packet_type = DISCARD_PACKET;
  3509. return;
  3510. }
  3511. /* Add 11 byte footer to frame, might be usefull */
  3512. gspca_frame_add(gspca_dev, LAST_PACKET, frame, in, 11);
  3513. return;
  3514. } else {
  3515. /* Frame start */
  3516. gspca_frame_add(gspca_dev, FIRST_PACKET, frame, in, 0);
  3517. sd->packet_nr = 0;
  3518. }
  3519. }
  3520. /* Ignore the packet number */
  3521. len--;
  3522. /* intermediate packet */
  3523. gspca_frame_add(gspca_dev, INTER_PACKET, frame, in, len);
  3524. }
  3525. static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
  3526. struct gspca_frame *frame, /* target */
  3527. __u8 *data, /* isoc packet */
  3528. int len) /* iso packet length */
  3529. {
  3530. struct sd *sd = (struct sd *) gspca_dev;
  3531. /* A false positive here is likely, until OVT gives me
  3532. * the definitive SOF/EOF format */
  3533. if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
  3534. frame = gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0);
  3535. gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0);
  3536. sd->packet_nr = 0;
  3537. }
  3538. if (gspca_dev->last_packet_type == DISCARD_PACKET)
  3539. return;
  3540. /* Does this device use packet numbers ? */
  3541. if (len & 7) {
  3542. len--;
  3543. if (sd->packet_nr == data[len])
  3544. sd->packet_nr++;
  3545. /* The last few packets of the frame (which are all 0's
  3546. except that they may contain part of the footer), are
  3547. numbered 0 */
  3548. else if (sd->packet_nr == 0 || data[len]) {
  3549. PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
  3550. (int)data[len], (int)sd->packet_nr);
  3551. gspca_dev->last_packet_type = DISCARD_PACKET;
  3552. return;
  3553. }
  3554. }
  3555. /* intermediate packet */
  3556. gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len);
  3557. }
  3558. static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
  3559. struct gspca_frame *frame, /* target */
  3560. __u8 *data, /* isoc packet */
  3561. int len) /* iso packet length */
  3562. {
  3563. /* Header of ov519 is 16 bytes:
  3564. * Byte Value Description
  3565. * 0 0xff magic
  3566. * 1 0xff magic
  3567. * 2 0xff magic
  3568. * 3 0xXX 0x50 = SOF, 0x51 = EOF
  3569. * 9 0xXX 0x01 initial frame without data,
  3570. * 0x00 standard frame with image
  3571. * 14 Lo in EOF: length of image data / 8
  3572. * 15 Hi
  3573. */
  3574. if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
  3575. switch (data[3]) {
  3576. case 0x50: /* start of frame */
  3577. #define HDRSZ 16
  3578. data += HDRSZ;
  3579. len -= HDRSZ;
  3580. #undef HDRSZ
  3581. if (data[0] == 0xff || data[1] == 0xd8)
  3582. gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
  3583. data, len);
  3584. else
  3585. gspca_dev->last_packet_type = DISCARD_PACKET;
  3586. return;
  3587. case 0x51: /* end of frame */
  3588. if (data[9] != 0)
  3589. gspca_dev->last_packet_type = DISCARD_PACKET;
  3590. gspca_frame_add(gspca_dev, LAST_PACKET, frame,
  3591. data, 0);
  3592. return;
  3593. }
  3594. }
  3595. /* intermediate packet */
  3596. gspca_frame_add(gspca_dev, INTER_PACKET, frame,
  3597. data, len);
  3598. }
  3599. static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
  3600. struct gspca_frame *frame, /* target */
  3601. __u8 *data, /* isoc packet */
  3602. int len) /* iso packet length */
  3603. {
  3604. /* A short read signals EOF */
  3605. if (len < OVFX2_BULK_SIZE) {
  3606. gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, len);
  3607. gspca_frame_add(gspca_dev, FIRST_PACKET, frame, NULL, 0);
  3608. return;
  3609. }
  3610. gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len);
  3611. }
  3612. static void sd_pkt_scan(struct gspca_dev *gspca_dev,
  3613. struct gspca_frame *frame, /* target */
  3614. __u8 *data, /* isoc packet */
  3615. int len) /* iso packet length */
  3616. {
  3617. struct sd *sd = (struct sd *) gspca_dev;
  3618. switch (sd->bridge) {
  3619. case BRIDGE_OV511:
  3620. case BRIDGE_OV511PLUS:
  3621. ov511_pkt_scan(gspca_dev, frame, data, len);
  3622. break;
  3623. case BRIDGE_OV518:
  3624. case BRIDGE_OV518PLUS:
  3625. ov518_pkt_scan(gspca_dev, frame, data, len);
  3626. break;
  3627. case BRIDGE_OV519:
  3628. ov519_pkt_scan(gspca_dev, frame, data, len);
  3629. break;
  3630. case BRIDGE_OVFX2:
  3631. ovfx2_pkt_scan(gspca_dev, frame, data, len);
  3632. break;
  3633. }
  3634. }
  3635. /* -- management routines -- */
  3636. static void setbrightness(struct gspca_dev *gspca_dev)
  3637. {
  3638. struct sd *sd = (struct sd *) gspca_dev;
  3639. int val;
  3640. val = sd->brightness;
  3641. switch (sd->sensor) {
  3642. case SEN_OV8610:
  3643. case SEN_OV7610:
  3644. case SEN_OV76BE:
  3645. case SEN_OV6620:
  3646. case SEN_OV6630:
  3647. case SEN_OV66308AF:
  3648. case SEN_OV7640:
  3649. i2c_w(sd, OV7610_REG_BRT, val);
  3650. break;
  3651. case SEN_OV7620:
  3652. /* 7620 doesn't like manual changes when in auto mode */
  3653. if (!sd->autobrightness)
  3654. i2c_w(sd, OV7610_REG_BRT, val);
  3655. break;
  3656. case SEN_OV7670:
  3657. /*win trace
  3658. * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
  3659. i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
  3660. break;
  3661. }
  3662. }
  3663. static void setcontrast(struct gspca_dev *gspca_dev)
  3664. {
  3665. struct sd *sd = (struct sd *) gspca_dev;
  3666. int val;
  3667. val = sd->contrast;
  3668. switch (sd->sensor) {
  3669. case SEN_OV7610:
  3670. case SEN_OV6620:
  3671. i2c_w(sd, OV7610_REG_CNT, val);
  3672. break;
  3673. case SEN_OV6630:
  3674. case SEN_OV66308AF:
  3675. i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
  3676. break;
  3677. case SEN_OV8610: {
  3678. static const __u8 ctab[] = {
  3679. 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
  3680. };
  3681. /* Use Y gamma control instead. Bit 0 enables it. */
  3682. i2c_w(sd, 0x64, ctab[val >> 5]);
  3683. break;
  3684. }
  3685. case SEN_OV7620: {
  3686. static const __u8 ctab[] = {
  3687. 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
  3688. 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
  3689. };
  3690. /* Use Y gamma control instead. Bit 0 enables it. */
  3691. i2c_w(sd, 0x64, ctab[val >> 4]);
  3692. break;
  3693. }
  3694. case SEN_OV7640:
  3695. /* Use gain control instead. */
  3696. i2c_w(sd, OV7610_REG_GAIN, val >> 2);
  3697. break;
  3698. case SEN_OV7670:
  3699. /* check that this isn't just the same as ov7610 */
  3700. i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
  3701. break;
  3702. }
  3703. }
  3704. static void setcolors(struct gspca_dev *gspca_dev)
  3705. {
  3706. struct sd *sd = (struct sd *) gspca_dev;
  3707. int val;
  3708. val = sd->colors;
  3709. switch (sd->sensor) {
  3710. case SEN_OV8610:
  3711. case SEN_OV7610:
  3712. case SEN_OV76BE:
  3713. case SEN_OV6620:
  3714. case SEN_OV6630:
  3715. case SEN_OV66308AF:
  3716. i2c_w(sd, OV7610_REG_SAT, val);
  3717. break;
  3718. case SEN_OV7620:
  3719. /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
  3720. /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
  3721. if (rc < 0)
  3722. goto out; */
  3723. i2c_w(sd, OV7610_REG_SAT, val);
  3724. break;
  3725. case SEN_OV7640:
  3726. i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
  3727. break;
  3728. case SEN_OV7670:
  3729. /* supported later once I work out how to do it
  3730. * transparently fail now! */
  3731. /* set REG_COM13 values for UV sat auto mode */
  3732. break;
  3733. }
  3734. }
  3735. static void setautobrightness(struct sd *sd)
  3736. {
  3737. if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670 ||
  3738. sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
  3739. return;
  3740. i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10);
  3741. }
  3742. static void setfreq(struct sd *sd)
  3743. {
  3744. if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
  3745. return;
  3746. if (sd->sensor == SEN_OV7670) {
  3747. switch (sd->freq) {
  3748. case 0: /* Banding filter disabled */
  3749. i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
  3750. break;
  3751. case 1: /* 50 hz */
  3752. i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
  3753. OV7670_COM8_BFILT);
  3754. i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
  3755. break;
  3756. case 2: /* 60 hz */
  3757. i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
  3758. OV7670_COM8_BFILT);
  3759. i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
  3760. break;
  3761. case 3: /* Auto hz */
  3762. i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
  3763. OV7670_COM8_BFILT);
  3764. i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
  3765. 0x18);
  3766. break;
  3767. }
  3768. } else {
  3769. switch (sd->freq) {
  3770. case 0: /* Banding filter disabled */
  3771. i2c_w_mask(sd, 0x2d, 0x00, 0x04);
  3772. i2c_w_mask(sd, 0x2a, 0x00, 0x80);
  3773. break;
  3774. case 1: /* 50 hz (filter on and framerate adj) */
  3775. i2c_w_mask(sd, 0x2d, 0x04, 0x04);
  3776. i2c_w_mask(sd, 0x2a, 0x80, 0x80);
  3777. /* 20 fps -> 16.667 fps */
  3778. if (sd->sensor == SEN_OV6620 ||
  3779. sd->sensor == SEN_OV6630 ||
  3780. sd->sensor == SEN_OV66308AF)
  3781. i2c_w(sd, 0x2b, 0x5e);
  3782. else
  3783. i2c_w(sd, 0x2b, 0xac);
  3784. break;
  3785. case 2: /* 60 hz (filter on, ...) */
  3786. i2c_w_mask(sd, 0x2d, 0x04, 0x04);
  3787. if (sd->sensor == SEN_OV6620 ||
  3788. sd->sensor == SEN_OV6630 ||
  3789. sd->sensor == SEN_OV66308AF) {
  3790. /* 20 fps -> 15 fps */
  3791. i2c_w_mask(sd, 0x2a, 0x80, 0x80);
  3792. i2c_w(sd, 0x2b, 0xa8);
  3793. } else {
  3794. /* no framerate adj. */
  3795. i2c_w_mask(sd, 0x2a, 0x00, 0x80);
  3796. }
  3797. break;
  3798. }
  3799. }
  3800. }
  3801. static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
  3802. {
  3803. struct sd *sd = (struct sd *) gspca_dev;
  3804. sd->brightness = val;
  3805. if (gspca_dev->streaming)
  3806. setbrightness(gspca_dev);
  3807. return 0;
  3808. }
  3809. static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
  3810. {
  3811. struct sd *sd = (struct sd *) gspca_dev;
  3812. *val = sd->brightness;
  3813. return 0;
  3814. }
  3815. static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
  3816. {
  3817. struct sd *sd = (struct sd *) gspca_dev;
  3818. sd->contrast = val;
  3819. if (gspca_dev->streaming)
  3820. setcontrast(gspca_dev);
  3821. return 0;
  3822. }
  3823. static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
  3824. {
  3825. struct sd *sd = (struct sd *) gspca_dev;
  3826. *val = sd->contrast;
  3827. return 0;
  3828. }
  3829. static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
  3830. {
  3831. struct sd *sd = (struct sd *) gspca_dev;
  3832. sd->colors = val;
  3833. if (gspca_dev->streaming)
  3834. setcolors(gspca_dev);
  3835. return 0;
  3836. }
  3837. static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
  3838. {
  3839. struct sd *sd = (struct sd *) gspca_dev;
  3840. *val = sd->colors;
  3841. return 0;
  3842. }
  3843. static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
  3844. {
  3845. struct sd *sd = (struct sd *) gspca_dev;
  3846. sd->hflip = val;
  3847. if (gspca_dev->streaming)
  3848. sethvflip(sd);
  3849. return 0;
  3850. }
  3851. static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
  3852. {
  3853. struct sd *sd = (struct sd *) gspca_dev;
  3854. *val = sd->hflip;
  3855. return 0;
  3856. }
  3857. static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
  3858. {
  3859. struct sd *sd = (struct sd *) gspca_dev;
  3860. sd->vflip = val;
  3861. if (gspca_dev->streaming)
  3862. sethvflip(sd);
  3863. return 0;
  3864. }
  3865. static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
  3866. {
  3867. struct sd *sd = (struct sd *) gspca_dev;
  3868. *val = sd->vflip;
  3869. return 0;
  3870. }
  3871. static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val)
  3872. {
  3873. struct sd *sd = (struct sd *) gspca_dev;
  3874. sd->autobrightness = val;
  3875. if (gspca_dev->streaming)
  3876. setautobrightness(sd);
  3877. return 0;
  3878. }
  3879. static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val)
  3880. {
  3881. struct sd *sd = (struct sd *) gspca_dev;
  3882. *val = sd->autobrightness;
  3883. return 0;
  3884. }
  3885. static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
  3886. {
  3887. struct sd *sd = (struct sd *) gspca_dev;
  3888. sd->freq = val;
  3889. if (gspca_dev->streaming)
  3890. setfreq(sd);
  3891. return 0;
  3892. }
  3893. static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
  3894. {
  3895. struct sd *sd = (struct sd *) gspca_dev;
  3896. *val = sd->freq;
  3897. return 0;
  3898. }
  3899. static int sd_querymenu(struct gspca_dev *gspca_dev,
  3900. struct v4l2_querymenu *menu)
  3901. {
  3902. struct sd *sd = (struct sd *) gspca_dev;
  3903. switch (menu->id) {
  3904. case V4L2_CID_POWER_LINE_FREQUENCY:
  3905. switch (menu->index) {
  3906. case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
  3907. strcpy((char *) menu->name, "NoFliker");
  3908. return 0;
  3909. case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
  3910. strcpy((char *) menu->name, "50 Hz");
  3911. return 0;
  3912. case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
  3913. strcpy((char *) menu->name, "60 Hz");
  3914. return 0;
  3915. case 3:
  3916. if (sd->sensor != SEN_OV7670)
  3917. return -EINVAL;
  3918. strcpy((char *) menu->name, "Automatic");
  3919. return 0;
  3920. }
  3921. break;
  3922. }
  3923. return -EINVAL;
  3924. }
  3925. /* sub-driver description */
  3926. static const struct sd_desc sd_desc = {
  3927. .name = MODULE_NAME,
  3928. .ctrls = sd_ctrls,
  3929. .nctrls = ARRAY_SIZE(sd_ctrls),
  3930. .config = sd_config,
  3931. .init = sd_init,
  3932. .start = sd_start,
  3933. .stopN = sd_stopN,
  3934. .pkt_scan = sd_pkt_scan,
  3935. .querymenu = sd_querymenu,
  3936. };
  3937. /* -- module initialisation -- */
  3938. static const __devinitdata struct usb_device_id device_table[] = {
  3939. {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
  3940. {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
  3941. {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
  3942. {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
  3943. {USB_DEVICE(0x041e, 0x4064),
  3944. .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
  3945. {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
  3946. {USB_DEVICE(0x041e, 0x4068),
  3947. .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
  3948. {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
  3949. {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
  3950. {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
  3951. {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
  3952. {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
  3953. {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
  3954. {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
  3955. {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
  3956. {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
  3957. {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
  3958. {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
  3959. {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
  3960. {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
  3961. {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
  3962. {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
  3963. {USB_DEVICE(0x8020, 0xEF04), .driver_info = BRIDGE_OVFX2 },
  3964. {}
  3965. };
  3966. MODULE_DEVICE_TABLE(usb, device_table);
  3967. /* -- device connect -- */
  3968. static int sd_probe(struct usb_interface *intf,
  3969. const struct usb_device_id *id)
  3970. {
  3971. return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
  3972. THIS_MODULE);
  3973. }
  3974. static struct usb_driver sd_driver = {
  3975. .name = MODULE_NAME,
  3976. .id_table = device_table,
  3977. .probe = sd_probe,
  3978. .disconnect = gspca_disconnect,
  3979. #ifdef CONFIG_PM
  3980. .suspend = gspca_suspend,
  3981. .resume = gspca_resume,
  3982. #endif
  3983. };
  3984. /* -- module insert / remove -- */
  3985. static int __init sd_mod_init(void)
  3986. {
  3987. int ret;
  3988. ret = usb_register(&sd_driver);
  3989. if (ret < 0)
  3990. return ret;
  3991. PDEBUG(D_PROBE, "registered");
  3992. return 0;
  3993. }
  3994. static void __exit sd_mod_exit(void)
  3995. {
  3996. usb_deregister(&sd_driver);
  3997. PDEBUG(D_PROBE, "deregistered");
  3998. }
  3999. module_init(sd_mod_init);
  4000. module_exit(sd_mod_exit);
  4001. module_param(frame_rate, int, 0644);
  4002. MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");