tmio.h 4.1 KB

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  1. #ifndef MFD_TMIO_H
  2. #define MFD_TMIO_H
  3. #include <linux/device.h>
  4. #include <linux/fb.h>
  5. #include <linux/io.h>
  6. #include <linux/jiffies.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/pm_runtime.h>
  9. #define tmio_ioread8(addr) readb(addr)
  10. #define tmio_ioread16(addr) readw(addr)
  11. #define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
  12. #define tmio_ioread32(addr) \
  13. (((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16))
  14. #define tmio_iowrite8(val, addr) writeb((val), (addr))
  15. #define tmio_iowrite16(val, addr) writew((val), (addr))
  16. #define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
  17. #define tmio_iowrite32(val, addr) \
  18. do { \
  19. writew((val), (addr)); \
  20. writew((val) >> 16, (addr) + 2); \
  21. } while (0)
  22. #define CNF_CMD 0x04
  23. #define CNF_CTL_BASE 0x10
  24. #define CNF_INT_PIN 0x3d
  25. #define CNF_STOP_CLK_CTL 0x40
  26. #define CNF_GCLK_CTL 0x41
  27. #define CNF_SD_CLK_MODE 0x42
  28. #define CNF_PIN_STATUS 0x44
  29. #define CNF_PWR_CTL_1 0x48
  30. #define CNF_PWR_CTL_2 0x49
  31. #define CNF_PWR_CTL_3 0x4a
  32. #define CNF_CARD_DETECT_MODE 0x4c
  33. #define CNF_SD_SLOT 0x50
  34. #define CNF_EXT_GCLK_CTL_1 0xf0
  35. #define CNF_EXT_GCLK_CTL_2 0xf1
  36. #define CNF_EXT_GCLK_CTL_3 0xf9
  37. #define CNF_SD_LED_EN_1 0xfa
  38. #define CNF_SD_LED_EN_2 0xfe
  39. #define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
  40. #define sd_config_write8(base, shift, reg, val) \
  41. tmio_iowrite8((val), (base) + ((reg) << (shift)))
  42. #define sd_config_write16(base, shift, reg, val) \
  43. tmio_iowrite16((val), (base) + ((reg) << (shift)))
  44. #define sd_config_write32(base, shift, reg, val) \
  45. do { \
  46. tmio_iowrite16((val), (base) + ((reg) << (shift))); \
  47. tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \
  48. } while (0)
  49. /* tmio MMC platform flags */
  50. #define TMIO_MMC_WRPROTECT_DISABLE (1 << 0)
  51. /*
  52. * Some controllers can support a 2-byte block size when the bus width
  53. * is configured in 4-bit mode.
  54. */
  55. #define TMIO_MMC_BLKSZ_2BYTES (1 << 1)
  56. /*
  57. * Some controllers can support SDIO IRQ signalling.
  58. */
  59. #define TMIO_MMC_SDIO_IRQ (1 << 2)
  60. /*
  61. * Some controllers require waiting for the SD bus to become
  62. * idle before writing to some registers.
  63. */
  64. #define TMIO_MMC_HAS_IDLE_WAIT (1 << 4)
  65. /*
  66. * A GPIO is used for card hotplug detection. We need an extra flag for this,
  67. * because 0 is a valid GPIO number too, and requiring users to specify
  68. * cd_gpio < 0 to disable GPIO hotplug would break backwards compatibility.
  69. */
  70. #define TMIO_MMC_USE_GPIO_CD (1 << 5)
  71. int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
  72. int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
  73. void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
  74. void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state);
  75. struct dma_chan;
  76. struct tmio_mmc_dma {
  77. void *chan_priv_tx;
  78. void *chan_priv_rx;
  79. int slave_id_tx;
  80. int slave_id_rx;
  81. int alignment_shift;
  82. bool (*filter)(struct dma_chan *chan, void *arg);
  83. };
  84. struct tmio_mmc_host;
  85. /*
  86. * data for the MMC controller
  87. */
  88. struct tmio_mmc_data {
  89. unsigned int hclk;
  90. unsigned long capabilities;
  91. unsigned long capabilities2;
  92. unsigned long flags;
  93. u32 ocr_mask; /* available voltages */
  94. struct tmio_mmc_dma *dma;
  95. struct device *dev;
  96. unsigned int cd_gpio;
  97. void (*set_pwr)(struct platform_device *host, int state);
  98. void (*set_clk_div)(struct platform_device *host, int state);
  99. int (*get_cd)(struct platform_device *host);
  100. int (*write16_hook)(struct tmio_mmc_host *host, int addr);
  101. /* clock management callbacks */
  102. int (*clk_enable)(struct platform_device *pdev, unsigned int *f);
  103. void (*clk_disable)(struct platform_device *pdev);
  104. };
  105. /*
  106. * data for the NAND controller
  107. */
  108. struct tmio_nand_data {
  109. struct nand_bbt_descr *badblock_pattern;
  110. struct mtd_partition *partition;
  111. unsigned int num_partitions;
  112. };
  113. #define FBIO_TMIO_ACC_WRITE 0x7C639300
  114. #define FBIO_TMIO_ACC_SYNC 0x7C639301
  115. struct tmio_fb_data {
  116. int (*lcd_set_power)(struct platform_device *fb_dev,
  117. bool on);
  118. int (*lcd_mode)(struct platform_device *fb_dev,
  119. const struct fb_videomode *mode);
  120. int num_modes;
  121. struct fb_videomode *modes;
  122. /* in mm: size of screen */
  123. int height;
  124. int width;
  125. };
  126. #endif