max77686-private.h 6.8 KB

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  1. /*
  2. * max77686.h - Voltage regulator driver for the Maxim 77686
  3. *
  4. * Copyright (C) 2012 Samsung Electrnoics
  5. * Chiwoong Byun <woong.byun@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #ifndef __LINUX_MFD_MAX77686_PRIV_H
  22. #define __LINUX_MFD_MAX77686_PRIV_H
  23. #include <linux/i2c.h>
  24. #include <linux/regmap.h>
  25. #include <linux/module.h>
  26. #define MAX77686_REG_INVALID (0xff)
  27. enum max77686_pmic_reg {
  28. MAX77686_REG_DEVICE_ID = 0x00,
  29. MAX77686_REG_INTSRC = 0x01,
  30. MAX77686_REG_INT1 = 0x02,
  31. MAX77686_REG_INT2 = 0x03,
  32. MAX77686_REG_INT1MSK = 0x04,
  33. MAX77686_REG_INT2MSK = 0x05,
  34. MAX77686_REG_STATUS1 = 0x06,
  35. MAX77686_REG_STATUS2 = 0x07,
  36. MAX77686_REG_PWRON = 0x08,
  37. MAX77686_REG_ONOFF_DELAY = 0x09,
  38. MAX77686_REG_MRSTB = 0x0A,
  39. /* Reserved: 0x0B-0x0F */
  40. MAX77686_REG_BUCK1CTRL = 0x10,
  41. MAX77686_REG_BUCK1OUT = 0x11,
  42. MAX77686_REG_BUCK2CTRL1 = 0x12,
  43. MAX77686_REG_BUCK234FREQ = 0x13,
  44. MAX77686_REG_BUCK2DVS1 = 0x14,
  45. MAX77686_REG_BUCK2DVS2 = 0x15,
  46. MAX77686_REG_BUCK2DVS3 = 0x16,
  47. MAX77686_REG_BUCK2DVS4 = 0x17,
  48. MAX77686_REG_BUCK2DVS5 = 0x18,
  49. MAX77686_REG_BUCK2DVS6 = 0x19,
  50. MAX77686_REG_BUCK2DVS7 = 0x1A,
  51. MAX77686_REG_BUCK2DVS8 = 0x1B,
  52. MAX77686_REG_BUCK3CTRL1 = 0x1C,
  53. /* Reserved: 0x1D */
  54. MAX77686_REG_BUCK3DVS1 = 0x1E,
  55. MAX77686_REG_BUCK3DVS2 = 0x1F,
  56. MAX77686_REG_BUCK3DVS3 = 0x20,
  57. MAX77686_REG_BUCK3DVS4 = 0x21,
  58. MAX77686_REG_BUCK3DVS5 = 0x22,
  59. MAX77686_REG_BUCK3DVS6 = 0x23,
  60. MAX77686_REG_BUCK3DVS7 = 0x24,
  61. MAX77686_REG_BUCK3DVS8 = 0x25,
  62. MAX77686_REG_BUCK4CTRL1 = 0x26,
  63. /* Reserved: 0x27 */
  64. MAX77686_REG_BUCK4DVS1 = 0x28,
  65. MAX77686_REG_BUCK4DVS2 = 0x29,
  66. MAX77686_REG_BUCK4DVS3 = 0x2A,
  67. MAX77686_REG_BUCK4DVS4 = 0x2B,
  68. MAX77686_REG_BUCK4DVS5 = 0x2C,
  69. MAX77686_REG_BUCK4DVS6 = 0x2D,
  70. MAX77686_REG_BUCK4DVS7 = 0x2E,
  71. MAX77686_REG_BUCK4DVS8 = 0x2F,
  72. MAX77686_REG_BUCK5CTRL = 0x30,
  73. MAX77686_REG_BUCK5OUT = 0x31,
  74. MAX77686_REG_BUCK6CTRL = 0x32,
  75. MAX77686_REG_BUCK6OUT = 0x33,
  76. MAX77686_REG_BUCK7CTRL = 0x34,
  77. MAX77686_REG_BUCK7OUT = 0x35,
  78. MAX77686_REG_BUCK8CTRL = 0x36,
  79. MAX77686_REG_BUCK8OUT = 0x37,
  80. MAX77686_REG_BUCK9CTRL = 0x38,
  81. MAX77686_REG_BUCK9OUT = 0x39,
  82. /* Reserved: 0x3A-0x3F */
  83. MAX77686_REG_LDO1CTRL1 = 0x40,
  84. MAX77686_REG_LDO2CTRL1 = 0x41,
  85. MAX77686_REG_LDO3CTRL1 = 0x42,
  86. MAX77686_REG_LDO4CTRL1 = 0x43,
  87. MAX77686_REG_LDO5CTRL1 = 0x44,
  88. MAX77686_REG_LDO6CTRL1 = 0x45,
  89. MAX77686_REG_LDO7CTRL1 = 0x46,
  90. MAX77686_REG_LDO8CTRL1 = 0x47,
  91. MAX77686_REG_LDO9CTRL1 = 0x48,
  92. MAX77686_REG_LDO10CTRL1 = 0x49,
  93. MAX77686_REG_LDO11CTRL1 = 0x4A,
  94. MAX77686_REG_LDO12CTRL1 = 0x4B,
  95. MAX77686_REG_LDO13CTRL1 = 0x4C,
  96. MAX77686_REG_LDO14CTRL1 = 0x4D,
  97. MAX77686_REG_LDO15CTRL1 = 0x4E,
  98. MAX77686_REG_LDO16CTRL1 = 0x4F,
  99. MAX77686_REG_LDO17CTRL1 = 0x50,
  100. MAX77686_REG_LDO18CTRL1 = 0x51,
  101. MAX77686_REG_LDO19CTRL1 = 0x52,
  102. MAX77686_REG_LDO20CTRL1 = 0x53,
  103. MAX77686_REG_LDO21CTRL1 = 0x54,
  104. MAX77686_REG_LDO22CTRL1 = 0x55,
  105. MAX77686_REG_LDO23CTRL1 = 0x56,
  106. MAX77686_REG_LDO24CTRL1 = 0x57,
  107. MAX77686_REG_LDO25CTRL1 = 0x58,
  108. MAX77686_REG_LDO26CTRL1 = 0x59,
  109. /* Reserved: 0x5A-0x5F */
  110. MAX77686_REG_LDO1CTRL2 = 0x60,
  111. MAX77686_REG_LDO2CTRL2 = 0x61,
  112. MAX77686_REG_LDO3CTRL2 = 0x62,
  113. MAX77686_REG_LDO4CTRL2 = 0x63,
  114. MAX77686_REG_LDO5CTRL2 = 0x64,
  115. MAX77686_REG_LDO6CTRL2 = 0x65,
  116. MAX77686_REG_LDO7CTRL2 = 0x66,
  117. MAX77686_REG_LDO8CTRL2 = 0x67,
  118. MAX77686_REG_LDO9CTRL2 = 0x68,
  119. MAX77686_REG_LDO10CTRL2 = 0x69,
  120. MAX77686_REG_LDO11CTRL2 = 0x6A,
  121. MAX77686_REG_LDO12CTRL2 = 0x6B,
  122. MAX77686_REG_LDO13CTRL2 = 0x6C,
  123. MAX77686_REG_LDO14CTRL2 = 0x6D,
  124. MAX77686_REG_LDO15CTRL2 = 0x6E,
  125. MAX77686_REG_LDO16CTRL2 = 0x6F,
  126. MAX77686_REG_LDO17CTRL2 = 0x70,
  127. MAX77686_REG_LDO18CTRL2 = 0x71,
  128. MAX77686_REG_LDO19CTRL2 = 0x72,
  129. MAX77686_REG_LDO20CTRL2 = 0x73,
  130. MAX77686_REG_LDO21CTRL2 = 0x74,
  131. MAX77686_REG_LDO22CTRL2 = 0x75,
  132. MAX77686_REG_LDO23CTRL2 = 0x76,
  133. MAX77686_REG_LDO24CTRL2 = 0x77,
  134. MAX77686_REG_LDO25CTRL2 = 0x78,
  135. MAX77686_REG_LDO26CTRL2 = 0x79,
  136. /* Reserved: 0x7A-0x7D */
  137. MAX77686_REG_BBAT_CHG = 0x7E,
  138. MAX77686_REG_32KHZ = 0x7F,
  139. MAX77686_REG_PMIC_END = 0x80,
  140. };
  141. enum max77686_rtc_reg {
  142. MAX77686_RTC_INT = 0x00,
  143. MAX77686_RTC_INTM = 0x01,
  144. MAX77686_RTC_CONTROLM = 0x02,
  145. MAX77686_RTC_CONTROL = 0x03,
  146. MAX77686_RTC_UPDATE0 = 0x04,
  147. /* Reserved: 0x5 */
  148. MAX77686_WTSR_SMPL_CNTL = 0x06,
  149. MAX77686_RTC_SEC = 0x07,
  150. MAX77686_RTC_MIN = 0x08,
  151. MAX77686_RTC_HOUR = 0x09,
  152. MAX77686_RTC_WEEKDAY = 0x0A,
  153. MAX77686_RTC_MONTH = 0x0B,
  154. MAX77686_RTC_YEAR = 0x0C,
  155. MAX77686_RTC_DATE = 0x0D,
  156. MAX77686_ALARM1_SEC = 0x0E,
  157. MAX77686_ALARM1_MIN = 0x0F,
  158. MAX77686_ALARM1_HOUR = 0x10,
  159. MAX77686_ALARM1_WEEKDAY = 0x11,
  160. MAX77686_ALARM1_MONTH = 0x12,
  161. MAX77686_ALARM1_YEAR = 0x13,
  162. MAX77686_ALARM1_DATE = 0x14,
  163. MAX77686_ALARM2_SEC = 0x15,
  164. MAX77686_ALARM2_MIN = 0x16,
  165. MAX77686_ALARM2_HOUR = 0x17,
  166. MAX77686_ALARM2_WEEKDAY = 0x18,
  167. MAX77686_ALARM2_MONTH = 0x19,
  168. MAX77686_ALARM2_YEAR = 0x1A,
  169. MAX77686_ALARM2_DATE = 0x1B,
  170. };
  171. #define MAX77686_IRQSRC_PMIC (0)
  172. #define MAX77686_IRQSRC_RTC (1 << 0)
  173. enum max77686_irq_source {
  174. PMIC_INT1 = 0,
  175. PMIC_INT2,
  176. RTC_INT,
  177. MAX77686_IRQ_GROUP_NR,
  178. };
  179. enum max77686_irq {
  180. MAX77686_PMICIRQ_PWRONF,
  181. MAX77686_PMICIRQ_PWRONR,
  182. MAX77686_PMICIRQ_JIGONBF,
  183. MAX77686_PMICIRQ_JIGONBR,
  184. MAX77686_PMICIRQ_ACOKBF,
  185. MAX77686_PMICIRQ_ACOKBR,
  186. MAX77686_PMICIRQ_ONKEY1S,
  187. MAX77686_PMICIRQ_MRSTB,
  188. MAX77686_PMICIRQ_140C,
  189. MAX77686_PMICIRQ_120C,
  190. MAX77686_RTCIRQ_RTC60S,
  191. MAX77686_RTCIRQ_RTCA1,
  192. MAX77686_RTCIRQ_RTCA2,
  193. MAX77686_RTCIRQ_SMPL,
  194. MAX77686_RTCIRQ_RTC1S,
  195. MAX77686_RTCIRQ_WTSR,
  196. MAX77686_IRQ_NR,
  197. };
  198. struct max77686_dev {
  199. struct device *dev;
  200. struct i2c_client *i2c; /* 0xcc / PMIC, Battery Control, and FLASH */
  201. struct i2c_client *rtc; /* slave addr 0x0c */
  202. int type;
  203. struct regmap *regmap; /* regmap for mfd */
  204. struct regmap *rtc_regmap; /* regmap for rtc */
  205. struct irq_domain *irq_domain;
  206. int irq;
  207. int irq_gpio;
  208. bool wakeup;
  209. struct mutex irqlock;
  210. int irq_masks_cur[MAX77686_IRQ_GROUP_NR];
  211. int irq_masks_cache[MAX77686_IRQ_GROUP_NR];
  212. };
  213. enum max77686_types {
  214. TYPE_MAX77686,
  215. };
  216. extern int max77686_irq_init(struct max77686_dev *max77686);
  217. extern void max77686_irq_exit(struct max77686_dev *max77686);
  218. extern int max77686_irq_resume(struct max77686_dev *max77686);
  219. #endif /* __LINUX_MFD_MAX77686_PRIV_H */