mx1_camera.c 20 KB

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  1. /*
  2. * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
  3. *
  4. * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
  5. * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
  6. *
  7. * Based on PXA SoC camera driver
  8. * Copyright (C) 2006, Sascha Hauer, Pengutronix
  9. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/clk.h>
  16. #include <linux/delay.h>
  17. #include <linux/device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/errno.h>
  20. #include <linux/fs.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/kernel.h>
  25. #include <linux/mm.h>
  26. #include <linux/module.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/mutex.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/time.h>
  31. #include <linux/version.h>
  32. #include <linux/videodev2.h>
  33. #include <media/soc_camera.h>
  34. #include <media/v4l2-common.h>
  35. #include <media/v4l2-dev.h>
  36. #include <media/videobuf-dma-contig.h>
  37. #include <asm/dma.h>
  38. #include <asm/fiq.h>
  39. #include <mach/dma-mx1-mx2.h>
  40. #include <mach/hardware.h>
  41. #include <mach/mx1_camera.h>
  42. /*
  43. * CSI registers
  44. */
  45. #define DMA_CCR(x) (0x8c + ((x) << 6)) /* Control Registers */
  46. #define DMA_DIMR 0x08 /* Interrupt mask Register */
  47. #define CSICR1 0x00 /* CSI Control Register 1 */
  48. #define CSISR 0x08 /* CSI Status Register */
  49. #define CSIRXR 0x10 /* CSI RxFIFO Register */
  50. #define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
  51. #define CSICR1_SOF_POL (1 << 17)
  52. #define CSICR1_SOF_INTEN (1 << 16)
  53. #define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
  54. #define CSICR1_MCLKEN (1 << 9)
  55. #define CSICR1_FCC (1 << 8)
  56. #define CSICR1_BIG_ENDIAN (1 << 7)
  57. #define CSICR1_CLR_RXFIFO (1 << 5)
  58. #define CSICR1_GCLK_MODE (1 << 4)
  59. #define CSICR1_DATA_POL (1 << 2)
  60. #define CSICR1_REDGE (1 << 1)
  61. #define CSICR1_EN (1 << 0)
  62. #define CSISR_SFF_OR_INT (1 << 25)
  63. #define CSISR_RFF_OR_INT (1 << 24)
  64. #define CSISR_STATFF_INT (1 << 21)
  65. #define CSISR_RXFF_INT (1 << 18)
  66. #define CSISR_SOF_INT (1 << 16)
  67. #define CSISR_DRDY (1 << 0)
  68. #define VERSION_CODE KERNEL_VERSION(0, 0, 1)
  69. #define DRIVER_NAME "mx1-camera"
  70. #define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
  71. CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
  72. #define CSI_BUS_FLAGS (SOCAM_MASTER | SOCAM_HSYNC_ACTIVE_HIGH | \
  73. SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_LOW | \
  74. SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING | \
  75. SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_LOW | \
  76. SOCAM_DATAWIDTH_8)
  77. #define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
  78. /*
  79. * Structures
  80. */
  81. /* buffer for one video frame */
  82. struct mx1_buffer {
  83. /* common v4l buffer stuff -- must be first */
  84. struct videobuf_buffer vb;
  85. const struct soc_camera_data_format *fmt;
  86. int inwork;
  87. };
  88. /* i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
  89. * Interface. If anyone ever builds hardware to enable more than
  90. * one camera, they will have to modify this driver too */
  91. struct mx1_camera_dev {
  92. struct soc_camera_host soc_host;
  93. struct soc_camera_device *icd;
  94. struct mx1_camera_pdata *pdata;
  95. struct mx1_buffer *active;
  96. struct device *dev;
  97. struct resource *res;
  98. struct clk *clk;
  99. struct list_head capture;
  100. void __iomem *base;
  101. int dma_chan;
  102. unsigned int irq;
  103. unsigned long mclk;
  104. spinlock_t lock;
  105. };
  106. /*
  107. * Videobuf operations
  108. */
  109. static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  110. unsigned int *size)
  111. {
  112. struct soc_camera_device *icd = vq->priv_data;
  113. *size = icd->width * icd->height *
  114. ((icd->current_fmt->depth + 7) >> 3);
  115. if (!*count)
  116. *count = 32;
  117. while (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  118. (*count)--;
  119. dev_dbg(&icd->dev, "count=%d, size=%d\n", *count, *size);
  120. return 0;
  121. }
  122. static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
  123. {
  124. struct soc_camera_device *icd = vq->priv_data;
  125. struct videobuf_buffer *vb = &buf->vb;
  126. BUG_ON(in_interrupt());
  127. dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  128. vb, vb->baddr, vb->bsize);
  129. /* This waits until this buffer is out of danger, i.e., until it is no
  130. * longer in STATE_QUEUED or STATE_ACTIVE */
  131. videobuf_waiton(vb, 0, 0);
  132. videobuf_dma_contig_free(vq, vb);
  133. vb->state = VIDEOBUF_NEEDS_INIT;
  134. }
  135. static int mx1_videobuf_prepare(struct videobuf_queue *vq,
  136. struct videobuf_buffer *vb, enum v4l2_field field)
  137. {
  138. struct soc_camera_device *icd = vq->priv_data;
  139. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  140. int ret;
  141. dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  142. vb, vb->baddr, vb->bsize);
  143. /* Added list head initialization on alloc */
  144. WARN_ON(!list_empty(&vb->queue));
  145. BUG_ON(NULL == icd->current_fmt);
  146. /* I think, in buf_prepare you only have to protect global data,
  147. * the actual buffer is yours */
  148. buf->inwork = 1;
  149. if (buf->fmt != icd->current_fmt ||
  150. vb->width != icd->width ||
  151. vb->height != icd->height ||
  152. vb->field != field) {
  153. buf->fmt = icd->current_fmt;
  154. vb->width = icd->width;
  155. vb->height = icd->height;
  156. vb->field = field;
  157. vb->state = VIDEOBUF_NEEDS_INIT;
  158. }
  159. vb->size = vb->width * vb->height * ((buf->fmt->depth + 7) >> 3);
  160. if (0 != vb->baddr && vb->bsize < vb->size) {
  161. ret = -EINVAL;
  162. goto out;
  163. }
  164. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  165. ret = videobuf_iolock(vq, vb, NULL);
  166. if (ret)
  167. goto fail;
  168. vb->state = VIDEOBUF_PREPARED;
  169. }
  170. buf->inwork = 0;
  171. return 0;
  172. fail:
  173. free_buffer(vq, buf);
  174. out:
  175. buf->inwork = 0;
  176. return ret;
  177. }
  178. static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
  179. {
  180. struct videobuf_buffer *vbuf = &pcdev->active->vb;
  181. int ret;
  182. if (unlikely(!pcdev->active)) {
  183. dev_err(pcdev->dev, "DMA End IRQ with no active buffer\n");
  184. return -EFAULT;
  185. }
  186. /* setup sg list for future DMA */
  187. ret = imx_dma_setup_single(pcdev->dma_chan,
  188. videobuf_to_dma_contig(vbuf),
  189. vbuf->size, pcdev->res->start +
  190. CSIRXR, DMA_MODE_READ);
  191. if (unlikely(ret))
  192. dev_err(pcdev->dev, "Failed to setup DMA sg list\n");
  193. return ret;
  194. }
  195. static void mx1_videobuf_queue(struct videobuf_queue *vq,
  196. struct videobuf_buffer *vb)
  197. {
  198. struct soc_camera_device *icd = vq->priv_data;
  199. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  200. struct mx1_camera_dev *pcdev = ici->priv;
  201. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  202. unsigned long flags;
  203. dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  204. vb, vb->baddr, vb->bsize);
  205. spin_lock_irqsave(&pcdev->lock, flags);
  206. list_add_tail(&vb->queue, &pcdev->capture);
  207. vb->state = VIDEOBUF_ACTIVE;
  208. if (!pcdev->active) {
  209. pcdev->active = buf;
  210. /* setup sg list for future DMA */
  211. if (!mx1_camera_setup_dma(pcdev)) {
  212. unsigned int temp;
  213. /* enable SOF irq */
  214. temp = __raw_readl(pcdev->base + CSICR1) |
  215. CSICR1_SOF_INTEN;
  216. __raw_writel(temp, pcdev->base + CSICR1);
  217. }
  218. }
  219. spin_unlock_irqrestore(&pcdev->lock, flags);
  220. }
  221. static void mx1_videobuf_release(struct videobuf_queue *vq,
  222. struct videobuf_buffer *vb)
  223. {
  224. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  225. #ifdef DEBUG
  226. struct soc_camera_device *icd = vq->priv_data;
  227. dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  228. vb, vb->baddr, vb->bsize);
  229. switch (vb->state) {
  230. case VIDEOBUF_ACTIVE:
  231. dev_dbg(&icd->dev, "%s (active)\n", __func__);
  232. break;
  233. case VIDEOBUF_QUEUED:
  234. dev_dbg(&icd->dev, "%s (queued)\n", __func__);
  235. break;
  236. case VIDEOBUF_PREPARED:
  237. dev_dbg(&icd->dev, "%s (prepared)\n", __func__);
  238. break;
  239. default:
  240. dev_dbg(&icd->dev, "%s (unknown)\n", __func__);
  241. break;
  242. }
  243. #endif
  244. free_buffer(vq, buf);
  245. }
  246. static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
  247. struct videobuf_buffer *vb,
  248. struct mx1_buffer *buf)
  249. {
  250. /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
  251. list_del_init(&vb->queue);
  252. vb->state = VIDEOBUF_DONE;
  253. do_gettimeofday(&vb->ts);
  254. vb->field_count++;
  255. wake_up(&vb->done);
  256. if (list_empty(&pcdev->capture)) {
  257. pcdev->active = NULL;
  258. return;
  259. }
  260. pcdev->active = list_entry(pcdev->capture.next,
  261. struct mx1_buffer, vb.queue);
  262. /* setup sg list for future DMA */
  263. if (likely(!mx1_camera_setup_dma(pcdev))) {
  264. unsigned int temp;
  265. /* enable SOF irq */
  266. temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
  267. __raw_writel(temp, pcdev->base + CSICR1);
  268. }
  269. }
  270. static void mx1_camera_dma_irq(int channel, void *data)
  271. {
  272. struct mx1_camera_dev *pcdev = data;
  273. struct mx1_buffer *buf;
  274. struct videobuf_buffer *vb;
  275. unsigned long flags;
  276. spin_lock_irqsave(&pcdev->lock, flags);
  277. imx_dma_disable(channel);
  278. if (unlikely(!pcdev->active)) {
  279. dev_err(pcdev->dev, "DMA End IRQ with no active buffer\n");
  280. goto out;
  281. }
  282. vb = &pcdev->active->vb;
  283. buf = container_of(vb, struct mx1_buffer, vb);
  284. WARN_ON(buf->inwork || list_empty(&vb->queue));
  285. dev_dbg(pcdev->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  286. vb, vb->baddr, vb->bsize);
  287. mx1_camera_wakeup(pcdev, vb, buf);
  288. out:
  289. spin_unlock_irqrestore(&pcdev->lock, flags);
  290. }
  291. static struct videobuf_queue_ops mx1_videobuf_ops = {
  292. .buf_setup = mx1_videobuf_setup,
  293. .buf_prepare = mx1_videobuf_prepare,
  294. .buf_queue = mx1_videobuf_queue,
  295. .buf_release = mx1_videobuf_release,
  296. };
  297. static void mx1_camera_init_videobuf(struct videobuf_queue *q,
  298. struct soc_camera_device *icd)
  299. {
  300. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  301. struct mx1_camera_dev *pcdev = ici->priv;
  302. videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, pcdev->dev,
  303. &pcdev->lock,
  304. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  305. V4L2_FIELD_NONE,
  306. sizeof(struct mx1_buffer), icd);
  307. }
  308. static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
  309. {
  310. unsigned int mclk = pcdev->mclk;
  311. unsigned long div;
  312. unsigned long lcdclk;
  313. lcdclk = clk_get_rate(pcdev->clk);
  314. /* We verify platform_mclk_10khz != 0, so if anyone breaks it, here
  315. * they get a nice Oops */
  316. div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
  317. dev_dbg(pcdev->dev, "System clock %lukHz, target freq %dkHz, "
  318. "divisor %lu\n", lcdclk / 1000, mclk / 1000, div);
  319. return div;
  320. }
  321. static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
  322. {
  323. unsigned int csicr1 = CSICR1_EN;
  324. dev_dbg(pcdev->dev, "Activate device\n");
  325. clk_enable(pcdev->clk);
  326. /* enable CSI before doing anything else */
  327. __raw_writel(csicr1, pcdev->base + CSICR1);
  328. csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
  329. csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
  330. csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
  331. __raw_writel(csicr1, pcdev->base + CSICR1);
  332. }
  333. static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
  334. {
  335. dev_dbg(pcdev->dev, "Deactivate device\n");
  336. /* Disable all CSI interface */
  337. __raw_writel(0x00, pcdev->base + CSICR1);
  338. clk_disable(pcdev->clk);
  339. }
  340. /* The following two functions absolutely depend on the fact, that
  341. * there can be only one camera on i.MX1/i.MXL camera sensor interface */
  342. static int mx1_camera_add_device(struct soc_camera_device *icd)
  343. {
  344. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  345. struct mx1_camera_dev *pcdev = ici->priv;
  346. int ret;
  347. if (pcdev->icd) {
  348. ret = -EBUSY;
  349. goto ebusy;
  350. }
  351. dev_info(&icd->dev, "MX1 Camera driver attached to camera %d\n",
  352. icd->devnum);
  353. mx1_camera_activate(pcdev);
  354. ret = icd->ops->init(icd);
  355. if (!ret)
  356. pcdev->icd = icd;
  357. ebusy:
  358. return ret;
  359. }
  360. static void mx1_camera_remove_device(struct soc_camera_device *icd)
  361. {
  362. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  363. struct mx1_camera_dev *pcdev = ici->priv;
  364. unsigned int csicr1;
  365. BUG_ON(icd != pcdev->icd);
  366. /* disable interrupts */
  367. csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
  368. __raw_writel(csicr1, pcdev->base + CSICR1);
  369. /* Stop DMA engine */
  370. imx_dma_disable(pcdev->dma_chan);
  371. dev_info(&icd->dev, "MX1 Camera driver detached from camera %d\n",
  372. icd->devnum);
  373. icd->ops->release(icd);
  374. mx1_camera_deactivate(pcdev);
  375. pcdev->icd = NULL;
  376. }
  377. static int mx1_camera_set_crop(struct soc_camera_device *icd,
  378. struct v4l2_rect *rect)
  379. {
  380. return icd->ops->set_crop(icd, rect);
  381. }
  382. static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
  383. {
  384. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  385. struct mx1_camera_dev *pcdev = ici->priv;
  386. unsigned long camera_flags, common_flags;
  387. unsigned int csicr1;
  388. int ret;
  389. camera_flags = icd->ops->query_bus_param(icd);
  390. /* MX1 supports only 8bit buswidth */
  391. common_flags = soc_camera_bus_param_compatible(camera_flags,
  392. CSI_BUS_FLAGS);
  393. if (!common_flags)
  394. return -EINVAL;
  395. icd->buswidth = 8;
  396. /* Make choises, based on platform choice */
  397. if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
  398. (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
  399. if (!pcdev->pdata ||
  400. pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
  401. common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
  402. else
  403. common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
  404. }
  405. if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
  406. (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
  407. if (!pcdev->pdata ||
  408. pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
  409. common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
  410. else
  411. common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
  412. }
  413. if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
  414. (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
  415. if (!pcdev->pdata ||
  416. pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
  417. common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
  418. else
  419. common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
  420. }
  421. ret = icd->ops->set_bus_param(icd, common_flags);
  422. if (ret < 0)
  423. return ret;
  424. csicr1 = __raw_readl(pcdev->base + CSICR1);
  425. if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
  426. csicr1 |= CSICR1_REDGE;
  427. if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH)
  428. csicr1 |= CSICR1_SOF_POL;
  429. if (common_flags & SOCAM_DATA_ACTIVE_LOW)
  430. csicr1 |= CSICR1_DATA_POL;
  431. __raw_writel(csicr1, pcdev->base + CSICR1);
  432. return 0;
  433. }
  434. static int mx1_camera_set_fmt(struct soc_camera_device *icd,
  435. struct v4l2_format *f)
  436. {
  437. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  438. const struct soc_camera_format_xlate *xlate;
  439. struct v4l2_pix_format *pix = &f->fmt.pix;
  440. int ret;
  441. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  442. if (!xlate) {
  443. dev_warn(&ici->dev, "Format %x not found\n", pix->pixelformat);
  444. return -EINVAL;
  445. }
  446. ret = icd->ops->set_fmt(icd, f);
  447. if (!ret) {
  448. icd->buswidth = xlate->buswidth;
  449. icd->current_fmt = xlate->host_fmt;
  450. }
  451. return ret;
  452. }
  453. static int mx1_camera_try_fmt(struct soc_camera_device *icd,
  454. struct v4l2_format *f)
  455. {
  456. /* TODO: limit to mx1 hardware capabilities */
  457. /* limit to sensor capabilities */
  458. return icd->ops->try_fmt(icd, f);
  459. }
  460. static int mx1_camera_reqbufs(struct soc_camera_file *icf,
  461. struct v4l2_requestbuffers *p)
  462. {
  463. int i;
  464. /* This is for locking debugging only. I removed spinlocks and now I
  465. * check whether .prepare is ever called on a linked buffer, or whether
  466. * a dma IRQ can occur for an in-work or unlinked buffer. Until now
  467. * it hadn't triggered */
  468. for (i = 0; i < p->count; i++) {
  469. struct mx1_buffer *buf = container_of(icf->vb_vidq.bufs[i],
  470. struct mx1_buffer, vb);
  471. buf->inwork = 0;
  472. INIT_LIST_HEAD(&buf->vb.queue);
  473. }
  474. return 0;
  475. }
  476. static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
  477. {
  478. struct soc_camera_file *icf = file->private_data;
  479. struct mx1_buffer *buf;
  480. buf = list_entry(icf->vb_vidq.stream.next, struct mx1_buffer,
  481. vb.stream);
  482. poll_wait(file, &buf->vb.done, pt);
  483. if (buf->vb.state == VIDEOBUF_DONE ||
  484. buf->vb.state == VIDEOBUF_ERROR)
  485. return POLLIN | POLLRDNORM;
  486. return 0;
  487. }
  488. static int mx1_camera_querycap(struct soc_camera_host *ici,
  489. struct v4l2_capability *cap)
  490. {
  491. /* cap->name is set by the friendly caller:-> */
  492. strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
  493. cap->version = VERSION_CODE;
  494. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  495. return 0;
  496. }
  497. static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
  498. .owner = THIS_MODULE,
  499. .add = mx1_camera_add_device,
  500. .remove = mx1_camera_remove_device,
  501. .set_bus_param = mx1_camera_set_bus_param,
  502. .set_crop = mx1_camera_set_crop,
  503. .set_fmt = mx1_camera_set_fmt,
  504. .try_fmt = mx1_camera_try_fmt,
  505. .init_videobuf = mx1_camera_init_videobuf,
  506. .reqbufs = mx1_camera_reqbufs,
  507. .poll = mx1_camera_poll,
  508. .querycap = mx1_camera_querycap,
  509. };
  510. static struct fiq_handler fh = {
  511. .name = "csi_sof"
  512. };
  513. static int __init mx1_camera_probe(struct platform_device *pdev)
  514. {
  515. struct mx1_camera_dev *pcdev;
  516. struct resource *res;
  517. struct pt_regs regs;
  518. struct clk *clk;
  519. void __iomem *base;
  520. unsigned int irq;
  521. int err = 0;
  522. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  523. irq = platform_get_irq(pdev, 0);
  524. if (!res || !irq) {
  525. err = -ENODEV;
  526. goto exit;
  527. }
  528. clk = clk_get(&pdev->dev, "csi_clk");
  529. if (IS_ERR(clk)) {
  530. err = PTR_ERR(clk);
  531. goto exit;
  532. }
  533. pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
  534. if (!pcdev) {
  535. dev_err(&pdev->dev, "Could not allocate pcdev\n");
  536. err = -ENOMEM;
  537. goto exit_put_clk;
  538. }
  539. platform_set_drvdata(pdev, pcdev);
  540. pcdev->res = res;
  541. pcdev->clk = clk;
  542. pcdev->pdata = pdev->dev.platform_data;
  543. if (pcdev->pdata)
  544. pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
  545. if (!pcdev->mclk) {
  546. dev_warn(&pdev->dev,
  547. "mclk_10khz == 0! Please, fix your platform data. "
  548. "Using default 20MHz\n");
  549. pcdev->mclk = 20000000;
  550. }
  551. INIT_LIST_HEAD(&pcdev->capture);
  552. spin_lock_init(&pcdev->lock);
  553. /*
  554. * Request the regions.
  555. */
  556. if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
  557. err = -EBUSY;
  558. goto exit_kfree;
  559. }
  560. base = ioremap(res->start, resource_size(res));
  561. if (!base) {
  562. err = -ENOMEM;
  563. goto exit_release;
  564. }
  565. pcdev->irq = irq;
  566. pcdev->base = base;
  567. pcdev->dev = &pdev->dev;
  568. /* request dma */
  569. pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
  570. if (pcdev->dma_chan < 0) {
  571. dev_err(pcdev->dev, "Can't request DMA for MX1 CSI\n");
  572. err = -EBUSY;
  573. goto exit_iounmap;
  574. }
  575. dev_dbg(pcdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
  576. imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
  577. pcdev);
  578. imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
  579. IMX_DMA_MEMSIZE_32, DMA_REQ_CSI_R, 0);
  580. /* burst length : 16 words = 64 bytes */
  581. imx_dma_config_burstlen(pcdev->dma_chan, 0);
  582. /* request irq */
  583. err = claim_fiq(&fh);
  584. if (err) {
  585. dev_err(pcdev->dev, "Camera interrupt register failed \n");
  586. goto exit_free_dma;
  587. }
  588. set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
  589. &mx1_camera_sof_fiq_start);
  590. regs.ARM_r8 = DMA_BASE + DMA_DIMR;
  591. regs.ARM_r9 = DMA_BASE + DMA_CCR(pcdev->dma_chan);
  592. regs.ARM_r10 = (long)pcdev->base + CSICR1;
  593. regs.ARM_fp = (long)pcdev->base + CSISR;
  594. regs.ARM_sp = 1 << pcdev->dma_chan;
  595. set_fiq_regs(&regs);
  596. mxc_set_irq_fiq(irq, 1);
  597. enable_fiq(irq);
  598. pcdev->soc_host.drv_name = DRIVER_NAME;
  599. pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
  600. pcdev->soc_host.priv = pcdev;
  601. pcdev->soc_host.dev.parent = &pdev->dev;
  602. pcdev->soc_host.nr = pdev->id;
  603. err = soc_camera_host_register(&pcdev->soc_host);
  604. if (err)
  605. goto exit_free_irq;
  606. dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
  607. return 0;
  608. exit_free_irq:
  609. disable_fiq(irq);
  610. mxc_set_irq_fiq(irq, 0);
  611. release_fiq(&fh);
  612. exit_free_dma:
  613. imx_dma_free(pcdev->dma_chan);
  614. exit_iounmap:
  615. iounmap(base);
  616. exit_release:
  617. release_mem_region(res->start, resource_size(res));
  618. exit_kfree:
  619. kfree(pcdev);
  620. exit_put_clk:
  621. clk_put(clk);
  622. exit:
  623. return err;
  624. }
  625. static int __exit mx1_camera_remove(struct platform_device *pdev)
  626. {
  627. struct mx1_camera_dev *pcdev = platform_get_drvdata(pdev);
  628. struct resource *res;
  629. imx_dma_free(pcdev->dma_chan);
  630. disable_fiq(pcdev->irq);
  631. mxc_set_irq_fiq(pcdev->irq, 0);
  632. release_fiq(&fh);
  633. clk_put(pcdev->clk);
  634. soc_camera_host_unregister(&pcdev->soc_host);
  635. iounmap(pcdev->base);
  636. res = pcdev->res;
  637. release_mem_region(res->start, resource_size(res));
  638. kfree(pcdev);
  639. dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
  640. return 0;
  641. }
  642. static struct platform_driver mx1_camera_driver = {
  643. .driver = {
  644. .name = DRIVER_NAME,
  645. },
  646. .remove = __exit_p(mx1_camera_remove),
  647. };
  648. static int __init mx1_camera_init(void)
  649. {
  650. return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
  651. }
  652. static void __exit mx1_camera_exit(void)
  653. {
  654. return platform_driver_unregister(&mx1_camera_driver);
  655. }
  656. module_init(mx1_camera_init);
  657. module_exit(mx1_camera_exit);
  658. MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
  659. MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
  660. MODULE_LICENSE("GPL v2");
  661. MODULE_ALIAS("platform:" DRIVER_NAME);