swiotlb.c 25 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is a fallback for platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. * 05/09/10 linville Add support for syncing ranges, support syncing for
  16. * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17. * 08/12/11 beckyb Add highmem support
  18. */
  19. #include <linux/cache.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/mm.h>
  22. #include <linux/module.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/string.h>
  25. #include <linux/swiotlb.h>
  26. #include <linux/pfn.h>
  27. #include <linux/types.h>
  28. #include <linux/ctype.h>
  29. #include <linux/highmem.h>
  30. #include <linux/gfp.h>
  31. #include <asm/io.h>
  32. #include <asm/dma.h>
  33. #include <asm/scatterlist.h>
  34. #include <linux/init.h>
  35. #include <linux/bootmem.h>
  36. #include <linux/iommu-helper.h>
  37. #define OFFSET(val,align) ((unsigned long) \
  38. ( (val) & ( (align) - 1)))
  39. #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  40. /*
  41. * Minimum IO TLB size to bother booting with. Systems with mainly
  42. * 64bit capable cards will only lightly use the swiotlb. If we can't
  43. * allocate a contiguous 1MB, we're probably in trouble anyway.
  44. */
  45. #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  46. /*
  47. * Enumeration for sync targets
  48. */
  49. enum dma_sync_target {
  50. SYNC_FOR_CPU = 0,
  51. SYNC_FOR_DEVICE = 1,
  52. };
  53. int swiotlb_force;
  54. /*
  55. * Used to do a quick range check in unmap_single and
  56. * sync_single_*, to see if the memory was in fact allocated by this
  57. * API.
  58. */
  59. static char *io_tlb_start, *io_tlb_end;
  60. /*
  61. * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
  62. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  63. */
  64. static unsigned long io_tlb_nslabs;
  65. /*
  66. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  67. */
  68. static unsigned long io_tlb_overflow = 32*1024;
  69. void *io_tlb_overflow_buffer;
  70. /*
  71. * This is a free list describing the number of free entries available from
  72. * each index
  73. */
  74. static unsigned int *io_tlb_list;
  75. static unsigned int io_tlb_index;
  76. /*
  77. * We need to save away the original address corresponding to a mapped entry
  78. * for the sync operations.
  79. */
  80. static phys_addr_t *io_tlb_orig_addr;
  81. /*
  82. * Protect the above data structures in the map and unmap calls
  83. */
  84. static DEFINE_SPINLOCK(io_tlb_lock);
  85. static int late_alloc;
  86. static int __init
  87. setup_io_tlb_npages(char *str)
  88. {
  89. if (isdigit(*str)) {
  90. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  91. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  92. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  93. }
  94. if (*str == ',')
  95. ++str;
  96. if (!strcmp(str, "force"))
  97. swiotlb_force = 1;
  98. return 1;
  99. }
  100. __setup("swiotlb=", setup_io_tlb_npages);
  101. /* make io_tlb_overflow tunable too? */
  102. /* Note that this doesn't work with highmem page */
  103. static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
  104. volatile void *address)
  105. {
  106. return phys_to_dma(hwdev, virt_to_phys(address));
  107. }
  108. void swiotlb_print_info(void)
  109. {
  110. unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  111. phys_addr_t pstart, pend;
  112. pstart = virt_to_phys(io_tlb_start);
  113. pend = virt_to_phys(io_tlb_end);
  114. printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
  115. bytes >> 20, io_tlb_start, io_tlb_end);
  116. printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
  117. (unsigned long long)pstart,
  118. (unsigned long long)pend);
  119. }
  120. /*
  121. * Statically reserve bounce buffer space and initialize bounce buffer data
  122. * structures for the software IO TLB used to implement the DMA API.
  123. */
  124. void __init
  125. swiotlb_init_with_default_size(size_t default_size, int verbose)
  126. {
  127. unsigned long i, bytes;
  128. if (!io_tlb_nslabs) {
  129. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  130. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  131. }
  132. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  133. /*
  134. * Get IO TLB memory from the low pages
  135. */
  136. io_tlb_start = alloc_bootmem_low_pages(bytes);
  137. if (!io_tlb_start)
  138. panic("Cannot allocate SWIOTLB buffer");
  139. io_tlb_end = io_tlb_start + bytes;
  140. /*
  141. * Allocate and initialize the free list array. This array is used
  142. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  143. * between io_tlb_start and io_tlb_end.
  144. */
  145. io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
  146. for (i = 0; i < io_tlb_nslabs; i++)
  147. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  148. io_tlb_index = 0;
  149. io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t));
  150. /*
  151. * Get the overflow emergency buffer
  152. */
  153. io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
  154. if (!io_tlb_overflow_buffer)
  155. panic("Cannot allocate SWIOTLB overflow buffer!\n");
  156. if (verbose)
  157. swiotlb_print_info();
  158. }
  159. void __init
  160. swiotlb_init(int verbose)
  161. {
  162. swiotlb_init_with_default_size(64 * (1<<20), verbose); /* default to 64MB */
  163. }
  164. /*
  165. * Systems with larger DMA zones (those that don't support ISA) can
  166. * initialize the swiotlb later using the slab allocator if needed.
  167. * This should be just like above, but with some error catching.
  168. */
  169. int
  170. swiotlb_late_init_with_default_size(size_t default_size)
  171. {
  172. unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
  173. unsigned int order;
  174. if (!io_tlb_nslabs) {
  175. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  176. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  177. }
  178. /*
  179. * Get IO TLB memory from the low pages
  180. */
  181. order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
  182. io_tlb_nslabs = SLABS_PER_PAGE << order;
  183. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  184. while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
  185. io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
  186. order);
  187. if (io_tlb_start)
  188. break;
  189. order--;
  190. }
  191. if (!io_tlb_start)
  192. goto cleanup1;
  193. if (order != get_order(bytes)) {
  194. printk(KERN_WARNING "Warning: only able to allocate %ld MB "
  195. "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
  196. io_tlb_nslabs = SLABS_PER_PAGE << order;
  197. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  198. }
  199. io_tlb_end = io_tlb_start + bytes;
  200. memset(io_tlb_start, 0, bytes);
  201. /*
  202. * Allocate and initialize the free list array. This array is used
  203. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  204. * between io_tlb_start and io_tlb_end.
  205. */
  206. io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
  207. get_order(io_tlb_nslabs * sizeof(int)));
  208. if (!io_tlb_list)
  209. goto cleanup2;
  210. for (i = 0; i < io_tlb_nslabs; i++)
  211. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  212. io_tlb_index = 0;
  213. io_tlb_orig_addr = (phys_addr_t *)
  214. __get_free_pages(GFP_KERNEL,
  215. get_order(io_tlb_nslabs *
  216. sizeof(phys_addr_t)));
  217. if (!io_tlb_orig_addr)
  218. goto cleanup3;
  219. memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
  220. /*
  221. * Get the overflow emergency buffer
  222. */
  223. io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
  224. get_order(io_tlb_overflow));
  225. if (!io_tlb_overflow_buffer)
  226. goto cleanup4;
  227. swiotlb_print_info();
  228. late_alloc = 1;
  229. return 0;
  230. cleanup4:
  231. free_pages((unsigned long)io_tlb_orig_addr,
  232. get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
  233. io_tlb_orig_addr = NULL;
  234. cleanup3:
  235. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  236. sizeof(int)));
  237. io_tlb_list = NULL;
  238. cleanup2:
  239. io_tlb_end = NULL;
  240. free_pages((unsigned long)io_tlb_start, order);
  241. io_tlb_start = NULL;
  242. cleanup1:
  243. io_tlb_nslabs = req_nslabs;
  244. return -ENOMEM;
  245. }
  246. void __init swiotlb_free(void)
  247. {
  248. if (!io_tlb_overflow_buffer)
  249. return;
  250. if (late_alloc) {
  251. free_pages((unsigned long)io_tlb_overflow_buffer,
  252. get_order(io_tlb_overflow));
  253. free_pages((unsigned long)io_tlb_orig_addr,
  254. get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
  255. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  256. sizeof(int)));
  257. free_pages((unsigned long)io_tlb_start,
  258. get_order(io_tlb_nslabs << IO_TLB_SHIFT));
  259. } else {
  260. free_bootmem_late(__pa(io_tlb_overflow_buffer),
  261. io_tlb_overflow);
  262. free_bootmem_late(__pa(io_tlb_orig_addr),
  263. io_tlb_nslabs * sizeof(phys_addr_t));
  264. free_bootmem_late(__pa(io_tlb_list),
  265. io_tlb_nslabs * sizeof(int));
  266. free_bootmem_late(__pa(io_tlb_start),
  267. io_tlb_nslabs << IO_TLB_SHIFT);
  268. }
  269. }
  270. static int is_swiotlb_buffer(phys_addr_t paddr)
  271. {
  272. return paddr >= virt_to_phys(io_tlb_start) &&
  273. paddr < virt_to_phys(io_tlb_end);
  274. }
  275. /*
  276. * Bounce: copy the swiotlb buffer back to the original dma location
  277. */
  278. static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
  279. enum dma_data_direction dir)
  280. {
  281. unsigned long pfn = PFN_DOWN(phys);
  282. if (PageHighMem(pfn_to_page(pfn))) {
  283. /* The buffer does not have a mapping. Map it in and copy */
  284. unsigned int offset = phys & ~PAGE_MASK;
  285. char *buffer;
  286. unsigned int sz = 0;
  287. unsigned long flags;
  288. while (size) {
  289. sz = min_t(size_t, PAGE_SIZE - offset, size);
  290. local_irq_save(flags);
  291. buffer = kmap_atomic(pfn_to_page(pfn),
  292. KM_BOUNCE_READ);
  293. if (dir == DMA_TO_DEVICE)
  294. memcpy(dma_addr, buffer + offset, sz);
  295. else
  296. memcpy(buffer + offset, dma_addr, sz);
  297. kunmap_atomic(buffer, KM_BOUNCE_READ);
  298. local_irq_restore(flags);
  299. size -= sz;
  300. pfn++;
  301. dma_addr += sz;
  302. offset = 0;
  303. }
  304. } else {
  305. if (dir == DMA_TO_DEVICE)
  306. memcpy(dma_addr, phys_to_virt(phys), size);
  307. else
  308. memcpy(phys_to_virt(phys), dma_addr, size);
  309. }
  310. }
  311. void *swiotlb_tbl_map_single(struct device *hwdev, dma_addr_t tbl_dma_addr,
  312. phys_addr_t phys, size_t size, int dir)
  313. {
  314. unsigned long flags;
  315. char *dma_addr;
  316. unsigned int nslots, stride, index, wrap;
  317. int i;
  318. unsigned long mask;
  319. unsigned long offset_slots;
  320. unsigned long max_slots;
  321. mask = dma_get_seg_boundary(hwdev);
  322. tbl_dma_addr &= mask;
  323. offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  324. /*
  325. * Carefully handle integer overflow which can occur when mask == ~0UL.
  326. */
  327. max_slots = mask + 1
  328. ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
  329. : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
  330. /*
  331. * For mappings greater than a page, we limit the stride (and
  332. * hence alignment) to a page size.
  333. */
  334. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  335. if (size > PAGE_SIZE)
  336. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  337. else
  338. stride = 1;
  339. BUG_ON(!nslots);
  340. /*
  341. * Find suitable number of IO TLB entries size that will fit this
  342. * request and allocate a buffer from that IO TLB pool.
  343. */
  344. spin_lock_irqsave(&io_tlb_lock, flags);
  345. index = ALIGN(io_tlb_index, stride);
  346. if (index >= io_tlb_nslabs)
  347. index = 0;
  348. wrap = index;
  349. do {
  350. while (iommu_is_span_boundary(index, nslots, offset_slots,
  351. max_slots)) {
  352. index += stride;
  353. if (index >= io_tlb_nslabs)
  354. index = 0;
  355. if (index == wrap)
  356. goto not_found;
  357. }
  358. /*
  359. * If we find a slot that indicates we have 'nslots' number of
  360. * contiguous buffers, we allocate the buffers from that slot
  361. * and mark the entries as '0' indicating unavailable.
  362. */
  363. if (io_tlb_list[index] >= nslots) {
  364. int count = 0;
  365. for (i = index; i < (int) (index + nslots); i++)
  366. io_tlb_list[i] = 0;
  367. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
  368. io_tlb_list[i] = ++count;
  369. dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  370. /*
  371. * Update the indices to avoid searching in the next
  372. * round.
  373. */
  374. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  375. ? (index + nslots) : 0);
  376. goto found;
  377. }
  378. index += stride;
  379. if (index >= io_tlb_nslabs)
  380. index = 0;
  381. } while (index != wrap);
  382. not_found:
  383. spin_unlock_irqrestore(&io_tlb_lock, flags);
  384. return NULL;
  385. found:
  386. spin_unlock_irqrestore(&io_tlb_lock, flags);
  387. /*
  388. * Save away the mapping from the original address to the DMA address.
  389. * This is needed when we sync the memory. Then we sync the buffer if
  390. * needed.
  391. */
  392. for (i = 0; i < nslots; i++)
  393. io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
  394. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  395. swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
  396. return dma_addr;
  397. }
  398. /*
  399. * Allocates bounce buffer and returns its kernel virtual address.
  400. */
  401. static void *
  402. map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir)
  403. {
  404. dma_addr_t start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start);
  405. return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
  406. }
  407. /*
  408. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  409. */
  410. static void
  411. do_unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
  412. {
  413. unsigned long flags;
  414. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  415. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  416. phys_addr_t phys = io_tlb_orig_addr[index];
  417. /*
  418. * First, sync the memory before unmapping the entry
  419. */
  420. if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
  421. swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
  422. /*
  423. * Return the buffer to the free list by setting the corresponding
  424. * entries to indicate the number of contiguous entries available.
  425. * While returning the entries to the free list, we merge the entries
  426. * with slots below and above the pool being returned.
  427. */
  428. spin_lock_irqsave(&io_tlb_lock, flags);
  429. {
  430. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  431. io_tlb_list[index + nslots] : 0);
  432. /*
  433. * Step 1: return the slots to the free list, merging the
  434. * slots with superceeding slots
  435. */
  436. for (i = index + nslots - 1; i >= index; i--)
  437. io_tlb_list[i] = ++count;
  438. /*
  439. * Step 2: merge the returned slots with the preceding slots,
  440. * if available (non zero)
  441. */
  442. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  443. io_tlb_list[i] = ++count;
  444. }
  445. spin_unlock_irqrestore(&io_tlb_lock, flags);
  446. }
  447. static void
  448. sync_single(struct device *hwdev, char *dma_addr, size_t size,
  449. int dir, int target)
  450. {
  451. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  452. phys_addr_t phys = io_tlb_orig_addr[index];
  453. phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
  454. switch (target) {
  455. case SYNC_FOR_CPU:
  456. if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
  457. swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
  458. else
  459. BUG_ON(dir != DMA_TO_DEVICE);
  460. break;
  461. case SYNC_FOR_DEVICE:
  462. if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
  463. swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
  464. else
  465. BUG_ON(dir != DMA_FROM_DEVICE);
  466. break;
  467. default:
  468. BUG();
  469. }
  470. }
  471. void *
  472. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  473. dma_addr_t *dma_handle, gfp_t flags)
  474. {
  475. dma_addr_t dev_addr;
  476. void *ret;
  477. int order = get_order(size);
  478. u64 dma_mask = DMA_BIT_MASK(32);
  479. if (hwdev && hwdev->coherent_dma_mask)
  480. dma_mask = hwdev->coherent_dma_mask;
  481. ret = (void *)__get_free_pages(flags, order);
  482. if (ret && swiotlb_virt_to_bus(hwdev, ret) + size - 1 > dma_mask) {
  483. /*
  484. * The allocated memory isn't reachable by the device.
  485. */
  486. free_pages((unsigned long) ret, order);
  487. ret = NULL;
  488. }
  489. if (!ret) {
  490. /*
  491. * We are either out of memory or the device can't DMA
  492. * to GFP_DMA memory; fall back on map_single(), which
  493. * will grab memory from the lowest available address range.
  494. */
  495. ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
  496. if (!ret)
  497. return NULL;
  498. }
  499. memset(ret, 0, size);
  500. dev_addr = swiotlb_virt_to_bus(hwdev, ret);
  501. /* Confirm address can be DMA'd by device */
  502. if (dev_addr + size - 1 > dma_mask) {
  503. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
  504. (unsigned long long)dma_mask,
  505. (unsigned long long)dev_addr);
  506. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  507. do_unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
  508. return NULL;
  509. }
  510. *dma_handle = dev_addr;
  511. return ret;
  512. }
  513. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  514. void
  515. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  516. dma_addr_t dev_addr)
  517. {
  518. phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
  519. WARN_ON(irqs_disabled());
  520. if (!is_swiotlb_buffer(paddr))
  521. free_pages((unsigned long)vaddr, get_order(size));
  522. else
  523. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  524. do_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
  525. }
  526. EXPORT_SYMBOL(swiotlb_free_coherent);
  527. static void
  528. swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
  529. {
  530. /*
  531. * Ran out of IOMMU space for this operation. This is very bad.
  532. * Unfortunately the drivers cannot handle this operation properly.
  533. * unless they check for dma_mapping_error (most don't)
  534. * When the mapping is small enough return a static buffer to limit
  535. * the damage, or panic when the transfer is too big.
  536. */
  537. printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
  538. "device %s\n", size, dev ? dev_name(dev) : "?");
  539. if (size <= io_tlb_overflow || !do_panic)
  540. return;
  541. if (dir == DMA_BIDIRECTIONAL)
  542. panic("DMA: Random memory could be DMA accessed\n");
  543. if (dir == DMA_FROM_DEVICE)
  544. panic("DMA: Random memory could be DMA written\n");
  545. if (dir == DMA_TO_DEVICE)
  546. panic("DMA: Random memory could be DMA read\n");
  547. }
  548. /*
  549. * Map a single buffer of the indicated size for DMA in streaming mode. The
  550. * physical address to use is returned.
  551. *
  552. * Once the device is given the dma address, the device owns this memory until
  553. * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
  554. */
  555. dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
  556. unsigned long offset, size_t size,
  557. enum dma_data_direction dir,
  558. struct dma_attrs *attrs)
  559. {
  560. phys_addr_t phys = page_to_phys(page) + offset;
  561. dma_addr_t dev_addr = phys_to_dma(dev, phys);
  562. void *map;
  563. BUG_ON(dir == DMA_NONE);
  564. /*
  565. * If the address happens to be in the device's DMA window,
  566. * we can safely return the device addr and not worry about bounce
  567. * buffering it.
  568. */
  569. if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
  570. return dev_addr;
  571. /*
  572. * Oh well, have to allocate and map a bounce buffer.
  573. */
  574. map = map_single(dev, phys, size, dir);
  575. if (!map) {
  576. swiotlb_full(dev, size, dir, 1);
  577. map = io_tlb_overflow_buffer;
  578. }
  579. dev_addr = swiotlb_virt_to_bus(dev, map);
  580. /*
  581. * Ensure that the address returned is DMA'ble
  582. */
  583. if (!dma_capable(dev, dev_addr, size))
  584. panic("map_single: bounce buffer is not DMA'ble");
  585. return dev_addr;
  586. }
  587. EXPORT_SYMBOL_GPL(swiotlb_map_page);
  588. /*
  589. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  590. * match what was provided for in a previous swiotlb_map_page call. All
  591. * other usages are undefined.
  592. *
  593. * After this call, reads by the cpu to the buffer are guaranteed to see
  594. * whatever the device wrote there.
  595. */
  596. static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
  597. size_t size, int dir)
  598. {
  599. phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
  600. BUG_ON(dir == DMA_NONE);
  601. if (is_swiotlb_buffer(paddr)) {
  602. do_unmap_single(hwdev, phys_to_virt(paddr), size, dir);
  603. return;
  604. }
  605. if (dir != DMA_FROM_DEVICE)
  606. return;
  607. /*
  608. * phys_to_virt doesn't work with hihgmem page but we could
  609. * call dma_mark_clean() with hihgmem page here. However, we
  610. * are fine since dma_mark_clean() is null on POWERPC. We can
  611. * make dma_mark_clean() take a physical address if necessary.
  612. */
  613. dma_mark_clean(phys_to_virt(paddr), size);
  614. }
  615. void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
  616. size_t size, enum dma_data_direction dir,
  617. struct dma_attrs *attrs)
  618. {
  619. unmap_single(hwdev, dev_addr, size, dir);
  620. }
  621. EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
  622. /*
  623. * Make physical memory consistent for a single streaming mode DMA translation
  624. * after a transfer.
  625. *
  626. * If you perform a swiotlb_map_page() but wish to interrogate the buffer
  627. * using the cpu, yet do not wish to teardown the dma mapping, you must
  628. * call this function before doing so. At the next point you give the dma
  629. * address back to the card, you must first perform a
  630. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  631. */
  632. static void
  633. swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
  634. size_t size, int dir, int target)
  635. {
  636. phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
  637. BUG_ON(dir == DMA_NONE);
  638. if (is_swiotlb_buffer(paddr)) {
  639. sync_single(hwdev, phys_to_virt(paddr), size, dir, target);
  640. return;
  641. }
  642. if (dir != DMA_FROM_DEVICE)
  643. return;
  644. dma_mark_clean(phys_to_virt(paddr), size);
  645. }
  646. void
  647. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  648. size_t size, enum dma_data_direction dir)
  649. {
  650. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
  651. }
  652. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  653. void
  654. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  655. size_t size, enum dma_data_direction dir)
  656. {
  657. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
  658. }
  659. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  660. /*
  661. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  662. * This is the scatter-gather version of the above swiotlb_map_page
  663. * interface. Here the scatter gather list elements are each tagged with the
  664. * appropriate dma address and length. They are obtained via
  665. * sg_dma_{address,length}(SG).
  666. *
  667. * NOTE: An implementation may be able to use a smaller number of
  668. * DMA address/length pairs than there are SG table elements.
  669. * (for example via virtual mapping capabilities)
  670. * The routine returns the number of addr/length pairs actually
  671. * used, at most nents.
  672. *
  673. * Device ownership issues as mentioned above for swiotlb_map_page are the
  674. * same here.
  675. */
  676. int
  677. swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
  678. enum dma_data_direction dir, struct dma_attrs *attrs)
  679. {
  680. struct scatterlist *sg;
  681. int i;
  682. BUG_ON(dir == DMA_NONE);
  683. for_each_sg(sgl, sg, nelems, i) {
  684. phys_addr_t paddr = sg_phys(sg);
  685. dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
  686. if (swiotlb_force ||
  687. !dma_capable(hwdev, dev_addr, sg->length)) {
  688. void *map = map_single(hwdev, sg_phys(sg),
  689. sg->length, dir);
  690. if (!map) {
  691. /* Don't panic here, we expect map_sg users
  692. to do proper error handling. */
  693. swiotlb_full(hwdev, sg->length, dir, 0);
  694. swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
  695. attrs);
  696. sgl[0].dma_length = 0;
  697. return 0;
  698. }
  699. sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
  700. } else
  701. sg->dma_address = dev_addr;
  702. sg->dma_length = sg->length;
  703. }
  704. return nelems;
  705. }
  706. EXPORT_SYMBOL(swiotlb_map_sg_attrs);
  707. int
  708. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  709. int dir)
  710. {
  711. return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  712. }
  713. EXPORT_SYMBOL(swiotlb_map_sg);
  714. /*
  715. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  716. * concerning calls here are the same as for swiotlb_unmap_page() above.
  717. */
  718. void
  719. swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
  720. int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
  721. {
  722. struct scatterlist *sg;
  723. int i;
  724. BUG_ON(dir == DMA_NONE);
  725. for_each_sg(sgl, sg, nelems, i)
  726. unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
  727. }
  728. EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
  729. void
  730. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  731. int dir)
  732. {
  733. return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  734. }
  735. EXPORT_SYMBOL(swiotlb_unmap_sg);
  736. /*
  737. * Make physical memory consistent for a set of streaming mode DMA translations
  738. * after a transfer.
  739. *
  740. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  741. * and usage.
  742. */
  743. static void
  744. swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
  745. int nelems, int dir, int target)
  746. {
  747. struct scatterlist *sg;
  748. int i;
  749. for_each_sg(sgl, sg, nelems, i)
  750. swiotlb_sync_single(hwdev, sg->dma_address,
  751. sg->dma_length, dir, target);
  752. }
  753. void
  754. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  755. int nelems, enum dma_data_direction dir)
  756. {
  757. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
  758. }
  759. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  760. void
  761. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  762. int nelems, enum dma_data_direction dir)
  763. {
  764. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
  765. }
  766. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  767. int
  768. swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
  769. {
  770. return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
  771. }
  772. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  773. /*
  774. * Return whether the given device DMA address mask can be supported
  775. * properly. For example, if your device can only drive the low 24-bits
  776. * during bus mastering, then you would pass 0x00ffffff as the mask to
  777. * this function.
  778. */
  779. int
  780. swiotlb_dma_supported(struct device *hwdev, u64 mask)
  781. {
  782. return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
  783. }
  784. EXPORT_SYMBOL(swiotlb_dma_supported);