emu10k1_main.c 34 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Creative Labs, Inc.
  4. * Routines for control of EMU10K1 chips
  5. *
  6. * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
  7. * Added support for Audigy 2 Value.
  8. *
  9. *
  10. * BUGS:
  11. * --
  12. *
  13. * TODO:
  14. * --
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  29. *
  30. */
  31. #include <sound/driver.h>
  32. #include <linux/delay.h>
  33. #include <linux/init.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/pci.h>
  36. #include <linux/slab.h>
  37. #include <linux/vmalloc.h>
  38. #include <sound/core.h>
  39. #include <sound/emu10k1.h>
  40. #include "p16v.h"
  41. #include "tina2.h"
  42. #if 0
  43. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, Creative Labs, Inc.");
  44. MODULE_DESCRIPTION("Routines for control of EMU10K1 chips");
  45. MODULE_LICENSE("GPL");
  46. #endif
  47. /*************************************************************************
  48. * EMU10K1 init / done
  49. *************************************************************************/
  50. void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch)
  51. {
  52. snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
  53. snd_emu10k1_ptr_write(emu, IP, ch, 0);
  54. snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
  55. snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
  56. snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
  57. snd_emu10k1_ptr_write(emu, CPF, ch, 0);
  58. snd_emu10k1_ptr_write(emu, CCR, ch, 0);
  59. snd_emu10k1_ptr_write(emu, PSST, ch, 0);
  60. snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
  61. snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
  62. snd_emu10k1_ptr_write(emu, Z1, ch, 0);
  63. snd_emu10k1_ptr_write(emu, Z2, ch, 0);
  64. snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
  65. snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
  66. snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
  67. snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
  68. snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
  69. snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
  70. snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
  71. snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
  72. snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
  73. /*** these are last so OFF prevents writing ***/
  74. snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
  75. snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
  76. snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
  77. snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
  78. snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
  79. /* Audigy extra stuffs */
  80. if (emu->audigy) {
  81. snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
  82. snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
  83. snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
  84. snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
  85. snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
  86. snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
  87. snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
  88. }
  89. }
  90. static int __devinit snd_emu10k1_init(struct snd_emu10k1 * emu, int enable_ir)
  91. {
  92. int ch, idx, err;
  93. unsigned int silent_page;
  94. emu->fx8010.itram_size = (16 * 1024)/2;
  95. emu->fx8010.etram_pages.area = NULL;
  96. emu->fx8010.etram_pages.bytes = 0;
  97. /* disable audio and lock cache */
  98. outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
  99. /* reset recording buffers */
  100. snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
  101. snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
  102. snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
  103. snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
  104. snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
  105. snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
  106. /* disable channel interrupt */
  107. outl(0, emu->port + INTE);
  108. snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
  109. snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
  110. snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
  111. snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
  112. if (emu->audigy){
  113. /* set SPDIF bypass mode */
  114. snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
  115. /* enable rear left + rear right AC97 slots */
  116. snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | AC97SLOT_REAR_LEFT);
  117. }
  118. /* init envelope engine */
  119. for (ch = 0; ch < NUM_G; ch++) {
  120. emu->voices[ch].emu = emu;
  121. emu->voices[ch].number = ch;
  122. snd_emu10k1_voice_init(emu, ch);
  123. }
  124. /*
  125. * Init to 0x02109204 :
  126. * Clock accuracy = 0 (1000ppm)
  127. * Sample Rate = 2 (48kHz)
  128. * Audio Channel = 1 (Left of 2)
  129. * Source Number = 0 (Unspecified)
  130. * Generation Status = 1 (Original for Cat Code 12)
  131. * Cat Code = 12 (Digital Signal Mixer)
  132. * Mode = 0 (Mode 0)
  133. * Emphasis = 0 (None)
  134. * CP = 1 (Copyright unasserted)
  135. * AN = 0 (Audio data)
  136. * P = 0 (Consumer)
  137. */
  138. snd_emu10k1_ptr_write(emu, SPCS0, 0,
  139. emu->spdif_bits[0] =
  140. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  141. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  142. SPCS_GENERATIONSTATUS | 0x00001200 |
  143. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  144. snd_emu10k1_ptr_write(emu, SPCS1, 0,
  145. emu->spdif_bits[1] =
  146. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  147. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  148. SPCS_GENERATIONSTATUS | 0x00001200 |
  149. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  150. snd_emu10k1_ptr_write(emu, SPCS2, 0,
  151. emu->spdif_bits[2] =
  152. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  153. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  154. SPCS_GENERATIONSTATUS | 0x00001200 |
  155. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  156. if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
  157. /* Hacks for Alice3 to work independent of haP16V driver */
  158. u32 tmp;
  159. //Setup SRCMulti_I2S SamplingRate
  160. tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
  161. tmp &= 0xfffff1ff;
  162. tmp |= (0x2<<9);
  163. snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
  164. /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
  165. snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
  166. /* Setup SRCMulti Input Audio Enable */
  167. /* Use 0xFFFFFFFF to enable P16V sounds. */
  168. snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
  169. /* Enabled Phased (8-channel) P16V playback */
  170. outl(0x0201, emu->port + HCFG2);
  171. /* Set playback routing. */
  172. snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
  173. }
  174. if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
  175. /* Hacks for Alice3 to work independent of haP16V driver */
  176. u32 tmp;
  177. snd_printk(KERN_ERR "Audigy2 value:Special config.\n");
  178. //Setup SRCMulti_I2S SamplingRate
  179. tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
  180. tmp &= 0xfffff1ff;
  181. tmp |= (0x2<<9);
  182. snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
  183. /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
  184. outl(0x600000, emu->port + 0x20);
  185. outl(0x14, emu->port + 0x24);
  186. /* Setup SRCMulti Input Audio Enable */
  187. outl(0x7b0000, emu->port + 0x20);
  188. outl(0xFF000000, emu->port + 0x24);
  189. /* Setup SPDIF Out Audio Enable */
  190. /* The Audigy 2 Value has a separate SPDIF out,
  191. * so no need for a mixer switch
  192. */
  193. outl(0x7a0000, emu->port + 0x20);
  194. outl(0xFF000000, emu->port + 0x24);
  195. tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
  196. outl(tmp, emu->port + A_IOCFG);
  197. }
  198. /*
  199. * Clear page with silence & setup all pointers to this page
  200. */
  201. memset(emu->silent_page.area, 0, PAGE_SIZE);
  202. silent_page = emu->silent_page.addr << 1;
  203. for (idx = 0; idx < MAXPAGES; idx++)
  204. ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
  205. snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
  206. snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
  207. snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
  208. silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
  209. for (ch = 0; ch < NUM_G; ch++) {
  210. snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
  211. snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
  212. }
  213. /*
  214. * Hokay, setup HCFG
  215. * Mute Disable Audio = 0
  216. * Lock Tank Memory = 1
  217. * Lock Sound Memory = 0
  218. * Auto Mute = 1
  219. */
  220. if (emu->audigy) {
  221. if (emu->revision == 4) /* audigy2 */
  222. outl(HCFG_AUDIOENABLE |
  223. HCFG_AC3ENABLE_CDSPDIF |
  224. HCFG_AC3ENABLE_GPSPDIF |
  225. HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
  226. else
  227. outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
  228. /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
  229. * e.g. card_capabilities->joystick */
  230. } else if (emu->model == 0x20 ||
  231. emu->model == 0xc400 ||
  232. (emu->model == 0x21 && emu->revision < 6))
  233. outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
  234. else
  235. // With on-chip joystick
  236. outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
  237. if (enable_ir) { /* enable IR for SB Live */
  238. if (emu->audigy) {
  239. unsigned int reg = inl(emu->port + A_IOCFG);
  240. outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
  241. udelay(500);
  242. outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
  243. udelay(100);
  244. outl(reg, emu->port + A_IOCFG);
  245. } else {
  246. unsigned int reg = inl(emu->port + HCFG);
  247. outl(reg | HCFG_GPOUT2, emu->port + HCFG);
  248. udelay(500);
  249. outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
  250. udelay(100);
  251. outl(reg, emu->port + HCFG);
  252. }
  253. }
  254. if (emu->audigy) { /* enable analog output */
  255. unsigned int reg = inl(emu->port + A_IOCFG);
  256. outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
  257. }
  258. /*
  259. * Initialize the effect engine
  260. */
  261. if ((err = snd_emu10k1_init_efx(emu)) < 0)
  262. return err;
  263. /*
  264. * Enable the audio bit
  265. */
  266. outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
  267. /* Enable analog/digital outs on audigy */
  268. if (emu->audigy) {
  269. outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
  270. if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
  271. /* Unmute Analog now. Set GPO6 to 1 for Apollo.
  272. * This has to be done after init ALice3 I2SOut beyond 48KHz.
  273. * So, sequence is important. */
  274. outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
  275. } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
  276. /* Unmute Analog now. */
  277. outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
  278. } else {
  279. /* Disable routing from AC97 line out to Front speakers */
  280. outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
  281. }
  282. }
  283. #if 0
  284. {
  285. unsigned int tmp;
  286. /* FIXME: the following routine disables LiveDrive-II !! */
  287. // TOSLink detection
  288. emu->tos_link = 0;
  289. tmp = inl(emu->port + HCFG);
  290. if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
  291. outl(tmp|0x800, emu->port + HCFG);
  292. udelay(50);
  293. if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
  294. emu->tos_link = 1;
  295. outl(tmp, emu->port + HCFG);
  296. }
  297. }
  298. }
  299. #endif
  300. snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
  301. emu->reserved_page = (struct snd_emu10k1_memblk *)snd_emu10k1_synth_alloc(emu, 4096);
  302. if (emu->reserved_page)
  303. emu->reserved_page->map_locked = 1;
  304. return 0;
  305. }
  306. static int snd_emu10k1_done(struct snd_emu10k1 * emu)
  307. {
  308. int ch;
  309. outl(0, emu->port + INTE);
  310. /*
  311. * Shutdown the chip
  312. */
  313. for (ch = 0; ch < NUM_G; ch++)
  314. snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
  315. for (ch = 0; ch < NUM_G; ch++) {
  316. snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
  317. snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
  318. snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
  319. snd_emu10k1_ptr_write(emu, CPF, ch, 0);
  320. }
  321. /* reset recording buffers */
  322. snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
  323. snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
  324. snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
  325. snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
  326. snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
  327. snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
  328. snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
  329. snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
  330. snd_emu10k1_ptr_write(emu, TCB, 0, 0);
  331. if (emu->audigy)
  332. snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
  333. else
  334. snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
  335. /* disable channel interrupt */
  336. snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
  337. snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
  338. snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
  339. snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
  340. /* remove reserved page */
  341. if (emu->reserved_page != NULL) {
  342. snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page);
  343. emu->reserved_page = NULL;
  344. }
  345. /* disable audio and lock cache */
  346. outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
  347. snd_emu10k1_ptr_write(emu, PTB, 0, 0);
  348. snd_emu10k1_free_efx(emu);
  349. return 0;
  350. }
  351. /*************************************************************************
  352. * ECARD functional implementation
  353. *************************************************************************/
  354. /* In A1 Silicon, these bits are in the HC register */
  355. #define HOOKN_BIT (1L << 12)
  356. #define HANDN_BIT (1L << 11)
  357. #define PULSEN_BIT (1L << 10)
  358. #define EC_GDI1 (1 << 13)
  359. #define EC_GDI0 (1 << 14)
  360. #define EC_NUM_CONTROL_BITS 20
  361. #define EC_AC3_DATA_SELN 0x0001L
  362. #define EC_EE_DATA_SEL 0x0002L
  363. #define EC_EE_CNTRL_SELN 0x0004L
  364. #define EC_EECLK 0x0008L
  365. #define EC_EECS 0x0010L
  366. #define EC_EESDO 0x0020L
  367. #define EC_TRIM_CSN 0x0040L
  368. #define EC_TRIM_SCLK 0x0080L
  369. #define EC_TRIM_SDATA 0x0100L
  370. #define EC_TRIM_MUTEN 0x0200L
  371. #define EC_ADCCAL 0x0400L
  372. #define EC_ADCRSTN 0x0800L
  373. #define EC_DACCAL 0x1000L
  374. #define EC_DACMUTEN 0x2000L
  375. #define EC_LEDN 0x4000L
  376. #define EC_SPDIF0_SEL_SHIFT 15
  377. #define EC_SPDIF1_SEL_SHIFT 17
  378. #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
  379. #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
  380. #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
  381. #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
  382. #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
  383. * be incremented any time the EEPROM's
  384. * format is changed. */
  385. #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
  386. /* Addresses for special values stored in to EEPROM */
  387. #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
  388. #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
  389. #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
  390. #define EC_LAST_PROMFILE_ADDR 0x2f
  391. #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
  392. * can be up to 30 characters in length
  393. * and is stored as a NULL-terminated
  394. * ASCII string. Any unused bytes must be
  395. * filled with zeros */
  396. #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
  397. /* Most of this stuff is pretty self-evident. According to the hardware
  398. * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
  399. * offset problem. Weird.
  400. */
  401. #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
  402. EC_TRIM_CSN)
  403. #define EC_DEFAULT_ADC_GAIN 0xC4C4
  404. #define EC_DEFAULT_SPDIF0_SEL 0x0
  405. #define EC_DEFAULT_SPDIF1_SEL 0x4
  406. /**************************************************************************
  407. * @func Clock bits into the Ecard's control latch. The Ecard uses a
  408. * control latch will is loaded bit-serially by toggling the Modem control
  409. * lines from function 2 on the E8010. This function hides these details
  410. * and presents the illusion that we are actually writing to a distinct
  411. * register.
  412. */
  413. static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value)
  414. {
  415. unsigned short count;
  416. unsigned int data;
  417. unsigned long hc_port;
  418. unsigned int hc_value;
  419. hc_port = emu->port + HCFG;
  420. hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
  421. outl(hc_value, hc_port);
  422. for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
  423. /* Set up the value */
  424. data = ((value & 0x1) ? PULSEN_BIT : 0);
  425. value >>= 1;
  426. outl(hc_value | data, hc_port);
  427. /* Clock the shift register */
  428. outl(hc_value | data | HANDN_BIT, hc_port);
  429. outl(hc_value | data, hc_port);
  430. }
  431. /* Latch the bits */
  432. outl(hc_value | HOOKN_BIT, hc_port);
  433. outl(hc_value, hc_port);
  434. }
  435. /**************************************************************************
  436. * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
  437. * trim value consists of a 16bit value which is composed of two
  438. * 8 bit gain/trim values, one for the left channel and one for the
  439. * right channel. The following table maps from the Gain/Attenuation
  440. * value in decibels into the corresponding bit pattern for a single
  441. * channel.
  442. */
  443. static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
  444. unsigned short gain)
  445. {
  446. unsigned int bit;
  447. /* Enable writing to the TRIM registers */
  448. snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
  449. /* Do it again to insure that we meet hold time requirements */
  450. snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
  451. for (bit = (1 << 15); bit; bit >>= 1) {
  452. unsigned int value;
  453. value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
  454. if (gain & bit)
  455. value |= EC_TRIM_SDATA;
  456. /* Clock the bit */
  457. snd_emu10k1_ecard_write(emu, value);
  458. snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
  459. snd_emu10k1_ecard_write(emu, value);
  460. }
  461. snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
  462. }
  463. static int __devinit snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
  464. {
  465. unsigned int hc_value;
  466. /* Set up the initial settings */
  467. emu->ecard_ctrl = EC_RAW_RUN_MODE |
  468. EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
  469. EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
  470. /* Step 0: Set the codec type in the hardware control register
  471. * and enable audio output */
  472. hc_value = inl(emu->port + HCFG);
  473. outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
  474. inl(emu->port + HCFG);
  475. /* Step 1: Turn off the led and deassert TRIM_CS */
  476. snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
  477. /* Step 2: Calibrate the ADC and DAC */
  478. snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
  479. /* Step 3: Wait for awhile; XXX We can't get away with this
  480. * under a real operating system; we'll need to block and wait that
  481. * way. */
  482. snd_emu10k1_wait(emu, 48000);
  483. /* Step 4: Switch off the DAC and ADC calibration. Note
  484. * That ADC_CAL is actually an inverted signal, so we assert
  485. * it here to stop calibration. */
  486. snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
  487. /* Step 4: Switch into run mode */
  488. snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
  489. /* Step 5: Set the analog input gain */
  490. snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
  491. return 0;
  492. }
  493. static int __devinit snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
  494. {
  495. unsigned long special_port;
  496. unsigned int value;
  497. /* Special initialisation routine
  498. * before the rest of the IO-Ports become active.
  499. */
  500. special_port = emu->port + 0x38;
  501. value = inl(special_port);
  502. outl(0x00d00000, special_port);
  503. value = inl(special_port);
  504. outl(0x00d00001, special_port);
  505. value = inl(special_port);
  506. outl(0x00d0005f, special_port);
  507. value = inl(special_port);
  508. outl(0x00d0007f, special_port);
  509. value = inl(special_port);
  510. outl(0x0090007f, special_port);
  511. value = inl(special_port);
  512. snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
  513. return 0;
  514. }
  515. /*
  516. * Create the EMU10K1 instance
  517. */
  518. static int snd_emu10k1_free(struct snd_emu10k1 *emu)
  519. {
  520. if (emu->port) { /* avoid access to already used hardware */
  521. snd_emu10k1_fx8010_tram_setup(emu, 0);
  522. snd_emu10k1_done(emu);
  523. }
  524. if (emu->memhdr)
  525. snd_util_memhdr_free(emu->memhdr);
  526. if (emu->silent_page.area)
  527. snd_dma_free_pages(&emu->silent_page);
  528. if (emu->ptb_pages.area)
  529. snd_dma_free_pages(&emu->ptb_pages);
  530. vfree(emu->page_ptr_table);
  531. vfree(emu->page_addr_table);
  532. if (emu->irq >= 0)
  533. free_irq(emu->irq, (void *)emu);
  534. if (emu->port)
  535. pci_release_regions(emu->pci);
  536. pci_disable_device(emu->pci);
  537. if (emu->card_capabilities->ca0151_chip) /* P16V */
  538. snd_p16v_free(emu);
  539. kfree(emu);
  540. return 0;
  541. }
  542. static int snd_emu10k1_dev_free(struct snd_device *device)
  543. {
  544. struct snd_emu10k1 *emu = device->device_data;
  545. return snd_emu10k1_free(emu);
  546. }
  547. static struct snd_emu_chip_details emu_chip_details[] = {
  548. /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
  549. /* Tested by James@superbug.co.uk 3rd July 2005 */
  550. {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
  551. .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
  552. .id = "Audigy2",
  553. .emu10k2_chip = 1,
  554. .ca0108_chip = 1,
  555. .spk71 = 1,
  556. .ac97_chip = 1} ,
  557. /* Audigy 2 ZS Notebook Cardbus card.*/
  558. /* Tested by James@superbug.co.uk 30th October 2005 */
  559. /* Not working yet, but progressing. */
  560. {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
  561. .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
  562. .id = "Audigy2",
  563. .emu10k2_chip = 1,
  564. .ca0108_chip = 1,
  565. .ca_cardbus_chip = 1,
  566. .spk71 = 1} ,
  567. {.vendor = 0x1102, .device = 0x0008,
  568. .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
  569. .id = "Audigy2",
  570. .emu10k2_chip = 1,
  571. .ca0108_chip = 1,
  572. .ac97_chip = 1} ,
  573. /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */
  574. {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
  575. .driver = "Audigy2", .name = "E-mu 1212m [4001]",
  576. .id = "EMU1212m",
  577. .emu10k2_chip = 1,
  578. .ca0102_chip = 1,
  579. .ecard = 1} ,
  580. /* Tested by James@superbug.co.uk 3rd July 2005 */
  581. {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
  582. .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
  583. .id = "Audigy2",
  584. .emu10k2_chip = 1,
  585. .ca0102_chip = 1,
  586. .ca0151_chip = 1,
  587. .spk71 = 1,
  588. .spdif_bug = 1,
  589. .ac97_chip = 1} ,
  590. /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
  591. {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
  592. .driver = "Audigy2", .name = "Audigy 2 [2006]",
  593. .id = "Audigy2",
  594. .emu10k2_chip = 1,
  595. .ca0102_chip = 1,
  596. .ca0151_chip = 1,
  597. .spk71 = 1,
  598. .spdif_bug = 1,
  599. .ac97_chip = 1} ,
  600. {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
  601. .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
  602. .id = "Audigy2",
  603. .emu10k2_chip = 1,
  604. .ca0102_chip = 1,
  605. .ca0151_chip = 1,
  606. .spk71 = 1,
  607. .spdif_bug = 1,
  608. .ac97_chip = 1} ,
  609. {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
  610. .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
  611. .id = "Audigy2",
  612. .emu10k2_chip = 1,
  613. .ca0102_chip = 1,
  614. .ca0151_chip = 1,
  615. .spk71 = 1,
  616. .spdif_bug = 1,
  617. .ac97_chip = 1} ,
  618. {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
  619. .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
  620. .id = "Audigy2",
  621. .emu10k2_chip = 1,
  622. .ca0102_chip = 1,
  623. .ca0151_chip = 1,
  624. .spk71 = 1,
  625. .spdif_bug = 1,
  626. .ac97_chip = 1} ,
  627. {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
  628. .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
  629. .id = "Audigy2",
  630. .emu10k2_chip = 1,
  631. .ca0102_chip = 1,
  632. .ca0151_chip = 1,
  633. .spk71 = 1,
  634. .spdif_bug = 1} ,
  635. {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
  636. .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
  637. .id = "Audigy2",
  638. .emu10k2_chip = 1,
  639. .ca0102_chip = 1,
  640. .ca0151_chip = 1,
  641. .spk71 = 1,
  642. .spdif_bug = 1,
  643. .ac97_chip = 1} ,
  644. {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
  645. .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
  646. .id = "Audigy2",
  647. .emu10k2_chip = 1,
  648. .ca0102_chip = 1,
  649. .ca0151_chip = 1,
  650. .spdif_bug = 1,
  651. .ac97_chip = 1} ,
  652. {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
  653. .driver = "Audigy", .name = "Audigy 1 [SB0090]",
  654. .id = "Audigy",
  655. .emu10k2_chip = 1,
  656. .ca0102_chip = 1,
  657. .ac97_chip = 1} ,
  658. {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
  659. .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
  660. .id = "Audigy",
  661. .emu10k2_chip = 1,
  662. .ca0102_chip = 1,
  663. .spdif_bug = 1,
  664. .ac97_chip = 1} ,
  665. {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
  666. .driver = "Audigy", .name = "Audigy 1 [SB0090]",
  667. .id = "Audigy",
  668. .emu10k2_chip = 1,
  669. .ca0102_chip = 1,
  670. .ac97_chip = 1} ,
  671. {.vendor = 0x1102, .device = 0x0004,
  672. .driver = "Audigy", .name = "Audigy 1 [Unknown]",
  673. .id = "Audigy",
  674. .emu10k2_chip = 1,
  675. .ca0102_chip = 1,
  676. .ac97_chip = 1} ,
  677. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
  678. .driver = "EMU10K1", .name = "SBLive! [SB0105]",
  679. .id = "Live",
  680. .emu10k1_chip = 1,
  681. .ac97_chip = 1,
  682. .sblive51 = 1} ,
  683. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
  684. .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
  685. .id = "Live",
  686. .emu10k1_chip = 1,
  687. .ac97_chip = 1,
  688. .sblive51 = 1} ,
  689. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
  690. .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
  691. .id = "Live",
  692. .emu10k1_chip = 1,
  693. .ac97_chip = 1,
  694. .sblive51 = 1} ,
  695. /* Tested by Thomas Zehetbauer 27th Aug 2005 */
  696. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
  697. .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
  698. .id = "Live",
  699. .emu10k1_chip = 1,
  700. .ac97_chip = 1,
  701. .sblive51 = 1} ,
  702. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
  703. .driver = "EMU10K1", .name = "SB Live 5.1",
  704. .id = "Live",
  705. .emu10k1_chip = 1,
  706. .ac97_chip = 1,
  707. .sblive51 = 1} ,
  708. /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
  709. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
  710. .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]",
  711. .id = "Live",
  712. .emu10k1_chip = 1,
  713. .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
  714. * share the same IDs!
  715. */
  716. .sblive51 = 1} ,
  717. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
  718. .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
  719. .id = "Live",
  720. .emu10k1_chip = 1,
  721. .ac97_chip = 1,
  722. .sblive51 = 1} ,
  723. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
  724. .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
  725. .id = "Live",
  726. .emu10k1_chip = 1,
  727. .ac97_chip = 1} ,
  728. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
  729. .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
  730. .id = "Live",
  731. .emu10k1_chip = 1,
  732. .ac97_chip = 1,
  733. .sblive51 = 1} ,
  734. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
  735. .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
  736. .id = "Live",
  737. .emu10k1_chip = 1,
  738. .ac97_chip = 1,
  739. .sblive51 = 1} ,
  740. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
  741. .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
  742. .id = "Live",
  743. .emu10k1_chip = 1,
  744. .ac97_chip = 1,
  745. .sblive51 = 1} ,
  746. /* Tested by James@superbug.co.uk 3rd July 2005 */
  747. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
  748. .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
  749. .id = "Live",
  750. .emu10k1_chip = 1,
  751. .ac97_chip = 1,
  752. .sblive51 = 1} ,
  753. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
  754. .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
  755. .id = "Live",
  756. .emu10k1_chip = 1,
  757. .ac97_chip = 1,
  758. .sblive51 = 1} ,
  759. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
  760. .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
  761. .id = "Live",
  762. .emu10k1_chip = 1,
  763. .ac97_chip = 1,
  764. .sblive51 = 1} ,
  765. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
  766. .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
  767. .id = "Live",
  768. .emu10k1_chip = 1,
  769. .ac97_chip = 1,
  770. .sblive51 = 1} ,
  771. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
  772. .driver = "EMU10K1", .name = "E-mu APS [4001]",
  773. .id = "APS",
  774. .emu10k1_chip = 1,
  775. .ecard = 1} ,
  776. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
  777. .driver = "EMU10K1", .name = "SBLive! [CT4620]",
  778. .id = "Live",
  779. .emu10k1_chip = 1,
  780. .ac97_chip = 1,
  781. .sblive51 = 1} ,
  782. {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
  783. .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
  784. .id = "Live",
  785. .emu10k1_chip = 1,
  786. .ac97_chip = 1,
  787. .sblive51 = 1} ,
  788. {.vendor = 0x1102, .device = 0x0002,
  789. .driver = "EMU10K1", .name = "SB Live [Unknown]",
  790. .id = "Live",
  791. .emu10k1_chip = 1,
  792. .ac97_chip = 1,
  793. .sblive51 = 1} ,
  794. { } /* terminator */
  795. };
  796. int __devinit snd_emu10k1_create(struct snd_card *card,
  797. struct pci_dev * pci,
  798. unsigned short extin_mask,
  799. unsigned short extout_mask,
  800. long max_cache_bytes,
  801. int enable_ir,
  802. uint subsystem,
  803. struct snd_emu10k1 ** remu)
  804. {
  805. struct snd_emu10k1 *emu;
  806. int err;
  807. int is_audigy;
  808. unsigned char revision;
  809. const struct snd_emu_chip_details *c;
  810. static struct snd_device_ops ops = {
  811. .dev_free = snd_emu10k1_dev_free,
  812. };
  813. *remu = NULL;
  814. /* enable PCI device */
  815. if ((err = pci_enable_device(pci)) < 0)
  816. return err;
  817. emu = kzalloc(sizeof(*emu), GFP_KERNEL);
  818. if (emu == NULL) {
  819. pci_disable_device(pci);
  820. return -ENOMEM;
  821. }
  822. emu->card = card;
  823. spin_lock_init(&emu->reg_lock);
  824. spin_lock_init(&emu->emu_lock);
  825. spin_lock_init(&emu->voice_lock);
  826. spin_lock_init(&emu->synth_lock);
  827. spin_lock_init(&emu->memblk_lock);
  828. init_MUTEX(&emu->ptb_lock);
  829. init_MUTEX(&emu->fx8010.lock);
  830. INIT_LIST_HEAD(&emu->mapped_link_head);
  831. INIT_LIST_HEAD(&emu->mapped_order_link_head);
  832. emu->pci = pci;
  833. emu->irq = -1;
  834. emu->synth = NULL;
  835. emu->get_synth_voice = NULL;
  836. /* read revision & serial */
  837. pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
  838. emu->revision = revision;
  839. pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
  840. pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
  841. snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
  842. for (c = emu_chip_details; c->vendor; c++) {
  843. if (c->vendor == pci->vendor && c->device == pci->device) {
  844. if (subsystem) {
  845. if (c->subsystem && (c->subsystem == subsystem) ) {
  846. break;
  847. } else continue;
  848. } else {
  849. if (c->subsystem && (c->subsystem != emu->serial) )
  850. continue;
  851. if (c->revision && c->revision != emu->revision)
  852. continue;
  853. }
  854. break;
  855. }
  856. }
  857. if (c->vendor == 0) {
  858. snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
  859. kfree(emu);
  860. pci_disable_device(pci);
  861. return -ENOENT;
  862. }
  863. emu->card_capabilities = c;
  864. if (c->subsystem && !subsystem)
  865. snd_printdd("Sound card name=%s\n", c->name);
  866. else if (subsystem)
  867. snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
  868. c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
  869. else
  870. snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
  871. c->name, pci->vendor, pci->device, emu->serial);
  872. if (!*card->id && c->id) {
  873. int i, n = 0;
  874. strlcpy(card->id, c->id, sizeof(card->id));
  875. for (;;) {
  876. for (i = 0; i < snd_ecards_limit; i++) {
  877. if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
  878. break;
  879. }
  880. if (i >= snd_ecards_limit)
  881. break;
  882. n++;
  883. if (n >= SNDRV_CARDS)
  884. break;
  885. snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
  886. }
  887. }
  888. is_audigy = emu->audigy = c->emu10k2_chip;
  889. /* set the DMA transfer mask */
  890. emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
  891. if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
  892. pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
  893. snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
  894. kfree(emu);
  895. pci_disable_device(pci);
  896. return -ENXIO;
  897. }
  898. if (is_audigy)
  899. emu->gpr_base = A_FXGPREGBASE;
  900. else
  901. emu->gpr_base = FXGPREGBASE;
  902. if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
  903. kfree(emu);
  904. pci_disable_device(pci);
  905. return err;
  906. }
  907. emu->port = pci_resource_start(pci, 0);
  908. if (request_irq(pci->irq, snd_emu10k1_interrupt, SA_INTERRUPT|SA_SHIRQ, "EMU10K1", (void *)emu)) {
  909. snd_emu10k1_free(emu);
  910. return -EBUSY;
  911. }
  912. emu->irq = pci->irq;
  913. emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
  914. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
  915. 32 * 1024, &emu->ptb_pages) < 0) {
  916. snd_emu10k1_free(emu);
  917. return -ENOMEM;
  918. }
  919. emu->page_ptr_table = (void **)vmalloc(emu->max_cache_pages * sizeof(void*));
  920. emu->page_addr_table = (unsigned long*)vmalloc(emu->max_cache_pages * sizeof(unsigned long));
  921. if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
  922. snd_emu10k1_free(emu);
  923. return -ENOMEM;
  924. }
  925. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
  926. EMUPAGESIZE, &emu->silent_page) < 0) {
  927. snd_emu10k1_free(emu);
  928. return -ENOMEM;
  929. }
  930. emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
  931. if (emu->memhdr == NULL) {
  932. snd_emu10k1_free(emu);
  933. return -ENOMEM;
  934. }
  935. emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
  936. sizeof(struct snd_util_memblk);
  937. pci_set_master(pci);
  938. emu->fx8010.fxbus_mask = 0x303f;
  939. if (extin_mask == 0)
  940. extin_mask = 0x3fcf;
  941. if (extout_mask == 0)
  942. extout_mask = 0x7fff;
  943. emu->fx8010.extin_mask = extin_mask;
  944. emu->fx8010.extout_mask = extout_mask;
  945. if (emu->card_capabilities->ecard) {
  946. if ((err = snd_emu10k1_ecard_init(emu)) < 0) {
  947. snd_emu10k1_free(emu);
  948. return err;
  949. }
  950. } else if (emu->card_capabilities->ca_cardbus_chip) {
  951. if ((err = snd_emu10k1_cardbus_init(emu)) < 0) {
  952. snd_emu10k1_free(emu);
  953. return err;
  954. }
  955. } else {
  956. /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
  957. does not support this, it shouldn't do any harm */
  958. snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
  959. }
  960. if ((err = snd_emu10k1_init(emu, enable_ir)) < 0) {
  961. snd_emu10k1_free(emu);
  962. return err;
  963. }
  964. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0) {
  965. snd_emu10k1_free(emu);
  966. return err;
  967. }
  968. snd_emu10k1_proc_init(emu);
  969. snd_card_set_dev(card, &pci->dev);
  970. *remu = emu;
  971. return 0;
  972. }
  973. /* memory.c */
  974. EXPORT_SYMBOL(snd_emu10k1_synth_alloc);
  975. EXPORT_SYMBOL(snd_emu10k1_synth_free);
  976. EXPORT_SYMBOL(snd_emu10k1_synth_bzero);
  977. EXPORT_SYMBOL(snd_emu10k1_synth_copy_from_user);
  978. EXPORT_SYMBOL(snd_emu10k1_memblk_map);
  979. /* voice.c */
  980. EXPORT_SYMBOL(snd_emu10k1_voice_alloc);
  981. EXPORT_SYMBOL(snd_emu10k1_voice_free);
  982. /* io.c */
  983. EXPORT_SYMBOL(snd_emu10k1_ptr_read);
  984. EXPORT_SYMBOL(snd_emu10k1_ptr_write);