gpio-u300.c 19 KB

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  1. /*
  2. * U300 GPIO module.
  3. *
  4. * Copyright (C) 2007-2009 ST-Ericsson AB
  5. * License terms: GNU General Public License (GPL) version 2
  6. * This can driver either of the two basic GPIO cores
  7. * available in the U300 platforms:
  8. * COH 901 335 - Used in DB3150 (U300 1.0) and DB3200 (U330 1.0)
  9. * COH 901 571/3 - Used in DB3210 (U365 2.0) and DB3350 (U335 1.0)
  10. * Notice that you also have inline macros in <asm-arch/gpio.h>
  11. * Author: Linus Walleij <linus.walleij@stericsson.com>
  12. * Author: Jonas Aaberg <jonas.aberg@stericsson.com>
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/delay.h>
  18. #include <linux/errno.h>
  19. #include <linux/io.h>
  20. #include <linux/clk.h>
  21. #include <linux/err.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/gpio.h>
  24. #include <mach/gpio-u300.h>
  25. /* Reference to GPIO block clock */
  26. static struct clk *clk;
  27. /* Memory resource */
  28. static struct resource *memres;
  29. static void __iomem *virtbase;
  30. static struct device *gpiodev;
  31. struct u300_gpio_port {
  32. const char *name;
  33. int irq;
  34. int number;
  35. };
  36. static struct u300_gpio_port gpio_ports[] = {
  37. {
  38. .name = "gpio0",
  39. .number = 0,
  40. },
  41. {
  42. .name = "gpio1",
  43. .number = 1,
  44. },
  45. {
  46. .name = "gpio2",
  47. .number = 2,
  48. },
  49. #ifdef U300_COH901571_3
  50. {
  51. .name = "gpio3",
  52. .number = 3,
  53. },
  54. {
  55. .name = "gpio4",
  56. .number = 4,
  57. },
  58. #ifdef CONFIG_MACH_U300_BS335
  59. {
  60. .name = "gpio5",
  61. .number = 5,
  62. },
  63. {
  64. .name = "gpio6",
  65. .number = 6,
  66. },
  67. #endif
  68. #endif
  69. };
  70. #ifdef U300_COH901571_3
  71. /* Default input value */
  72. #define DEFAULT_OUTPUT_LOW 0
  73. #define DEFAULT_OUTPUT_HIGH 1
  74. /* GPIO Pull-Up status */
  75. #define DISABLE_PULL_UP 0
  76. #define ENABLE_PULL_UP 1
  77. #define GPIO_NOT_USED 0
  78. #define GPIO_IN 1
  79. #define GPIO_OUT 2
  80. struct u300_gpio_configuration_data {
  81. unsigned char pin_usage;
  82. unsigned char default_output_value;
  83. unsigned char pull_up;
  84. };
  85. /* Initial configuration */
  86. const struct u300_gpio_configuration_data
  87. u300_gpio_config[U300_GPIO_NUM_PORTS][U300_GPIO_PINS_PER_PORT] = {
  88. #ifdef CONFIG_MACH_U300_BS335
  89. /* Port 0, pins 0-7 */
  90. {
  91. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  92. {GPIO_OUT, DEFAULT_OUTPUT_HIGH, DISABLE_PULL_UP},
  93. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  94. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  95. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  96. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  97. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  98. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  99. },
  100. /* Port 1, pins 0-7 */
  101. {
  102. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  103. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  104. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  105. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  106. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  107. {GPIO_OUT, DEFAULT_OUTPUT_HIGH, DISABLE_PULL_UP},
  108. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  109. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  110. },
  111. /* Port 2, pins 0-7 */
  112. {
  113. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  114. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  115. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  116. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  117. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  118. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  119. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  120. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP}
  121. },
  122. /* Port 3, pins 0-7 */
  123. {
  124. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  125. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  126. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  127. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  128. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  129. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  130. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  131. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  132. },
  133. /* Port 4, pins 0-7 */
  134. {
  135. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  136. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  137. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  138. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  139. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  140. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  141. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  142. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  143. },
  144. /* Port 5, pins 0-7 */
  145. {
  146. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  147. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  148. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  149. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  150. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  151. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  152. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  153. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  154. },
  155. /* Port 6, pind 0-7 */
  156. {
  157. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  158. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  159. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  160. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  161. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  162. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  163. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  164. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  165. }
  166. #endif
  167. #ifdef CONFIG_MACH_U300_BS365
  168. /* Port 0, pins 0-7 */
  169. {
  170. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  171. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  172. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  173. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  174. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  175. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  176. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  177. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  178. },
  179. /* Port 1, pins 0-7 */
  180. {
  181. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  182. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  183. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  184. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  185. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  186. {GPIO_OUT, DEFAULT_OUTPUT_HIGH, DISABLE_PULL_UP},
  187. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  188. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  189. },
  190. /* Port 2, pins 0-7 */
  191. {
  192. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  193. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  194. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  195. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  196. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  197. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  198. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  199. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP}
  200. },
  201. /* Port 3, pins 0-7 */
  202. {
  203. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  204. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  205. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  206. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  207. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  208. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  209. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  210. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP}
  211. },
  212. /* Port 4, pins 0-7 */
  213. {
  214. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  215. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  216. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  217. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  218. /* These 4 pins doesn't exist on DB3210 */
  219. {GPIO_OUT, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  220. {GPIO_OUT, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  221. {GPIO_OUT, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  222. {GPIO_OUT, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP}
  223. }
  224. #endif
  225. };
  226. #endif
  227. /* No users == we can power down GPIO */
  228. static int gpio_users;
  229. struct gpio_struct {
  230. int (*callback)(void *);
  231. void *data;
  232. int users;
  233. };
  234. static struct gpio_struct gpio_pin[U300_GPIO_MAX];
  235. /*
  236. * Let drivers register callback in order to get notified when there is
  237. * an interrupt on the gpio pin
  238. */
  239. int gpio_register_callback(unsigned gpio, int (*func)(void *arg), void *data)
  240. {
  241. if (gpio_pin[gpio].callback)
  242. dev_warn(gpiodev, "%s: WARNING: callback already "
  243. "registered for gpio pin#%d\n", __func__, gpio);
  244. gpio_pin[gpio].callback = func;
  245. gpio_pin[gpio].data = data;
  246. return 0;
  247. }
  248. EXPORT_SYMBOL(gpio_register_callback);
  249. int gpio_unregister_callback(unsigned gpio)
  250. {
  251. if (!gpio_pin[gpio].callback)
  252. dev_warn(gpiodev, "%s: WARNING: callback already "
  253. "unregistered for gpio pin#%d\n", __func__, gpio);
  254. gpio_pin[gpio].callback = NULL;
  255. gpio_pin[gpio].data = NULL;
  256. return 0;
  257. }
  258. EXPORT_SYMBOL(gpio_unregister_callback);
  259. /* Non-zero means valid */
  260. int gpio_is_valid(int number)
  261. {
  262. if (number >= 0 &&
  263. number < (U300_GPIO_NUM_PORTS * U300_GPIO_PINS_PER_PORT))
  264. return 1;
  265. return 0;
  266. }
  267. EXPORT_SYMBOL(gpio_is_valid);
  268. int gpio_request(unsigned gpio, const char *label)
  269. {
  270. if (gpio_pin[gpio].users)
  271. return -EINVAL;
  272. else
  273. gpio_pin[gpio].users++;
  274. gpio_users++;
  275. return 0;
  276. }
  277. EXPORT_SYMBOL(gpio_request);
  278. void gpio_free(unsigned gpio)
  279. {
  280. gpio_users--;
  281. gpio_pin[gpio].users--;
  282. if (unlikely(gpio_pin[gpio].users < 0)) {
  283. dev_warn(gpiodev, "warning: gpio#%d release mismatch\n",
  284. gpio);
  285. gpio_pin[gpio].users = 0;
  286. }
  287. return;
  288. }
  289. EXPORT_SYMBOL(gpio_free);
  290. /* This returns zero or nonzero */
  291. int gpio_get_value(unsigned gpio)
  292. {
  293. return readl(virtbase + U300_GPIO_PXPDIR +
  294. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING) & (1 << (gpio & 0x07));
  295. }
  296. EXPORT_SYMBOL(gpio_get_value);
  297. /*
  298. * We hope that the compiler will optimize away the unused branch
  299. * in case "value" is a constant
  300. */
  301. void gpio_set_value(unsigned gpio, int value)
  302. {
  303. u32 val;
  304. unsigned long flags;
  305. local_irq_save(flags);
  306. if (value) {
  307. /* set */
  308. val = readl(virtbase + U300_GPIO_PXPDOR +
  309. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING)
  310. & (1 << (gpio & 0x07));
  311. writel(val | (1 << (gpio & 0x07)), virtbase +
  312. U300_GPIO_PXPDOR +
  313. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING);
  314. } else {
  315. /* clear */
  316. val = readl(virtbase + U300_GPIO_PXPDOR +
  317. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING)
  318. & (1 << (gpio & 0x07));
  319. writel(val & ~(1 << (gpio & 0x07)), virtbase +
  320. U300_GPIO_PXPDOR +
  321. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING);
  322. }
  323. local_irq_restore(flags);
  324. }
  325. EXPORT_SYMBOL(gpio_set_value);
  326. int gpio_direction_input(unsigned gpio)
  327. {
  328. unsigned long flags;
  329. u32 val;
  330. if (gpio > U300_GPIO_MAX)
  331. return -EINVAL;
  332. local_irq_save(flags);
  333. val = readl(virtbase + U300_GPIO_PXPCR + PIN_TO_PORT(gpio) *
  334. U300_GPIO_PORTX_SPACING);
  335. /* Mask out this pin*/
  336. val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << ((gpio & 0x07) << 1));
  337. /* This is not needed since it sets the bits to zero.*/
  338. /* val |= (U300_GPIO_PXPCR_PIN_MODE_INPUT << (gpio*2)); */
  339. writel(val, virtbase + U300_GPIO_PXPCR + PIN_TO_PORT(gpio) *
  340. U300_GPIO_PORTX_SPACING);
  341. local_irq_restore(flags);
  342. return 0;
  343. }
  344. EXPORT_SYMBOL(gpio_direction_input);
  345. int gpio_direction_output(unsigned gpio, int value)
  346. {
  347. unsigned long flags;
  348. u32 val;
  349. if (gpio > U300_GPIO_MAX)
  350. return -EINVAL;
  351. local_irq_save(flags);
  352. val = readl(virtbase + U300_GPIO_PXPCR + PIN_TO_PORT(gpio) *
  353. U300_GPIO_PORTX_SPACING);
  354. /* Mask out this pin */
  355. val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << ((gpio & 0x07) << 1));
  356. /*
  357. * FIXME: configure for push/pull, open drain or open source per pin
  358. * in setup. The current driver will only support push/pull.
  359. */
  360. val |= (U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL
  361. << ((gpio & 0x07) << 1));
  362. writel(val, virtbase + U300_GPIO_PXPCR + PIN_TO_PORT(gpio) *
  363. U300_GPIO_PORTX_SPACING);
  364. gpio_set_value(gpio, value);
  365. local_irq_restore(flags);
  366. return 0;
  367. }
  368. EXPORT_SYMBOL(gpio_direction_output);
  369. /*
  370. * Enable an IRQ, edge is rising edge (!= 0) or falling edge (==0).
  371. */
  372. void enable_irq_on_gpio_pin(unsigned gpio, int edge)
  373. {
  374. u32 val;
  375. unsigned long flags;
  376. local_irq_save(flags);
  377. val = readl(virtbase + U300_GPIO_PXIEN + PIN_TO_PORT(gpio) *
  378. U300_GPIO_PORTX_SPACING);
  379. val |= (1 << (gpio & 0x07));
  380. writel(val, virtbase + U300_GPIO_PXIEN + PIN_TO_PORT(gpio) *
  381. U300_GPIO_PORTX_SPACING);
  382. val = readl(virtbase + U300_GPIO_PXICR + PIN_TO_PORT(gpio) *
  383. U300_GPIO_PORTX_SPACING);
  384. if (edge)
  385. val |= (1 << (gpio & 0x07));
  386. else
  387. val &= ~(1 << (gpio & 0x07));
  388. writel(val, virtbase + U300_GPIO_PXICR + PIN_TO_PORT(gpio) *
  389. U300_GPIO_PORTX_SPACING);
  390. local_irq_restore(flags);
  391. }
  392. EXPORT_SYMBOL(enable_irq_on_gpio_pin);
  393. void disable_irq_on_gpio_pin(unsigned gpio)
  394. {
  395. u32 val;
  396. unsigned long flags;
  397. local_irq_save(flags);
  398. val = readl(virtbase + U300_GPIO_PXIEN + PIN_TO_PORT(gpio) *
  399. U300_GPIO_PORTX_SPACING);
  400. val &= ~(1 << (gpio & 0x07));
  401. writel(val, virtbase + U300_GPIO_PXIEN + PIN_TO_PORT(gpio) *
  402. U300_GPIO_PORTX_SPACING);
  403. local_irq_restore(flags);
  404. }
  405. EXPORT_SYMBOL(disable_irq_on_gpio_pin);
  406. /* Enable (value == 0) or disable (value == 1) internal pullup */
  407. void gpio_pullup(unsigned gpio, int value)
  408. {
  409. u32 val;
  410. unsigned long flags;
  411. local_irq_save(flags);
  412. if (value) {
  413. val = readl(virtbase + U300_GPIO_PXPER + PIN_TO_PORT(gpio) *
  414. U300_GPIO_PORTX_SPACING);
  415. writel(val | (1 << (gpio & 0x07)), virtbase + U300_GPIO_PXPER +
  416. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING);
  417. } else {
  418. val = readl(virtbase + U300_GPIO_PXPER + PIN_TO_PORT(gpio) *
  419. U300_GPIO_PORTX_SPACING);
  420. writel(val & ~(1 << (gpio & 0x07)), virtbase + U300_GPIO_PXPER +
  421. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING);
  422. }
  423. local_irq_restore(flags);
  424. }
  425. EXPORT_SYMBOL(gpio_pullup);
  426. static irqreturn_t gpio_irq_handler(int irq, void *dev_id)
  427. {
  428. struct u300_gpio_port *port = dev_id;
  429. u32 val;
  430. int pin;
  431. /* Read event register */
  432. val = readl(virtbase + U300_GPIO_PXIEV + port->number *
  433. U300_GPIO_PORTX_SPACING);
  434. /* Mask with enable register */
  435. val &= readl(virtbase + U300_GPIO_PXIEV + port->number *
  436. U300_GPIO_PORTX_SPACING);
  437. /* Mask relevant bits */
  438. val &= U300_GPIO_PXIEV_ALL_IRQ_EVENT_MASK;
  439. /* ACK IRQ (clear event) */
  440. writel(val, virtbase + U300_GPIO_PXIEV + port->number *
  441. U300_GPIO_PORTX_SPACING);
  442. /* Print message */
  443. while (val != 0) {
  444. unsigned gpio;
  445. pin = __ffs(val);
  446. /* mask off this pin */
  447. val &= ~(1 << pin);
  448. gpio = (port->number << 3) + pin;
  449. if (gpio_pin[gpio].callback)
  450. (void)gpio_pin[gpio].callback(gpio_pin[gpio].data);
  451. else
  452. dev_dbg(gpiodev, "stray GPIO IRQ on line %d\n",
  453. gpio);
  454. }
  455. return IRQ_HANDLED;
  456. }
  457. static void gpio_set_initial_values(void)
  458. {
  459. #ifdef U300_COH901571_3
  460. int i, j;
  461. unsigned long flags;
  462. u32 val;
  463. /* Write default values to all pins */
  464. for (i = 0; i < U300_GPIO_NUM_PORTS; i++) {
  465. val = 0;
  466. for (j = 0; j < 8; j++)
  467. val |= (u32) (u300_gpio_config[i][j].default_output_value != DEFAULT_OUTPUT_LOW) << j;
  468. local_irq_save(flags);
  469. writel(val, virtbase + U300_GPIO_PXPDOR + i * U300_GPIO_PORTX_SPACING);
  470. local_irq_restore(flags);
  471. }
  472. /*
  473. * Put all pins that are set to either 'GPIO_OUT' or 'GPIO_NOT_USED'
  474. * to output and 'GPIO_IN' to input for each port. And initialize
  475. * default value on outputs.
  476. */
  477. for (i = 0; i < U300_GPIO_NUM_PORTS; i++) {
  478. for (j = 0; j < U300_GPIO_PINS_PER_PORT; j++) {
  479. local_irq_save(flags);
  480. val = readl(virtbase + U300_GPIO_PXPCR +
  481. i * U300_GPIO_PORTX_SPACING);
  482. /* Mask out this pin */
  483. val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << (j << 1));
  484. if (u300_gpio_config[i][j].pin_usage != GPIO_IN)
  485. val |= (U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL << (j << 1));
  486. writel(val, virtbase + U300_GPIO_PXPCR +
  487. i * U300_GPIO_PORTX_SPACING);
  488. local_irq_restore(flags);
  489. }
  490. }
  491. /* Enable or disable the internal pull-ups in the GPIO ASIC block */
  492. for (i = 0; i < U300_GPIO_MAX; i++) {
  493. val = 0;
  494. for (j = 0; j < 8; j++)
  495. val |= (u32)((u300_gpio_config[i][j].pull_up == DISABLE_PULL_UP) << j);
  496. local_irq_save(flags);
  497. writel(val, virtbase + U300_GPIO_PXPER + i * U300_GPIO_PORTX_SPACING);
  498. local_irq_restore(flags);
  499. }
  500. #endif
  501. }
  502. static int __init gpio_probe(struct platform_device *pdev)
  503. {
  504. u32 val;
  505. int err = 0;
  506. int i;
  507. int num_irqs;
  508. gpiodev = &pdev->dev;
  509. memset(gpio_pin, 0, sizeof(gpio_pin));
  510. /* Get GPIO clock */
  511. clk = clk_get(&pdev->dev, NULL);
  512. if (IS_ERR(clk)) {
  513. err = PTR_ERR(clk);
  514. dev_err(gpiodev, "could not get GPIO clock\n");
  515. goto err_no_clk;
  516. }
  517. err = clk_enable(clk);
  518. if (err) {
  519. dev_err(gpiodev, "could not enable GPIO clock\n");
  520. goto err_no_clk_enable;
  521. }
  522. memres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  523. if (!memres)
  524. goto err_no_resource;
  525. if (!request_mem_region(memres->start, resource_size(memres),
  526. "GPIO Controller")) {
  527. err = -ENODEV;
  528. goto err_no_ioregion;
  529. }
  530. virtbase = ioremap(memres->start, resource_size(memres));
  531. if (!virtbase) {
  532. err = -ENOMEM;
  533. goto err_no_ioremap;
  534. }
  535. dev_info(gpiodev, "remapped 0x%08x to %p\n",
  536. memres->start, virtbase);
  537. #ifdef U300_COH901335
  538. dev_info(gpiodev, "initializing GPIO Controller COH 901 335\n");
  539. /* Turn on the GPIO block */
  540. writel(U300_GPIO_CR_BLOCK_CLOCK_ENABLE, virtbase + U300_GPIO_CR);
  541. #endif
  542. #ifdef U300_COH901571_3
  543. dev_info(gpiodev, "initializing GPIO Controller COH 901 571/3\n");
  544. val = readl(virtbase + U300_GPIO_CR);
  545. dev_info(gpiodev, "COH901571/3 block version: %d, " \
  546. "number of cores: %d\n",
  547. ((val & 0x0000FE00) >> 9),
  548. ((val & 0x000001FC) >> 2));
  549. writel(U300_GPIO_CR_BLOCK_CLKRQ_ENABLE, virtbase + U300_GPIO_CR);
  550. #endif
  551. gpio_set_initial_values();
  552. for (num_irqs = 0 ; num_irqs < U300_GPIO_NUM_PORTS; num_irqs++) {
  553. gpio_ports[num_irqs].irq =
  554. platform_get_irq_byname(pdev,
  555. gpio_ports[num_irqs].name);
  556. err = request_irq(gpio_ports[num_irqs].irq,
  557. gpio_irq_handler, IRQF_DISABLED,
  558. gpio_ports[num_irqs].name,
  559. &gpio_ports[num_irqs]);
  560. if (err) {
  561. dev_err(gpiodev, "cannot allocate IRQ for %s!\n",
  562. gpio_ports[num_irqs].name);
  563. goto err_no_irq;
  564. }
  565. /* Turns off PortX_irq_force */
  566. writel(0x0, virtbase + U300_GPIO_PXIFR +
  567. num_irqs * U300_GPIO_PORTX_SPACING);
  568. }
  569. return 0;
  570. err_no_irq:
  571. for (i = 0; i < num_irqs; i++)
  572. free_irq(gpio_ports[i].irq, &gpio_ports[i]);
  573. iounmap(virtbase);
  574. err_no_ioremap:
  575. release_mem_region(memres->start, resource_size(memres));
  576. err_no_ioregion:
  577. err_no_resource:
  578. clk_disable(clk);
  579. err_no_clk_enable:
  580. clk_put(clk);
  581. err_no_clk:
  582. dev_info(gpiodev, "module ERROR:%d\n", err);
  583. return err;
  584. }
  585. static int __exit gpio_remove(struct platform_device *pdev)
  586. {
  587. int i;
  588. /* Turn off the GPIO block */
  589. writel(0x00000000U, virtbase + U300_GPIO_CR);
  590. for (i = 0 ; i < U300_GPIO_NUM_PORTS; i++)
  591. free_irq(gpio_ports[i].irq, &gpio_ports[i]);
  592. iounmap(virtbase);
  593. release_mem_region(memres->start, resource_size(memres));
  594. clk_disable(clk);
  595. clk_put(clk);
  596. return 0;
  597. }
  598. static struct platform_driver gpio_driver = {
  599. .driver = {
  600. .name = "u300-gpio",
  601. },
  602. .remove = __exit_p(gpio_remove),
  603. };
  604. static int __init u300_gpio_init(void)
  605. {
  606. return platform_driver_probe(&gpio_driver, gpio_probe);
  607. }
  608. static void __exit u300_gpio_exit(void)
  609. {
  610. platform_driver_unregister(&gpio_driver);
  611. }
  612. arch_initcall(u300_gpio_init);
  613. module_exit(u300_gpio_exit);
  614. MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
  615. #ifdef U300_COH901571_3
  616. MODULE_DESCRIPTION("ST-Ericsson AB COH 901 571/3 GPIO driver");
  617. #endif
  618. #ifdef U300_COH901335
  619. MODULE_DESCRIPTION("ST-Ericsson AB COH 901 335 GPIO driver");
  620. #endif
  621. MODULE_LICENSE("GPL");