ptrace.c 25 KB

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  1. /*
  2. * Based on arch/arm/kernel/ptrace.c
  3. *
  4. * By Ross Biro 1/23/92
  5. * edited by Linus Torvalds
  6. * ARM modifications Copyright (C) 2000 Russell King
  7. * Copyright (C) 2012 ARM Ltd.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/sched.h>
  23. #include <linux/mm.h>
  24. #include <linux/smp.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/user.h>
  27. #include <linux/security.h>
  28. #include <linux/init.h>
  29. #include <linux/signal.h>
  30. #include <linux/uaccess.h>
  31. #include <linux/perf_event.h>
  32. #include <linux/hw_breakpoint.h>
  33. #include <linux/regset.h>
  34. #include <linux/tracehook.h>
  35. #include <linux/elf.h>
  36. #include <asm/compat.h>
  37. #include <asm/debug-monitors.h>
  38. #include <asm/pgtable.h>
  39. #include <asm/traps.h>
  40. #include <asm/system_misc.h>
  41. /*
  42. * TODO: does not yet catch signals sent when the child dies.
  43. * in exit.c or in signal.c.
  44. */
  45. /*
  46. * Called by kernel/ptrace.c when detaching..
  47. */
  48. void ptrace_disable(struct task_struct *child)
  49. {
  50. }
  51. /*
  52. * Handle hitting a breakpoint.
  53. */
  54. static int ptrace_break(struct pt_regs *regs)
  55. {
  56. siginfo_t info = {
  57. .si_signo = SIGTRAP,
  58. .si_errno = 0,
  59. .si_code = TRAP_BRKPT,
  60. .si_addr = (void __user *)instruction_pointer(regs),
  61. };
  62. force_sig_info(SIGTRAP, &info, current);
  63. return 0;
  64. }
  65. static int arm64_break_trap(unsigned long addr, unsigned int esr,
  66. struct pt_regs *regs)
  67. {
  68. return ptrace_break(regs);
  69. }
  70. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  71. /*
  72. * Handle hitting a HW-breakpoint.
  73. */
  74. static void ptrace_hbptriggered(struct perf_event *bp,
  75. struct perf_sample_data *data,
  76. struct pt_regs *regs)
  77. {
  78. struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
  79. siginfo_t info = {
  80. .si_signo = SIGTRAP,
  81. .si_errno = 0,
  82. .si_code = TRAP_HWBKPT,
  83. .si_addr = (void __user *)(bkpt->trigger),
  84. };
  85. #ifdef CONFIG_COMPAT
  86. int i;
  87. if (!is_compat_task())
  88. goto send_sig;
  89. for (i = 0; i < ARM_MAX_BRP; ++i) {
  90. if (current->thread.debug.hbp_break[i] == bp) {
  91. info.si_errno = (i << 1) + 1;
  92. break;
  93. }
  94. }
  95. for (i = ARM_MAX_BRP; i < ARM_MAX_HBP_SLOTS && !bp; ++i) {
  96. if (current->thread.debug.hbp_watch[i] == bp) {
  97. info.si_errno = -((i << 1) + 1);
  98. break;
  99. }
  100. }
  101. send_sig:
  102. #endif
  103. force_sig_info(SIGTRAP, &info, current);
  104. }
  105. /*
  106. * Unregister breakpoints from this task and reset the pointers in
  107. * the thread_struct.
  108. */
  109. void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
  110. {
  111. int i;
  112. struct thread_struct *t = &tsk->thread;
  113. for (i = 0; i < ARM_MAX_BRP; i++) {
  114. if (t->debug.hbp_break[i]) {
  115. unregister_hw_breakpoint(t->debug.hbp_break[i]);
  116. t->debug.hbp_break[i] = NULL;
  117. }
  118. }
  119. for (i = 0; i < ARM_MAX_WRP; i++) {
  120. if (t->debug.hbp_watch[i]) {
  121. unregister_hw_breakpoint(t->debug.hbp_watch[i]);
  122. t->debug.hbp_watch[i] = NULL;
  123. }
  124. }
  125. }
  126. void ptrace_hw_copy_thread(struct task_struct *tsk)
  127. {
  128. memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
  129. }
  130. static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
  131. struct task_struct *tsk,
  132. unsigned long idx)
  133. {
  134. struct perf_event *bp = ERR_PTR(-EINVAL);
  135. switch (note_type) {
  136. case NT_ARM_HW_BREAK:
  137. if (idx < ARM_MAX_BRP)
  138. bp = tsk->thread.debug.hbp_break[idx];
  139. break;
  140. case NT_ARM_HW_WATCH:
  141. if (idx < ARM_MAX_WRP)
  142. bp = tsk->thread.debug.hbp_watch[idx];
  143. break;
  144. }
  145. return bp;
  146. }
  147. static int ptrace_hbp_set_event(unsigned int note_type,
  148. struct task_struct *tsk,
  149. unsigned long idx,
  150. struct perf_event *bp)
  151. {
  152. int err = -EINVAL;
  153. switch (note_type) {
  154. case NT_ARM_HW_BREAK:
  155. if (idx < ARM_MAX_BRP) {
  156. tsk->thread.debug.hbp_break[idx] = bp;
  157. err = 0;
  158. }
  159. break;
  160. case NT_ARM_HW_WATCH:
  161. if (idx < ARM_MAX_WRP) {
  162. tsk->thread.debug.hbp_watch[idx] = bp;
  163. err = 0;
  164. }
  165. break;
  166. }
  167. return err;
  168. }
  169. static struct perf_event *ptrace_hbp_create(unsigned int note_type,
  170. struct task_struct *tsk,
  171. unsigned long idx)
  172. {
  173. struct perf_event *bp;
  174. struct perf_event_attr attr;
  175. int err, type;
  176. switch (note_type) {
  177. case NT_ARM_HW_BREAK:
  178. type = HW_BREAKPOINT_X;
  179. break;
  180. case NT_ARM_HW_WATCH:
  181. type = HW_BREAKPOINT_RW;
  182. break;
  183. default:
  184. return ERR_PTR(-EINVAL);
  185. }
  186. ptrace_breakpoint_init(&attr);
  187. /*
  188. * Initialise fields to sane defaults
  189. * (i.e. values that will pass validation).
  190. */
  191. attr.bp_addr = 0;
  192. attr.bp_len = HW_BREAKPOINT_LEN_4;
  193. attr.bp_type = type;
  194. attr.disabled = 1;
  195. bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
  196. if (IS_ERR(bp))
  197. return bp;
  198. err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
  199. if (err)
  200. return ERR_PTR(err);
  201. return bp;
  202. }
  203. static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
  204. struct arch_hw_breakpoint_ctrl ctrl,
  205. struct perf_event_attr *attr)
  206. {
  207. int err, len, type;
  208. err = arch_bp_generic_fields(ctrl, &len, &type);
  209. if (err)
  210. return err;
  211. switch (note_type) {
  212. case NT_ARM_HW_BREAK:
  213. if ((type & HW_BREAKPOINT_X) != type)
  214. return -EINVAL;
  215. break;
  216. case NT_ARM_HW_WATCH:
  217. if ((type & HW_BREAKPOINT_RW) != type)
  218. return -EINVAL;
  219. break;
  220. default:
  221. return -EINVAL;
  222. }
  223. attr->bp_len = len;
  224. attr->bp_type = type;
  225. attr->disabled = !ctrl.enabled;
  226. return 0;
  227. }
  228. static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
  229. {
  230. u8 num;
  231. u32 reg = 0;
  232. switch (note_type) {
  233. case NT_ARM_HW_BREAK:
  234. num = hw_breakpoint_slots(TYPE_INST);
  235. break;
  236. case NT_ARM_HW_WATCH:
  237. num = hw_breakpoint_slots(TYPE_DATA);
  238. break;
  239. default:
  240. return -EINVAL;
  241. }
  242. reg |= debug_monitors_arch();
  243. reg <<= 8;
  244. reg |= num;
  245. *info = reg;
  246. return 0;
  247. }
  248. static int ptrace_hbp_get_ctrl(unsigned int note_type,
  249. struct task_struct *tsk,
  250. unsigned long idx,
  251. u32 *ctrl)
  252. {
  253. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  254. if (IS_ERR(bp))
  255. return PTR_ERR(bp);
  256. *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
  257. return 0;
  258. }
  259. static int ptrace_hbp_get_addr(unsigned int note_type,
  260. struct task_struct *tsk,
  261. unsigned long idx,
  262. u64 *addr)
  263. {
  264. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  265. if (IS_ERR(bp))
  266. return PTR_ERR(bp);
  267. *addr = bp ? bp->attr.bp_addr : 0;
  268. return 0;
  269. }
  270. static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
  271. struct task_struct *tsk,
  272. unsigned long idx)
  273. {
  274. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  275. if (!bp)
  276. bp = ptrace_hbp_create(note_type, tsk, idx);
  277. return bp;
  278. }
  279. static int ptrace_hbp_set_ctrl(unsigned int note_type,
  280. struct task_struct *tsk,
  281. unsigned long idx,
  282. u32 uctrl)
  283. {
  284. int err;
  285. struct perf_event *bp;
  286. struct perf_event_attr attr;
  287. struct arch_hw_breakpoint_ctrl ctrl;
  288. bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
  289. if (IS_ERR(bp)) {
  290. err = PTR_ERR(bp);
  291. return err;
  292. }
  293. attr = bp->attr;
  294. decode_ctrl_reg(uctrl, &ctrl);
  295. err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
  296. if (err)
  297. return err;
  298. return modify_user_hw_breakpoint(bp, &attr);
  299. }
  300. static int ptrace_hbp_set_addr(unsigned int note_type,
  301. struct task_struct *tsk,
  302. unsigned long idx,
  303. u64 addr)
  304. {
  305. int err;
  306. struct perf_event *bp;
  307. struct perf_event_attr attr;
  308. bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
  309. if (IS_ERR(bp)) {
  310. err = PTR_ERR(bp);
  311. return err;
  312. }
  313. attr = bp->attr;
  314. attr.bp_addr = addr;
  315. err = modify_user_hw_breakpoint(bp, &attr);
  316. return err;
  317. }
  318. #define PTRACE_HBP_ADDR_SZ sizeof(u64)
  319. #define PTRACE_HBP_CTRL_SZ sizeof(u32)
  320. #define PTRACE_HBP_REG_OFF sizeof(u32)
  321. static int hw_break_get(struct task_struct *target,
  322. const struct user_regset *regset,
  323. unsigned int pos, unsigned int count,
  324. void *kbuf, void __user *ubuf)
  325. {
  326. unsigned int note_type = regset->core_note_type;
  327. int ret, idx = 0, offset = PTRACE_HBP_REG_OFF, limit;
  328. u32 info, ctrl;
  329. u64 addr;
  330. /* Resource info */
  331. ret = ptrace_hbp_get_resource_info(note_type, &info);
  332. if (ret)
  333. return ret;
  334. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0, 4);
  335. if (ret)
  336. return ret;
  337. /* (address, ctrl) registers */
  338. limit = regset->n * regset->size;
  339. while (count && offset < limit) {
  340. ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
  341. if (ret)
  342. return ret;
  343. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &addr,
  344. offset, offset + PTRACE_HBP_ADDR_SZ);
  345. if (ret)
  346. return ret;
  347. offset += PTRACE_HBP_ADDR_SZ;
  348. ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
  349. if (ret)
  350. return ret;
  351. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &ctrl,
  352. offset, offset + PTRACE_HBP_CTRL_SZ);
  353. if (ret)
  354. return ret;
  355. offset += PTRACE_HBP_CTRL_SZ;
  356. idx++;
  357. }
  358. return 0;
  359. }
  360. static int hw_break_set(struct task_struct *target,
  361. const struct user_regset *regset,
  362. unsigned int pos, unsigned int count,
  363. const void *kbuf, const void __user *ubuf)
  364. {
  365. unsigned int note_type = regset->core_note_type;
  366. int ret, idx = 0, offset = PTRACE_HBP_REG_OFF, limit;
  367. u32 ctrl;
  368. u64 addr;
  369. /* Resource info */
  370. ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, 4);
  371. if (ret)
  372. return ret;
  373. /* (address, ctrl) registers */
  374. limit = regset->n * regset->size;
  375. while (count && offset < limit) {
  376. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
  377. offset, offset + PTRACE_HBP_ADDR_SZ);
  378. if (ret)
  379. return ret;
  380. ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
  381. if (ret)
  382. return ret;
  383. offset += PTRACE_HBP_ADDR_SZ;
  384. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
  385. offset, offset + PTRACE_HBP_CTRL_SZ);
  386. if (ret)
  387. return ret;
  388. ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
  389. if (ret)
  390. return ret;
  391. offset += PTRACE_HBP_CTRL_SZ;
  392. idx++;
  393. }
  394. return 0;
  395. }
  396. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  397. static int gpr_get(struct task_struct *target,
  398. const struct user_regset *regset,
  399. unsigned int pos, unsigned int count,
  400. void *kbuf, void __user *ubuf)
  401. {
  402. struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
  403. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
  404. }
  405. static int gpr_set(struct task_struct *target, const struct user_regset *regset,
  406. unsigned int pos, unsigned int count,
  407. const void *kbuf, const void __user *ubuf)
  408. {
  409. int ret;
  410. struct user_pt_regs newregs;
  411. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
  412. if (ret)
  413. return ret;
  414. if (!valid_user_regs(&newregs))
  415. return -EINVAL;
  416. task_pt_regs(target)->user_regs = newregs;
  417. return 0;
  418. }
  419. /*
  420. * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
  421. */
  422. static int fpr_get(struct task_struct *target, const struct user_regset *regset,
  423. unsigned int pos, unsigned int count,
  424. void *kbuf, void __user *ubuf)
  425. {
  426. struct user_fpsimd_state *uregs;
  427. uregs = &target->thread.fpsimd_state.user_fpsimd;
  428. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
  429. }
  430. static int fpr_set(struct task_struct *target, const struct user_regset *regset,
  431. unsigned int pos, unsigned int count,
  432. const void *kbuf, const void __user *ubuf)
  433. {
  434. int ret;
  435. struct user_fpsimd_state newstate;
  436. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1);
  437. if (ret)
  438. return ret;
  439. target->thread.fpsimd_state.user_fpsimd = newstate;
  440. return ret;
  441. }
  442. static int tls_get(struct task_struct *target, const struct user_regset *regset,
  443. unsigned int pos, unsigned int count,
  444. void *kbuf, void __user *ubuf)
  445. {
  446. unsigned long *tls = &target->thread.tp_value;
  447. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, tls, 0, -1);
  448. }
  449. static int tls_set(struct task_struct *target, const struct user_regset *regset,
  450. unsigned int pos, unsigned int count,
  451. const void *kbuf, const void __user *ubuf)
  452. {
  453. int ret;
  454. unsigned long tls;
  455. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
  456. if (ret)
  457. return ret;
  458. target->thread.tp_value = tls;
  459. return ret;
  460. }
  461. enum aarch64_regset {
  462. REGSET_GPR,
  463. REGSET_FPR,
  464. REGSET_TLS,
  465. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  466. REGSET_HW_BREAK,
  467. REGSET_HW_WATCH,
  468. #endif
  469. };
  470. static const struct user_regset aarch64_regsets[] = {
  471. [REGSET_GPR] = {
  472. .core_note_type = NT_PRSTATUS,
  473. .n = sizeof(struct user_pt_regs) / sizeof(u64),
  474. .size = sizeof(u64),
  475. .align = sizeof(u64),
  476. .get = gpr_get,
  477. .set = gpr_set
  478. },
  479. [REGSET_FPR] = {
  480. .core_note_type = NT_PRFPREG,
  481. .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
  482. /*
  483. * We pretend we have 32-bit registers because the fpsr and
  484. * fpcr are 32-bits wide.
  485. */
  486. .size = sizeof(u32),
  487. .align = sizeof(u32),
  488. .get = fpr_get,
  489. .set = fpr_set
  490. },
  491. [REGSET_TLS] = {
  492. .core_note_type = NT_ARM_TLS,
  493. .n = 1,
  494. .size = sizeof(void *),
  495. .align = sizeof(void *),
  496. .get = tls_get,
  497. .set = tls_set,
  498. },
  499. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  500. [REGSET_HW_BREAK] = {
  501. .core_note_type = NT_ARM_HW_BREAK,
  502. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  503. .size = sizeof(u32),
  504. .align = sizeof(u32),
  505. .get = hw_break_get,
  506. .set = hw_break_set,
  507. },
  508. [REGSET_HW_WATCH] = {
  509. .core_note_type = NT_ARM_HW_WATCH,
  510. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  511. .size = sizeof(u32),
  512. .align = sizeof(u32),
  513. .get = hw_break_get,
  514. .set = hw_break_set,
  515. },
  516. #endif
  517. };
  518. static const struct user_regset_view user_aarch64_view = {
  519. .name = "aarch64", .e_machine = EM_AARCH64,
  520. .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
  521. };
  522. #ifdef CONFIG_COMPAT
  523. #include <linux/compat.h>
  524. enum compat_regset {
  525. REGSET_COMPAT_GPR,
  526. REGSET_COMPAT_VFP,
  527. };
  528. static int compat_gpr_get(struct task_struct *target,
  529. const struct user_regset *regset,
  530. unsigned int pos, unsigned int count,
  531. void *kbuf, void __user *ubuf)
  532. {
  533. int ret = 0;
  534. unsigned int i, start, num_regs;
  535. /* Calculate the number of AArch32 registers contained in count */
  536. num_regs = count / regset->size;
  537. /* Convert pos into an register number */
  538. start = pos / regset->size;
  539. if (start + num_regs > regset->n)
  540. return -EIO;
  541. for (i = 0; i < num_regs; ++i) {
  542. unsigned int idx = start + i;
  543. void *reg;
  544. switch (idx) {
  545. case 15:
  546. reg = (void *)&task_pt_regs(target)->pc;
  547. break;
  548. case 16:
  549. reg = (void *)&task_pt_regs(target)->pstate;
  550. break;
  551. case 17:
  552. reg = (void *)&task_pt_regs(target)->orig_x0;
  553. break;
  554. default:
  555. reg = (void *)&task_pt_regs(target)->regs[idx];
  556. }
  557. ret = copy_to_user(ubuf, reg, sizeof(compat_ulong_t));
  558. if (ret)
  559. break;
  560. else
  561. ubuf += sizeof(compat_ulong_t);
  562. }
  563. return ret;
  564. }
  565. static int compat_gpr_set(struct task_struct *target,
  566. const struct user_regset *regset,
  567. unsigned int pos, unsigned int count,
  568. const void *kbuf, const void __user *ubuf)
  569. {
  570. struct pt_regs newregs;
  571. int ret = 0;
  572. unsigned int i, start, num_regs;
  573. /* Calculate the number of AArch32 registers contained in count */
  574. num_regs = count / regset->size;
  575. /* Convert pos into an register number */
  576. start = pos / regset->size;
  577. if (start + num_regs > regset->n)
  578. return -EIO;
  579. newregs = *task_pt_regs(target);
  580. for (i = 0; i < num_regs; ++i) {
  581. unsigned int idx = start + i;
  582. void *reg;
  583. switch (idx) {
  584. case 15:
  585. reg = (void *)&newregs.pc;
  586. break;
  587. case 16:
  588. reg = (void *)&newregs.pstate;
  589. break;
  590. case 17:
  591. reg = (void *)&newregs.orig_x0;
  592. break;
  593. default:
  594. reg = (void *)&newregs.regs[idx];
  595. }
  596. ret = copy_from_user(reg, ubuf, sizeof(compat_ulong_t));
  597. if (ret)
  598. goto out;
  599. else
  600. ubuf += sizeof(compat_ulong_t);
  601. }
  602. if (valid_user_regs(&newregs.user_regs))
  603. *task_pt_regs(target) = newregs;
  604. else
  605. ret = -EINVAL;
  606. out:
  607. return ret;
  608. }
  609. static int compat_vfp_get(struct task_struct *target,
  610. const struct user_regset *regset,
  611. unsigned int pos, unsigned int count,
  612. void *kbuf, void __user *ubuf)
  613. {
  614. struct user_fpsimd_state *uregs;
  615. compat_ulong_t fpscr;
  616. int ret;
  617. uregs = &target->thread.fpsimd_state.user_fpsimd;
  618. /*
  619. * The VFP registers are packed into the fpsimd_state, so they all sit
  620. * nicely together for us. We just need to create the fpscr separately.
  621. */
  622. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
  623. VFP_STATE_SIZE - sizeof(compat_ulong_t));
  624. if (count && !ret) {
  625. fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
  626. (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
  627. ret = put_user(fpscr, (compat_ulong_t *)ubuf);
  628. }
  629. return ret;
  630. }
  631. static int compat_vfp_set(struct task_struct *target,
  632. const struct user_regset *regset,
  633. unsigned int pos, unsigned int count,
  634. const void *kbuf, const void __user *ubuf)
  635. {
  636. struct user_fpsimd_state *uregs;
  637. compat_ulong_t fpscr;
  638. int ret;
  639. if (pos + count > VFP_STATE_SIZE)
  640. return -EIO;
  641. uregs = &target->thread.fpsimd_state.user_fpsimd;
  642. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
  643. VFP_STATE_SIZE - sizeof(compat_ulong_t));
  644. if (count && !ret) {
  645. ret = get_user(fpscr, (compat_ulong_t *)ubuf);
  646. uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
  647. uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
  648. }
  649. return ret;
  650. }
  651. static const struct user_regset aarch32_regsets[] = {
  652. [REGSET_COMPAT_GPR] = {
  653. .core_note_type = NT_PRSTATUS,
  654. .n = COMPAT_ELF_NGREG,
  655. .size = sizeof(compat_elf_greg_t),
  656. .align = sizeof(compat_elf_greg_t),
  657. .get = compat_gpr_get,
  658. .set = compat_gpr_set
  659. },
  660. [REGSET_COMPAT_VFP] = {
  661. .core_note_type = NT_ARM_VFP,
  662. .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
  663. .size = sizeof(compat_ulong_t),
  664. .align = sizeof(compat_ulong_t),
  665. .get = compat_vfp_get,
  666. .set = compat_vfp_set
  667. },
  668. };
  669. static const struct user_regset_view user_aarch32_view = {
  670. .name = "aarch32", .e_machine = EM_ARM,
  671. .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
  672. };
  673. int aarch32_break_trap(struct pt_regs *regs)
  674. {
  675. unsigned int instr;
  676. bool bp = false;
  677. void __user *pc = (void __user *)instruction_pointer(regs);
  678. if (compat_thumb_mode(regs)) {
  679. /* get 16-bit Thumb instruction */
  680. get_user(instr, (u16 __user *)pc);
  681. if (instr == AARCH32_BREAK_THUMB2_LO) {
  682. /* get second half of 32-bit Thumb-2 instruction */
  683. get_user(instr, (u16 __user *)(pc + 2));
  684. bp = instr == AARCH32_BREAK_THUMB2_HI;
  685. } else {
  686. bp = instr == AARCH32_BREAK_THUMB;
  687. }
  688. } else {
  689. /* 32-bit ARM instruction */
  690. get_user(instr, (u32 __user *)pc);
  691. bp = (instr & ~0xf0000000) == AARCH32_BREAK_ARM;
  692. }
  693. if (bp)
  694. return ptrace_break(regs);
  695. return 1;
  696. }
  697. static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
  698. compat_ulong_t __user *ret)
  699. {
  700. compat_ulong_t tmp;
  701. if (off & 3)
  702. return -EIO;
  703. if (off == COMPAT_PT_TEXT_ADDR)
  704. tmp = tsk->mm->start_code;
  705. else if (off == COMPAT_PT_DATA_ADDR)
  706. tmp = tsk->mm->start_data;
  707. else if (off == COMPAT_PT_TEXT_END_ADDR)
  708. tmp = tsk->mm->end_code;
  709. else if (off < sizeof(compat_elf_gregset_t))
  710. return copy_regset_to_user(tsk, &user_aarch32_view,
  711. REGSET_COMPAT_GPR, off,
  712. sizeof(compat_ulong_t), ret);
  713. else if (off >= COMPAT_USER_SZ)
  714. return -EIO;
  715. else
  716. tmp = 0;
  717. return put_user(tmp, ret);
  718. }
  719. static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
  720. compat_ulong_t val)
  721. {
  722. int ret;
  723. if (off & 3 || off >= COMPAT_USER_SZ)
  724. return -EIO;
  725. if (off >= sizeof(compat_elf_gregset_t))
  726. return 0;
  727. ret = copy_regset_from_user(tsk, &user_aarch32_view,
  728. REGSET_COMPAT_GPR, off,
  729. sizeof(compat_ulong_t),
  730. &val);
  731. return ret;
  732. }
  733. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  734. /*
  735. * Convert a virtual register number into an index for a thread_info
  736. * breakpoint array. Breakpoints are identified using positive numbers
  737. * whilst watchpoints are negative. The registers are laid out as pairs
  738. * of (address, control), each pair mapping to a unique hw_breakpoint struct.
  739. * Register 0 is reserved for describing resource information.
  740. */
  741. static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
  742. {
  743. return (abs(num) - 1) >> 1;
  744. }
  745. static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
  746. {
  747. u8 num_brps, num_wrps, debug_arch, wp_len;
  748. u32 reg = 0;
  749. num_brps = hw_breakpoint_slots(TYPE_INST);
  750. num_wrps = hw_breakpoint_slots(TYPE_DATA);
  751. debug_arch = debug_monitors_arch();
  752. wp_len = 8;
  753. reg |= debug_arch;
  754. reg <<= 8;
  755. reg |= wp_len;
  756. reg <<= 8;
  757. reg |= num_wrps;
  758. reg <<= 8;
  759. reg |= num_brps;
  760. *kdata = reg;
  761. return 0;
  762. }
  763. static int compat_ptrace_hbp_get(unsigned int note_type,
  764. struct task_struct *tsk,
  765. compat_long_t num,
  766. u32 *kdata)
  767. {
  768. u64 addr = 0;
  769. u32 ctrl = 0;
  770. int err, idx = compat_ptrace_hbp_num_to_idx(num);;
  771. if (num & 1) {
  772. err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
  773. *kdata = (u32)addr;
  774. } else {
  775. err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
  776. *kdata = ctrl;
  777. }
  778. return err;
  779. }
  780. static int compat_ptrace_hbp_set(unsigned int note_type,
  781. struct task_struct *tsk,
  782. compat_long_t num,
  783. u32 *kdata)
  784. {
  785. u64 addr;
  786. u32 ctrl;
  787. int err, idx = compat_ptrace_hbp_num_to_idx(num);
  788. if (num & 1) {
  789. addr = *kdata;
  790. err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
  791. } else {
  792. ctrl = *kdata;
  793. err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
  794. }
  795. return err;
  796. }
  797. static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
  798. compat_ulong_t __user *data)
  799. {
  800. int ret;
  801. u32 kdata;
  802. mm_segment_t old_fs = get_fs();
  803. set_fs(KERNEL_DS);
  804. /* Watchpoint */
  805. if (num < 0) {
  806. ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
  807. /* Resource info */
  808. } else if (num == 0) {
  809. ret = compat_ptrace_hbp_get_resource_info(&kdata);
  810. /* Breakpoint */
  811. } else {
  812. ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
  813. }
  814. set_fs(old_fs);
  815. if (!ret)
  816. ret = put_user(kdata, data);
  817. return ret;
  818. }
  819. static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
  820. compat_ulong_t __user *data)
  821. {
  822. int ret;
  823. u32 kdata = 0;
  824. mm_segment_t old_fs = get_fs();
  825. if (num == 0)
  826. return 0;
  827. ret = get_user(kdata, data);
  828. if (ret)
  829. return ret;
  830. set_fs(KERNEL_DS);
  831. if (num < 0)
  832. ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
  833. else
  834. ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
  835. set_fs(old_fs);
  836. return ret;
  837. }
  838. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  839. long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
  840. compat_ulong_t caddr, compat_ulong_t cdata)
  841. {
  842. unsigned long addr = caddr;
  843. unsigned long data = cdata;
  844. void __user *datap = compat_ptr(data);
  845. int ret;
  846. switch (request) {
  847. case PTRACE_PEEKUSR:
  848. ret = compat_ptrace_read_user(child, addr, datap);
  849. break;
  850. case PTRACE_POKEUSR:
  851. ret = compat_ptrace_write_user(child, addr, data);
  852. break;
  853. case COMPAT_PTRACE_GETREGS:
  854. ret = copy_regset_to_user(child,
  855. &user_aarch32_view,
  856. REGSET_COMPAT_GPR,
  857. 0, sizeof(compat_elf_gregset_t),
  858. datap);
  859. break;
  860. case COMPAT_PTRACE_SETREGS:
  861. ret = copy_regset_from_user(child,
  862. &user_aarch32_view,
  863. REGSET_COMPAT_GPR,
  864. 0, sizeof(compat_elf_gregset_t),
  865. datap);
  866. break;
  867. case COMPAT_PTRACE_GET_THREAD_AREA:
  868. ret = put_user((compat_ulong_t)child->thread.tp_value,
  869. (compat_ulong_t __user *)datap);
  870. break;
  871. case COMPAT_PTRACE_SET_SYSCALL:
  872. task_pt_regs(child)->syscallno = data;
  873. ret = 0;
  874. break;
  875. case COMPAT_PTRACE_GETVFPREGS:
  876. ret = copy_regset_to_user(child,
  877. &user_aarch32_view,
  878. REGSET_COMPAT_VFP,
  879. 0, VFP_STATE_SIZE,
  880. datap);
  881. break;
  882. case COMPAT_PTRACE_SETVFPREGS:
  883. ret = copy_regset_from_user(child,
  884. &user_aarch32_view,
  885. REGSET_COMPAT_VFP,
  886. 0, VFP_STATE_SIZE,
  887. datap);
  888. break;
  889. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  890. case COMPAT_PTRACE_GETHBPREGS:
  891. ret = compat_ptrace_gethbpregs(child, addr, datap);
  892. break;
  893. case COMPAT_PTRACE_SETHBPREGS:
  894. ret = compat_ptrace_sethbpregs(child, addr, datap);
  895. break;
  896. #endif
  897. default:
  898. ret = compat_ptrace_request(child, request, addr,
  899. data);
  900. break;
  901. }
  902. return ret;
  903. }
  904. #endif /* CONFIG_COMPAT */
  905. const struct user_regset_view *task_user_regset_view(struct task_struct *task)
  906. {
  907. #ifdef CONFIG_COMPAT
  908. if (is_compat_thread(task_thread_info(task)))
  909. return &user_aarch32_view;
  910. #endif
  911. return &user_aarch64_view;
  912. }
  913. long arch_ptrace(struct task_struct *child, long request,
  914. unsigned long addr, unsigned long data)
  915. {
  916. return ptrace_request(child, request, addr, data);
  917. }
  918. static int __init ptrace_break_init(void)
  919. {
  920. hook_debug_fault_code(DBG_ESR_EVT_BRK, arm64_break_trap, SIGTRAP,
  921. TRAP_BRKPT, "ptrace BRK handler");
  922. return 0;
  923. }
  924. core_initcall(ptrace_break_init);
  925. asmlinkage int syscall_trace(int dir, struct pt_regs *regs)
  926. {
  927. unsigned long saved_reg;
  928. if (!test_thread_flag(TIF_SYSCALL_TRACE))
  929. return regs->syscallno;
  930. if (is_compat_task()) {
  931. /* AArch32 uses ip (r12) for scratch */
  932. saved_reg = regs->regs[12];
  933. regs->regs[12] = dir;
  934. } else {
  935. /*
  936. * Save X7. X7 is used to denote syscall entry/exit:
  937. * X7 = 0 -> entry, = 1 -> exit
  938. */
  939. saved_reg = regs->regs[7];
  940. regs->regs[7] = dir;
  941. }
  942. if (dir)
  943. tracehook_report_syscall_exit(regs, 0);
  944. else if (tracehook_report_syscall_entry(regs))
  945. regs->syscallno = ~0UL;
  946. if (is_compat_task())
  947. regs->regs[12] = saved_reg;
  948. else
  949. regs->regs[7] = saved_reg;
  950. return regs->syscallno;
  951. }