i2c.c 6.3 KB

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  1. /*
  2. * linux/arch/arm/plat-omap/i2c.c
  3. *
  4. * Helper module for board specific I2C bus registration
  5. *
  6. * Copyright (C) 2007 Nokia Corporation.
  7. *
  8. * Contact: Jarkko Nikula <jhnikula@gmail.com>
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License
  12. * version 2 as published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  22. * 02110-1301 USA
  23. *
  24. */
  25. #include <linux/kernel.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/i2c.h>
  28. #include <linux/slab.h>
  29. #include <linux/err.h>
  30. #include <linux/clk.h>
  31. #include <mach/irqs.h>
  32. #include <plat/i2c.h>
  33. #include <plat/omap_device.h>
  34. #define OMAP_I2C_SIZE 0x3f
  35. #define OMAP1_I2C_BASE 0xfffb3800
  36. #define OMAP1_INT_I2C (32 + 4)
  37. static const char name[] = "omap_i2c";
  38. #define I2C_RESOURCE_BUILDER(base, irq) \
  39. { \
  40. .start = (base), \
  41. .end = (base) + OMAP_I2C_SIZE, \
  42. .flags = IORESOURCE_MEM, \
  43. }, \
  44. { \
  45. .start = (irq), \
  46. .flags = IORESOURCE_IRQ, \
  47. },
  48. static struct resource i2c_resources[][2] = {
  49. { I2C_RESOURCE_BUILDER(0, 0) },
  50. };
  51. #define I2C_DEV_BUILDER(bus_id, res, data) \
  52. { \
  53. .id = (bus_id), \
  54. .name = name, \
  55. .num_resources = ARRAY_SIZE(res), \
  56. .resource = (res), \
  57. .dev = { \
  58. .platform_data = (data), \
  59. }, \
  60. }
  61. #define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
  62. #define OMAP_I2C_MAX_CONTROLLERS 4
  63. static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
  64. static struct platform_device omap_i2c_devices[] = {
  65. I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
  66. };
  67. #define OMAP_I2C_CMDLINE_SETUP (BIT(31))
  68. static int __init omap_i2c_nr_ports(void)
  69. {
  70. int ports = 0;
  71. if (cpu_class_is_omap1())
  72. ports = 1;
  73. else if (cpu_is_omap24xx())
  74. ports = 2;
  75. else if (cpu_is_omap34xx())
  76. ports = 3;
  77. else if (cpu_is_omap44xx())
  78. ports = 4;
  79. return ports;
  80. }
  81. static inline int omap1_i2c_add_bus(int bus_id)
  82. {
  83. struct platform_device *pdev;
  84. struct omap_i2c_bus_platform_data *pdata;
  85. struct resource *res;
  86. omap1_i2c_mux_pins(bus_id);
  87. pdev = &omap_i2c_devices[bus_id - 1];
  88. res = pdev->resource;
  89. res[0].start = OMAP1_I2C_BASE;
  90. res[0].end = res[0].start + OMAP_I2C_SIZE;
  91. res[1].start = OMAP1_INT_I2C;
  92. pdata = &i2c_pdata[bus_id - 1];
  93. /* all OMAP1 have IP version 1 register set */
  94. pdata->rev = OMAP_I2C_IP_VERSION_1;
  95. /* all OMAP1 I2C are implemented like this */
  96. pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
  97. OMAP_I2C_FLAG_SIMPLE_CLOCK |
  98. OMAP_I2C_FLAG_16BIT_DATA_REG |
  99. OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
  100. /* how the cpu bus is wired up differs for 7xx only */
  101. if (cpu_is_omap7xx())
  102. pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
  103. else
  104. pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;
  105. return platform_device_register(pdev);
  106. }
  107. #ifdef CONFIG_ARCH_OMAP2PLUS
  108. static inline int omap2_i2c_add_bus(int bus_id)
  109. {
  110. int l;
  111. struct omap_hwmod *oh;
  112. struct platform_device *pdev;
  113. char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
  114. struct omap_i2c_bus_platform_data *pdata;
  115. struct omap_i2c_dev_attr *dev_attr;
  116. omap2_i2c_mux_pins(bus_id);
  117. l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
  118. WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
  119. "String buffer overflow in I2C%d device setup\n", bus_id);
  120. oh = omap_hwmod_lookup(oh_name);
  121. if (!oh) {
  122. pr_err("Could not look up %s\n", oh_name);
  123. return -EEXIST;
  124. }
  125. pdata = &i2c_pdata[bus_id - 1];
  126. /*
  127. * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
  128. * use, and functionality implementation flags, up to the OMAP I2C
  129. * driver via platform data
  130. */
  131. pdata->rev = oh->class->rev;
  132. dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
  133. pdata->flags = dev_attr->flags;
  134. pdev = omap_device_build(name, bus_id, oh, pdata,
  135. sizeof(struct omap_i2c_bus_platform_data),
  136. NULL, 0, 0);
  137. WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
  138. return PTR_RET(pdev);
  139. }
  140. #else
  141. static inline int omap2_i2c_add_bus(int bus_id)
  142. {
  143. return 0;
  144. }
  145. #endif
  146. static int __init omap_i2c_add_bus(int bus_id)
  147. {
  148. if (cpu_class_is_omap1())
  149. return omap1_i2c_add_bus(bus_id);
  150. else
  151. return omap2_i2c_add_bus(bus_id);
  152. }
  153. /**
  154. * omap_i2c_bus_setup - Process command line options for the I2C bus speed
  155. * @str: String of options
  156. *
  157. * This function allow to override the default I2C bus speed for given I2C
  158. * bus with a command line option.
  159. *
  160. * Format: i2c_bus=bus_id,clkrate (in kHz)
  161. *
  162. * Returns 1 on success, 0 otherwise.
  163. */
  164. static int __init omap_i2c_bus_setup(char *str)
  165. {
  166. int ports;
  167. int ints[3];
  168. ports = omap_i2c_nr_ports();
  169. get_options(str, 3, ints);
  170. if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
  171. return 0;
  172. i2c_pdata[ints[1] - 1].clkrate = ints[2];
  173. i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
  174. return 1;
  175. }
  176. __setup("i2c_bus=", omap_i2c_bus_setup);
  177. /*
  178. * Register busses defined in command line but that are not registered with
  179. * omap_register_i2c_bus from board initialization code.
  180. */
  181. static int __init omap_register_i2c_bus_cmdline(void)
  182. {
  183. int i, err = 0;
  184. for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
  185. if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
  186. i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
  187. err = omap_i2c_add_bus(i + 1);
  188. if (err)
  189. goto out;
  190. }
  191. out:
  192. return err;
  193. }
  194. subsys_initcall(omap_register_i2c_bus_cmdline);
  195. /**
  196. * omap_register_i2c_bus - register I2C bus with device descriptors
  197. * @bus_id: bus id counting from number 1
  198. * @clkrate: clock rate of the bus in kHz
  199. * @info: pointer into I2C device descriptor table or NULL
  200. * @len: number of descriptors in the table
  201. *
  202. * Returns 0 on success or an error code.
  203. */
  204. int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
  205. struct i2c_board_info const *info,
  206. unsigned len)
  207. {
  208. int err;
  209. BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
  210. if (info) {
  211. err = i2c_register_board_info(bus_id, info, len);
  212. if (err)
  213. return err;
  214. }
  215. if (!i2c_pdata[bus_id - 1].clkrate)
  216. i2c_pdata[bus_id - 1].clkrate = clkrate;
  217. i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
  218. return omap_i2c_add_bus(bus_id);
  219. }