msdi.c 4.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162
  1. /*
  2. * MSDI IP block reset
  3. *
  4. * Copyright (C) 2012 Texas Instruments, Inc.
  5. * Paul Walmsley
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19. * 02110-1301 USA
  20. *
  21. * XXX What about pad muxing?
  22. */
  23. #include <linux/kernel.h>
  24. #include <linux/err.h>
  25. #include <linux/platform_data/gpio-omap.h>
  26. #include <plat/omap_hwmod.h>
  27. #include <plat/omap_device.h>
  28. #include <plat/mmc.h>
  29. #include "common.h"
  30. #include "control.h"
  31. #include "mux.h"
  32. /*
  33. * MSDI_CON_OFFSET: offset in bytes of the MSDI IP block's CON register
  34. * from the IP block's base address
  35. */
  36. #define MSDI_CON_OFFSET 0x0c
  37. /* Register bitfields in the CON register */
  38. #define MSDI_CON_POW_MASK BIT(11)
  39. #define MSDI_CON_CLKD_MASK (0x3f << 0)
  40. #define MSDI_CON_CLKD_SHIFT 0
  41. /* Maximum microseconds to wait for OMAP module to softreset */
  42. #define MAX_MODULE_SOFTRESET_WAIT 10000
  43. /* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */
  44. #define MSDI_TARGET_RESET_CLKD 0x3ff
  45. /**
  46. * omap_msdi_reset - reset the MSDI IP block
  47. * @oh: struct omap_hwmod *
  48. *
  49. * The MSDI IP block on OMAP2420 has to have both the POW and CLKD
  50. * fields set inside its CON register for a reset to complete
  51. * successfully. This is not documented in the TRM. For CLKD, we use
  52. * the value that results in the lowest possible clock rate, to attempt
  53. * to avoid disturbing any cards.
  54. */
  55. int omap_msdi_reset(struct omap_hwmod *oh)
  56. {
  57. u16 v = 0;
  58. int c = 0;
  59. /* Write to the SOFTRESET bit */
  60. omap_hwmod_softreset(oh);
  61. /* Enable the MSDI core and internal clock */
  62. v |= MSDI_CON_POW_MASK;
  63. v |= MSDI_TARGET_RESET_CLKD << MSDI_CON_CLKD_SHIFT;
  64. omap_hwmod_write(v, oh, MSDI_CON_OFFSET);
  65. /* Poll on RESETDONE bit */
  66. omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
  67. & SYSS_RESETDONE_MASK),
  68. MAX_MODULE_SOFTRESET_WAIT, c);
  69. if (c == MAX_MODULE_SOFTRESET_WAIT)
  70. pr_warning("%s: %s: softreset failed (waited %d usec)\n",
  71. __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
  72. else
  73. pr_debug("%s: %s: softreset in %d usec\n", __func__,
  74. oh->name, c);
  75. /* Disable the MSDI internal clock */
  76. v &= ~MSDI_CON_CLKD_MASK;
  77. omap_hwmod_write(v, oh, MSDI_CON_OFFSET);
  78. return 0;
  79. }
  80. #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
  81. static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
  82. *mmc_controller)
  83. {
  84. if ((mmc_controller->slots[0].switch_pin > 0) && \
  85. (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
  86. omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
  87. OMAP_PIN_INPUT_PULLUP);
  88. if ((mmc_controller->slots[0].gpio_wp > 0) && \
  89. (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
  90. omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
  91. OMAP_PIN_INPUT_PULLUP);
  92. omap_mux_init_signal("sdmmc_cmd", 0);
  93. omap_mux_init_signal("sdmmc_clki", 0);
  94. omap_mux_init_signal("sdmmc_clko", 0);
  95. omap_mux_init_signal("sdmmc_dat0", 0);
  96. omap_mux_init_signal("sdmmc_dat_dir0", 0);
  97. omap_mux_init_signal("sdmmc_cmd_dir", 0);
  98. if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
  99. omap_mux_init_signal("sdmmc_dat1", 0);
  100. omap_mux_init_signal("sdmmc_dat2", 0);
  101. omap_mux_init_signal("sdmmc_dat3", 0);
  102. omap_mux_init_signal("sdmmc_dat_dir1", 0);
  103. omap_mux_init_signal("sdmmc_dat_dir2", 0);
  104. omap_mux_init_signal("sdmmc_dat_dir3", 0);
  105. }
  106. /*
  107. * Use internal loop-back in MMC/SDIO Module Input Clock
  108. * selection
  109. */
  110. if (mmc_controller->slots[0].internal_clock) {
  111. u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  112. v |= (1 << 24);
  113. omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
  114. }
  115. }
  116. void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
  117. {
  118. struct platform_device *pdev;
  119. struct omap_hwmod *oh;
  120. int id = 0;
  121. char *oh_name = "msdi1";
  122. char *dev_name = "mmci-omap";
  123. if (!mmc_data[0]) {
  124. pr_err("%s fails: Incomplete platform data\n", __func__);
  125. return;
  126. }
  127. omap242x_mmc_mux(mmc_data[0]);
  128. oh = omap_hwmod_lookup(oh_name);
  129. if (!oh) {
  130. pr_err("Could not look up %s\n", oh_name);
  131. return;
  132. }
  133. pdev = omap_device_build(dev_name, id, oh, mmc_data[0],
  134. sizeof(struct omap_mmc_platform_data), NULL, 0, 0);
  135. if (IS_ERR(pdev))
  136. WARN(1, "Can'd build omap_device for %s:%s.\n",
  137. dev_name, oh->name);
  138. }
  139. #endif