mach-imx53.c 3.4 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/clkdev.h>
  14. #include <linux/err.h>
  15. #include <linux/io.h>
  16. #include <linux/irq.h>
  17. #include <linux/of_irq.h>
  18. #include <linux/of_platform.h>
  19. #include <asm/mach/arch.h>
  20. #include <asm/mach/time.h>
  21. #include <mach/common.h>
  22. #include <mach/mx53.h>
  23. /*
  24. * Lookup table for attaching a specific name and platform_data pointer to
  25. * devices as they get created by of_platform_populate(). Ideally this table
  26. * would not exist, but the current clock implementation depends on some devices
  27. * having a specific name.
  28. */
  29. static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
  30. OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART1_BASE_ADDR, "imx21-uart.0", NULL),
  31. OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART2_BASE_ADDR, "imx21-uart.1", NULL),
  32. OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART3_BASE_ADDR, "imx21-uart.2", NULL),
  33. OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART4_BASE_ADDR, "imx21-uart.3", NULL),
  34. OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART5_BASE_ADDR, "imx21-uart.4", NULL),
  35. OF_DEV_AUXDATA("fsl,imx53-fec", MX53_FEC_BASE_ADDR, "imx25-fec.0", NULL),
  36. OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx53.0", NULL),
  37. OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx53.1", NULL),
  38. OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx53.2", NULL),
  39. OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx53.3", NULL),
  40. OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
  41. OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
  42. OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
  43. OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
  44. OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
  45. OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx-i2c.2", NULL),
  46. OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL),
  47. OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
  48. { /* sentinel */ }
  49. };
  50. static void __init imx53_qsb_init(void)
  51. {
  52. struct clk *clk;
  53. clk = clk_get_sys(NULL, "ssi_ext1");
  54. if (IS_ERR(clk)) {
  55. pr_err("failed to get clk ssi_ext1\n");
  56. return;
  57. }
  58. clk_register_clkdev(clk, NULL, "0-000a");
  59. }
  60. static void __init imx53_dt_init(void)
  61. {
  62. if (of_machine_is_compatible("fsl,imx53-qsb"))
  63. imx53_qsb_init();
  64. of_platform_populate(NULL, of_default_bus_match_table,
  65. imx53_auxdata_lookup, NULL);
  66. }
  67. static void __init imx53_timer_init(void)
  68. {
  69. mx53_clocks_init_dt();
  70. }
  71. static struct sys_timer imx53_timer = {
  72. .init = imx53_timer_init,
  73. };
  74. static const char *imx53_dt_board_compat[] __initdata = {
  75. "fsl,imx53",
  76. NULL
  77. };
  78. DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
  79. .map_io = mx53_map_io,
  80. .init_early = imx53_init_early,
  81. .init_irq = mx53_init_irq,
  82. .handle_irq = imx53_handle_irq,
  83. .timer = &imx53_timer,
  84. .init_machine = imx53_dt_init,
  85. .init_late = imx53_init_late,
  86. .dt_compat = imx53_dt_board_compat,
  87. .restart = mxc_restart,
  88. MACHINE_END