mach-imx27_visstrim_m10.c 14 KB

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  1. /*
  2. * mach-imx27_visstrim_m10.c
  3. *
  4. * Copyright 2010 Javier Martin <javier.martin@vista-silicon.com>
  5. *
  6. * Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  21. * MA 02110-1301, USA.
  22. */
  23. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  24. #include <linux/platform_device.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/i2c.h>
  27. #include <linux/i2c/pca953x.h>
  28. #include <linux/input.h>
  29. #include <linux/gpio.h>
  30. #include <linux/delay.h>
  31. #include <linux/dma-mapping.h>
  32. #include <linux/leds.h>
  33. #include <linux/platform_data/asoc-mx27vis.h>
  34. #include <media/soc_camera.h>
  35. #include <sound/tlv320aic32x4.h>
  36. #include <asm/mach-types.h>
  37. #include <asm/mach/arch.h>
  38. #include <asm/mach/time.h>
  39. #include <asm/system_info.h>
  40. #include <asm/memblock.h>
  41. #include <mach/common.h>
  42. #include <mach/hardware.h>
  43. #include <mach/iomux-mx27.h>
  44. #include "devices-imx27.h"
  45. #define TVP5150_RSTN (GPIO_PORTC + 18)
  46. #define TVP5150_PWDN (GPIO_PORTC + 19)
  47. #define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
  48. #define SDHC1_IRQ_GPIO IMX_GPIO_NR(2, 25)
  49. #define MOTHERBOARD_BIT2 (GPIO_PORTD + 31)
  50. #define MOTHERBOARD_BIT1 (GPIO_PORTD + 30)
  51. #define MOTHERBOARD_BIT0 (GPIO_PORTD + 29)
  52. #define EXPBOARD_BIT2 (GPIO_PORTD + 25)
  53. #define EXPBOARD_BIT1 (GPIO_PORTD + 27)
  54. #define EXPBOARD_BIT0 (GPIO_PORTD + 28)
  55. #define AMP_GAIN_0 (GPIO_PORTF + 9)
  56. #define AMP_GAIN_1 (GPIO_PORTF + 8)
  57. #define AMP_MUTE_SDL (GPIO_PORTE + 5)
  58. #define AMP_MUTE_SDR (GPIO_PORTF + 7)
  59. static const int visstrim_m10_pins[] __initconst = {
  60. /* UART1 (console) */
  61. PE12_PF_UART1_TXD,
  62. PE13_PF_UART1_RXD,
  63. PE14_PF_UART1_CTS,
  64. PE15_PF_UART1_RTS,
  65. /* FEC */
  66. PD0_AIN_FEC_TXD0,
  67. PD1_AIN_FEC_TXD1,
  68. PD2_AIN_FEC_TXD2,
  69. PD3_AIN_FEC_TXD3,
  70. PD4_AOUT_FEC_RX_ER,
  71. PD5_AOUT_FEC_RXD1,
  72. PD6_AOUT_FEC_RXD2,
  73. PD7_AOUT_FEC_RXD3,
  74. PD8_AF_FEC_MDIO,
  75. PD9_AIN_FEC_MDC,
  76. PD10_AOUT_FEC_CRS,
  77. PD11_AOUT_FEC_TX_CLK,
  78. PD12_AOUT_FEC_RXD0,
  79. PD13_AOUT_FEC_RX_DV,
  80. PD14_AOUT_FEC_RX_CLK,
  81. PD15_AOUT_FEC_COL,
  82. PD16_AIN_FEC_TX_ER,
  83. PF23_AIN_FEC_TX_EN,
  84. /* SSI1 */
  85. PC20_PF_SSI1_FS,
  86. PC21_PF_SSI1_RXD,
  87. PC22_PF_SSI1_TXD,
  88. PC23_PF_SSI1_CLK,
  89. /* SDHC1 */
  90. PE18_PF_SD1_D0,
  91. PE19_PF_SD1_D1,
  92. PE20_PF_SD1_D2,
  93. PE21_PF_SD1_D3,
  94. PE22_PF_SD1_CMD,
  95. PE23_PF_SD1_CLK,
  96. /* Both I2Cs */
  97. PD17_PF_I2C_DATA,
  98. PD18_PF_I2C_CLK,
  99. PC5_PF_I2C2_SDA,
  100. PC6_PF_I2C2_SCL,
  101. /* USB OTG */
  102. OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
  103. PC9_PF_USBOTG_DATA0,
  104. PC11_PF_USBOTG_DATA1,
  105. PC10_PF_USBOTG_DATA2,
  106. PC13_PF_USBOTG_DATA3,
  107. PC12_PF_USBOTG_DATA4,
  108. PC7_PF_USBOTG_DATA5,
  109. PC8_PF_USBOTG_DATA6,
  110. PE25_PF_USBOTG_DATA7,
  111. PE24_PF_USBOTG_CLK,
  112. PE2_PF_USBOTG_DIR,
  113. PE0_PF_USBOTG_NXT,
  114. PE1_PF_USBOTG_STP,
  115. PB23_PF_USB_PWR,
  116. PB24_PF_USB_OC,
  117. /* CSI */
  118. TVP5150_RSTN | GPIO_GPIO | GPIO_OUT,
  119. TVP5150_PWDN | GPIO_GPIO | GPIO_OUT,
  120. PB10_PF_CSI_D0,
  121. PB11_PF_CSI_D1,
  122. PB12_PF_CSI_D2,
  123. PB13_PF_CSI_D3,
  124. PB14_PF_CSI_D4,
  125. PB15_PF_CSI_MCLK,
  126. PB16_PF_CSI_PIXCLK,
  127. PB17_PF_CSI_D5,
  128. PB18_PF_CSI_D6,
  129. PB19_PF_CSI_D7,
  130. PB20_PF_CSI_VSYNC,
  131. PB21_PF_CSI_HSYNC,
  132. /* mother board version */
  133. MOTHERBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
  134. MOTHERBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
  135. MOTHERBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
  136. /* expansion board version */
  137. EXPBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
  138. EXPBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
  139. EXPBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
  140. /* Audio AMP control */
  141. AMP_GAIN_0 | GPIO_GPIO | GPIO_OUT,
  142. AMP_GAIN_1 | GPIO_GPIO | GPIO_OUT,
  143. AMP_MUTE_SDL | GPIO_GPIO | GPIO_OUT,
  144. AMP_MUTE_SDR | GPIO_GPIO | GPIO_OUT,
  145. };
  146. static struct gpio visstrim_m10_version_gpios[] = {
  147. { EXPBOARD_BIT0, GPIOF_IN, "exp-version-0" },
  148. { EXPBOARD_BIT1, GPIOF_IN, "exp-version-1" },
  149. { EXPBOARD_BIT2, GPIOF_IN, "exp-version-2" },
  150. { MOTHERBOARD_BIT0, GPIOF_IN, "mother-version-0" },
  151. { MOTHERBOARD_BIT1, GPIOF_IN, "mother-version-1" },
  152. { MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
  153. };
  154. static const struct gpio visstrim_m10_gpios[] __initconst = {
  155. {
  156. .gpio = TVP5150_RSTN,
  157. .flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH,
  158. .label = "tvp5150_rstn",
  159. },
  160. {
  161. .gpio = TVP5150_PWDN,
  162. .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
  163. .label = "tvp5150_pwdn",
  164. },
  165. {
  166. .gpio = OTG_PHY_CS_GPIO,
  167. .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
  168. .label = "usbotg_cs",
  169. },
  170. {
  171. .gpio = AMP_GAIN_0,
  172. .flags = GPIOF_DIR_OUT,
  173. .label = "amp-gain-0",
  174. },
  175. {
  176. .gpio = AMP_GAIN_1,
  177. .flags = GPIOF_DIR_OUT,
  178. .label = "amp-gain-1",
  179. },
  180. {
  181. .gpio = AMP_MUTE_SDL,
  182. .flags = GPIOF_DIR_OUT,
  183. .label = "amp-mute-sdl",
  184. },
  185. {
  186. .gpio = AMP_MUTE_SDR,
  187. .flags = GPIOF_DIR_OUT,
  188. .label = "amp-mute-sdr",
  189. },
  190. };
  191. /* Camera */
  192. static int visstrim_camera_power(struct device *dev, int on)
  193. {
  194. gpio_set_value(TVP5150_PWDN, on);
  195. return 0;
  196. };
  197. static int visstrim_camera_reset(struct device *dev)
  198. {
  199. gpio_set_value(TVP5150_RSTN, 0);
  200. ndelay(500);
  201. gpio_set_value(TVP5150_RSTN, 1);
  202. return 0;
  203. };
  204. static struct i2c_board_info visstrim_i2c_camera = {
  205. I2C_BOARD_INFO("tvp5150", 0x5d),
  206. };
  207. static struct soc_camera_link iclink_tvp5150 = {
  208. .bus_id = 0,
  209. .board_info = &visstrim_i2c_camera,
  210. .i2c_adapter_id = 0,
  211. .power = visstrim_camera_power,
  212. .reset = visstrim_camera_reset,
  213. };
  214. static struct mx2_camera_platform_data visstrim_camera = {
  215. .flags = MX2_CAMERA_CCIR | MX2_CAMERA_CCIR_INTERLACE |
  216. MX2_CAMERA_PCLK_SAMPLE_RISING,
  217. .clk = 100000,
  218. };
  219. static phys_addr_t mx2_camera_base __initdata;
  220. #define MX2_CAMERA_BUF_SIZE SZ_8M
  221. static void __init visstrim_camera_init(void)
  222. {
  223. struct platform_device *pdev;
  224. int dma;
  225. gpio_set_value(TVP5150_PWDN, 1);
  226. ndelay(1);
  227. gpio_set_value(TVP5150_RSTN, 0);
  228. ndelay(500);
  229. gpio_set_value(TVP5150_RSTN, 1);
  230. ndelay(200000);
  231. pdev = imx27_add_mx2_camera(&visstrim_camera);
  232. if (IS_ERR(pdev))
  233. return;
  234. dma = dma_declare_coherent_memory(&pdev->dev,
  235. mx2_camera_base, mx2_camera_base,
  236. MX2_CAMERA_BUF_SIZE,
  237. DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
  238. if (!(dma & DMA_MEMORY_MAP))
  239. return;
  240. }
  241. static void __init visstrim_reserve(void)
  242. {
  243. /* reserve 4 MiB for mx2-camera */
  244. mx2_camera_base = arm_memblock_steal(3 * MX2_CAMERA_BUF_SIZE,
  245. MX2_CAMERA_BUF_SIZE);
  246. }
  247. /* GPIOs used as events for applications */
  248. static struct gpio_keys_button visstrim_gpio_keys[] = {
  249. {
  250. .type = EV_KEY,
  251. .code = KEY_RESTART,
  252. .gpio = (GPIO_PORTC + 15),
  253. .desc = "Default config",
  254. .active_low = 0,
  255. .wakeup = 1,
  256. },
  257. {
  258. .type = EV_KEY,
  259. .code = KEY_RECORD,
  260. .gpio = (GPIO_PORTF + 14),
  261. .desc = "Record",
  262. .active_low = 0,
  263. .wakeup = 1,
  264. },
  265. {
  266. .type = EV_KEY,
  267. .code = KEY_STOP,
  268. .gpio = (GPIO_PORTF + 13),
  269. .desc = "Stop",
  270. .active_low = 0,
  271. .wakeup = 1,
  272. }
  273. };
  274. static const struct gpio_keys_platform_data
  275. visstrim_gpio_keys_platform_data __initconst = {
  276. .buttons = visstrim_gpio_keys,
  277. .nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
  278. };
  279. /* led */
  280. static const struct gpio_led visstrim_m10_leds[] __initconst = {
  281. {
  282. .name = "visstrim:ld0",
  283. .default_trigger = "nand-disk",
  284. .gpio = (GPIO_PORTC + 29),
  285. },
  286. {
  287. .name = "visstrim:ld1",
  288. .default_trigger = "nand-disk",
  289. .gpio = (GPIO_PORTC + 24),
  290. },
  291. {
  292. .name = "visstrim:ld2",
  293. .default_trigger = "nand-disk",
  294. .gpio = (GPIO_PORTC + 28),
  295. },
  296. {
  297. .name = "visstrim:ld3",
  298. .default_trigger = "nand-disk",
  299. .gpio = (GPIO_PORTC + 25),
  300. },
  301. };
  302. static const struct gpio_led_platform_data visstrim_m10_led_data __initconst = {
  303. .leds = visstrim_m10_leds,
  304. .num_leds = ARRAY_SIZE(visstrim_m10_leds),
  305. };
  306. /* Visstrim_SM10 has a microSD slot connected to sdhc1 */
  307. static int visstrim_m10_sdhc1_init(struct device *dev,
  308. irq_handler_t detect_irq, void *data)
  309. {
  310. int ret;
  311. ret = request_irq(gpio_to_irq(SDHC1_IRQ_GPIO), detect_irq,
  312. IRQF_TRIGGER_FALLING, "mmc-detect", data);
  313. return ret;
  314. }
  315. static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
  316. {
  317. free_irq(gpio_to_irq(SDHC1_IRQ_GPIO), data);
  318. }
  319. static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
  320. .init = visstrim_m10_sdhc1_init,
  321. .exit = visstrim_m10_sdhc1_exit,
  322. };
  323. /* Visstrim_SM10 NOR flash */
  324. static struct physmap_flash_data visstrim_m10_flash_data = {
  325. .width = 2,
  326. };
  327. static struct resource visstrim_m10_flash_resource = {
  328. .start = 0xc0000000,
  329. .end = 0xc0000000 + SZ_64M - 1,
  330. .flags = IORESOURCE_MEM,
  331. };
  332. static struct platform_device visstrim_m10_nor_mtd_device = {
  333. .name = "physmap-flash",
  334. .id = 0,
  335. .dev = {
  336. .platform_data = &visstrim_m10_flash_data,
  337. },
  338. .num_resources = 1,
  339. .resource = &visstrim_m10_flash_resource,
  340. };
  341. static struct platform_device *platform_devices[] __initdata = {
  342. &visstrim_m10_nor_mtd_device,
  343. };
  344. /* Visstrim_M10 uses UART0 as console */
  345. static const struct imxuart_platform_data uart_pdata __initconst = {
  346. .flags = IMXUART_HAVE_RTSCTS,
  347. };
  348. /* I2C */
  349. static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
  350. .bitrate = 100000,
  351. };
  352. static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
  353. .gpio_base = 240, /* After MX27 internal GPIOs */
  354. .invert = 0,
  355. };
  356. static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
  357. .power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN |
  358. AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE |
  359. AIC32X4_PWR_AIC32X4_LDO_ENABLE |
  360. AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 |
  361. AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
  362. .micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K |
  363. AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
  364. .swapdacs = false,
  365. };
  366. static struct i2c_board_info visstrim_m10_i2c_devices[] = {
  367. {
  368. I2C_BOARD_INFO("pca9555", 0x20),
  369. .platform_data = &visstrim_m10_pca9555_pdata,
  370. },
  371. {
  372. I2C_BOARD_INFO("tlv320aic32x4", 0x18),
  373. .platform_data = &visstrim_m10_aic32x4_pdata,
  374. },
  375. {
  376. I2C_BOARD_INFO("m41t00", 0x68),
  377. }
  378. };
  379. /* USB OTG */
  380. static int otg_phy_init(struct platform_device *pdev)
  381. {
  382. return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
  383. }
  384. static const struct mxc_usbh_platform_data
  385. visstrim_m10_usbotg_pdata __initconst = {
  386. .init = otg_phy_init,
  387. .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
  388. };
  389. /* SSI */
  390. static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
  391. .flags = IMX_SSI_DMA | IMX_SSI_SYN,
  392. };
  393. /* coda */
  394. static void __init visstrim_coda_init(void)
  395. {
  396. struct platform_device *pdev;
  397. int dma;
  398. pdev = imx27_add_coda();
  399. dma = dma_declare_coherent_memory(&pdev->dev,
  400. mx2_camera_base + MX2_CAMERA_BUF_SIZE,
  401. mx2_camera_base + MX2_CAMERA_BUF_SIZE,
  402. MX2_CAMERA_BUF_SIZE,
  403. DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
  404. if (!(dma & DMA_MEMORY_MAP))
  405. return;
  406. }
  407. /* DMA deinterlace */
  408. static struct platform_device visstrim_deinterlace = {
  409. .name = "m2m-deinterlace",
  410. .id = 0,
  411. };
  412. static void __init visstrim_deinterlace_init(void)
  413. {
  414. int ret = -ENOMEM;
  415. struct platform_device *pdev = &visstrim_deinterlace;
  416. int dma;
  417. ret = platform_device_register(pdev);
  418. dma = dma_declare_coherent_memory(&pdev->dev,
  419. mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
  420. mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
  421. MX2_CAMERA_BUF_SIZE,
  422. DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
  423. if (!(dma & DMA_MEMORY_MAP))
  424. return;
  425. }
  426. /* Audio */
  427. static const struct snd_mx27vis_platform_data snd_mx27vis_pdata __initconst = {
  428. .amp_gain0_gpio = AMP_GAIN_0,
  429. .amp_gain1_gpio = AMP_GAIN_1,
  430. .amp_mutel_gpio = AMP_MUTE_SDL,
  431. .amp_muter_gpio = AMP_MUTE_SDR,
  432. };
  433. static void __init visstrim_m10_revision(void)
  434. {
  435. int exp_version = 0;
  436. int mo_version = 0;
  437. int ret;
  438. ret = gpio_request_array(visstrim_m10_version_gpios,
  439. ARRAY_SIZE(visstrim_m10_version_gpios));
  440. if (ret) {
  441. pr_err("Failed to request version gpios");
  442. return;
  443. }
  444. /* Get expansion board version (negative logic) */
  445. exp_version |= !gpio_get_value(EXPBOARD_BIT2) << 2;
  446. exp_version |= !gpio_get_value(EXPBOARD_BIT1) << 1;
  447. exp_version |= !gpio_get_value(EXPBOARD_BIT0);
  448. /* Get mother board version (negative logic) */
  449. mo_version |= !gpio_get_value(MOTHERBOARD_BIT2) << 2;
  450. mo_version |= !gpio_get_value(MOTHERBOARD_BIT1) << 1;
  451. mo_version |= !gpio_get_value(MOTHERBOARD_BIT0);
  452. system_rev = 0x27000;
  453. system_rev |= (mo_version << 4);
  454. system_rev |= exp_version;
  455. }
  456. static void __init visstrim_m10_board_init(void)
  457. {
  458. int ret;
  459. imx27_soc_init();
  460. visstrim_m10_revision();
  461. ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
  462. ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
  463. if (ret)
  464. pr_err("Failed to setup pins (%d)\n", ret);
  465. ret = gpio_request_array(visstrim_m10_gpios,
  466. ARRAY_SIZE(visstrim_m10_gpios));
  467. if (ret)
  468. pr_err("Failed to request gpios (%d)\n", ret);
  469. imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
  470. imx27_add_imx_uart0(&uart_pdata);
  471. imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
  472. imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
  473. i2c_register_board_info(0, visstrim_m10_i2c_devices,
  474. ARRAY_SIZE(visstrim_m10_i2c_devices));
  475. imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
  476. imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
  477. imx27_add_fec(NULL);
  478. imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
  479. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  480. imx_add_platform_device("mx27vis", 0, NULL, 0, &snd_mx27vis_pdata,
  481. sizeof(snd_mx27vis_pdata));
  482. platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0,
  483. &iclink_tvp5150, sizeof(iclink_tvp5150));
  484. gpio_led_register_device(0, &visstrim_m10_led_data);
  485. visstrim_deinterlace_init();
  486. visstrim_camera_init();
  487. visstrim_coda_init();
  488. }
  489. static void __init visstrim_m10_timer_init(void)
  490. {
  491. mx27_clocks_init((unsigned long)25000000);
  492. }
  493. static struct sys_timer visstrim_m10_timer = {
  494. .init = visstrim_m10_timer_init,
  495. };
  496. MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
  497. .atag_offset = 0x100,
  498. .reserve = visstrim_reserve,
  499. .map_io = mx27_map_io,
  500. .init_early = imx27_init_early,
  501. .init_irq = mx27_init_irq,
  502. .handle_irq = imx27_handle_irq,
  503. .timer = &visstrim_m10_timer,
  504. .init_machine = visstrim_m10_board_init,
  505. .restart = mxc_restart,
  506. MACHINE_END