highbank.c 5.5 KB

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  1. /*
  2. * Copyright 2010-2011 Calxeda, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program. If not, see <http://www.gnu.org/licenses/>.
  15. */
  16. #include <linux/clk.h>
  17. #include <linux/clkdev.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/io.h>
  20. #include <linux/irq.h>
  21. #include <linux/irqdomain.h>
  22. #include <linux/of.h>
  23. #include <linux/of_irq.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/of_address.h>
  26. #include <linux/smp.h>
  27. #include <linux/amba/bus.h>
  28. #include <asm/cacheflush.h>
  29. #include <asm/smp_plat.h>
  30. #include <asm/smp_scu.h>
  31. #include <asm/smp_twd.h>
  32. #include <asm/hardware/arm_timer.h>
  33. #include <asm/hardware/timer-sp.h>
  34. #include <asm/hardware/gic.h>
  35. #include <asm/hardware/cache-l2x0.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/map.h>
  38. #include <asm/mach/time.h>
  39. #include "core.h"
  40. #include "sysregs.h"
  41. void __iomem *sregs_base;
  42. #define HB_SCU_VIRT_BASE 0xfee00000
  43. void __iomem *scu_base_addr = ((void __iomem *)(HB_SCU_VIRT_BASE));
  44. static struct map_desc scu_io_desc __initdata = {
  45. .virtual = HB_SCU_VIRT_BASE,
  46. .pfn = 0, /* run-time */
  47. .length = SZ_4K,
  48. .type = MT_DEVICE,
  49. };
  50. static void __init highbank_scu_map_io(void)
  51. {
  52. unsigned long base;
  53. /* Get SCU base */
  54. asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
  55. scu_io_desc.pfn = __phys_to_pfn(base);
  56. iotable_init(&scu_io_desc, 1);
  57. }
  58. static void __init highbank_map_io(void)
  59. {
  60. highbank_scu_map_io();
  61. highbank_lluart_map_io();
  62. }
  63. #define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu)))
  64. #define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
  65. void highbank_set_cpu_jump(int cpu, void *jump_addr)
  66. {
  67. cpu = cpu_logical_map(cpu);
  68. writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
  69. __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
  70. outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
  71. HB_JUMP_TABLE_PHYS(cpu) + 15);
  72. }
  73. const static struct of_device_id irq_match[] = {
  74. { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
  75. {}
  76. };
  77. #ifdef CONFIG_CACHE_L2X0
  78. static void highbank_l2x0_disable(void)
  79. {
  80. /* Disable PL310 L2 Cache controller */
  81. highbank_smc1(0x102, 0x0);
  82. }
  83. #endif
  84. static void __init highbank_init_irq(void)
  85. {
  86. of_irq_init(irq_match);
  87. #ifdef CONFIG_CACHE_L2X0
  88. /* Enable PL310 L2 Cache controller */
  89. highbank_smc1(0x102, 0x1);
  90. l2x0_of_init(0, ~0UL);
  91. outer_cache.disable = highbank_l2x0_disable;
  92. #endif
  93. }
  94. static struct clk_lookup lookup = {
  95. .dev_id = "sp804",
  96. .con_id = NULL,
  97. };
  98. static void __init highbank_timer_init(void)
  99. {
  100. int irq;
  101. struct device_node *np;
  102. void __iomem *timer_base;
  103. /* Map system registers */
  104. np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
  105. sregs_base = of_iomap(np, 0);
  106. WARN_ON(!sregs_base);
  107. np = of_find_compatible_node(NULL, NULL, "arm,sp804");
  108. timer_base = of_iomap(np, 0);
  109. WARN_ON(!timer_base);
  110. irq = irq_of_parse_and_map(np, 0);
  111. highbank_clocks_init();
  112. lookup.clk = of_clk_get(np, 0);
  113. clkdev_add(&lookup);
  114. sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1");
  115. sp804_clockevents_init(timer_base, irq, "timer0");
  116. twd_local_timer_of_register();
  117. }
  118. static struct sys_timer highbank_timer = {
  119. .init = highbank_timer_init,
  120. };
  121. static void highbank_power_off(void)
  122. {
  123. hignbank_set_pwr_shutdown();
  124. scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
  125. while (1)
  126. cpu_do_idle();
  127. }
  128. static int highbank_platform_notifier(struct notifier_block *nb,
  129. unsigned long event, void *__dev)
  130. {
  131. struct resource *res;
  132. int reg = -1;
  133. struct device *dev = __dev;
  134. if (event != BUS_NOTIFY_ADD_DEVICE)
  135. return NOTIFY_DONE;
  136. if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci"))
  137. reg = 0xc;
  138. else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci"))
  139. reg = 0x18;
  140. else if (of_device_is_compatible(dev->of_node, "arm,pl330"))
  141. reg = 0x20;
  142. else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) {
  143. res = platform_get_resource(to_platform_device(dev),
  144. IORESOURCE_MEM, 0);
  145. if (res) {
  146. if (res->start == 0xfff50000)
  147. reg = 0;
  148. else if (res->start == 0xfff51000)
  149. reg = 4;
  150. }
  151. }
  152. if (reg < 0)
  153. return NOTIFY_DONE;
  154. if (of_property_read_bool(dev->of_node, "dma-coherent")) {
  155. writel(0xff31, sregs_base + reg);
  156. set_dma_ops(dev, &arm_coherent_dma_ops);
  157. } else
  158. writel(0, sregs_base + reg);
  159. return NOTIFY_OK;
  160. }
  161. static struct notifier_block highbank_amba_nb = {
  162. .notifier_call = highbank_platform_notifier,
  163. };
  164. static struct notifier_block highbank_platform_nb = {
  165. .notifier_call = highbank_platform_notifier,
  166. };
  167. static void __init highbank_init(void)
  168. {
  169. pm_power_off = highbank_power_off;
  170. highbank_pm_init();
  171. bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
  172. bus_register_notifier(&amba_bustype, &highbank_amba_nb);
  173. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  174. }
  175. static const char *highbank_match[] __initconst = {
  176. "calxeda,highbank",
  177. NULL,
  178. };
  179. DT_MACHINE_START(HIGHBANK, "Highbank")
  180. .smp = smp_ops(highbank_smp_ops),
  181. .map_io = highbank_map_io,
  182. .init_irq = highbank_init_irq,
  183. .timer = &highbank_timer,
  184. .handle_irq = gic_handle_irq,
  185. .init_machine = highbank_init,
  186. .dt_compat = highbank_match,
  187. .restart = highbank_restart,
  188. MACHINE_END