imx23.dtsi 11 KB

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  1. /*
  2. * Copyright 2012 Freescale Semiconductor, Inc.
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. interrupt-parent = <&icoll>;
  14. aliases {
  15. gpio0 = &gpio0;
  16. gpio1 = &gpio1;
  17. gpio2 = &gpio2;
  18. serial0 = &auart0;
  19. serial1 = &auart1;
  20. };
  21. cpus {
  22. cpu@0 {
  23. compatible = "arm,arm926ejs";
  24. };
  25. };
  26. apb@80000000 {
  27. compatible = "simple-bus";
  28. #address-cells = <1>;
  29. #size-cells = <1>;
  30. reg = <0x80000000 0x80000>;
  31. ranges;
  32. apbh@80000000 {
  33. compatible = "simple-bus";
  34. #address-cells = <1>;
  35. #size-cells = <1>;
  36. reg = <0x80000000 0x40000>;
  37. ranges;
  38. icoll: interrupt-controller@80000000 {
  39. compatible = "fsl,imx23-icoll", "fsl,icoll";
  40. interrupt-controller;
  41. #interrupt-cells = <1>;
  42. reg = <0x80000000 0x2000>;
  43. };
  44. dma-apbh@80004000 {
  45. compatible = "fsl,imx23-dma-apbh";
  46. reg = <0x80004000 0x2000>;
  47. clocks = <&clks 15>;
  48. };
  49. ecc@80008000 {
  50. reg = <0x80008000 0x2000>;
  51. status = "disabled";
  52. };
  53. gpmi-nand@8000c000 {
  54. compatible = "fsl,imx23-gpmi-nand";
  55. #address-cells = <1>;
  56. #size-cells = <1>;
  57. reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
  58. reg-names = "gpmi-nand", "bch";
  59. interrupts = <13>, <56>;
  60. interrupt-names = "gpmi-dma", "bch";
  61. clocks = <&clks 34>;
  62. fsl,gpmi-dma-channel = <4>;
  63. status = "disabled";
  64. };
  65. ssp0: ssp@80010000 {
  66. reg = <0x80010000 0x2000>;
  67. interrupts = <15 14>;
  68. clocks = <&clks 33>;
  69. fsl,ssp-dma-channel = <1>;
  70. status = "disabled";
  71. };
  72. etm@80014000 {
  73. reg = <0x80014000 0x2000>;
  74. status = "disabled";
  75. };
  76. pinctrl@80018000 {
  77. #address-cells = <1>;
  78. #size-cells = <0>;
  79. compatible = "fsl,imx23-pinctrl", "simple-bus";
  80. reg = <0x80018000 0x2000>;
  81. gpio0: gpio@0 {
  82. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  83. interrupts = <16>;
  84. gpio-controller;
  85. #gpio-cells = <2>;
  86. interrupt-controller;
  87. #interrupt-cells = <2>;
  88. };
  89. gpio1: gpio@1 {
  90. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  91. interrupts = <17>;
  92. gpio-controller;
  93. #gpio-cells = <2>;
  94. interrupt-controller;
  95. #interrupt-cells = <2>;
  96. };
  97. gpio2: gpio@2 {
  98. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  99. interrupts = <18>;
  100. gpio-controller;
  101. #gpio-cells = <2>;
  102. interrupt-controller;
  103. #interrupt-cells = <2>;
  104. };
  105. duart_pins_a: duart@0 {
  106. reg = <0>;
  107. fsl,pinmux-ids = <
  108. 0x11a2 /* MX23_PAD_PWM0__DUART_RX */
  109. 0x11b2 /* MX23_PAD_PWM1__DUART_TX */
  110. >;
  111. fsl,drive-strength = <0>;
  112. fsl,voltage = <1>;
  113. fsl,pull-up = <0>;
  114. };
  115. auart0_pins_a: auart0@0 {
  116. reg = <0>;
  117. fsl,pinmux-ids = <
  118. 0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
  119. 0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
  120. 0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
  121. 0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
  122. >;
  123. fsl,drive-strength = <0>;
  124. fsl,voltage = <1>;
  125. fsl,pull-up = <0>;
  126. };
  127. auart0_2pins_a: auart0-2pins@0 {
  128. reg = <0>;
  129. fsl,pinmux-ids = <
  130. 0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */
  131. 0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */
  132. >;
  133. fsl,drive-strength = <0>;
  134. fsl,voltage = <1>;
  135. fsl,pull-up = <0>;
  136. };
  137. gpmi_pins_a: gpmi-nand@0 {
  138. reg = <0>;
  139. fsl,pinmux-ids = <
  140. 0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */
  141. 0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */
  142. 0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */
  143. 0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */
  144. 0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */
  145. 0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */
  146. 0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */
  147. 0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */
  148. 0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */
  149. 0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */
  150. 0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */
  151. 0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */
  152. 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
  153. 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
  154. 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
  155. 0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */
  156. 0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */
  157. >;
  158. fsl,drive-strength = <0>;
  159. fsl,voltage = <1>;
  160. fsl,pull-up = <0>;
  161. };
  162. gpmi_pins_fixup: gpmi-pins-fixup {
  163. fsl,pinmux-ids = <
  164. 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
  165. 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
  166. 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
  167. >;
  168. fsl,drive-strength = <2>;
  169. };
  170. mmc0_4bit_pins_a: mmc0-4bit@0 {
  171. reg = <0>;
  172. fsl,pinmux-ids = <
  173. 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
  174. 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
  175. 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
  176. 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
  177. 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
  178. 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
  179. >;
  180. fsl,drive-strength = <1>;
  181. fsl,voltage = <1>;
  182. fsl,pull-up = <1>;
  183. };
  184. mmc0_8bit_pins_a: mmc0-8bit@0 {
  185. reg = <0>;
  186. fsl,pinmux-ids = <
  187. 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
  188. 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
  189. 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
  190. 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
  191. 0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
  192. 0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
  193. 0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
  194. 0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
  195. 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
  196. 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
  197. 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
  198. >;
  199. fsl,drive-strength = <1>;
  200. fsl,voltage = <1>;
  201. fsl,pull-up = <1>;
  202. };
  203. mmc0_pins_fixup: mmc0-pins-fixup {
  204. fsl,pinmux-ids = <
  205. 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
  206. 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
  207. >;
  208. fsl,pull-up = <0>;
  209. };
  210. pwm2_pins_a: pwm2@0 {
  211. reg = <0>;
  212. fsl,pinmux-ids = <
  213. 0x11c0 /* MX23_PAD_PWM2__PWM2 */
  214. >;
  215. fsl,drive-strength = <0>;
  216. fsl,voltage = <1>;
  217. fsl,pull-up = <0>;
  218. };
  219. lcdif_24bit_pins_a: lcdif-24bit@0 {
  220. reg = <0>;
  221. fsl,pinmux-ids = <
  222. 0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */
  223. 0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */
  224. 0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */
  225. 0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */
  226. 0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */
  227. 0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */
  228. 0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */
  229. 0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */
  230. 0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */
  231. 0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */
  232. 0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */
  233. 0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */
  234. 0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */
  235. 0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */
  236. 0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */
  237. 0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */
  238. 0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */
  239. 0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */
  240. 0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */
  241. 0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */
  242. 0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */
  243. 0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */
  244. 0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */
  245. 0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */
  246. 0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */
  247. 0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */
  248. 0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */
  249. 0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */
  250. >;
  251. fsl,drive-strength = <0>;
  252. fsl,voltage = <1>;
  253. fsl,pull-up = <0>;
  254. };
  255. };
  256. digctl@8001c000 {
  257. reg = <0x8001c000 2000>;
  258. status = "disabled";
  259. };
  260. emi@80020000 {
  261. reg = <0x80020000 0x2000>;
  262. status = "disabled";
  263. };
  264. dma-apbx@80024000 {
  265. compatible = "fsl,imx23-dma-apbx";
  266. reg = <0x80024000 0x2000>;
  267. clocks = <&clks 16>;
  268. };
  269. dcp@80028000 {
  270. reg = <0x80028000 0x2000>;
  271. status = "disabled";
  272. };
  273. pxp@8002a000 {
  274. reg = <0x8002a000 0x2000>;
  275. status = "disabled";
  276. };
  277. ocotp@8002c000 {
  278. reg = <0x8002c000 0x2000>;
  279. status = "disabled";
  280. };
  281. axi-ahb@8002e000 {
  282. reg = <0x8002e000 0x2000>;
  283. status = "disabled";
  284. };
  285. lcdif@80030000 {
  286. compatible = "fsl,imx23-lcdif";
  287. reg = <0x80030000 2000>;
  288. interrupts = <46 45>;
  289. clocks = <&clks 38>;
  290. status = "disabled";
  291. };
  292. ssp1: ssp@80034000 {
  293. reg = <0x80034000 0x2000>;
  294. interrupts = <2 20>;
  295. clocks = <&clks 33>;
  296. fsl,ssp-dma-channel = <2>;
  297. status = "disabled";
  298. };
  299. tvenc@80038000 {
  300. reg = <0x80038000 0x2000>;
  301. status = "disabled";
  302. };
  303. };
  304. apbx@80040000 {
  305. compatible = "simple-bus";
  306. #address-cells = <1>;
  307. #size-cells = <1>;
  308. reg = <0x80040000 0x40000>;
  309. ranges;
  310. clks: clkctrl@80040000 {
  311. compatible = "fsl,imx23-clkctrl";
  312. reg = <0x80040000 0x2000>;
  313. #clock-cells = <1>;
  314. };
  315. saif0: saif@80042000 {
  316. reg = <0x80042000 0x2000>;
  317. status = "disabled";
  318. };
  319. power@80044000 {
  320. reg = <0x80044000 0x2000>;
  321. status = "disabled";
  322. };
  323. saif1: saif@80046000 {
  324. reg = <0x80046000 0x2000>;
  325. status = "disabled";
  326. };
  327. audio-out@80048000 {
  328. reg = <0x80048000 0x2000>;
  329. status = "disabled";
  330. };
  331. audio-in@8004c000 {
  332. reg = <0x8004c000 0x2000>;
  333. status = "disabled";
  334. };
  335. lradc@80050000 {
  336. reg = <0x80050000 0x2000>;
  337. status = "disabled";
  338. };
  339. spdif@80054000 {
  340. reg = <0x80054000 2000>;
  341. status = "disabled";
  342. };
  343. i2c@80058000 {
  344. reg = <0x80058000 0x2000>;
  345. status = "disabled";
  346. };
  347. rtc@8005c000 {
  348. compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
  349. reg = <0x8005c000 0x2000>;
  350. interrupts = <22>;
  351. };
  352. pwm: pwm@80064000 {
  353. compatible = "fsl,imx23-pwm";
  354. reg = <0x80064000 0x2000>;
  355. clocks = <&clks 30>;
  356. #pwm-cells = <2>;
  357. fsl,pwm-number = <5>;
  358. status = "disabled";
  359. };
  360. timrot@80068000 {
  361. compatible = "fsl,imx23-timrot", "fsl,timrot";
  362. reg = <0x80068000 0x2000>;
  363. interrupts = <28 29 30 31>;
  364. };
  365. auart0: serial@8006c000 {
  366. compatible = "fsl,imx23-auart";
  367. reg = <0x8006c000 0x2000>;
  368. interrupts = <24 25 23>;
  369. clocks = <&clks 32>;
  370. status = "disabled";
  371. };
  372. auart1: serial@8006e000 {
  373. compatible = "fsl,imx23-auart";
  374. reg = <0x8006e000 0x2000>;
  375. interrupts = <59 60 58>;
  376. clocks = <&clks 32>;
  377. status = "disabled";
  378. };
  379. duart: serial@80070000 {
  380. compatible = "arm,pl011", "arm,primecell";
  381. reg = <0x80070000 0x2000>;
  382. interrupts = <0>;
  383. clocks = <&clks 32>, <&clks 16>;
  384. clock-names = "uart", "apb_pclk";
  385. status = "disabled";
  386. };
  387. usbphy0: usbphy@8007c000 {
  388. compatible = "fsl,imx23-usbphy";
  389. reg = <0x8007c000 0x2000>;
  390. clocks = <&clks 41>;
  391. status = "disabled";
  392. };
  393. };
  394. };
  395. ahb@80080000 {
  396. compatible = "simple-bus";
  397. #address-cells = <1>;
  398. #size-cells = <1>;
  399. reg = <0x80080000 0x80000>;
  400. ranges;
  401. usb0: usb@80080000 {
  402. compatible = "fsl,imx23-usb", "fsl,imx27-usb";
  403. reg = <0x80080000 0x40000>;
  404. interrupts = <11>;
  405. fsl,usbphy = <&usbphy0>;
  406. clocks = <&clks 40>;
  407. status = "disabled";
  408. };
  409. };
  410. };