exynos5250.dtsi 11 KB

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  1. /*
  2. * SAMSUNG EXYNOS5250 SoC device tree source
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
  8. * EXYNOS5250 based board files can include this file and provide
  9. * values for board specfic bindings.
  10. *
  11. * Note: This file does not include device nodes for all the controllers in
  12. * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
  13. * additional nodes can be added to this file.
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. /include/ "skeleton.dtsi"
  20. / {
  21. compatible = "samsung,exynos5250";
  22. interrupt-parent = <&gic>;
  23. aliases {
  24. spi0 = &spi_0;
  25. spi1 = &spi_1;
  26. spi2 = &spi_2;
  27. gsc0 = &gsc_0;
  28. gsc1 = &gsc_1;
  29. gsc2 = &gsc_2;
  30. gsc3 = &gsc_3;
  31. };
  32. gic:interrupt-controller@10481000 {
  33. compatible = "arm,cortex-a9-gic";
  34. #interrupt-cells = <3>;
  35. interrupt-controller;
  36. reg = <0x10481000 0x1000>, <0x10482000 0x2000>;
  37. };
  38. combiner:interrupt-controller@10440000 {
  39. compatible = "samsung,exynos4210-combiner";
  40. #interrupt-cells = <2>;
  41. interrupt-controller;
  42. samsung,combiner-nr = <32>;
  43. reg = <0x10440000 0x1000>;
  44. interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
  45. <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
  46. <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
  47. <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
  48. <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  49. <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
  50. <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
  51. <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
  52. };
  53. watchdog {
  54. compatible = "samsung,s3c2410-wdt";
  55. reg = <0x101D0000 0x100>;
  56. interrupts = <0 42 0>;
  57. };
  58. rtc {
  59. compatible = "samsung,s3c6410-rtc";
  60. reg = <0x101E0000 0x100>;
  61. interrupts = <0 43 0>, <0 44 0>;
  62. };
  63. serial@12C00000 {
  64. compatible = "samsung,exynos4210-uart";
  65. reg = <0x12C00000 0x100>;
  66. interrupts = <0 51 0>;
  67. };
  68. serial@12C10000 {
  69. compatible = "samsung,exynos4210-uart";
  70. reg = <0x12C10000 0x100>;
  71. interrupts = <0 52 0>;
  72. };
  73. serial@12C20000 {
  74. compatible = "samsung,exynos4210-uart";
  75. reg = <0x12C20000 0x100>;
  76. interrupts = <0 53 0>;
  77. };
  78. serial@12C30000 {
  79. compatible = "samsung,exynos4210-uart";
  80. reg = <0x12C30000 0x100>;
  81. interrupts = <0 54 0>;
  82. };
  83. i2c@12C60000 {
  84. compatible = "samsung,s3c2440-i2c";
  85. reg = <0x12C60000 0x100>;
  86. interrupts = <0 56 0>;
  87. #address-cells = <1>;
  88. #size-cells = <0>;
  89. };
  90. i2c@12C70000 {
  91. compatible = "samsung,s3c2440-i2c";
  92. reg = <0x12C70000 0x100>;
  93. interrupts = <0 57 0>;
  94. #address-cells = <1>;
  95. #size-cells = <0>;
  96. };
  97. i2c@12C80000 {
  98. compatible = "samsung,s3c2440-i2c";
  99. reg = <0x12C80000 0x100>;
  100. interrupts = <0 58 0>;
  101. #address-cells = <1>;
  102. #size-cells = <0>;
  103. };
  104. i2c@12C90000 {
  105. compatible = "samsung,s3c2440-i2c";
  106. reg = <0x12C90000 0x100>;
  107. interrupts = <0 59 0>;
  108. #address-cells = <1>;
  109. #size-cells = <0>;
  110. };
  111. i2c@12CA0000 {
  112. compatible = "samsung,s3c2440-i2c";
  113. reg = <0x12CA0000 0x100>;
  114. interrupts = <0 60 0>;
  115. #address-cells = <1>;
  116. #size-cells = <0>;
  117. };
  118. i2c@12CB0000 {
  119. compatible = "samsung,s3c2440-i2c";
  120. reg = <0x12CB0000 0x100>;
  121. interrupts = <0 61 0>;
  122. #address-cells = <1>;
  123. #size-cells = <0>;
  124. };
  125. i2c@12CC0000 {
  126. compatible = "samsung,s3c2440-i2c";
  127. reg = <0x12CC0000 0x100>;
  128. interrupts = <0 62 0>;
  129. #address-cells = <1>;
  130. #size-cells = <0>;
  131. };
  132. i2c@12CD0000 {
  133. compatible = "samsung,s3c2440-i2c";
  134. reg = <0x12CD0000 0x100>;
  135. interrupts = <0 63 0>;
  136. #address-cells = <1>;
  137. #size-cells = <0>;
  138. };
  139. spi_0: spi@12d20000 {
  140. compatible = "samsung,exynos4210-spi";
  141. reg = <0x12d20000 0x100>;
  142. interrupts = <0 66 0>;
  143. tx-dma-channel = <&pdma0 5>; /* preliminary */
  144. rx-dma-channel = <&pdma0 4>; /* preliminary */
  145. #address-cells = <1>;
  146. #size-cells = <0>;
  147. };
  148. spi_1: spi@12d30000 {
  149. compatible = "samsung,exynos4210-spi";
  150. reg = <0x12d30000 0x100>;
  151. interrupts = <0 67 0>;
  152. tx-dma-channel = <&pdma1 5>; /* preliminary */
  153. rx-dma-channel = <&pdma1 4>; /* preliminary */
  154. #address-cells = <1>;
  155. #size-cells = <0>;
  156. };
  157. spi_2: spi@12d40000 {
  158. compatible = "samsung,exynos4210-spi";
  159. reg = <0x12d40000 0x100>;
  160. interrupts = <0 68 0>;
  161. tx-dma-channel = <&pdma0 7>; /* preliminary */
  162. rx-dma-channel = <&pdma0 6>; /* preliminary */
  163. #address-cells = <1>;
  164. #size-cells = <0>;
  165. };
  166. dwmmc0@12200000 {
  167. compatible = "samsung,exynos5250-dw-mshc";
  168. reg = <0x12200000 0x1000>;
  169. interrupts = <0 75 0>;
  170. #address-cells = <1>;
  171. #size-cells = <0>;
  172. };
  173. dwmmc1@12210000 {
  174. compatible = "samsung,exynos5250-dw-mshc";
  175. reg = <0x12210000 0x1000>;
  176. interrupts = <0 76 0>;
  177. #address-cells = <1>;
  178. #size-cells = <0>;
  179. };
  180. dwmmc2@12220000 {
  181. compatible = "samsung,exynos5250-dw-mshc";
  182. reg = <0x12220000 0x1000>;
  183. interrupts = <0 77 0>;
  184. #address-cells = <1>;
  185. #size-cells = <0>;
  186. };
  187. dwmmc3@12230000 {
  188. compatible = "samsung,exynos5250-dw-mshc";
  189. reg = <0x12230000 0x1000>;
  190. interrupts = <0 78 0>;
  191. #address-cells = <1>;
  192. #size-cells = <0>;
  193. };
  194. amba {
  195. #address-cells = <1>;
  196. #size-cells = <1>;
  197. compatible = "arm,amba-bus";
  198. interrupt-parent = <&gic>;
  199. ranges;
  200. pdma0: pdma@121A0000 {
  201. compatible = "arm,pl330", "arm,primecell";
  202. reg = <0x121A0000 0x1000>;
  203. interrupts = <0 34 0>;
  204. };
  205. pdma1: pdma@121B0000 {
  206. compatible = "arm,pl330", "arm,primecell";
  207. reg = <0x121B0000 0x1000>;
  208. interrupts = <0 35 0>;
  209. };
  210. mdma0: mdma@10800000 {
  211. compatible = "arm,pl330", "arm,primecell";
  212. reg = <0x10800000 0x1000>;
  213. interrupts = <0 33 0>;
  214. };
  215. mdma1: mdma@11C10000 {
  216. compatible = "arm,pl330", "arm,primecell";
  217. reg = <0x11C10000 0x1000>;
  218. interrupts = <0 124 0>;
  219. };
  220. };
  221. gpio-controllers {
  222. #address-cells = <1>;
  223. #size-cells = <1>;
  224. gpio-controller;
  225. ranges;
  226. gpa0: gpio-controller@11400000 {
  227. compatible = "samsung,exynos4-gpio";
  228. reg = <0x11400000 0x20>;
  229. #gpio-cells = <4>;
  230. };
  231. gpa1: gpio-controller@11400020 {
  232. compatible = "samsung,exynos4-gpio";
  233. reg = <0x11400020 0x20>;
  234. #gpio-cells = <4>;
  235. };
  236. gpa2: gpio-controller@11400040 {
  237. compatible = "samsung,exynos4-gpio";
  238. reg = <0x11400040 0x20>;
  239. #gpio-cells = <4>;
  240. };
  241. gpb0: gpio-controller@11400060 {
  242. compatible = "samsung,exynos4-gpio";
  243. reg = <0x11400060 0x20>;
  244. #gpio-cells = <4>;
  245. };
  246. gpb1: gpio-controller@11400080 {
  247. compatible = "samsung,exynos4-gpio";
  248. reg = <0x11400080 0x20>;
  249. #gpio-cells = <4>;
  250. };
  251. gpb2: gpio-controller@114000A0 {
  252. compatible = "samsung,exynos4-gpio";
  253. reg = <0x114000A0 0x20>;
  254. #gpio-cells = <4>;
  255. };
  256. gpb3: gpio-controller@114000C0 {
  257. compatible = "samsung,exynos4-gpio";
  258. reg = <0x114000C0 0x20>;
  259. #gpio-cells = <4>;
  260. };
  261. gpc0: gpio-controller@114000E0 {
  262. compatible = "samsung,exynos4-gpio";
  263. reg = <0x114000E0 0x20>;
  264. #gpio-cells = <4>;
  265. };
  266. gpc1: gpio-controller@11400100 {
  267. compatible = "samsung,exynos4-gpio";
  268. reg = <0x11400100 0x20>;
  269. #gpio-cells = <4>;
  270. };
  271. gpc2: gpio-controller@11400120 {
  272. compatible = "samsung,exynos4-gpio";
  273. reg = <0x11400120 0x20>;
  274. #gpio-cells = <4>;
  275. };
  276. gpc3: gpio-controller@11400140 {
  277. compatible = "samsung,exynos4-gpio";
  278. reg = <0x11400140 0x20>;
  279. #gpio-cells = <4>;
  280. };
  281. gpc4: gpio-controller@114002E0 {
  282. compatible = "samsung,exynos4-gpio";
  283. reg = <0x114002E0 0x20>;
  284. #gpio-cells = <4>;
  285. };
  286. gpd0: gpio-controller@11400160 {
  287. compatible = "samsung,exynos4-gpio";
  288. reg = <0x11400160 0x20>;
  289. #gpio-cells = <4>;
  290. };
  291. gpd1: gpio-controller@11400180 {
  292. compatible = "samsung,exynos4-gpio";
  293. reg = <0x11400180 0x20>;
  294. #gpio-cells = <4>;
  295. };
  296. gpy0: gpio-controller@114001A0 {
  297. compatible = "samsung,exynos4-gpio";
  298. reg = <0x114001A0 0x20>;
  299. #gpio-cells = <4>;
  300. };
  301. gpy1: gpio-controller@114001C0 {
  302. compatible = "samsung,exynos4-gpio";
  303. reg = <0x114001C0 0x20>;
  304. #gpio-cells = <4>;
  305. };
  306. gpy2: gpio-controller@114001E0 {
  307. compatible = "samsung,exynos4-gpio";
  308. reg = <0x114001E0 0x20>;
  309. #gpio-cells = <4>;
  310. };
  311. gpy3: gpio-controller@11400200 {
  312. compatible = "samsung,exynos4-gpio";
  313. reg = <0x11400200 0x20>;
  314. #gpio-cells = <4>;
  315. };
  316. gpy4: gpio-controller@11400220 {
  317. compatible = "samsung,exynos4-gpio";
  318. reg = <0x11400220 0x20>;
  319. #gpio-cells = <4>;
  320. };
  321. gpy5: gpio-controller@11400240 {
  322. compatible = "samsung,exynos4-gpio";
  323. reg = <0x11400240 0x20>;
  324. #gpio-cells = <4>;
  325. };
  326. gpy6: gpio-controller@11400260 {
  327. compatible = "samsung,exynos4-gpio";
  328. reg = <0x11400260 0x20>;
  329. #gpio-cells = <4>;
  330. };
  331. gpx0: gpio-controller@11400C00 {
  332. compatible = "samsung,exynos4-gpio";
  333. reg = <0x11400C00 0x20>;
  334. #gpio-cells = <4>;
  335. };
  336. gpx1: gpio-controller@11400C20 {
  337. compatible = "samsung,exynos4-gpio";
  338. reg = <0x11400C20 0x20>;
  339. #gpio-cells = <4>;
  340. };
  341. gpx2: gpio-controller@11400C40 {
  342. compatible = "samsung,exynos4-gpio";
  343. reg = <0x11400C40 0x20>;
  344. #gpio-cells = <4>;
  345. };
  346. gpx3: gpio-controller@11400C60 {
  347. compatible = "samsung,exynos4-gpio";
  348. reg = <0x11400C60 0x20>;
  349. #gpio-cells = <4>;
  350. };
  351. gpe0: gpio-controller@13400000 {
  352. compatible = "samsung,exynos4-gpio";
  353. reg = <0x13400000 0x20>;
  354. #gpio-cells = <4>;
  355. };
  356. gpe1: gpio-controller@13400020 {
  357. compatible = "samsung,exynos4-gpio";
  358. reg = <0x13400020 0x20>;
  359. #gpio-cells = <4>;
  360. };
  361. gpf0: gpio-controller@13400040 {
  362. compatible = "samsung,exynos4-gpio";
  363. reg = <0x13400040 0x20>;
  364. #gpio-cells = <4>;
  365. };
  366. gpf1: gpio-controller@13400060 {
  367. compatible = "samsung,exynos4-gpio";
  368. reg = <0x13400060 0x20>;
  369. #gpio-cells = <4>;
  370. };
  371. gpg0: gpio-controller@13400080 {
  372. compatible = "samsung,exynos4-gpio";
  373. reg = <0x13400080 0x20>;
  374. #gpio-cells = <4>;
  375. };
  376. gpg1: gpio-controller@134000A0 {
  377. compatible = "samsung,exynos4-gpio";
  378. reg = <0x134000A0 0x20>;
  379. #gpio-cells = <4>;
  380. };
  381. gpg2: gpio-controller@134000C0 {
  382. compatible = "samsung,exynos4-gpio";
  383. reg = <0x134000C0 0x20>;
  384. #gpio-cells = <4>;
  385. };
  386. gph0: gpio-controller@134000E0 {
  387. compatible = "samsung,exynos4-gpio";
  388. reg = <0x134000E0 0x20>;
  389. #gpio-cells = <4>;
  390. };
  391. gph1: gpio-controller@13400100 {
  392. compatible = "samsung,exynos4-gpio";
  393. reg = <0x13400100 0x20>;
  394. #gpio-cells = <4>;
  395. };
  396. gpv0: gpio-controller@10D10000 {
  397. compatible = "samsung,exynos4-gpio";
  398. reg = <0x10D10000 0x20>;
  399. #gpio-cells = <4>;
  400. };
  401. gpv1: gpio-controller@10D10020 {
  402. compatible = "samsung,exynos4-gpio";
  403. reg = <0x10D10020 0x20>;
  404. #gpio-cells = <4>;
  405. };
  406. gpv2: gpio-controller@10D10040 {
  407. compatible = "samsung,exynos4-gpio";
  408. reg = <0x10D10060 0x20>;
  409. #gpio-cells = <4>;
  410. };
  411. gpv3: gpio-controller@10D10060 {
  412. compatible = "samsung,exynos4-gpio";
  413. reg = <0x10D10080 0x20>;
  414. #gpio-cells = <4>;
  415. };
  416. gpv4: gpio-controller@10D10080 {
  417. compatible = "samsung,exynos4-gpio";
  418. reg = <0x10D100C0 0x20>;
  419. #gpio-cells = <4>;
  420. };
  421. gpz: gpio-controller@03860000 {
  422. compatible = "samsung,exynos4-gpio";
  423. reg = <0x03860000 0x20>;
  424. #gpio-cells = <4>;
  425. };
  426. };
  427. gsc_0: gsc@0x13e00000 {
  428. compatible = "samsung,exynos5-gsc";
  429. reg = <0x13e00000 0x1000>;
  430. interrupts = <0 85 0>;
  431. };
  432. gsc_1: gsc@0x13e10000 {
  433. compatible = "samsung,exynos5-gsc";
  434. reg = <0x13e10000 0x1000>;
  435. interrupts = <0 86 0>;
  436. };
  437. gsc_2: gsc@0x13e20000 {
  438. compatible = "samsung,exynos5-gsc";
  439. reg = <0x13e20000 0x1000>;
  440. interrupts = <0 87 0>;
  441. };
  442. gsc_3: gsc@0x13e30000 {
  443. compatible = "samsung,exynos5-gsc";
  444. reg = <0x13e30000 0x1000>;
  445. interrupts = <0 88 0>;
  446. };
  447. };