at91sam9g45.dtsi 6.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310
  1. /*
  2. * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
  3. * applies to AT91SAM9G45, AT91SAM9M10,
  4. * AT91SAM9G46, AT91SAM9M11 SoC
  5. *
  6. * Copyright (C) 2011 Atmel,
  7. * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
  8. *
  9. * Licensed under GPLv2 or later.
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. model = "Atmel AT91SAM9G45 family SoC";
  14. compatible = "atmel,at91sam9g45";
  15. interrupt-parent = <&aic>;
  16. aliases {
  17. serial0 = &dbgu;
  18. serial1 = &usart0;
  19. serial2 = &usart1;
  20. serial3 = &usart2;
  21. serial4 = &usart3;
  22. gpio0 = &pioA;
  23. gpio1 = &pioB;
  24. gpio2 = &pioC;
  25. gpio3 = &pioD;
  26. gpio4 = &pioE;
  27. tcb0 = &tcb0;
  28. tcb1 = &tcb1;
  29. i2c0 = &i2c0;
  30. i2c1 = &i2c1;
  31. };
  32. cpus {
  33. cpu@0 {
  34. compatible = "arm,arm926ejs";
  35. };
  36. };
  37. memory {
  38. reg = <0x70000000 0x10000000>;
  39. };
  40. ahb {
  41. compatible = "simple-bus";
  42. #address-cells = <1>;
  43. #size-cells = <1>;
  44. ranges;
  45. apb {
  46. compatible = "simple-bus";
  47. #address-cells = <1>;
  48. #size-cells = <1>;
  49. ranges;
  50. aic: interrupt-controller@fffff000 {
  51. #interrupt-cells = <3>;
  52. compatible = "atmel,at91rm9200-aic";
  53. interrupt-controller;
  54. reg = <0xfffff000 0x200>;
  55. atmel,external-irqs = <31>;
  56. };
  57. ramc0: ramc@ffffe400 {
  58. compatible = "atmel,at91sam9g45-ddramc";
  59. reg = <0xffffe400 0x200
  60. 0xffffe600 0x200>;
  61. };
  62. pmc: pmc@fffffc00 {
  63. compatible = "atmel,at91rm9200-pmc";
  64. reg = <0xfffffc00 0x100>;
  65. };
  66. rstc@fffffd00 {
  67. compatible = "atmel,at91sam9g45-rstc";
  68. reg = <0xfffffd00 0x10>;
  69. };
  70. pit: timer@fffffd30 {
  71. compatible = "atmel,at91sam9260-pit";
  72. reg = <0xfffffd30 0xf>;
  73. interrupts = <1 4 7>;
  74. };
  75. shdwc@fffffd10 {
  76. compatible = "atmel,at91sam9rl-shdwc";
  77. reg = <0xfffffd10 0x10>;
  78. };
  79. tcb0: timer@fff7c000 {
  80. compatible = "atmel,at91rm9200-tcb";
  81. reg = <0xfff7c000 0x100>;
  82. interrupts = <18 4 0>;
  83. };
  84. tcb1: timer@fffd4000 {
  85. compatible = "atmel,at91rm9200-tcb";
  86. reg = <0xfffd4000 0x100>;
  87. interrupts = <18 4 0>;
  88. };
  89. dma: dma-controller@ffffec00 {
  90. compatible = "atmel,at91sam9g45-dma";
  91. reg = <0xffffec00 0x200>;
  92. interrupts = <21 4 0>;
  93. };
  94. pioA: gpio@fffff200 {
  95. compatible = "atmel,at91rm9200-gpio";
  96. reg = <0xfffff200 0x100>;
  97. interrupts = <2 4 1>;
  98. #gpio-cells = <2>;
  99. gpio-controller;
  100. interrupt-controller;
  101. #interrupt-cells = <2>;
  102. };
  103. pioB: gpio@fffff400 {
  104. compatible = "atmel,at91rm9200-gpio";
  105. reg = <0xfffff400 0x100>;
  106. interrupts = <3 4 1>;
  107. #gpio-cells = <2>;
  108. gpio-controller;
  109. interrupt-controller;
  110. #interrupt-cells = <2>;
  111. };
  112. pioC: gpio@fffff600 {
  113. compatible = "atmel,at91rm9200-gpio";
  114. reg = <0xfffff600 0x100>;
  115. interrupts = <4 4 1>;
  116. #gpio-cells = <2>;
  117. gpio-controller;
  118. interrupt-controller;
  119. #interrupt-cells = <2>;
  120. };
  121. pioD: gpio@fffff800 {
  122. compatible = "atmel,at91rm9200-gpio";
  123. reg = <0xfffff800 0x100>;
  124. interrupts = <5 4 1>;
  125. #gpio-cells = <2>;
  126. gpio-controller;
  127. interrupt-controller;
  128. #interrupt-cells = <2>;
  129. };
  130. pioE: gpio@fffffa00 {
  131. compatible = "atmel,at91rm9200-gpio";
  132. reg = <0xfffffa00 0x100>;
  133. interrupts = <5 4 1>;
  134. #gpio-cells = <2>;
  135. gpio-controller;
  136. interrupt-controller;
  137. #interrupt-cells = <2>;
  138. };
  139. dbgu: serial@ffffee00 {
  140. compatible = "atmel,at91sam9260-usart";
  141. reg = <0xffffee00 0x200>;
  142. interrupts = <1 4 7>;
  143. status = "disabled";
  144. };
  145. usart0: serial@fff8c000 {
  146. compatible = "atmel,at91sam9260-usart";
  147. reg = <0xfff8c000 0x200>;
  148. interrupts = <7 4 5>;
  149. atmel,use-dma-rx;
  150. atmel,use-dma-tx;
  151. status = "disabled";
  152. };
  153. usart1: serial@fff90000 {
  154. compatible = "atmel,at91sam9260-usart";
  155. reg = <0xfff90000 0x200>;
  156. interrupts = <8 4 5>;
  157. atmel,use-dma-rx;
  158. atmel,use-dma-tx;
  159. status = "disabled";
  160. };
  161. usart2: serial@fff94000 {
  162. compatible = "atmel,at91sam9260-usart";
  163. reg = <0xfff94000 0x200>;
  164. interrupts = <9 4 5>;
  165. atmel,use-dma-rx;
  166. atmel,use-dma-tx;
  167. status = "disabled";
  168. };
  169. usart3: serial@fff98000 {
  170. compatible = "atmel,at91sam9260-usart";
  171. reg = <0xfff98000 0x200>;
  172. interrupts = <10 4 5>;
  173. atmel,use-dma-rx;
  174. atmel,use-dma-tx;
  175. status = "disabled";
  176. };
  177. macb0: ethernet@fffbc000 {
  178. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  179. reg = <0xfffbc000 0x100>;
  180. interrupts = <25 4 3>;
  181. status = "disabled";
  182. };
  183. i2c0: i2c@fff84000 {
  184. compatible = "atmel,at91sam9g10-i2c";
  185. reg = <0xfff84000 0x100>;
  186. interrupts = <12 4 6>;
  187. #address-cells = <1>;
  188. #size-cells = <0>;
  189. status = "disabled";
  190. };
  191. i2c1: i2c@fff88000 {
  192. compatible = "atmel,at91sam9g10-i2c";
  193. reg = <0xfff88000 0x100>;
  194. interrupts = <13 4 6>;
  195. #address-cells = <1>;
  196. #size-cells = <0>;
  197. status = "disabled";
  198. };
  199. adc0: adc@fffb0000 {
  200. compatible = "atmel,at91sam9260-adc";
  201. reg = <0xfffb0000 0x100>;
  202. interrupts = <20 4 0>;
  203. atmel,adc-use-external-triggers;
  204. atmel,adc-channels-used = <0xff>;
  205. atmel,adc-vref = <3300>;
  206. atmel,adc-num-channels = <8>;
  207. atmel,adc-startup-time = <40>;
  208. atmel,adc-channel-base = <0x30>;
  209. atmel,adc-drdy-mask = <0x10000>;
  210. atmel,adc-status-register = <0x1c>;
  211. atmel,adc-trigger-register = <0x08>;
  212. trigger@0 {
  213. trigger-name = "external-rising";
  214. trigger-value = <0x1>;
  215. trigger-external;
  216. };
  217. trigger@1 {
  218. trigger-name = "external-falling";
  219. trigger-value = <0x2>;
  220. trigger-external;
  221. };
  222. trigger@2 {
  223. trigger-name = "external-any";
  224. trigger-value = <0x3>;
  225. trigger-external;
  226. };
  227. trigger@3 {
  228. trigger-name = "continuous";
  229. trigger-value = <0x6>;
  230. };
  231. };
  232. };
  233. nand0: nand@40000000 {
  234. compatible = "atmel,at91rm9200-nand";
  235. #address-cells = <1>;
  236. #size-cells = <1>;
  237. reg = <0x40000000 0x10000000
  238. 0xffffe200 0x200
  239. >;
  240. atmel,nand-addr-offset = <21>;
  241. atmel,nand-cmd-offset = <22>;
  242. gpios = <&pioC 8 0
  243. &pioC 14 0
  244. 0
  245. >;
  246. status = "disabled";
  247. };
  248. usb0: ohci@00700000 {
  249. compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  250. reg = <0x00700000 0x100000>;
  251. interrupts = <22 4 2>;
  252. status = "disabled";
  253. };
  254. usb1: ehci@00800000 {
  255. compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
  256. reg = <0x00800000 0x100000>;
  257. interrupts = <22 4 2>;
  258. status = "disabled";
  259. };
  260. };
  261. i2c@0 {
  262. compatible = "i2c-gpio";
  263. gpios = <&pioA 20 0 /* sda */
  264. &pioA 21 0 /* scl */
  265. >;
  266. i2c-gpio,sda-open-drain;
  267. i2c-gpio,scl-open-drain;
  268. i2c-gpio,delay-us = <5>; /* ~100 kHz */
  269. #address-cells = <1>;
  270. #size-cells = <0>;
  271. status = "disabled";
  272. };
  273. };